1 /*
2 * Copyright (c) 2020-2022, Intel Corporation
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice shall be included
12 * in all copies or substantial portions of the Software.
13 *
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
15 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20 * OTHER DEALINGS IN THE SOFTWARE.
21 */
22 //!
23 //! \file media_sku_wa_g11.cpp
24 //!
25
26 #include "igfxfmid.h"
27 #include "linux_system_info.h"
28 #include "skuwa_factory.h"
29 #include "linux_skuwa_debug.h"
30 #include "linux_media_skuwa.h"
31
32 #define GEN11_VEBOX2_SUBSLICES 4
33
34 //extern template class DeviceInfoFactory<GfxDeviceInfo>;
35 typedef DeviceInfoFactory<LinuxDeviceInit> DeviceInit;
36
37 static struct LinuxCodecInfo iclCodecInfo =
38 {
39 .avcDecoding = 1,
40 .mpeg2Decoding = 1,
41 .vp8Decoding = 1,
42 .vc1Decoding = SET_STATUS_BY_FULL_OPEN_SOURCE(1, 0),
43 .jpegDecoding = 1,
44 .avcEncoding = SET_STATUS_BY_FULL_OPEN_SOURCE(1, 0),
45 .mpeg2Encoding = SET_STATUS_BY_FULL_OPEN_SOURCE(1, 0),
46 .hevcDecoding = 1,
47 .hevcEncoding = SET_STATUS_BY_FULL_OPEN_SOURCE(1, 0),
48 .jpegEncoding = 1,
49 .avcVdenc = 1,
50 .vp9Decoding = 1,
51 .hevc10Decoding = 1,
52 .vp9b10Decoding = 1,
53 .hevc10Encoding = SET_STATUS_BY_FULL_OPEN_SOURCE(1, 0),
54 .hevc12Encoding = 0,
55 .vp8Encoding = SET_STATUS_BY_FULL_OPEN_SOURCE(1, 0),
56 .hevcVdenc = 1,
57 .vp9Vdenc = 1,
58 };
59
InitIclMediaSku(struct GfxDeviceInfo * devInfo,MediaFeatureTable * skuTable,struct LinuxDriverInfo * drvInfo,MediaUserSettingSharedPtr userSettingPtr)60 static bool InitIclMediaSku(struct GfxDeviceInfo *devInfo,
61 MediaFeatureTable *skuTable,
62 struct LinuxDriverInfo *drvInfo,
63 MediaUserSettingSharedPtr userSettingPtr)
64 {
65 if ((devInfo == nullptr) || (skuTable == nullptr) || (drvInfo == nullptr))
66 {
67 DEVINFO_ERROR("null ptr is passed\n");
68 return false;
69 }
70
71 if (drvInfo->hasBsd)
72 {
73 LinuxCodecInfo *codecInfo = &iclCodecInfo;
74
75 MEDIA_WR_SKU(skuTable, FtrAVCVLDLongDecoding, codecInfo->avcDecoding);
76 MEDIA_WR_SKU(skuTable, FtrMPEG2VLDDecoding, codecInfo->mpeg2Decoding);
77 MEDIA_WR_SKU(skuTable, FtrIntelVP8VLDDecoding, codecInfo->vp8Decoding);
78 MEDIA_WR_SKU(skuTable, FtrVC1VLDDecoding, codecInfo->vc1Decoding);
79 MEDIA_WR_SKU(skuTable, FtrIntelJPEGDecoding, codecInfo->jpegDecoding);
80 MEDIA_WR_SKU(skuTable, FtrEncodeAVC, codecInfo->avcEncoding);
81 MEDIA_WR_SKU(skuTable, FtrEncodeMPEG2, codecInfo->mpeg2Encoding);
82 MEDIA_WR_SKU(skuTable, FtrIntelHEVCVLDMainDecoding, codecInfo->hevcDecoding);
83 MEDIA_WR_SKU(skuTable, FtrIntelHEVCVLDMain10Decoding, codecInfo->hevc10Decoding);
84
85 MEDIA_WR_SKU(skuTable, FtrEncodeHEVC, codecInfo->hevcEncoding);
86 MEDIA_WR_SKU(skuTable, FtrEncodeHEVC10bit, codecInfo->hevc10Encoding);
87 MEDIA_WR_SKU(skuTable, FtrEncodeHEVC10bit422, codecInfo->hevc10Encoding);
88 MEDIA_WR_SKU(skuTable, FtrEncodeJPEG, codecInfo->jpegEncoding);
89 MEDIA_WR_SKU(skuTable, FtrEncodeAVCVdenc, codecInfo->avcVdenc);
90 MEDIA_WR_SKU(skuTable, FtrVP9VLDDecoding, codecInfo->vp9Decoding);
91 MEDIA_WR_SKU(skuTable, FtrIntelVP9VLDProfile0Decoding8bit420, codecInfo->vp9Decoding);
92 MEDIA_WR_SKU(skuTable, FtrVP9VLD10bProfile2Decoding, codecInfo->vp9b10Decoding);
93 MEDIA_WR_SKU(skuTable, FtrIntelVP9VLDProfile2Decoding, codecInfo->vp9b10Decoding);
94 MEDIA_WR_SKU(skuTable, FtrIntelVP9VLDProfile2Decoding10bit420, codecInfo->vp9b10Decoding);
95
96
97 /* VP8 enc */
98 MEDIA_WR_SKU(skuTable, FtrEncodeVP8, codecInfo->vp8Encoding);
99
100 /* HEVC VDENC */
101 MEDIA_WR_SKU(skuTable, FtrEncodeHEVCVdencMain, codecInfo->hevcVdenc);
102 MEDIA_WR_SKU(skuTable, FtrEncodeHEVCVdencMain10, codecInfo->hevcVdenc);
103
104 /* Vp9 VDENC */
105 MEDIA_WR_SKU(skuTable, FtrEncodeVP9Vdenc, codecInfo->vp9Vdenc);
106
107 /* HEVC Main8/10bit-422/444 Decoding. Currently it is enabled. */
108 MEDIA_WR_SKU(skuTable, FtrIntelHEVCVLD42210bitDecoding, 1);
109 MEDIA_WR_SKU(skuTable, FtrIntelHEVCVLD4448bitDecoding, 1);
110 MEDIA_WR_SKU(skuTable, FtrIntelHEVCVLD44410bitDecoding, 1);
111
112 /* HEVC VDENC Main8/10 422/444 Encoding. */
113 MEDIA_WR_SKU(skuTable, FtrEncodeHEVCVdencMain444, codecInfo->hevcVdenc);
114 MEDIA_WR_SKU(skuTable, FtrEncodeHEVCVdencMain422, 0);
115 MEDIA_WR_SKU(skuTable, FtrEncodeHEVCVdencMain10bit422, 0);
116 MEDIA_WR_SKU(skuTable, FtrEncodeHEVCVdencMain10bit444, codecInfo->hevcVdenc);
117
118 /* VP9 Dec 8 bit 444 */
119 MEDIA_WR_SKU(skuTable, FtrIntelVP9VLDProfile1Decoding8bit444, 1);
120 /* VP9 Dec 10 Bit 444*/
121 MEDIA_WR_SKU(skuTable, FtrIntelVP9VLDProfile3Decoding10bit444, 1);
122
123 /* VP9 VDENC 8Bit 444 */
124 MEDIA_WR_SKU(skuTable, FtrEncodeVP9Vdenc8bit444, codecInfo->vp9Vdenc);
125 /* VP9 VDENC 10Bit 420/444 */
126 MEDIA_WR_SKU(skuTable, FtrEncodeVP9Vdenc10bit420, codecInfo->vp9Vdenc);
127 MEDIA_WR_SKU(skuTable, FtrEncodeVP9Vdenc10bit444, codecInfo->vp9Vdenc);
128
129 }
130
131 MEDIA_WR_SKU(skuTable, FtrEnableMediaKernels, drvInfo->hasHuc);
132
133 if (devInfo->eGTType == GTTYPE_GT1)
134 {
135 MEDIA_WR_SKU(skuTable, FtrGT1, 1);
136 }
137 else if (devInfo->eGTType == GTTYPE_GT1_5)
138 {
139 MEDIA_WR_SKU(skuTable, FtrGT1_5, 1);
140 }
141 else if (devInfo->eGTType == GTTYPE_GT2)
142 {
143 MEDIA_WR_SKU(skuTable, FtrGT2, 1);
144 }
145 else if (devInfo->eGTType == GTTYPE_GT3)
146 {
147 MEDIA_WR_SKU(skuTable, FtrGT3, 1);
148 }
149 else if (devInfo->eGTType == GTTYPE_GT4)
150 {
151 MEDIA_WR_SKU(skuTable, FtrGT4, 1);
152 }
153 else
154 {
155 /* GT1 is by default */
156 MEDIA_WR_SKU(skuTable, FtrGT1, 1);
157 }
158
159 MEDIA_WR_SKU(skuTable, FtrVERing, drvInfo->hasVebox);
160 MEDIA_WR_SKU(skuTable, FtrPPGTT, drvInfo->hasPpgtt);
161 MEDIA_WR_SKU(skuTable, FtrEDram, devInfo->hasERAM);
162
163 /* Virtual VDBOX ring is used on Gen11 */
164 MEDIA_WR_SKU(skuTable, FtrVcs2, 0);
165
166 MEDIA_WR_SKU(skuTable, FtrSingleVeboxSlice, 1);
167 if ((devInfo->productFamily == IGFX_ICELAKE) &&
168 (devInfo->SubSliceCount >= GEN11_VEBOX2_SUBSLICES))
169 {
170 MEDIA_WR_SKU(skuTable, FtrSingleVeboxSlice, 0);
171 }
172
173 MEDIA_WR_SKU(skuTable, FtrSSEUPowerGating, 1);
174 MEDIA_WR_SKU(skuTable, FtrSSEUPowerGatingControlByUMD, 1);
175
176 /* MMC is disabled by default. */
177 MEDIA_WR_SKU(skuTable, FtrMemoryCompression, 0);
178 MEDIA_WR_SKU(skuTable, FtrHcpDecMemoryCompression, 0);
179 MEDIA_WR_SKU(skuTable, Ftr10bitDecMemoryCompression, 0);
180 MEDIA_WR_SKU(skuTable, FtrSFCPipe, 1);
181
182 MEDIA_WR_SKU(skuTable, FtrPerCtxtPreemptionGranularityControl, 1);
183
184 MEDIA_WR_SKU(skuTable, FtrVpP010Output, 1);
185 MEDIA_WR_SKU(skuTable, FtrVp10BitSupport, 1);
186 MEDIA_WR_SKU(skuTable, FtrVp16BitSupport, 0);
187
188 MEDIA_WR_SKU(skuTable, FtrContextBasedScheduling, 1);
189
190 MEDIA_WR_SKU(skuTable, FtrTileY, 1);
191
192 MEDIA_WR_SKU(skuTable, FtrUseSwSwizzling, 1);
193
194 MEDIA_WR_SKU(skuTable, FtrHDR, 1);
195
196 return true;
197 }
198
InitIclMediaWa(struct GfxDeviceInfo * devInfo,MediaWaTable * waTable,struct LinuxDriverInfo * drvInfo)199 static bool InitIclMediaWa(struct GfxDeviceInfo *devInfo,
200 MediaWaTable *waTable,
201 struct LinuxDriverInfo *drvInfo)
202 {
203 if ((devInfo == nullptr) || (waTable == nullptr) || (drvInfo == nullptr))
204 {
205 DEVINFO_ERROR("null ptr is passed\n");
206 return false;
207 }
208
209 MEDIA_WR_WA(waTable, WaForceGlobalGTT, !drvInfo->hasPpgtt);
210 MEDIA_WR_WA(waTable, WaMidBatchPreemption, 0);
211 MEDIA_WR_WA(waTable, WaArbitraryNumMbsInSlice, 1);
212 MEDIA_WR_WA(waTable, WaSuperSliceHeaderPacking, 1);
213
214 /* This is not needed
215 MEDIA_WR_WA(waTable, Wa8BitFrameIn10BitHevc, 0);
216 */
217 MEDIA_WR_WA(waTable, WaSFC270DegreeRotation, 0);
218
219 MEDIA_WR_WA(waTable, WaEnableYV12BugFixInHalfSliceChicken7, 1);
220
221 MEDIA_WR_WA(waTable, WaDummyReference, 1);
222
223 MEDIA_WR_WA(waTable, Wa16KInputHeightNV12Planar420, 1);
224 MEDIA_WR_WA(waTable, WaDisableCodecMmc, 1);
225
226 /*software wa to prevent error propagation for vertical intra refresh on H264 VDEnc*/
227 MEDIA_WR_WA(waTable, Wa_18011246551, 1);
228
229 MEDIA_WR_WA(waTable, WaDisableSetObjectCapture, 0);
230
231 MEDIA_WR_WA(waTable, Wa_Vp9UnalignedHeight, 1);
232
233 return true;
234 }
235
236 static struct LinuxDeviceInit iclDeviceInit =
237 {
238 .productFamily = IGFX_ICELAKE,
239 .InitMediaFeature = InitIclMediaSku,
240 .InitMediaWa = InitIclMediaWa,
241 };
242
243 static bool iclDeviceRegister = DeviceInfoFactory<LinuxDeviceInit>::
244 RegisterDevice(IGFX_ICELAKE, &iclDeviceInit);
245
246 static bool icllpDeviceRegister = DeviceInfoFactory<LinuxDeviceInit>::
247 RegisterDevice(IGFX_ICELAKE_LP, &iclDeviceInit);
248
249 static struct LinuxCodecInfo ehlCodecInfo =
250 {
251 .avcDecoding = 1,
252 .mpeg2Decoding = 1,
253 .vp8Decoding = 1,
254 .vc1Decoding = 1,
255 .jpegDecoding = 1,
256 .avcEncoding = 0,
257 .mpeg2Encoding = 0,
258 .hevcDecoding = 1,
259 .hevcEncoding = 0,
260 .jpegEncoding = 1,
261 .avcVdenc = 1,
262 .vp9Decoding = 1,
263 .hevc10Decoding = 1,
264 .vp9b10Decoding = 1,
265 .hevc10Encoding = 0,
266 .hevc12Encoding = 0,
267 .vp8Encoding = 0,
268 .hevcVdenc = 1,
269 .vp9Vdenc = 1,
270 };
271
InitEhlMediaSku(struct GfxDeviceInfo * devInfo,MediaFeatureTable * skuTable,struct LinuxDriverInfo * drvInfo,MediaUserSettingSharedPtr userSettingPtr)272 static bool InitEhlMediaSku(struct GfxDeviceInfo *devInfo,
273 MediaFeatureTable *skuTable,
274 struct LinuxDriverInfo *drvInfo,
275 MediaUserSettingSharedPtr userSettingPtr)
276 {
277 if ((devInfo == nullptr) || (skuTable == nullptr) || (drvInfo == nullptr))
278 {
279 DEVINFO_ERROR("null ptr is passed\n");
280 return false;
281 }
282
283 if (drvInfo->hasBsd)
284 {
285 LinuxCodecInfo *codecInfo = &ehlCodecInfo;
286
287 MEDIA_WR_SKU(skuTable, FtrAVCVLDLongDecoding, codecInfo->avcDecoding);
288 MEDIA_WR_SKU(skuTable, FtrMPEG2VLDDecoding, codecInfo->mpeg2Decoding);
289 MEDIA_WR_SKU(skuTable, FtrIntelVP8VLDDecoding, codecInfo->vp8Decoding);
290 MEDIA_WR_SKU(skuTable, FtrVC1VLDDecoding, codecInfo->vc1Decoding);
291 MEDIA_WR_SKU(skuTable, FtrIntelJPEGDecoding, codecInfo->jpegDecoding);
292 MEDIA_WR_SKU(skuTable, FtrEncodeAVC, codecInfo->avcEncoding);
293 MEDIA_WR_SKU(skuTable, FtrEncodeMPEG2, codecInfo->mpeg2Encoding);
294 MEDIA_WR_SKU(skuTable, FtrIntelHEVCVLDMainDecoding, codecInfo->hevcDecoding);
295 MEDIA_WR_SKU(skuTable, FtrIntelHEVCVLDMain10Decoding, codecInfo->hevc10Decoding);
296
297 MEDIA_WR_SKU(skuTable, FtrEncodeHEVC, codecInfo->hevcEncoding);
298 MEDIA_WR_SKU(skuTable, FtrEncodeHEVC10bit, codecInfo->hevc10Encoding);
299 MEDIA_WR_SKU(skuTable, FtrEncodeJPEG, codecInfo->jpegEncoding);
300 MEDIA_WR_SKU(skuTable, FtrEncodeAVCVdenc, codecInfo->avcVdenc);
301 MEDIA_WR_SKU(skuTable, FtrVP9VLDDecoding, codecInfo->vp9Decoding);
302 MEDIA_WR_SKU(skuTable, FtrIntelVP9VLDProfile0Decoding8bit420, codecInfo->vp9Decoding);
303 MEDIA_WR_SKU(skuTable, FtrVP9VLD10bProfile2Decoding, codecInfo->vp9b10Decoding);
304 MEDIA_WR_SKU(skuTable, FtrIntelVP9VLDProfile2Decoding, codecInfo->vp9b10Decoding);
305
306 /* VP8 enc */
307 MEDIA_WR_SKU(skuTable, FtrEncodeVP8, codecInfo->vp8Encoding);
308
309 /* HEVC VDENC */
310 MEDIA_WR_SKU(skuTable, FtrEncodeHEVCVdencMain, codecInfo->hevcVdenc);
311 MEDIA_WR_SKU(skuTable, FtrEncodeHEVCVdencMain10, codecInfo->hevcVdenc);
312
313 /* Vp9 VDENC */
314 MEDIA_WR_SKU(skuTable, FtrEncodeVP9Vdenc, codecInfo->vp9Vdenc);
315
316 /* HEVC Main8/10bit-422/444 Decoding. Currently it is enabled. */
317 MEDIA_WR_SKU(skuTable, FtrIntelHEVCVLD42210bitDecoding, 1);
318 MEDIA_WR_SKU(skuTable, FtrIntelHEVCVLD4448bitDecoding, 1);
319 MEDIA_WR_SKU(skuTable, FtrIntelHEVCVLD44410bitDecoding, 1);
320
321 /* HEVC VDENC Main8/10 422/444 Encoding. */
322 MEDIA_WR_SKU(skuTable, FtrEncodeHEVCVdencMain444, codecInfo->hevcVdenc);
323 MEDIA_WR_SKU(skuTable, FtrEncodeHEVCVdencMain422, 0);
324 MEDIA_WR_SKU(skuTable, FtrEncodeHEVCVdencMain10bit422, 0);
325 MEDIA_WR_SKU(skuTable, FtrEncodeHEVCVdencMain10bit444, codecInfo->hevcVdenc);
326
327 /* VP9 Dec 8 bit 444 */
328 MEDIA_WR_SKU(skuTable, FtrIntelVP9VLDProfile1Decoding8bit444, 1);
329 /* VP9 Dec 10 Bit 444*/
330 MEDIA_WR_SKU(skuTable, FtrIntelVP9VLDProfile3Decoding10bit444, 1);
331
332 /* VP9 VDENC 8Bit 444 */
333 MEDIA_WR_SKU(skuTable, FtrEncodeVP9Vdenc8bit444, codecInfo->vp9Vdenc);
334 /* VP9 VDENC 10Bit 420/444 */
335 MEDIA_WR_SKU(skuTable, FtrEncodeVP9Vdenc10bit420, codecInfo->vp9Vdenc);
336 MEDIA_WR_SKU(skuTable, FtrEncodeVP9Vdenc10bit444, codecInfo->vp9Vdenc);
337
338 }
339
340 MEDIA_WR_SKU(skuTable, FtrEnableMediaKernels, drvInfo->hasHuc);
341
342 if (devInfo->eGTType == GTTYPE_GT1)
343 {
344 MEDIA_WR_SKU(skuTable, FtrGT1, 1);
345 }
346 else if (devInfo->eGTType == GTTYPE_GT1_5)
347 {
348 MEDIA_WR_SKU(skuTable, FtrGT1_5, 1);
349 }
350 else if (devInfo->eGTType == GTTYPE_GT2)
351 {
352 MEDIA_WR_SKU(skuTable, FtrGT2, 1);
353 }
354 else if (devInfo->eGTType == GTTYPE_GT3)
355 {
356 MEDIA_WR_SKU(skuTable, FtrGT3, 1);
357 }
358 else if (devInfo->eGTType == GTTYPE_GT4)
359 {
360 MEDIA_WR_SKU(skuTable, FtrGT4, 1);
361 }
362 else
363 {
364 /* GT1 is by default */
365 MEDIA_WR_SKU(skuTable, FtrGT1, 1);
366 }
367
368 MEDIA_WR_SKU(skuTable, FtrVERing, drvInfo->hasVebox);
369 MEDIA_WR_SKU(skuTable, FtrPPGTT, drvInfo->hasPpgtt);
370 MEDIA_WR_SKU(skuTable, FtrEDram, devInfo->hasERAM);
371
372 MEDIA_WR_SKU(skuTable, FtrDisableVEBoxFeatures, 1);
373
374 /* Virtual VDBOX ring is used on Gen11 */
375 MEDIA_WR_SKU(skuTable, FtrVcs2, 0);
376
377 MEDIA_WR_SKU(skuTable, FtrSingleVeboxSlice, 1);
378 MEDIA_WR_SKU(skuTable, FtrSSEUPowerGating, 1);
379 MEDIA_WR_SKU(skuTable, FtrSSEUPowerGatingControlByUMD, 1);
380
381 /* MMC is disabled by default. */
382 MEDIA_WR_SKU(skuTable, FtrMemoryCompression, 0);
383 MEDIA_WR_SKU(skuTable, FtrHcpDecMemoryCompression, 0);
384 MEDIA_WR_SKU(skuTable, Ftr10bitDecMemoryCompression, 0);
385 MEDIA_WR_SKU(skuTable, FtrSFCPipe, 1);
386 MEDIA_WR_SKU(skuTable, FtrDisableVDBox2SFC, 1);
387
388 MEDIA_WR_SKU(skuTable, FtrPerCtxtPreemptionGranularityControl, 1);
389
390 MEDIA_WR_SKU(skuTable, FtrVpP010Output, 1);
391 MEDIA_WR_SKU(skuTable, FtrVp10BitSupport, 1);
392 MEDIA_WR_SKU(skuTable, FtrVp16BitSupport, 0);
393
394 MEDIA_WR_SKU(skuTable, FtrContextBasedScheduling, 0);
395
396 MEDIA_WR_SKU(skuTable, FtrTileY, 1);
397
398 MEDIA_WR_SKU(skuTable, FtrUseSwSwizzling, 1);
399
400 return true;
401 }
402
InitEhlMediaWa(struct GfxDeviceInfo * devInfo,MediaWaTable * waTable,struct LinuxDriverInfo * drvInfo)403 static bool InitEhlMediaWa(struct GfxDeviceInfo *devInfo,
404 MediaWaTable *waTable,
405 struct LinuxDriverInfo *drvInfo)
406 {
407 if ((devInfo == nullptr) || (waTable == nullptr) || (drvInfo == nullptr))
408 {
409 DEVINFO_ERROR("null ptr is passed\n");
410 return false;
411 }
412
413 MEDIA_WR_WA(waTable, WaForceGlobalGTT, !drvInfo->hasPpgtt);
414 MEDIA_WR_WA(waTable, WaMidBatchPreemption, 0);
415 MEDIA_WR_WA(waTable, WaArbitraryNumMbsInSlice, 1);
416 MEDIA_WR_WA(waTable, WaSuperSliceHeaderPacking, 1);
417
418 MEDIA_WR_WA(waTable, WaSFC270DegreeRotation, 0);
419
420 MEDIA_WR_WA(waTable, WaEnableYV12BugFixInHalfSliceChicken7, 1);
421
422 MEDIA_WR_WA(waTable, WaVeboxInputHeight16Aligned, 1);
423
424 MEDIA_WR_WA(waTable, Wa16KInputHeightNV12Planar420, 1);
425 MEDIA_WR_WA(waTable, WaDisableCodecMmc, 1);
426
427 /*Software workaround to disable the UV offset calculation by gmmlib
428 CPU blt call will add/remove padding on the platform*/
429 MEDIA_WR_WA(waTable, WaDisableGmmLibOffsetInDeriveImage, 1);
430 return true;
431 }
432
433 static struct LinuxDeviceInit ehlDeviceInit =
434 {
435 .productFamily = IGFX_ELKHARTLAKE,
436 .InitMediaFeature = InitEhlMediaSku,
437 .InitMediaWa = InitEhlMediaWa,
438 };
439
440 static bool ehlDeviceRegister = DeviceInfoFactory<LinuxDeviceInit>::
441 RegisterDevice(IGFX_ELKHARTLAKE, &ehlDeviceInit);
442