1 /*
2 * Copyright (c) 2011-2020, Intel Corporation
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice shall be included
12 * in all copies or substantial portions of the Software.
13 *
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
15 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20 * OTHER DEALINGS IN THE SOFTWARE.
21 */
22 //!
23 //! \file vphal_render_vebox_g9_base.cpp
24 //! \brief Interface and structure specific for SKL (GEN9) Vebox
25 //! \details Interface and structure specific for SKL (GEN9) Vebox
26 //!
27 #include "vphal.h"
28 #include "vphal_render_vebox_base.h"
29 #include "vphal_render_vebox_g9_base.h"
30 #include "vphal_render_sfc_g9_base.h"
31 #include "vphal_render_vebox_util_base.h"
32 #include "vpkrnheader.h"
33 #if defined(ENABLE_KERNELS) && !defined(_FULL_OPEN_SOURCE)
34 #include "igvpkrn_isa_g9.h"
35 #endif
36
37 #define MAX_INPUT_PREC_BITS 16
38 #define DOWNSHIFT_WITH_ROUND(x, n) (((x) + (((n) > 0) ? (1 << ((n) - 1)) : 0)) >> (n))
39 #define INTERP(x0, x1, x, y0, y1) ((uint32_t) floor(y0+(x-x0)*(y1-y0)/(double)(x1-x0)))
40
41 const char g_KernelDNDI_Str_g9[KERNEL_VEBOX_BASE_MAX][MAX_PATH] =
42 {
43 DBG_TEXT("Reserved"),
44 DBG_TEXT("UpdateDNState"),
45 };
46
47 // Kernel Params ---------------------------------------------------------------
48 const RENDERHAL_KERNEL_PARAM g_Vebox_KernelParam_g9[KERNEL_VEBOX_BASE_MAX] =
49 {
50 ///* GRF_Count
51 // | BT_Count
52 // | | Sampler_Count
53 // | | | Thread_Count
54 // | | | | GRF_Start_Register
55 // | | | | | CURBE_Length
56 // | | | | | | block_width
57 // | | | | | | | block_height
58 // | | | | | | | | blocks_x
59 // | | | | | | | | | blocks_y
60 // | | | | | | | | | |*/
61 { 0, 0, 0, VPHAL_USE_MEDIA_THREADS_MAX, 0, 0, 0, 0, 0, 0 }, // Reserved
62 { 4, 34, 0, VPHAL_USE_MEDIA_THREADS_MAX, 0, 1, 64, 8, 1, 1 }, // UPDATEDNSTATE
63 };
64
65 const uint32_t dwDenoiseASDThreshold[NOISEFACTOR_MAX + 1] = {
66 512, 514, 516, 518, 520, 522, 524, 526, 528, 530, 532, 534, 536, 538, 540, 542,
67 544, 546, 548, 550, 552, 554, 556, 558, 560, 562, 564, 566, 568, 570, 572, 574,
68 576, 578, 580, 582, 584, 586, 588, 590, 592, 594, 596, 598, 600, 602, 604, 606,
69 608, 610, 612, 614, 616, 618, 620, 622, 624, 626, 628, 630, 632, 634, 636, 638,
70 640 };
71
72 const uint32_t dwDenoiseHistoryDelta[NOISEFACTOR_MAX + 1] = {
73 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4,
74 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5,
75 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6,
76 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7,
77 8 };
78
79 const uint32_t dwDenoiseMaximumHistory[NOISEFACTOR_MAX + 1] = {
80 144, 145, 146, 147, 148, 149, 150, 151, 152, 153, 154, 155, 156, 157, 158, 159,
81 160, 161, 162, 163, 164, 165, 166, 167, 168, 169, 170, 171, 172, 173, 174, 175,
82 176, 177, 178, 179, 180, 181, 182, 183, 184, 185, 186, 187, 188, 189, 190, 191,
83 192, 193, 194, 195, 196, 197, 198, 199, 200, 201, 202, 203, 204, 205, 206, 207,
84 208 };
85
86 const uint32_t dwDenoiseSTADThreshold[NOISEFACTOR_MAX + 1] = {
87 2048, 2052, 2056, 2060, 2064, 2068, 2072, 2076, 2080, 2084, 2088, 2092, 2096, 2100, 2104, 2108,
88 2112, 2116, 2120, 2124, 2128, 2132, 2136, 2140, 2144, 2148, 2152, 2156, 2160, 2164, 2168, 2172,
89 2176, 2180, 2184, 2188, 2192, 2196, 2200, 2204, 2208, 2212, 2216, 2220, 2224, 2228, 2232, 2236,
90 2240, 2244, 2248, 2252, 2256, 2260, 2264, 2268, 2272, 2276, 2280, 2284, 2288, 2292, 2296, 2300,
91 2304 };
92
93 const uint32_t dwDenoiseSCMThreshold[NOISEFACTOR_MAX + 1] = {
94 512, 514, 516, 518, 520, 522, 524, 526, 528, 530, 532, 534, 536, 538, 540, 542,
95 544, 546, 548, 550, 552, 554, 556, 558, 560, 562, 564, 566, 568, 570, 572, 574,
96 576, 578, 580, 582, 584, 586, 588, 590, 592, 594, 596, 598, 600, 602, 604, 606,
97 608, 610, 612, 614, 616, 618, 620, 622, 624, 626, 628, 630, 632, 634, 636, 638,
98 640 };
99
100 const uint32_t dwDenoiseMPThreshold[NOISEFACTOR_MAX + 1] = {
101 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
102 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
103 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1,
104 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1,
105 2 };
106
107 const uint32_t dwLTDThreshold[NOISEFACTOR_MAX + 1] = {
108 64, 65, 66, 67, 68, 69, 70, 71, 72, 73, 74, 75, 76, 77, 78, 79,
109 80, 81, 82, 83, 84, 85, 86, 87, 88, 89, 90, 91, 92, 93, 94, 95,
110 96, 97, 98, 99, 100, 101, 102, 103, 104, 105, 106, 107, 108, 109, 110, 111,
111 112, 113, 114, 115, 116, 117, 118, 119, 120, 121, 122, 123, 124, 125, 126, 127,
112 128 };
113
114 const uint32_t dwTDThreshold[NOISEFACTOR_MAX + 1] = {
115 128, 129, 130, 131, 132, 133, 134, 135, 136, 137, 138, 139, 140, 141, 142, 143,
116 144, 145, 146, 147, 148, 149, 150, 151, 152, 153, 154, 155, 156, 157, 158, 159,
117 160, 161, 162, 163, 164, 165, 166, 167, 168, 169, 170, 171, 172, 173, 174, 175,
118 176, 177, 178, 179, 180, 181, 182, 183, 184, 185, 186, 187, 188, 189, 190, 191,
119 192 };
120
121 const uint32_t dwGoodNeighborThreshold[NOISEFACTOR_MAX + 1] = {
122 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
123 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
124 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
125 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
126 0 };
127
128 const uint32_t dwPixRangeThreshold0[NOISEFACTOR_MAX + 1] = {
129 32, 37, 42, 47, 52, 57, 62, 67, 72, 77, 82, 87, 92, 97, 102, 107,
130 112, 117, 122, 127, 132, 137, 142, 147, 152, 157, 162, 167, 172, 177, 182, 187,
131 192, 198, 204, 210, 216, 222, 228, 234, 240, 246, 252, 258, 264, 270, 276, 282,
132 288, 294, 300, 306, 312, 318, 324, 330, 336, 342, 348, 354, 360, 366, 372, 378,
133 384 };
134
135 const uint32_t dwPixRangeThreshold1[NOISEFACTOR_MAX + 1] = {
136 64, 70, 76, 82, 88, 94, 100, 106, 112, 118, 124, 130, 136, 142, 148, 154,
137 160, 166, 172, 178, 184, 190, 196, 202, 208, 214, 220, 226, 232, 238, 244, 250,
138 256, 266, 276, 286, 296, 306, 316, 326, 336, 346, 356, 366, 376, 386, 396, 406,
139 416, 426, 436, 446, 456, 466, 476, 486, 496, 506, 516, 526, 536, 546, 556, 566,
140 576 };
141
142 const uint32_t dwPixRangeThreshold2[NOISEFACTOR_MAX + 1] = {
143 128, 140, 152, 164, 176, 188, 200, 212, 224, 236, 248, 260, 272, 284, 296, 308,
144 320, 332, 344, 356, 368, 380, 392, 404, 416, 428, 440, 452, 464, 476, 488, 500,
145 512, 524, 536, 548, 560, 572, 584, 596, 608, 620, 632, 644, 656, 668, 680, 692,
146 704, 716, 728, 740, 752, 764, 776, 788, 800, 812, 824, 836, 848, 860, 872, 884,
147 896 };
148
149 const uint32_t dwPixRangeThreshold3[NOISEFACTOR_MAX + 1] = {
150 128, 144, 160, 176, 192, 208, 224, 240, 256, 272, 288, 304, 320, 336, 352, 368,
151 384, 400, 416, 432, 448, 464, 480, 496, 512, 528, 544, 560, 576, 592, 608, 624,
152 640, 660, 680, 700, 720, 740, 760, 780, 800, 820, 840, 860, 880, 900, 920, 940,
153 960, 980, 1000, 1020, 1040, 1060, 1080, 1100, 1120, 1140, 1160, 1180, 1200, 1220, 1240, 1260,
154 1280 };
155
156 const uint32_t dwPixRangeThreshold4[NOISEFACTOR_MAX + 1] = {
157 128, 152, 176, 200, 224, 248, 272, 296, 320, 344, 368, 392, 416, 440, 464, 488,
158 512, 536, 560, 584, 608, 632, 656, 680, 704, 728, 752, 776, 800, 824, 848, 872,
159 896, 928, 960, 992, 1024, 1056, 1088, 1120, 1152, 1184, 1216, 1248, 1280, 1312, 1344, 1376,
160 1408, 1440, 1472, 1504, 1536, 1568, 1600, 1632, 1664, 1696, 1728, 1760, 1792, 1824, 1856, 1888,
161 1920 };
162
163 const uint32_t dwPixRangeThreshold5[NOISEFACTOR_MAX + 1] = {
164 128, 164, 200, 236, 272, 308, 344, 380, 416, 452, 488, 524, 560, 596, 632, 668,
165 704, 740, 776, 812, 848, 884, 920, 956, 992, 1028, 1064, 1100, 1136, 1172, 1208, 1244,
166 1280, 1320, 1360, 1400, 1440, 1480, 1520, 1560, 1600, 1640, 1680, 1720, 1760, 1800, 1840, 1880,
167 1920, 1960, 2000, 2040, 2080, 2120, 2160, 2200, 2240, 2280, 2320, 2360, 2400, 2440, 2480, 2520,
168 2560 };
169
170 const uint32_t dwPixRangeWeight0[NOISEFACTOR_MAX + 1] = {
171 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16,
172 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16,
173 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16,
174 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16,
175 16 };
176
177 const uint32_t dwPixRangeWeight1[NOISEFACTOR_MAX + 1] = {
178 9, 9, 9, 9, 9, 9, 9, 10, 10, 10, 10, 10, 10, 11, 11, 11,
179 11, 11, 11, 11, 12, 12, 12, 12, 12, 12, 13, 13, 13, 13, 13, 13,
180 14, 14, 14, 14, 14, 14, 14, 14, 14, 14, 14, 14, 14, 14, 14, 14,
181 14, 14, 14, 14, 14, 14, 14, 14, 14, 14, 14, 14, 14, 14, 14, 14,
182 15 };
183
184 const uint32_t dwPixRangeWeight2[NOISEFACTOR_MAX + 1] = {
185 2, 2, 2, 2, 3, 3, 3, 3, 4, 4, 4, 4, 5, 5, 5, 5,
186 6, 6, 6, 6, 7, 7, 7, 7, 8, 8, 8, 8, 9, 9, 9, 9,
187 10, 10, 10, 10, 10, 10, 10, 10, 10, 10, 10, 11, 11, 11, 11, 11,
188 11, 11, 11, 11, 11, 11, 12, 12, 12, 12, 12, 12, 12, 12, 12, 12,
189 13 };
190
191 const uint32_t dwPixRangeWeight3[NOISEFACTOR_MAX + 1] = {
192 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 2, 2, 2,
193 2, 2, 2, 2, 3, 3, 3, 3, 3, 3, 4, 4, 4, 4, 4, 4,
194 5, 5, 5, 5, 5, 5, 5, 6, 6, 6, 6, 6, 6, 7, 7, 7,
195 7, 7, 7, 7, 8, 8, 8, 8, 8, 8, 9, 9, 9, 9, 9, 9,
196 10 };
197
198 const uint32_t dwPixRangeWeight4[NOISEFACTOR_MAX + 1] = {
199 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
200 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1,
201 2, 2, 2, 2, 2, 2, 2, 3, 3, 3, 3, 3, 3, 4, 4, 4,
202 4, 4, 4, 4, 5, 5, 5, 5, 5, 5, 6, 6, 6, 6, 6, 6,
203 7 };
204
205 const uint32_t dwPixRangeWeight5[NOISEFACTOR_MAX + 1] = {
206 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
207 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
208 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 2, 2, 2, 2, 2,
209 2, 2, 2, 2, 2, 2, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3,
210 4 };
211
212 const uint32_t dwLTDThresholdUV[NOISEFACTOR_MAX + 1] = {
213 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4,
214 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5,
215 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6,
216 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7,
217 8 };
218
219 const uint32_t dwTDThresholdUV[NOISEFACTOR_MAX + 1] = {
220 10, 10, 10, 10, 10, 10, 10, 10, 10, 10, 10, 10, 10, 10, 10, 10,
221 11, 11, 11, 11, 11, 11, 11, 11, 11, 11, 11, 11, 11, 11, 11, 11,
222 12, 12, 12, 12, 12, 12, 12, 12, 12, 12, 12, 12, 12, 12, 12, 12,
223 13, 13, 13, 13, 13, 13, 13, 13, 13, 13, 13, 13, 13, 13, 13, 13,
224 14 };
225
226 const uint32_t dwSTADThresholdUV[NOISEFACTOR_MAX + 1] = {
227 128, 128, 128, 128, 129, 129, 129, 129, 130, 130, 130, 130, 131, 131, 131, 131,
228 132, 132, 132, 132, 133, 133, 133, 133, 134, 134, 134, 134, 135, 135, 135, 135,
229 136, 136, 136, 136, 137, 137, 137, 137, 138, 138, 138, 138, 139, 139, 139, 139,
230 140, 140, 140, 140, 141, 141, 141, 141, 142, 142, 142, 142, 143, 143, 143, 143,
231 144 };
232
233 //!
234 //! \brief IsFormatMMCSupported
235 //! \details Check if the format of vebox output surface is supported by MMC
236 //! \param [in] Format
237 //! \return bool true if suported, otherwise not supported
238 //!
IsFormatMMCSupported(MOS_FORMAT Format)239 bool VPHAL_VEBOX_STATE_G9_BASE::IsFormatMMCSupported(
240 MOS_FORMAT Format)
241 {
242 bool bRet;
243
244 bRet = false;
245
246 if ((Format != Format_NV12) &&
247 (Format != Format_YUY2) &&
248 (Format != Format_YUYV) &&
249 (Format != Format_UYVY) &&
250 (Format != Format_YVYU) &&
251 (Format != Format_VYUY) &&
252 (Format != Format_AYUV) &&
253 (Format != Format_Y416) &&
254 (Format != Format_A8B8G8R8) &&
255 (Format != Format_A16B16G16R16))
256 {
257 VPHAL_RENDER_NORMALMESSAGE("Unsupported Format '0x%08x' for VEBOX MMC ouput.", Format);
258 goto finish;
259 }
260
261 bRet = true;
262
263 finish:
264 return bRet;
265 }
266
GetFFDISurfParams(VPHAL_CSPACE & ColorSpace,VPHAL_SAMPLE_TYPE & SampleType)267 MOS_STATUS VPHAL_VEBOX_STATE_G9_BASE::GetFFDISurfParams(
268 VPHAL_CSPACE &ColorSpace,
269 VPHAL_SAMPLE_TYPE &SampleType)
270 {
271 PVPHAL_VEBOX_RENDER_DATA pRenderData = GetLastExecRenderData();
272
273 if (IS_VPHAL_OUTPUT_PIPE_SFC(pRenderData))
274 {
275 ColorSpace = m_sfcPipeState->GetInputColorSpace();
276 }
277 else
278 {
279 ColorSpace = m_currentSurface->ColorSpace;
280 }
281
282 // When IECP is enabled and Bob or interlaced scaling is selected for interlaced input,
283 // output surface's SampleType should be same to input's. Bob is being
284 // done in Composition part
285 if (pRenderData->bIECP &&
286 ((m_currentSurface->pDeinterlaceParams &&
287 m_currentSurface->pDeinterlaceParams->DIMode == DI_MODE_BOB) ||
288 m_currentSurface->bInterlacedScaling))
289 {
290 SampleType = m_currentSurface->SampleType;
291 }
292 else
293 {
294 SampleType = SAMPLE_PROGRESSIVE;
295 }
296
297 return MOS_STATUS_SUCCESS;
298 }
299
300 //!
301 //! \brief Get Output surface params needed when allocate surfaces
302 //! \details Get Output surface params needed when allocate surfaces
303 //! \param [out] Format
304 //! Format of output surface
305 //! \param [out] TileType
306 //! Tile type of output surface
307 //! \return MOS_STATUS
308 //! Return MOS_STATUS_SUCCESS if success, otherwise failed
309 //!
GetOutputSurfParams(MOS_FORMAT & Format,MOS_TILE_TYPE & TileType)310 MOS_STATUS VPHAL_VEBOX_STATE_G9_BASE::GetOutputSurfParams(
311 MOS_FORMAT &Format,
312 MOS_TILE_TYPE &TileType)
313 {
314 PVPHAL_VEBOX_RENDER_DATA pRenderData = GetLastExecRenderData();
315
316 if (pRenderData->bDeinterlace)
317 {
318 Format = Format_YUY2;
319 TileType = MOS_TILE_Y;
320 }
321 else
322 {
323 Format = IS_VPHAL_OUTPUT_PIPE_SFC(pRenderData) ?
324 m_sfcPipeState->GetInputFormat() :
325 m_currentSurface->Format;
326
327 TileType = m_currentSurface->TileType;
328 }
329
330 return MOS_STATUS_SUCCESS;
331 }
332
333 //!
334 //! \brief Check for DN only case
335 //! \details Check for DN only case
336 //! \return bool
337 //! Return true if DN only case, otherwise not
338 //!
IsDNOnly()339 bool VPHAL_VEBOX_STATE_G9_BASE::IsDNOnly()
340 {
341 PVPHAL_VEBOX_RENDER_DATA pRenderData = GetLastExecRenderData();
342
343 return pRenderData->bDenoise &&
344 (!pRenderData->bDeinterlace) &&
345 (!IsQueryVarianceEnabled()) &&
346 (!IsIECPEnabled());
347 }
348
IsFFDISurfNeeded()349 bool VPHAL_VEBOX_STATE_G9_BASE::IsFFDISurfNeeded()
350 {
351 PVPHAL_VEBOX_RENDER_DATA pRenderData = GetLastExecRenderData();
352
353 if (pRenderData->bDeinterlace ||
354 IsQueryVarianceEnabled() ||
355 pRenderData->bIECP ||
356 (pRenderData->bDenoise && IS_VPHAL_OUTPUT_PIPE_SFC(pRenderData))) // DN + SFC needs IECP implicitly and outputs to DI surface
357 {
358 return true;
359 }
360 else
361 {
362 return false;
363 }
364 }
365
IsFFDNSurfNeeded()366 bool VPHAL_VEBOX_STATE_G9_BASE::IsFFDNSurfNeeded()
367 {
368 return GetLastExecRenderData()->bDenoise ? true : false;
369 }
370
IsSTMMSurfNeeded()371 bool VPHAL_VEBOX_STATE_G9_BASE::IsSTMMSurfNeeded()
372 {
373
374 return (GetLastExecRenderData()->bDenoise || GetLastExecRenderData()->bDeinterlace);
375 }
376
377 //!
378 //! \brief Vebox allocate resources
379 //! \details Allocate resources that will be used in Vebox
380 //! \return MOS_STATUS
381 //! Return MOS_STATUS_SUCCESS if successful, otherwise failed
382 //!
AllocateResources()383 MOS_STATUS VPHAL_VEBOX_STATE_G9_BASE::AllocateResources()
384 {
385 MOS_STATUS eStatus;
386 PMOS_INTERFACE pOsInterface;
387 PRENDERHAL_INTERFACE pRenderHal;
388 MOS_FORMAT format;
389 MOS_TILE_TYPE TileType;
390 uint32_t dwWidth;
391 uint32_t dwHeight;
392 uint32_t dwSize;
393 int32_t i;
394 bool bAllocated;
395 bool bDIEnable;
396 bool bSurfCompressible;
397 bool bFFDNSurfCompressible;
398 MOS_RESOURCE_MMC_MODE SurfCompressionMode;
399 MOS_RESOURCE_MMC_MODE FFDNSurfCompressionMode;
400 MHW_VEBOX_SURFACE_PARAMS MhwVeboxSurfaceParam;
401 PMHW_VEBOX_INTERFACE pVeboxInterface;
402 PVPHAL_VEBOX_STATE_G9_BASE pVeboxState = this;
403 PVPHAL_VEBOX_RENDER_DATA pRenderData = GetLastExecRenderData();
404
405 bAllocated = false;
406 bSurfCompressible = false;
407 bFFDNSurfCompressible = false;
408 SurfCompressionMode = MOS_MMC_DISABLED;
409 FFDNSurfCompressionMode = MOS_MMC_DISABLED;
410 pOsInterface = pVeboxState->m_pOsInterface;
411 pRenderHal = pVeboxState->m_pRenderHal;
412 pVeboxInterface = pVeboxState->m_pVeboxInterface;
413
414 GetOutputSurfParams(format, TileType);
415
416 // In DN only case, input, output and previous De-noised
417 // surfaces all should have precisely the same memory compression status.
418 // Either all these surfaces should be compressed together
419 // or none of them compressed at all.This is HW limitation.
420 if (IsDNOnly())
421 {
422 bSurfCompressible = pVeboxState->m_currentSurface->bCompressible;
423 SurfCompressionMode = pVeboxState->m_currentSurface->bIsCompressed ? MOS_MMC_HORIZONTAL : MOS_MMC_DISABLED;
424 }
425 // Only Tiled Y surfaces support MMC
426 else if (pVeboxState->bEnableMMC &&
427 (TileType == MOS_TILE_Y) &&
428 pVeboxState->IsFormatMMCSupported(format))
429 {
430 bSurfCompressible = true;
431 SurfCompressionMode = MOS_MMC_HORIZONTAL;
432 }
433
434 // Allocate FFDI/IECP surfaces----------------------------------------------
435 if (IsFFDISurfNeeded())
436 {
437 VPHAL_CSPACE ColorSpace;
438 VPHAL_SAMPLE_TYPE SampleType;
439
440 VPHAL_RENDER_CHK_STATUS(GetFFDISurfParams(ColorSpace, SampleType));
441
442 for (i = 0; i < pVeboxState->iNumFFDISurfaces; i++)
443 {
444 VPHAL_RENDER_CHK_STATUS(VpHal_ReAllocateSurface(
445 pOsInterface,
446 pVeboxState->FFDISurfaces[i],
447 "VeboxFFDISurface_g9",
448 format,
449 MOS_GFXRES_2D,
450 TileType,
451 pVeboxState->m_currentSurface->dwWidth,
452 pVeboxState->m_currentSurface->dwHeight,
453 bSurfCompressible,
454 SurfCompressionMode,
455 &bAllocated));
456
457 pVeboxState->FFDISurfaces[i]->SampleType = SampleType;
458
459 // Copy rect sizes so that if input surface state needs to adjust,
460 // output surface can be adjustted also.
461 pVeboxState->FFDISurfaces[i]->rcSrc = pVeboxState->m_currentSurface->rcSrc;
462 pVeboxState->FFDISurfaces[i]->rcDst = pVeboxState->m_currentSurface->rcDst;
463 // Copy max src rect
464 pVeboxState->FFDISurfaces[i]->rcMaxSrc = pVeboxState->m_currentSurface->rcMaxSrc;
465
466 // Copy Rotation, it's used in setting SFC state
467 pVeboxState->FFDISurfaces[i]->Rotation = pVeboxState->m_currentSurface->Rotation;
468
469 pVeboxState->FFDISurfaces[i]->ColorSpace = ColorSpace;
470
471 // Copy ScalingMode, it's used in setting SFC state
472 pVeboxState->FFDISurfaces[i]->ScalingMode = pVeboxState->m_currentSurface->ScalingMode;
473
474 if (bAllocated)
475 {
476 // Report Compress Status
477 m_reporting->GetFeatures().ffdiCompressible = bSurfCompressible;
478 m_reporting->GetFeatures().ffdiCompressMode = (uint8_t)(SurfCompressionMode);
479 }
480 }
481 }
482 else
483 {
484 // Free FFDI surfaces
485 for (i = 0; i < pVeboxState->iNumFFDISurfaces; i++)
486 {
487 if (pVeboxState->FFDISurfaces[i])
488 {
489 pOsInterface->pfnFreeResource(
490 pOsInterface,
491 &pVeboxState->FFDISurfaces[i]->OsResource);
492 }
493 }
494 }
495
496 // When DI switch to DNDI, the first FFDN surface pitch doesn't match with
497 // the input surface pitch and cause the flicker issue
498 // Or for 2 clip playback in WMP, the first one is HW decoding, the second one is SW decoding,
499 // when the second clip playback starting without media pipeline recreation,
500 // the internal FFDNSurfaces are compressed, but VP input surface is uncompressed.
501 if ((pVeboxState->bDIEnabled && !pVeboxState->bDNEnabled && pRenderData->bDenoise) ||
502 ((pVeboxState->m_currentSurface->bIsCompressed == false) && ((bSurfCompressible == true) || (pVeboxState->FFDNSurfaces[0]->bIsCompressed == true))))
503 {
504 bFFDNSurfCompressible = pVeboxState->m_currentSurface->bCompressible;
505 FFDNSurfCompressionMode = pVeboxState->m_currentSurface->bIsCompressed ? MOS_MMC_HORIZONTAL : MOS_MMC_DISABLED;
506 }
507 else
508 {
509 bFFDNSurfCompressible = bSurfCompressible;
510 FFDNSurfCompressionMode = SurfCompressionMode;
511 }
512
513 // Allocate FFDN surfaces---------------------------------------------------
514 if (IsFFDNSurfNeeded())
515 {
516 for (i = 0; i < VPHAL_NUM_FFDN_SURFACES; i++)
517 {
518 VPHAL_RENDER_CHK_STATUS(VpHal_ReAllocateSurface(
519 pOsInterface,
520 pVeboxState->FFDNSurfaces[i],
521 "VeboxFFDNSurface_g9",
522 pVeboxState->m_currentSurface->Format,
523 MOS_GFXRES_2D,
524 pVeboxState->m_currentSurface->TileType,
525 pVeboxState->m_currentSurface->dwWidth,
526 pVeboxState->m_currentSurface->dwHeight,
527 bFFDNSurfCompressible,
528 FFDNSurfCompressionMode,
529 &bAllocated));
530
531 // if allocated, pVeboxState->PreviousSurface is not valid for DN reference.
532 if (bAllocated)
533 {
534 // If DI is enabled, try to use app's reference if provided
535 if (pRenderData->bRefValid &&
536 pRenderData->bDeinterlace &&
537 (pVeboxState->m_currentSurface->pBwdRef != nullptr) &&
538 (pVeboxState->FFDNSurfaces[i]->dwPitch == pVeboxState->m_currentSurface->pBwdRef->dwPitch))
539 {
540 CopySurfaceValue(pVeboxState->m_previousSurface, pVeboxState->m_currentSurface->pBwdRef);
541 }
542 else
543 {
544 pRenderData->bRefValid = false;
545 }
546 }
547
548 // DN's output format should be same to input
549 pVeboxState->FFDNSurfaces[i]->SampleType =
550 pVeboxState->m_currentSurface->SampleType;
551
552 // Copy rect sizes so that if input surface state needs to adjust,
553 // output surface can be adjustted also.
554 pVeboxState->FFDNSurfaces[i]->rcSrc = pVeboxState->m_currentSurface->rcSrc;
555 pVeboxState->FFDNSurfaces[i]->rcDst = pVeboxState->m_currentSurface->rcDst;
556 // Copy max src rect
557 pVeboxState->FFDNSurfaces[i]->rcMaxSrc = pVeboxState->m_currentSurface->rcMaxSrc;
558
559 // Set Colorspace of FFDN
560 pVeboxState->FFDNSurfaces[i]->ColorSpace = pVeboxState->m_currentSurface->ColorSpace;
561
562 // Copy FrameID and parameters, as DN output will be used as next blt's current
563 pVeboxState->FFDNSurfaces[i]->FrameID = pVeboxState->m_currentSurface->FrameID;
564 pVeboxState->FFDNSurfaces[i]->pDenoiseParams = pVeboxState->m_currentSurface->pDenoiseParams;
565 // Copy ScalingMode, it's used in setting SFC state
566 pVeboxState->FFDNSurfaces[i]->ScalingMode = pVeboxState->m_currentSurface->ScalingMode;
567
568 if (bAllocated)
569 {
570 // Report Compress Status
571 m_reporting->GetFeatures().ffdnCompressible = bFFDNSurfCompressible;
572 m_reporting->GetFeatures().ffdnCompressMode = (uint8_t)(FFDNSurfCompressionMode);
573 }
574 }
575 }
576 else
577 {
578 // Free FFDN surfaces
579 for (i = 0; i < VPHAL_NUM_FFDN_SURFACES; i++)
580 {
581 if (pVeboxState->FFDNSurfaces[i])
582 {
583 pOsInterface->pfnFreeResource(
584 pOsInterface,
585 &pVeboxState->FFDNSurfaces[i]->OsResource);
586 }
587 }
588 }
589
590 // Adjust the rcMaxSrc of pRenderTarget when Vebox output is enabled
591 if (IS_VPHAL_OUTPUT_PIPE_VEBOX(pRenderData))
592 {
593 pRenderData->pRenderTarget->rcMaxSrc = pVeboxState->m_currentSurface->rcMaxSrc;
594 }
595
596 // Allocate STMM (Spatial-Temporal Motion Measure) Surfaces------------------
597 if (IsSTMMSurfNeeded())
598 {
599 if (pVeboxState->bEnableMMC)
600 {
601 bSurfCompressible = true;
602 SurfCompressionMode = MOS_MMC_HORIZONTAL;
603 }
604 else
605 {
606 bSurfCompressible = false;
607 SurfCompressionMode = MOS_MMC_DISABLED;
608 }
609
610 for (i = 0; i < VPHAL_NUM_STMM_SURFACES; i++)
611 {
612 VPHAL_RENDER_CHK_STATUS(VpHal_ReAllocateSurface(
613 pOsInterface,
614 &pVeboxState->STMMSurfaces[i],
615 "VeboxSTMMSurface_g9",
616 Format_STMM,
617 MOS_GFXRES_2D,
618 MOS_TILE_Y,
619 pVeboxState->m_currentSurface->dwWidth,
620 pVeboxState->m_currentSurface->dwHeight,
621 bSurfCompressible,
622 SurfCompressionMode,
623 &bAllocated));
624
625 if (bAllocated)
626 {
627 VPHAL_RENDER_CHK_STATUS(VeboxInitSTMMHistory(i));
628
629 // Report Compress Status
630 m_reporting->GetFeatures().stmmCompressible = bSurfCompressible;
631 m_reporting->GetFeatures().stmmCompressMode = (uint8_t)(SurfCompressionMode);
632 }
633 }
634 }
635 else
636 {
637 // Free DI history buffers (STMM = Spatial-temporal motion measure)
638 for (i = 0; i < VPHAL_NUM_STMM_SURFACES; i++)
639 {
640 pOsInterface->pfnFreeResource(
641 pOsInterface,
642 &pVeboxState->STMMSurfaces[i].OsResource);
643 }
644 }
645
646 // Allocate BT2020 CSC temp surface----------------------------------------------
647 if (pRenderData->b2PassesCSC)
648 {
649 VPHAL_RENDER_CHK_STATUS(VpHal_ReAllocateSurface(
650 pOsInterface,
651 &pVeboxState->m_BT2020CSCTempSurface,
652 "VeboxBT2020CSCTempSurface_g9",
653 Format_A8B8G8R8,
654 MOS_GFXRES_2D,
655 MOS_TILE_Y,
656 pVeboxState->m_currentSurface->dwWidth,
657 pVeboxState->m_currentSurface->dwHeight,
658 false,
659 MOS_MMC_DISABLED,
660 &bAllocated));
661
662 // Copy rect sizes so that if input surface state needs to adjust,
663 // output surface can be adjustted also.
664 pVeboxState->m_BT2020CSCTempSurface.rcSrc = pVeboxState->m_currentSurface->rcSrc;
665 pVeboxState->m_BT2020CSCTempSurface.rcDst = pVeboxState->m_currentSurface->rcDst;
666 // Copy max src rect
667 pVeboxState->m_BT2020CSCTempSurface.rcMaxSrc = pVeboxState->m_currentSurface->rcMaxSrc;
668
669 // Copy Rotation, it's used in setting SFC state
670 pVeboxState->m_BT2020CSCTempSurface.Rotation = pVeboxState->m_currentSurface->Rotation;
671 pVeboxState->m_BT2020CSCTempSurface.SampleType = pVeboxState->m_currentSurface->SampleType;
672 pVeboxState->m_BT2020CSCTempSurface.ColorSpace = CSpace_sRGB;
673 // Copy ScalingMode, it's used in setting SFC state
674 pVeboxState->m_BT2020CSCTempSurface.ScalingMode = pVeboxState->m_currentSurface->ScalingMode;
675 }
676
677 // Allocate Statistics State Surface----------------------------------------
678 // Width to be a aligned on 64 bytes and height is 1/4 the height
679 // Per frame information written twice per frame for 2 slices
680 // Surface to be a rectangle aligned with dwWidth to get proper dwSize
681 bDIEnable = pRenderData->bDeinterlace || IsQueryVarianceEnabled();
682
683 VPHAL_RENDER_CHK_STATUS(VpHal_InitVeboxSurfaceParams(
684 pVeboxState->m_currentSurface, &MhwVeboxSurfaceParam));
685 VPHAL_RENDER_CHK_STATUS(pVeboxInterface->VeboxAdjustBoundary(
686 &MhwVeboxSurfaceParam,
687 &dwWidth,
688 &dwHeight,
689 bDIEnable));
690
691 dwWidth = MOS_ALIGN_CEIL(dwWidth, 64);
692 dwHeight = MOS_ROUNDUP_DIVIDE(dwHeight, 4) +
693 MOS_ROUNDUP_DIVIDE(VPHAL_VEBOX_STATISTICS_SIZE_G9 * sizeof(uint32_t), dwWidth);
694 dwSize = dwWidth * dwHeight;
695
696 VPHAL_RENDER_CHK_STATUS(VpHal_ReAllocateSurface(
697 pOsInterface,
698 &pVeboxState->VeboxStatisticsSurface,
699 "VeboxStatisticsSurface_g9",
700 Format_Buffer,
701 MOS_GFXRES_BUFFER,
702 MOS_TILE_LINEAR,
703 dwSize,
704 1,
705 false,
706 MOS_MMC_DISABLED,
707 &bAllocated));
708
709 if (bAllocated)
710 {
711 // initialize Statistics Surface
712 VPHAL_RENDER_CHK_STATUS(pOsInterface->pfnFillResource(
713 pOsInterface,
714 &(pVeboxState->VeboxStatisticsSurface.OsResource),
715 dwSize,
716 0));
717
718 pVeboxState->dwVeboxPerBlockStatisticsWidth = dwWidth;
719 pVeboxState->dwVeboxPerBlockStatisticsHeight = dwHeight -
720 MOS_ROUNDUP_DIVIDE(VPHAL_VEBOX_STATISTICS_SIZE_G9 * sizeof(uint32_t), dwWidth);
721 }
722
723 #if VEBOX_AUTO_DENOISE_SUPPORTED
724 // Allocate Temp Surface for Vebox Update kernels----------------------------------------
725 // the surface size is one Page
726 dwSize = MHW_PAGE_SIZE;
727
728 VPHAL_RENDER_CHK_STATUS(VpHal_ReAllocateSurface(
729 pOsInterface,
730 &pVeboxState->VeboxTempSurface,
731 "VeboxTempSurface_g9",
732 Format_Buffer,
733 MOS_GFXRES_BUFFER,
734 MOS_TILE_LINEAR,
735 dwSize,
736 1,
737 false,
738 MOS_MMC_DISABLED,
739 &bAllocated));
740
741 if (bAllocated)
742 {
743 // initialize Statistics Surface
744 VPHAL_RENDER_CHK_STATUS(pOsInterface->pfnFillResource(
745 pOsInterface,
746 &(pVeboxState->VeboxTempSurface.OsResource),
747 dwSize,
748 0));
749 }
750
751 // Allocate Spatial Attributes Configuration Surface for DN kernel Gen9+-----------
752 dwSize = MHW_PAGE_SIZE;
753
754 VPHAL_RENDER_CHK_STATUS(VpHal_ReAllocateSurface(
755 pOsInterface,
756 &pVeboxState->VeboxSpatialAttributesConfigurationSurface,
757 "VeboxSpatialAttributesConfigurationSurface_g9",
758 Format_RAW,
759 MOS_GFXRES_BUFFER,
760 MOS_TILE_LINEAR,
761 dwSize,
762 1,
763 false,
764 MOS_MMC_DISABLED,
765 &bAllocated));
766
767 if (bAllocated)
768 {
769 // initialize Spatial Attributes Configuration Surface
770 VPHAL_RENDER_CHK_STATUS(VeboxInitSpatialAttributesConfiguration());
771 }
772 #endif
773
774 finish:
775 if (eStatus != MOS_STATUS_SUCCESS)
776 {
777 pVeboxState->FreeResources();
778 }
779
780 return eStatus;
781 }
782
783 //!
784 //! \brief Vebox free resources
785 //! \details Free resources that are used in Vebox
786 //! \return void
787 //!
FreeResources()788 void VPHAL_VEBOX_STATE_G9_BASE::FreeResources()
789 {
790 PVPHAL_VEBOX_STATE_G9_BASE pVeboxState = this;
791 int32_t i;
792 PMOS_INTERFACE pOsInterface = pVeboxState->m_pOsInterface;
793
794 // Free FFDI surfaces
795 for (i = 0; i < pVeboxState->iNumFFDISurfaces; i++)
796 {
797 if (pVeboxState->FFDISurfaces[i])
798 {
799 pOsInterface->pfnFreeResource(
800 pOsInterface,
801 &pVeboxState->FFDISurfaces[i]->OsResource);
802 }
803 }
804
805 // Free FFDN surfaces
806 for (i = 0; i < VPHAL_NUM_FFDN_SURFACES; i++)
807 {
808 if (pVeboxState->FFDNSurfaces[i])
809 {
810 pOsInterface->pfnFreeResource(
811 pOsInterface,
812 &pVeboxState->FFDNSurfaces[i]->OsResource);
813 }
814 }
815
816 // Free DI history buffers (STMM = Spatial-temporal motion measure)
817 for (i = 0; i < VPHAL_NUM_STMM_SURFACES; i++)
818 {
819 pOsInterface->pfnFreeResource(
820 pOsInterface,
821 &pVeboxState->STMMSurfaces[i].OsResource);
822 }
823
824 // Free Statistics data surface for VEBOX
825 pOsInterface->pfnFreeResource(
826 pOsInterface,
827 &pVeboxState->VeboxStatisticsSurface.OsResource);
828
829 // Free BT2020 CSC temp surface for VEBOX used by BT2020 CSC
830 pOsInterface->pfnFreeResource(
831 pOsInterface,
832 &pVeboxState->m_BT2020CSCTempSurface.OsResource);
833
834 #if VEBOX_AUTO_DENOISE_SUPPORTED
835 // Free Spatial Attributes Configuration Surface for DN kernel
836 pOsInterface->pfnFreeResource(
837 pOsInterface,
838 &pVeboxState->VeboxSpatialAttributesConfigurationSurface.OsResource);
839
840 // Free Temp Surface for VEBOX
841 pOsInterface->pfnFreeResource(
842 pOsInterface,
843 &pVeboxState->VeboxTempSurface.OsResource);
844 #endif
845
846 // Free SFC resources
847 if (MEDIA_IS_SKU(pVeboxState->m_pSkuTable, FtrSFCPipe) &&
848 m_sfcPipeState)
849 {
850 m_sfcPipeState->FreeResources();
851 }
852
853 }
854
855 //!
856 //! \brief Setup Vebox_DI_IECP Command params for VEBOX final output surface on G9
857 //! \details Setup Vebox_DI_IECP Command params for VEBOX final output surface on G9
858 //! \param [in] bDiScdEnable
859 //! Is DI/Variances report enabled
860 //! \param [in,out] pVeboxDiIecpCmdParams
861 //! Pointer to VEBOX_DI_IECP command parameters
862 //! \return MOS_STATUS
863 //! Return MOS_STATUS_SUCCESS if successful, otherwise failed
864 //!
SetupDiIecpStateForOutputSurf(bool bDiScdEnable,PMHW_VEBOX_DI_IECP_CMD_PARAMS pVeboxDiIecpCmdParams)865 MOS_STATUS VPHAL_VEBOX_STATE_G9_BASE::SetupDiIecpStateForOutputSurf(
866 bool bDiScdEnable,
867 PMHW_VEBOX_DI_IECP_CMD_PARAMS pVeboxDiIecpCmdParams)
868 {
869 PMOS_INTERFACE pOsInterface;
870 PRENDERHAL_INTERFACE pRenderHal;
871 PMHW_VEBOX_INTERFACE pVeboxInterface;
872 PVPHAL_VEBOX_STATE_G9_BASE pVeboxState = this;
873 PVPHAL_VEBOX_RENDER_DATA pRenderData = GetLastExecRenderData();
874 MHW_VEBOX_SURFACE_CNTL_PARAMS VeboxSurfCntlParams;
875 PVPHAL_SURFACE pSurface;
876 MOS_STATUS eStatus = MOS_STATUS_SUCCESS;
877
878 pOsInterface = pVeboxState->m_pOsInterface;
879 pRenderHal = pVeboxState->m_pRenderHal;
880 pVeboxInterface = pVeboxState->m_pVeboxInterface;
881
882 // VEBOX final output surface
883 if (IS_VPHAL_OUTPUT_PIPE_VEBOX(pRenderData))
884 {
885 VPHAL_RENDER_CHK_STATUS(pOsInterface->pfnRegisterResource(
886 pOsInterface,
887 &pRenderData->pRenderTarget->OsResource,
888 true,
889 true));
890
891 pVeboxDiIecpCmdParams->pOsResCurrOutput =
892 &pRenderData->pRenderTarget->OsResource;
893 pVeboxDiIecpCmdParams->dwCurrOutputSurfOffset =
894 pRenderData->pRenderTarget->dwOffset;
895 pVeboxDiIecpCmdParams->CurrOutputSurfCtrl.Value =
896 pVeboxState->DnDiSurfMemObjCtl.CurrentOutputSurfMemObjCtl;
897
898 if (IsFormatMMCSupported(pRenderData->pRenderTarget->Format) &&
899 (pRenderData->Component == COMPONENT_VPreP) &&
900 (pRenderData->pRenderTarget->CompressionMode == MOS_MMC_HORIZONTAL))
901 {
902 // Update control bits for Current Output Surf
903 pSurface = pRenderData->pRenderTarget;
904 MOS_ZeroMemory(&VeboxSurfCntlParams, sizeof(VeboxSurfCntlParams));
905 VeboxSurfCntlParams.bIsCompressed = pSurface->bIsCompressed;
906 VeboxSurfCntlParams.CompressionMode = pSurface->CompressionMode;
907 VPHAL_RENDER_CHK_STATUS(pVeboxInterface->AddVeboxSurfaceControlBits(
908 &VeboxSurfCntlParams,
909 (uint32_t *)&(pVeboxDiIecpCmdParams->CurrOutputSurfCtrl.Value)));
910 }
911 }
912 else if (bDiScdEnable)
913 {
914 VPHAL_RENDER_CHK_STATUS(pOsInterface->pfnRegisterResource(
915 pOsInterface,
916 &pVeboxState->FFDISurfaces[pRenderData->iFrame1]->OsResource,
917 true,
918 true));
919
920 pVeboxDiIecpCmdParams->pOsResCurrOutput =
921 &pVeboxState->FFDISurfaces[pRenderData->iFrame1]->OsResource;
922 pVeboxDiIecpCmdParams->CurrOutputSurfCtrl.Value =
923 pVeboxState->DnDiSurfMemObjCtl.CurrentOutputSurfMemObjCtl;
924
925 // Update control bits for Current Output Surf
926 pSurface = pVeboxState->FFDISurfaces[pRenderData->iFrame1];
927 MOS_ZeroMemory(&VeboxSurfCntlParams, sizeof(VeboxSurfCntlParams));
928 VeboxSurfCntlParams.bIsCompressed = pSurface->bIsCompressed;
929 VeboxSurfCntlParams.CompressionMode = pSurface->CompressionMode;
930 VPHAL_RENDER_CHK_STATUS(pVeboxInterface->AddVeboxSurfaceControlBits(
931 &VeboxSurfCntlParams,
932 (uint32_t *)&(pVeboxDiIecpCmdParams->CurrOutputSurfCtrl.Value)));
933
934 VPHAL_RENDER_CHK_STATUS(pOsInterface->pfnRegisterResource(
935 pOsInterface,
936 &pVeboxState->FFDISurfaces[pRenderData->iFrame0]->OsResource,
937 true,
938 true));
939
940 pVeboxDiIecpCmdParams->pOsResPrevOutput =
941 &pVeboxState->FFDISurfaces[pRenderData->iFrame0]->OsResource;
942 pVeboxDiIecpCmdParams->PrevOutputSurfCtrl.Value =
943 pVeboxState->DnDiSurfMemObjCtl.CurrentOutputSurfMemObjCtl;
944
945 // Update control bits for PrevOutput surface
946 pSurface = pVeboxState->FFDISurfaces[pRenderData->iFrame0];
947 MOS_ZeroMemory(&VeboxSurfCntlParams, sizeof(VeboxSurfCntlParams));
948 VeboxSurfCntlParams.bIsCompressed = pSurface->bIsCompressed;
949 VeboxSurfCntlParams.CompressionMode = pSurface->CompressionMode;
950 VPHAL_RENDER_CHK_STATUS(pVeboxInterface->AddVeboxSurfaceControlBits(
951 &VeboxSurfCntlParams,
952 (uint32_t *)&(pVeboxDiIecpCmdParams->PrevOutputSurfCtrl.Value)));
953 }
954 else if (IsIECPEnabled()) // IECP output surface without DI
955 {
956 VPHAL_RENDER_CHK_STATUS(pOsInterface->pfnRegisterResource(
957 pOsInterface,
958 &pVeboxState->FFDISurfaces[pRenderData->iCurDNOut]->OsResource,
959 true,
960 true));
961
962 pVeboxDiIecpCmdParams->pOsResCurrOutput =
963 &pVeboxState->FFDISurfaces[pRenderData->iCurDNOut]->OsResource;
964 pVeboxDiIecpCmdParams->CurrOutputSurfCtrl.Value =
965 pVeboxState->DnDiSurfMemObjCtl.CurrentOutputSurfMemObjCtl;
966
967 // Update control bits for CurrOutputSurf surface
968 pSurface = pVeboxState->FFDISurfaces[pRenderData->iCurDNOut];
969 MOS_ZeroMemory(&VeboxSurfCntlParams, sizeof(VeboxSurfCntlParams));
970 VeboxSurfCntlParams.bIsCompressed = pSurface->bIsCompressed;
971 VeboxSurfCntlParams.CompressionMode = pSurface->CompressionMode;
972 VPHAL_RENDER_CHK_STATUS(pVeboxInterface->AddVeboxSurfaceControlBits(
973 &VeboxSurfCntlParams,
974 (uint32_t *)&(pVeboxDiIecpCmdParams->CurrOutputSurfCtrl.Value)));
975 }
976
977 finish:
978 return eStatus;
979 }
980
981 //!
982 //! \brief Setup Vebox_DI_IECP Command params for Gen9
983 //! \details Setup Vebox_DI_IECP Command params for Gen9
984 //! \param [in] bDiScdEnable
985 //! Is DI/Variances report enabled
986 //! \param [in,out] pVeboxDiIecpCmdParams
987 //! Pointer to VEBOX_DI_IECP command parameters
988 //! \return MOS_STATUS
989 //! Return MOS_STATUS_SUCCESS if successful, otherwise failed
990 //!
SetupDiIecpState(bool bDiScdEnable,PMHW_VEBOX_DI_IECP_CMD_PARAMS pVeboxDiIecpCmdParams)991 MOS_STATUS VPHAL_VEBOX_STATE_G9_BASE::SetupDiIecpState(
992 bool bDiScdEnable,
993 PMHW_VEBOX_DI_IECP_CMD_PARAMS pVeboxDiIecpCmdParams)
994 {
995 PMOS_INTERFACE pOsInterface;
996 PRENDERHAL_INTERFACE pRenderHal;
997 uint32_t dwWidth;
998 uint32_t dwHeight;
999 bool bDIEnable;
1000 MOS_STATUS eStatus;
1001 MHW_VEBOX_SURFACE_PARAMS MhwVeboxSurfaceParam;
1002 PMHW_VEBOX_INTERFACE pVeboxInterface;
1003 MHW_VEBOX_SURFACE_CNTL_PARAMS VeboxSurfCntlParams;
1004 PVPHAL_SURFACE pSurface;
1005 PVPHAL_VEBOX_STATE_G9_BASE pVeboxState = this;
1006 PVPHAL_VEBOX_RENDER_DATA pRenderData = GetLastExecRenderData();
1007
1008 pOsInterface = pVeboxState->m_pOsInterface;
1009 pRenderHal = pVeboxState->m_pRenderHal;
1010 pVeboxInterface = pVeboxState->m_pVeboxInterface;
1011 MOS_ZeroMemory(pVeboxDiIecpCmdParams, sizeof(*pVeboxDiIecpCmdParams));
1012
1013 // Align dwEndingX with surface state
1014 bDIEnable = pRenderData->bDeinterlace || IsQueryVarianceEnabled();
1015 VPHAL_RENDER_CHK_STATUS(VpHal_InitVeboxSurfaceParams(
1016 pVeboxState->m_currentSurface, &MhwVeboxSurfaceParam));
1017 VPHAL_RENDER_CHK_STATUS(pVeboxInterface->VeboxAdjustBoundary(
1018 &MhwVeboxSurfaceParam,
1019 &dwWidth,
1020 &dwHeight,
1021 bDIEnable));
1022
1023 pVeboxDiIecpCmdParams->dwStartingX = 0;
1024 pVeboxDiIecpCmdParams->dwEndingX = dwWidth - 1;
1025
1026 // Input Surface
1027 VPHAL_RENDER_CHK_STATUS(pOsInterface->pfnRegisterResource(
1028 pOsInterface,
1029 &pVeboxState->m_currentSurface->OsResource,
1030 false,
1031 true));
1032
1033 pVeboxDiIecpCmdParams->pOsResCurrInput =
1034 &pVeboxState->m_currentSurface->OsResource;
1035 pVeboxDiIecpCmdParams->dwCurrInputSurfOffset =
1036 pVeboxState->m_currentSurface->dwOffset;
1037 pVeboxDiIecpCmdParams->CurrInputSurfCtrl.Value =
1038 pVeboxState->DnDiSurfMemObjCtl.CurrentInputSurfMemObjCtl;
1039
1040 // Update control bits for current surface
1041 pSurface = pVeboxState->m_currentSurface;
1042 MOS_ZeroMemory(&VeboxSurfCntlParams, sizeof(VeboxSurfCntlParams));
1043 VeboxSurfCntlParams.bIsCompressed = pSurface->bIsCompressed;
1044 VeboxSurfCntlParams.CompressionMode = pSurface->CompressionMode;
1045 VPHAL_RENDER_CHK_STATUS(pVeboxInterface->AddVeboxSurfaceControlBits(
1046 &VeboxSurfCntlParams,
1047 (uint32_t *)&(pVeboxDiIecpCmdParams->CurrInputSurfCtrl.Value)));
1048
1049 // Reference surface
1050 if (pRenderData->bRefValid)
1051 {
1052 VPHAL_RENDER_CHK_STATUS(pOsInterface->pfnRegisterResource(
1053 pOsInterface,
1054 &pVeboxState->m_previousSurface->OsResource,
1055 false,
1056 true));
1057
1058 pVeboxDiIecpCmdParams->pOsResPrevInput =
1059 &pVeboxState->m_previousSurface->OsResource;
1060 pVeboxDiIecpCmdParams->dwPrevInputSurfOffset =
1061 pVeboxState->m_previousSurface->dwOffset;
1062 pVeboxDiIecpCmdParams->PrevInputSurfCtrl.Value =
1063 pVeboxState->DnDiSurfMemObjCtl.PreviousInputSurfMemObjCtl;
1064
1065 // Update control bits for PreviousSurface surface
1066 pSurface = pVeboxState->m_previousSurface;
1067 MOS_ZeroMemory(&VeboxSurfCntlParams, sizeof(VeboxSurfCntlParams));
1068 VeboxSurfCntlParams.bIsCompressed = pSurface->bIsCompressed;
1069 VeboxSurfCntlParams.CompressionMode = pSurface->CompressionMode;
1070 VPHAL_RENDER_CHK_STATUS(pVeboxInterface->AddVeboxSurfaceControlBits(
1071 &VeboxSurfCntlParams,
1072 (uint32_t *)&(pVeboxDiIecpCmdParams->PrevInputSurfCtrl.Value)));
1073 }
1074
1075 // VEBOX final output surface
1076 VPHAL_RENDER_CHK_STATUS(SetupDiIecpStateForOutputSurf(bDiScdEnable, pVeboxDiIecpCmdParams));
1077
1078 // DN intermediate output surface
1079 if (IsFFDNSurfNeeded())
1080 {
1081 VPHAL_RENDER_CHK_STATUS(pOsInterface->pfnRegisterResource(
1082 pOsInterface,
1083 &pVeboxState->FFDNSurfaces[pRenderData->iCurDNOut]->OsResource,
1084 true,
1085 true));
1086
1087 pVeboxDiIecpCmdParams->pOsResDenoisedCurrOutput =
1088 &pVeboxState->FFDNSurfaces[pRenderData->iCurDNOut]->OsResource;
1089 pVeboxDiIecpCmdParams->DenoisedCurrOutputSurfCtrl.Value =
1090 pVeboxState->DnDiSurfMemObjCtl.DnOutSurfMemObjCtl;
1091
1092 // Update control bits for DenoisedCurrOutputSurf surface
1093 pSurface = pVeboxState->FFDNSurfaces[pRenderData->iCurDNOut];
1094 MOS_ZeroMemory(&VeboxSurfCntlParams, sizeof(VeboxSurfCntlParams));
1095 VeboxSurfCntlParams.bIsCompressed = pSurface->bIsCompressed;
1096 VeboxSurfCntlParams.CompressionMode = pSurface->CompressionMode;
1097 VPHAL_RENDER_CHK_STATUS(pVeboxInterface->AddVeboxSurfaceControlBits(
1098 &VeboxSurfCntlParams,
1099 (uint32_t *)&(pVeboxDiIecpCmdParams->DenoisedCurrOutputSurfCtrl.Value)));
1100
1101 // For DN + SFC scenario, allocate FFDISurfaces also
1102 // since this usage needs IECP implicitly
1103 // For DN + DI + SFC, DI have registered FFDISurfaces, So don't register again
1104 if (IS_VPHAL_OUTPUT_PIPE_SFC(pRenderData) && !bDiScdEnable)
1105 {
1106 VPHAL_RENDER_CHK_STATUS(pOsInterface->pfnRegisterResource(
1107 pOsInterface,
1108 &pVeboxState->FFDISurfaces[pRenderData->iCurDNOut]->OsResource,
1109 true,
1110 true));
1111
1112 pVeboxDiIecpCmdParams->pOsResCurrOutput =
1113 &pVeboxState->FFDISurfaces[pRenderData->iCurDNOut]->OsResource;
1114 pVeboxDiIecpCmdParams->CurrOutputSurfCtrl.Value =
1115 pVeboxState->DnDiSurfMemObjCtl.CurrentOutputSurfMemObjCtl;
1116
1117 // Update control bits for CurrOutputSurf surface
1118 pSurface = pVeboxState->FFDISurfaces[pRenderData->iCurDNOut];
1119 MOS_ZeroMemory(&VeboxSurfCntlParams, sizeof(VeboxSurfCntlParams));
1120 VeboxSurfCntlParams.bIsCompressed = pSurface->bIsCompressed;
1121 VeboxSurfCntlParams.CompressionMode = pSurface->CompressionMode;
1122 VPHAL_RENDER_CHK_STATUS(pVeboxInterface->AddVeboxSurfaceControlBits(
1123 &VeboxSurfCntlParams,
1124 (uint32_t *)&(pVeboxDiIecpCmdParams->CurrOutputSurfCtrl.Value)));
1125 }
1126 }
1127
1128 // STMM surface
1129 if (bDiScdEnable || IsSTMMSurfNeeded())
1130 {
1131 // STMM in
1132 VPHAL_RENDER_CHK_STATUS(pOsInterface->pfnRegisterResource(
1133 pOsInterface,
1134 &pVeboxState->STMMSurfaces[pRenderData->iCurHistIn].OsResource,
1135 false,
1136 true));
1137
1138 pVeboxDiIecpCmdParams->pOsResStmmInput =
1139 &pVeboxState->STMMSurfaces[pRenderData->iCurHistIn].OsResource;
1140 pVeboxDiIecpCmdParams->StmmInputSurfCtrl.Value =
1141 pVeboxState->DnDiSurfMemObjCtl.STMMInputSurfMemObjCtl;
1142
1143 // Update control bits for stmm input surface
1144 pSurface = &(pVeboxState->STMMSurfaces[pRenderData->iCurHistIn]);
1145 MOS_ZeroMemory(&VeboxSurfCntlParams, sizeof(VeboxSurfCntlParams));
1146 VeboxSurfCntlParams.bIsCompressed = pSurface->bIsCompressed;
1147 VeboxSurfCntlParams.CompressionMode = pSurface->CompressionMode;
1148 VPHAL_RENDER_CHK_STATUS(pVeboxInterface->AddVeboxSurfaceControlBits(
1149 &VeboxSurfCntlParams,
1150 (uint32_t *)&(pVeboxDiIecpCmdParams->StmmInputSurfCtrl.Value)));
1151
1152 // STMM out
1153 VPHAL_RENDER_CHK_STATUS(pOsInterface->pfnRegisterResource(
1154 pOsInterface,
1155 &pVeboxState->STMMSurfaces[pRenderData->iCurHistOut].OsResource,
1156 true,
1157 true));
1158
1159 pVeboxDiIecpCmdParams->pOsResStmmOutput =
1160 &pVeboxState->STMMSurfaces[pRenderData->iCurHistOut].OsResource;
1161 pVeboxDiIecpCmdParams->StmmOutputSurfCtrl.Value =
1162 pVeboxState->DnDiSurfMemObjCtl.STMMOutputSurfMemObjCtl;
1163
1164 // Update control bits for stmm output surface
1165 pSurface = &(pVeboxState->STMMSurfaces[pRenderData->iCurHistOut]);
1166 MOS_ZeroMemory(&VeboxSurfCntlParams, sizeof(VeboxSurfCntlParams));
1167 VeboxSurfCntlParams.bIsCompressed = pSurface->bIsCompressed;
1168 VeboxSurfCntlParams.CompressionMode = pSurface->CompressionMode;
1169 VPHAL_RENDER_CHK_STATUS(pVeboxInterface->AddVeboxSurfaceControlBits(
1170 &VeboxSurfCntlParams,
1171 (uint32_t *)&(pVeboxDiIecpCmdParams->StmmOutputSurfCtrl.Value)));
1172 }
1173
1174 // Statistics data: GNE, FMD
1175 VPHAL_RENDER_CHK_STATUS(pOsInterface->pfnRegisterResource(
1176 pOsInterface,
1177 &pVeboxState->VeboxStatisticsSurface.OsResource,
1178 true,
1179 true));
1180
1181 pVeboxDiIecpCmdParams->pOsResStatisticsOutput =
1182 &pVeboxState->VeboxStatisticsSurface.OsResource;
1183 pVeboxDiIecpCmdParams->StatisticsOutputSurfCtrl.Value =
1184 pVeboxState->DnDiSurfMemObjCtl.StatisticsOutputSurfMemObjCtl;
1185
1186 finish:
1187 return eStatus;
1188 }
1189
1190 //!
1191 //! \brief Vebox query statistics surface layout
1192 //! \details Get Specific Layout Info like GNE Offset, size of per frame info inside
1193 //! Vebox Statistics Surface for SKL+
1194 //! SKL+ changes:
1195 //! 1) ACE histogram is outside of Vebox Statistics Surface;
1196 //! 2) Add White Balence Statistics;
1197 //!
1198 //! | Layout of Statistics surface when DI enabled and DN either On or Off on SKL+\n
1199 //! | --------------------------------------------------------------\n
1200 //! | | 16 bytes for x=0, Y=0 | 16 bytes for x=16, Y=0 | ...\n
1201 //! | |-------------------------------------------------------------\n
1202 //! | | 16 bytes for x=0, Y=4 | ...\n
1203 //! | |------------------------------\n
1204 //! | | ...\n
1205 //! | |------------------------------\n
1206 //! | | 16 bytes for x=0, Y=height-4| ...\n
1207 //! | |-----------------------------------------------Pitch--------------\n
1208 //! | | 17 DW Reserved | 2 DW STD0 | 2 DW GCC0 | 11 DW Reserved |\n
1209 //! | |------------------------------------------------------------------\n
1210 //! | | 11 DW FMD0 | 6 DW GNE0 | 2 DW STD0 | 2 DW GCC0 | 11 DW Reserved |\n
1211 //! | |------------------------------------------------------------------\n
1212 //! | | 17 DW Reserved | 2 DW STD1 | 2 DW GCC1 | 11 DW Reserved |\n
1213 //! | |------------------------------------------------------------------\n
1214 //! | | 11 DW FMD1 | 6 DW GNE1 | 2 DW STD1 | 2 DW GCC1 | 11 DW Reserved |\n
1215 //! | -------------------------------------------------------------------\n
1216 //! |\n
1217 //! | Layout of Statistics surface when DN enabled and DI disabled\n
1218 //! | --------------------------------------------------------------\n
1219 //! | | 16 bytes for x=0, Y=0 | 16 bytes for x=16, Y=0 | ...\n
1220 //! | |-------------------------------------------------------------\n
1221 //! | | 16 bytes for x=0, Y=4 | ...\n
1222 //! | |------------------------------\n
1223 //! | | ...\n
1224 //! | |------------------------------\n
1225 //! | | 16 bytes for x=0, Y=height-4| ...\n
1226 //! | |-----------------------------------------------Pitch--------------\n
1227 //! | | 11 DW FMD0 | 6 DW GNE0 | 2 DW STD0 | 2 DW GCC0 | 11 DW Reserved |\n
1228 //! | |------------------------------------------------------------------\n
1229 //! | | 11 DW FMD1 | 6 DW GNE1 | 2 DW STD1 | 2 DW GCC1 | 11 DW Reserved |\n
1230 //! | -------------------------------------------------------------------\n
1231 //! |\n
1232 //! | Layout of Statistics surface when both DN and DI are disabled\n
1233 //! | ------------------------------------------------Pitch--------------\n
1234 //! | | 17 DW White Balence0 | 2 DW STD0 | 2 DW GCC0 | 11 DW Reserved |\n
1235 //! | |------------------------------------------------------------------\n
1236 //! | | 17 DW White Balence1 | 2 DW STD1 | 2 DW GCC1 | 11 DW Reserved |\n
1237 //! | -------------------------------------------------------------------\n
1238 //! \param [in] QueryType
1239 //! Query type
1240 //! \param [out] pQuery
1241 //! return layout type
1242 //! \return MOS_STATUS
1243 //! Return MOS_STATUS_SUCCESS if successful, otherwise failed
1244 //!
VeboxQueryStatLayout(VEBOX_STAT_QUERY_TYPE QueryType,uint32_t * pQuery)1245 MOS_STATUS VPHAL_VEBOX_STATE_G9_BASE::VeboxQueryStatLayout(
1246 VEBOX_STAT_QUERY_TYPE QueryType,
1247 uint32_t* pQuery)
1248 {
1249 MOS_STATUS eStatus = MOS_STATUS_SUCCESS;
1250
1251 VPHAL_RENDER_ASSERT(pQuery);
1252
1253 switch (QueryType)
1254 {
1255 case VEBOX_STAT_QUERY_GNE_OFFEST:
1256 *pQuery = VPHAL_VEBOX_STATISTICS_SURFACE_GNE_OFFSET_G9;
1257 break;
1258
1259 case VEBOX_STAT_QUERY_PER_FRAME_SIZE:
1260 *pQuery = VPHAL_VEBOX_STATISTICS_PER_FRAME_SIZE_G9;
1261 break;
1262
1263 case VEBOX_STAT_QUERY_FMD_OFFEST:
1264 *pQuery = VPHAL_VEBOX_STATISTICS_SURFACE_FMD_OFFSET_G9;
1265 break;
1266
1267 case VEBOX_STAT_QUERY_STD_OFFEST:
1268 *pQuery = VPHAL_VEBOX_STATISTICS_SURFACE_STD_OFFSET_G9;
1269 break;
1270
1271 default:
1272 VPHAL_RENDER_ASSERTMESSAGE("Vebox Statistics Layout Query, type ('%d') is not implemented.", QueryType);
1273 eStatus = MOS_STATUS_UNKNOWN;
1274 break;
1275 }
1276
1277 return eStatus;
1278 }
1279
1280 //!
1281 //! \brief Vebox get Luma default value
1282 //! \details Initialize luma denoise paramters w/ default values.
1283 //! \param [out] pLumaParams
1284 //! Pointer to Luma DN parameter
1285 //! \return void
1286 //!
GetLumaDefaultValue(PVPHAL_SAMPLER_STATE_DNDI_PARAM pLumaParams)1287 void VPHAL_VEBOX_STATE_G9_BASE::GetLumaDefaultValue(
1288 PVPHAL_SAMPLER_STATE_DNDI_PARAM pLumaParams)
1289 {
1290 VPHAL_RENDER_ASSERT(pLumaParams);
1291
1292 pLumaParams->dwDenoiseASDThreshold = NOISE_ABSSUMTEMPORALDIFF_THRESHOLD_DEFAULT_G9;
1293 pLumaParams->dwDenoiseHistoryDelta = NOISE_HISTORY_DELTA_DEFAULT;
1294 pLumaParams->dwDenoiseMaximumHistory = NOISE_HISTORY_MAX_DEFAULT_G9;
1295 pLumaParams->dwDenoiseSTADThreshold = NOISE_SUMABSTEMPORALDIFF_THRESHOLD_DEFAULT_G9;
1296 pLumaParams->dwDenoiseSCMThreshold = NOISE_SPATIALCOMPLEXITYMATRIX_THRESHOLD_DEFAULT_G9;
1297 pLumaParams->dwDenoiseMPThreshold = NOISE_NUMMOTIONPIXELS_THRESHOLD_DEFAULT_G9;
1298 pLumaParams->dwLTDThreshold = NOISE_LOWTEMPORALPIXELDIFF_THRESHOLD_DEFAULT_G9;
1299 pLumaParams->dwTDThreshold = NOISE_TEMPORALPIXELDIFF_THRESHOLD_DEFAULT_G9;
1300 }
1301
1302 //!
1303 //! \brief Vebox set DN parameter
1304 //! \details Set denoise paramters for luma and chroma.
1305 //! \param [in] pSrcSurface
1306 //! Pointer to input surface of Vebox
1307 //! \param [in] pLumaParams
1308 //! Pointer to Luma DN parameter
1309 //! \param [in] pChromaParams
1310 //! Pointer to Chroma DN parameter
1311 //! \return MOS_STATUS
1312 //! Return MOS_STATUS_SUCCESS if successful, otherwise failed
1313 //!
SetDNDIParams(PVPHAL_SURFACE pSrcSurface,PVPHAL_SAMPLER_STATE_DNDI_PARAM pLumaParams,PVPHAL_DNUV_PARAMS pChromaParams)1314 MOS_STATUS VPHAL_VEBOX_STATE_G9_BASE::SetDNDIParams(
1315 PVPHAL_SURFACE pSrcSurface,
1316 PVPHAL_SAMPLER_STATE_DNDI_PARAM pLumaParams,
1317 PVPHAL_DNUV_PARAMS pChromaParams)
1318 {
1319 MOS_STATUS eStatus;
1320 PVPHAL_DENOISE_PARAMS pDNParams;
1321 uint32_t dwDenoiseFactor;
1322 PVPHAL_VEBOX_RENDER_DATA pRenderData = GetLastExecRenderData();
1323
1324 VPHAL_RENDER_ASSERT(pSrcSurface);
1325 VPHAL_RENDER_ASSERT(pLumaParams);
1326 VPHAL_RENDER_ASSERT(pChromaParams);
1327 VPHAL_RENDER_ASSERT(pRenderData);
1328
1329 eStatus = MOS_STATUS_SUCCESS;
1330 pDNParams = pSrcSurface->pDenoiseParams;
1331
1332 VPHAL_RENDER_ASSERT(pDNParams);
1333
1334 // Set Luma DN params
1335 if (pRenderData->bDenoise)
1336 {
1337 // Setup Denoise Params
1338 GetLumaDefaultValue(pLumaParams);
1339
1340 // Initialize pixel range threshold array
1341 pRenderData->VeboxDNDIParams.dwPixRangeThreshold[0] = NOISE_BLF_RANGE_THRESHOLD_S0_DEFAULT;
1342 pRenderData->VeboxDNDIParams.dwPixRangeThreshold[1] = NOISE_BLF_RANGE_THRESHOLD_S1_DEFAULT;
1343 pRenderData->VeboxDNDIParams.dwPixRangeThreshold[2] = NOISE_BLF_RANGE_THRESHOLD_S2_DEFAULT;
1344 pRenderData->VeboxDNDIParams.dwPixRangeThreshold[3] = NOISE_BLF_RANGE_THRESHOLD_S3_DEFAULT;
1345 pRenderData->VeboxDNDIParams.dwPixRangeThreshold[4] = NOISE_BLF_RANGE_THRESHOLD_S4_DEFAULT;
1346 pRenderData->VeboxDNDIParams.dwPixRangeThreshold[5] = NOISE_BLF_RANGE_THRESHOLD_S5_DEFAULT;
1347
1348 // Initialize pixel range weight array
1349 pRenderData->VeboxDNDIParams.dwPixRangeWeight[0] = NOISE_BLF_RANGE_WGTS0_DEFAULT;
1350 pRenderData->VeboxDNDIParams.dwPixRangeWeight[1] = NOISE_BLF_RANGE_WGTS1_DEFAULT;
1351 pRenderData->VeboxDNDIParams.dwPixRangeWeight[2] = NOISE_BLF_RANGE_WGTS2_DEFAULT;
1352 pRenderData->VeboxDNDIParams.dwPixRangeWeight[3] = NOISE_BLF_RANGE_WGTS3_DEFAULT;
1353 pRenderData->VeboxDNDIParams.dwPixRangeWeight[4] = NOISE_BLF_RANGE_WGTS4_DEFAULT;
1354 pRenderData->VeboxDNDIParams.dwPixRangeWeight[5] = NOISE_BLF_RANGE_WGTS5_DEFAULT;
1355
1356 // Denoise Slider case (no auto DN detect)
1357 if (!pDNParams->bAutoDetect)
1358 {
1359 dwDenoiseFactor = (uint32_t)pDNParams->fDenoiseFactor;
1360
1361 if (dwDenoiseFactor > NOISEFACTOR_MAX)
1362 {
1363 dwDenoiseFactor = NOISEFACTOR_MAX;
1364 }
1365
1366 pLumaParams->dwDenoiseHistoryDelta = dwDenoiseHistoryDelta[dwDenoiseFactor];
1367 pLumaParams->dwDenoiseMaximumHistory = dwDenoiseMaximumHistory[dwDenoiseFactor];
1368 pLumaParams->dwDenoiseASDThreshold = dwDenoiseASDThreshold[dwDenoiseFactor];
1369 pLumaParams->dwDenoiseSCMThreshold = dwDenoiseSCMThreshold[dwDenoiseFactor];
1370 pLumaParams->dwDenoiseMPThreshold = dwDenoiseMPThreshold[dwDenoiseFactor];
1371 pLumaParams->dwLTDThreshold = dwLTDThreshold[dwDenoiseFactor];
1372 pLumaParams->dwTDThreshold = dwTDThreshold[dwDenoiseFactor];
1373 pLumaParams->dwDenoiseSTADThreshold = dwDenoiseSTADThreshold[dwDenoiseFactor];
1374
1375 pRenderData->VeboxDNDIParams.dwPixRangeThreshold[0] = dwPixRangeThreshold0[dwDenoiseFactor];
1376 pRenderData->VeboxDNDIParams.dwPixRangeThreshold[1] = dwPixRangeThreshold1[dwDenoiseFactor];
1377 pRenderData->VeboxDNDIParams.dwPixRangeThreshold[2] = dwPixRangeThreshold2[dwDenoiseFactor];
1378 pRenderData->VeboxDNDIParams.dwPixRangeThreshold[3] = dwPixRangeThreshold3[dwDenoiseFactor];
1379 pRenderData->VeboxDNDIParams.dwPixRangeThreshold[4] = dwPixRangeThreshold4[dwDenoiseFactor];
1380 pRenderData->VeboxDNDIParams.dwPixRangeThreshold[5] = dwPixRangeThreshold5[dwDenoiseFactor];
1381
1382 pRenderData->VeboxDNDIParams.dwPixRangeWeight[0] = dwPixRangeWeight0[dwDenoiseFactor];
1383 pRenderData->VeboxDNDIParams.dwPixRangeWeight[1] = dwPixRangeWeight1[dwDenoiseFactor];
1384 pRenderData->VeboxDNDIParams.dwPixRangeWeight[2] = dwPixRangeWeight2[dwDenoiseFactor];
1385 pRenderData->VeboxDNDIParams.dwPixRangeWeight[3] = dwPixRangeWeight3[dwDenoiseFactor];
1386 pRenderData->VeboxDNDIParams.dwPixRangeWeight[4] = dwPixRangeWeight4[dwDenoiseFactor];
1387 pRenderData->VeboxDNDIParams.dwPixRangeWeight[5] = dwPixRangeWeight5[dwDenoiseFactor];
1388 }
1389 }
1390
1391 // Set Chroma DN params
1392 if (pRenderData->bChromaDenoise)
1393 {
1394 // Setup Denoise Params
1395 pChromaParams->dwHistoryDeltaUV = NOISE_HISTORY_DELTA_DEFAULT;
1396 pChromaParams->dwHistoryMaxUV = NOISE_HISTORY_MAX_DEFAULT;
1397
1398 // Denoise Slider case (no auto DN detect)
1399 if (!pDNParams->bAutoDetect)
1400 {
1401 dwDenoiseFactor = (uint32_t)pDNParams->fDenoiseFactor;
1402
1403 if (dwDenoiseFactor > NOISEFACTOR_MAX)
1404 {
1405 dwDenoiseFactor = NOISEFACTOR_MAX;
1406 }
1407
1408 pChromaParams->dwLTDThresholdU =
1409 pChromaParams->dwLTDThresholdV = dwLTDThresholdUV[dwDenoiseFactor];
1410
1411 pChromaParams->dwTDThresholdU =
1412 pChromaParams->dwTDThresholdV = dwTDThresholdUV[dwDenoiseFactor];
1413
1414 pChromaParams->dwSTADThresholdU =
1415 pChromaParams->dwSTADThresholdV = dwSTADThresholdUV[dwDenoiseFactor];
1416 }
1417 }
1418
1419 if (pDNParams && pDNParams->bEnableHVSDenoise)
1420 {
1421 VPHAL_VEBOX_STATE::VeboxSetHVSDNParams(pSrcSurface);
1422 }
1423
1424 return eStatus;
1425 }
1426
1427 //!
1428 //! \brief Get output surface of Vebox
1429 //! \details Get output surface of Vebox in current operation
1430 //! \param [in] bDiVarianceEnable
1431 //! Is DI/Variances report enabled
1432 //! \return PVPHAL_SURFACE
1433 //! Corresponding output surface pointer
1434 //!
GetSurfOutput(bool bDiVarianceEnable)1435 PVPHAL_SURFACE VPHAL_VEBOX_STATE_G9_BASE::GetSurfOutput(
1436 bool bDiVarianceEnable)
1437 {
1438 PVPHAL_SURFACE pSurface = nullptr;
1439 PVPHAL_VEBOX_STATE_G9_BASE pVeboxState = this;
1440 PVPHAL_VEBOX_RENDER_DATA pRenderData = GetLastExecRenderData();
1441
1442 if (IS_VPHAL_OUTPUT_PIPE_VEBOX(pRenderData)) // Vebox output pipe
1443 {
1444 pSurface = pRenderData->pRenderTarget;
1445 }
1446 else if (bDiVarianceEnable) // DNDI, DI, DI + IECP
1447 {
1448 pSurface = pVeboxState->FFDISurfaces[pRenderData->iFrame0];
1449 }
1450 else if (IsIECPEnabled()) // DN + IECP or IECP only
1451 {
1452 pSurface = pVeboxState->FFDISurfaces[pRenderData->iCurDNOut];
1453 }
1454 else if (pRenderData->bDenoise) // DN only
1455 {
1456 pSurface = pVeboxState->FFDNSurfaces[pRenderData->iCurDNOut];
1457 }
1458 else if (IS_VPHAL_OUTPUT_PIPE_SFC(pRenderData)) // Write to SFC
1459 {
1460 // Vebox o/p should not be written to memory
1461 pSurface = nullptr;
1462 }
1463 else
1464 {
1465 VPHAL_RENDER_ASSERTMESSAGE("Unable to determine Vebox Output Surface.");
1466 }
1467
1468 return pSurface;
1469 }
1470
1471 //!
1472 //! \brief Setup surface states for Vebox
1473 //! \details Setup surface states for use in the current Vebox Operation
1474 //! \param [in] bDiVarianceEnable
1475 //! Is DI/Variances report enabled
1476 //! \param [in,out] pVeboxSurfaceStateCmdParams
1477 //! Pointer to VEBOX_SURFACE_STATE command parameters
1478 //! \return void
1479 //!
SetupSurfaceStates(bool bDiVarianceEnable,PVPHAL_VEBOX_SURFACE_STATE_CMD_PARAMS pVeboxSurfaceStateCmdParams)1480 void VPHAL_VEBOX_STATE_G9_BASE::SetupSurfaceStates(
1481 bool bDiVarianceEnable,
1482 PVPHAL_VEBOX_SURFACE_STATE_CMD_PARAMS pVeboxSurfaceStateCmdParams)
1483 {
1484 PVPHAL_VEBOX_STATE_G9_BASE pVeboxState = this;
1485 PVPHAL_VEBOX_RENDER_DATA pRenderData = GetLastExecRenderData();
1486
1487 MOS_ZeroMemory(pVeboxSurfaceStateCmdParams,
1488 sizeof(VPHAL_VEBOX_SURFACE_STATE_CMD_PARAMS));
1489
1490 pVeboxSurfaceStateCmdParams->pSurfInput = pVeboxState->m_currentSurface;
1491
1492 pVeboxSurfaceStateCmdParams->pSurfOutput = pVeboxState->GetSurfOutput(bDiVarianceEnable);
1493
1494 pVeboxSurfaceStateCmdParams->pSurfSTMM = &pVeboxState->STMMSurfaces[pRenderData->iCurHistIn];
1495 pVeboxSurfaceStateCmdParams->pSurfDNOutput = pVeboxState->FFDNSurfaces[pRenderData->iCurDNOut];
1496
1497 pVeboxSurfaceStateCmdParams->bDIEnable = bDiVarianceEnable;
1498
1499 }
1500
UseKernelResource()1501 bool VPHAL_VEBOX_STATE_G9_BASE::UseKernelResource()
1502 {
1503 return false; // can always use driver resource in clear memory
1504 }
1505
1506 //!
1507 //! \brief Setup Vebox_State Command parameter
1508 //! \param [in] bDiVarianceEnable
1509 //! Is DI/Variances report enabled
1510 //! \param [in,out] pVeboxStateCmdParams
1511 //! Pointer to VEBOX_STATE command parameters
1512 //! \return MOS_STATUS
1513 //! Return MOS_STATUS_SUCCESS if successful, otherwise failed
1514 //!
SetupVeboxState(bool bDiVarianceEnable,PMHW_VEBOX_STATE_CMD_PARAMS pVeboxStateCmdParams)1515 MOS_STATUS VPHAL_VEBOX_STATE_G9_BASE::SetupVeboxState(
1516 bool bDiVarianceEnable,
1517 PMHW_VEBOX_STATE_CMD_PARAMS pVeboxStateCmdParams)
1518 {
1519 PMHW_VEBOX_MODE pVeboxMode;
1520 PMOS_INTERFACE pOsInterface;
1521 MOS_STATUS eStatus;
1522
1523 PVPHAL_VEBOX_STATE_G9_BASE pVeboxState = this;
1524 PVPHAL_VEBOX_RENDER_DATA pRenderData = GetLastExecRenderData();
1525
1526 pVeboxMode = &pVeboxStateCmdParams->VeboxMode;
1527 pOsInterface = pVeboxState->m_pOsInterface;
1528 eStatus = MOS_STATUS_SUCCESS;
1529
1530 MOS_ZeroMemory(pVeboxStateCmdParams, sizeof(*pVeboxStateCmdParams));
1531
1532 if (IS_VPHAL_OUTPUT_PIPE_SFC(pRenderData) ||
1533 IS_VPHAL_OUTPUT_PIPE_VEBOX(pRenderData))
1534 {
1535 // On SKL, GlobalIECP must be enabled when the output pipe is Vebox or SFC
1536 pVeboxMode->GlobalIECPEnable = true;
1537 }
1538 else
1539 {
1540 pVeboxMode->GlobalIECPEnable = IsIECPEnabled();
1541 }
1542
1543 pVeboxMode->DIEnable = bDiVarianceEnable;
1544
1545 pVeboxMode->SFCParallelWriteEnable = IS_VPHAL_OUTPUT_PIPE_SFC(pRenderData) &&
1546 (pRenderData->bDenoise || bDiVarianceEnable);
1547 pVeboxMode->DNEnable = pRenderData->bDenoise;
1548 pVeboxMode->DNDIFirstFrame = !pRenderData->bRefValid;
1549
1550 pVeboxMode->DIOutputFrames = SetDIOutputFrame(pRenderData, pVeboxState, pVeboxMode);
1551
1552 pVeboxMode->DisableEncoderStatistics = true;
1553
1554 if((pVeboxMode->DIEnable == false) &&
1555 (pVeboxMode->DNEnable != false || pVeboxMode->HotPixelFilteringEnable != false) &&
1556 ((pVeboxState->bDisableTemporalDenoiseFilter) ||
1557 (IS_RGB_CSPACE(pVeboxState->m_currentSurface->ColorSpace)) ||
1558 (pVeboxMode->HotPixelFilteringEnable && (pVeboxMode->DNEnable == false) && (pVeboxMode->DIEnable == false))))
1559 {
1560 pVeboxMode->DisableTemporalDenoiseFilter = true;
1561 // GlobalIECP or Demosaic must be enabled even if IECP not used
1562 pVeboxMode->GlobalIECPEnable = true;
1563 }
1564 else
1565 {
1566 pVeboxMode->DisableTemporalDenoiseFilter = false;
1567 }
1568
1569 pVeboxStateCmdParams->bUseVeboxHeapKernelResource
1570 = UseKernelResource();
1571
1572 // This field must be set if 00b for products that don't have 2 slices.
1573 if (MEDIA_IS_SKU(pVeboxState->m_pRenderHal->pSkuTable, FtrSingleVeboxSlice))
1574 {
1575 pVeboxMode->SingleSliceVeboxEnable = 0;
1576 }
1577 else
1578 {
1579 // Permanent program limitation that should go in all the configurations of SKLGT which have 2 VEBOXes (i.e. GT3 & GT4)
1580 // VEBOX1 should be disabled whenever there is an VE-SFC workload.
1581 // This is because we have only one SFC all the GT configurations and that SFC is tied to VEBOX0.Hence the programming restriction.
1582 if (IS_VPHAL_OUTPUT_PIPE_SFC(pRenderData))
1583 {
1584 pVeboxMode->SingleSliceVeboxEnable = 1;
1585 }
1586 else
1587 {
1588 pVeboxMode->SingleSliceVeboxEnable = 0;
1589 }
1590 }
1591
1592 return eStatus;
1593 }
1594
1595 //!
1596 //! \brief Get the output pipe on SKL
1597 //! \details There are 3 output pipes on SKL. Check which output pipe can be applied
1598 //! \param [in] pcRenderParams
1599 //! Pointer to VpHal render parameters
1600 //! \param [in] pSrcSurface
1601 //! Pointer to input surface of Vebox
1602 //! \param [out] pbCompNeeded
1603 //! return whether composition is needed after Vebox/SFC
1604 //! \return VPHAL_OUTPUT_PIPE_MODE
1605 //! return the output pipe mode
1606 //!
GetOutputPipe(PCVPHAL_RENDER_PARAMS pcRenderParams,PVPHAL_SURFACE pSrcSurface,bool * pbCompNeeded)1607 VPHAL_OUTPUT_PIPE_MODE VPHAL_VEBOX_STATE_G9_BASE::GetOutputPipe(
1608 PCVPHAL_RENDER_PARAMS pcRenderParams,
1609 PVPHAL_SURFACE pSrcSurface,
1610 bool* pbCompNeeded)
1611 {
1612 VPHAL_OUTPUT_PIPE_MODE OutputPipe;
1613 bool bCompBypassFeasible;
1614 bool bOutputPipeVeboxFeasible;
1615 PVPHAL_SURFACE pTarget;
1616 PVPHAL_VEBOX_STATE_G9_BASE pVeboxState = this;
1617
1618 OutputPipe = VPHAL_OUTPUT_PIPE_MODE_COMP;
1619
1620 bCompBypassFeasible = IS_COMP_BYPASS_FEASIBLE(*pbCompNeeded, pcRenderParams, pSrcSurface);
1621
1622 if (!bCompBypassFeasible)
1623 {
1624 OutputPipe = VPHAL_OUTPUT_PIPE_MODE_COMP;
1625 goto finish;
1626 }
1627
1628 //Let Kernel to cover the DI cases VEBOX cannot handle.
1629 if (pSrcSurface->pDeinterlaceParams &&
1630 pSrcSurface->pDeinterlaceParams->DIMode == DI_MODE_BOB &&
1631 ((IS_VEBOX_SURFACE_HEIGHT_UNALIGNED(pSrcSurface, 4) &&
1632 pSrcSurface->Format == Format_NV12) ||
1633 !this->IsDiFormatSupported(pSrcSurface)))
1634 {
1635 OutputPipe = VPHAL_OUTPUT_PIPE_MODE_COMP;
1636 goto finish;
1637 }
1638
1639 bOutputPipeVeboxFeasible = IS_OUTPUT_PIPE_VEBOX_FEASIBLE(pVeboxState, pcRenderParams, pSrcSurface);
1640 if (bOutputPipeVeboxFeasible)
1641 {
1642 OutputPipe = VPHAL_OUTPUT_PIPE_MODE_VEBOX;
1643 goto finish;
1644 }
1645
1646 if (VeboxIs2PassesCSCNeeded(pSrcSurface, pcRenderParams->pTarget[0]))
1647 {
1648 OutputPipe = VPHAL_OUTPUT_PIPE_MODE_COMP;
1649 goto finish;
1650 }
1651
1652 pTarget = pcRenderParams->pTarget[0];
1653 // Check if SFC can be the output pipe
1654 if (m_sfcPipeState)
1655 {
1656 OutputPipe = m_sfcPipeState->GetOutputPipe(
1657 pSrcSurface,
1658 pTarget,
1659 pcRenderParams);
1660 }
1661 else
1662 {
1663 OutputPipe = VPHAL_OUTPUT_PIPE_MODE_COMP;
1664 }
1665
1666 // Explore the potential to still output by VEBOX and perform quick color fill in composition
1667 if (bCompBypassFeasible &&
1668 OutputPipe == VPHAL_OUTPUT_PIPE_MODE_COMP &&
1669 pcRenderParams->pColorFillParams &&
1670 pSrcSurface->rcDst.left == pTarget->rcDst.left &&
1671 pSrcSurface->rcDst.top == pTarget->rcDst.top &&
1672 pSrcSurface->rcDst.right == pTarget->rcDst.right &&
1673 pSrcSurface->rcDst.bottom < pTarget->rcDst.bottom)
1674 {
1675 int32_t lTargetBottom;
1676 lTargetBottom = pTarget->rcDst.bottom;
1677 pTarget->rcDst.bottom = pSrcSurface->rcDst.bottom;
1678
1679 // Check if Vebox can be the output pipe again
1680 bOutputPipeVeboxFeasible = IS_OUTPUT_PIPE_VEBOX_FEASIBLE(pVeboxState, pcRenderParams, pSrcSurface);
1681 if (bOutputPipeVeboxFeasible)
1682 {
1683 OutputPipe = VPHAL_OUTPUT_PIPE_MODE_VEBOX;
1684 pTarget->bFastColorFill = true;
1685 }
1686 pTarget->rcDst.bottom = lTargetBottom;
1687 }
1688
1689 finish:
1690 *pbCompNeeded = (OutputPipe == VPHAL_OUTPUT_PIPE_MODE_COMP) ? true : false;
1691 return OutputPipe;
1692 }
1693
1694 //!
1695 //! \brief Vebox is needed on SKL
1696 //! \details Check if Vebox Render operation can be applied
1697 //! \param [in] pcRenderParams
1698 //! Pointer to VpHal render parameters
1699 //! \param [in,out] pRenderPassData
1700 //! Pointer to Render data
1701 //! \return bool
1702 //! return true if Vebox is needed, otherwise false
1703 //!
IsNeeded(PCVPHAL_RENDER_PARAMS pcRenderParams,RenderpassData * pRenderPassData)1704 bool VPHAL_VEBOX_STATE_G9_BASE::IsNeeded(
1705 PCVPHAL_RENDER_PARAMS pcRenderParams,
1706 RenderpassData *pRenderPassData)
1707 {
1708 PVPHAL_VEBOX_RENDER_DATA pRenderData;
1709 PRENDERHAL_INTERFACE pRenderHal;
1710 PVPHAL_SURFACE pRenderTarget;
1711 bool bVeboxNeeded;
1712 PMOS_INTERFACE pOsInterface;
1713 MOS_STATUS eStatus;
1714 PVPHAL_VEBOX_STATE_G9_BASE pVeboxState = this;
1715 PVPHAL_SURFACE pSrcSurface;
1716
1717 bVeboxNeeded = false;
1718 VPHAL_RENDER_CHK_NULL(pVeboxState->m_pRenderHal);
1719 VPHAL_RENDER_CHK_NULL(pVeboxState->m_pOsInterface);
1720
1721 pRenderHal = pVeboxState->m_pRenderHal;
1722 pOsInterface = pVeboxState->m_pOsInterface;
1723
1724 pRenderTarget = pcRenderParams->pTarget[0];
1725 pRenderData = GetLastExecRenderData();
1726 pSrcSurface = pRenderPassData->pSrcSurface;
1727
1728 VPHAL_RENDER_CHK_NULL(pSrcSurface);
1729 VPHAL_RENDER_CHK_NULL(pRenderTarget);
1730
1731 // Check whether VEBOX is available
1732 // VTd doesn't support VEBOX
1733 if (!MEDIA_IS_SKU(pVeboxState->m_pSkuTable, FtrVERing))
1734 {
1735 pRenderPassData->bCompNeeded = true;
1736 goto finish;
1737 }
1738
1739 // check if 16aligned UserPtr enabling.
1740 if (pSrcSurface->b16UsrPtr || pRenderTarget->b16UsrPtr)
1741 {
1742 pRenderPassData->bCompNeeded = true;
1743 goto finish;
1744 }
1745
1746 // Check if the Surface size is greater than 64x16 which is the minimum Width and Height VEBOX can handle
1747 if (pSrcSurface->dwWidth < MHW_VEBOX_MIN_WIDTH || pSrcSurface->dwHeight < MHW_VEBOX_MIN_HEIGHT)
1748 {
1749 pRenderPassData->bCompNeeded = true;
1750 goto finish;
1751 }
1752
1753 pRenderData->Init();
1754 if (MEDIA_IS_SKU(m_pSkuTable, FtrSFCPipe) && m_sfcPipeState)
1755 {
1756 m_sfcPipeState->InitRenderData();
1757 }
1758
1759 // Determine the output pipe before setting the rendering flags for Vebox and SFC
1760 SET_VPHAL_OUTPUT_PIPE(
1761 pRenderData,
1762 GetOutputPipe(
1763 pcRenderParams,
1764 pSrcSurface,
1765 &pRenderPassData->bCompNeeded));
1766
1767 //If using Vebox to Crop, setting the bVEBOXCroppingUsed = true. We use the rcSrc to set Vebox width/height instead of using rcMaxsrc in VeboxAdjustBoundary().
1768 if (IS_VPHAL_OUTPUT_PIPE_VEBOX(pRenderData) &&
1769 ((uint32_t)pSrcSurface->rcSrc.bottom < pSrcSurface->dwHeight ||
1770 (uint32_t)pSrcSurface->rcSrc.right < pSrcSurface->dwWidth))
1771 {
1772 pSrcSurface->bVEBOXCroppingUsed = true;
1773 pRenderTarget->bVEBOXCroppingUsed = true;
1774 VPHAL_RENDER_NORMALMESSAGE("bVEBOXCroppingUsed = true, pSrcSurface->rcSrc.bottom: %d, pSrcSurface->rcSrc.right: %d; pSrcSurface->dwHeight: %d, pSrcSurface->dwHeight: %d;",
1775 (uint32_t)pSrcSurface->rcSrc.bottom,
1776 (uint32_t)pSrcSurface->rcSrc.right,
1777 pSrcSurface->dwHeight,
1778 pSrcSurface->dwWidth);
1779 }
1780 else
1781 {
1782 pSrcSurface->bVEBOXCroppingUsed = false;
1783 pRenderTarget->bVEBOXCroppingUsed = false;
1784 }
1785
1786 // Set MMC State
1787 SET_VPHAL_MMC_STATE(pRenderData, pVeboxState->bEnableMMC);
1788
1789 // Update execution state based on current and past events such as the
1790 // # of future and past frames available.
1791 pVeboxState->UpdateVeboxExecutionState(
1792 pSrcSurface,
1793 pRenderData->OutputPipe);
1794
1795 // Set Component
1796 SET_VPHAL_COMPONENT(pRenderData, pcRenderParams->Component);
1797
1798 // Check if Vebox can be used to process the surface
1799 // if Hdr enabled on Gen9, do not use VE feature to avoid VPOutputPipe report fail.
1800 if (!pRenderPassData->bHdrNeeded && pVeboxState->IsFormatSupported(pSrcSurface))
1801 {
1802 // Save Alpha passed by App to be used in Vebox
1803 if (IS_VPHAL_OUTPUT_PIPE_VEBOX(pRenderData))
1804 {
1805 pRenderData->pAlphaParams = pcRenderParams->pCompAlpha;
1806 }
1807
1808 // Setup Rendering Flags for Vebox
1809 VeboxSetRenderingFlags(
1810 pSrcSurface,
1811 pRenderTarget);
1812
1813 if (pRenderData->b2PassesCSC)
1814 {
1815 pRenderData->bVeboxBypass = false;
1816 }
1817
1818 // Vebox is needed if Vebox isn't bypassed
1819 bVeboxNeeded = !pRenderData->bVeboxBypass;
1820 }
1821
1822 // if ScalingPreference == VPHAL_SCALING_PREFER_SFC_FOR_VEBOX, use SFC only when VEBOX is required
1823 if ((pSrcSurface->ScalingPreference == VPHAL_SCALING_PREFER_SFC_FOR_VEBOX) &&
1824 (bVeboxNeeded == false))
1825 {
1826 VPHAL_RENDER_NORMALMESSAGE("DDI choose to use SFC only for VEBOX, and since VEBOX is not required, change to Composition.");
1827 pRenderData->OutputPipe = VPHAL_OUTPUT_PIPE_MODE_COMP;
1828 pRenderPassData->bCompNeeded = true;
1829 }
1830
1831 if (pRenderPassData->bHdrNeeded && IS_VPHAL_OUTPUT_PIPE_SFC(pRenderData))
1832 {
1833 // The comp bypass check is skipped for SFC feasibiliy to allow HDR support,
1834 // if still HdrSfc path is not enabled, need to switch back to composition (HDR render path)
1835 // otherwise, traditional SFC path will direct output to render target and not compatible with HDR render path.
1836 pRenderData->OutputPipe = VPHAL_OUTPUT_PIPE_MODE_COMP;
1837 pRenderPassData->bCompNeeded = true;
1838 }
1839
1840 // Check if we want to enable SFC processing
1841 if (IS_VPHAL_OUTPUT_PIPE_SFC(pRenderData))
1842 {
1843 // Setup Rendering Flags for SFC pipe
1844 m_sfcPipeState->SetRenderingFlags(
1845 pcRenderParams->pColorFillParams,
1846 pcRenderParams->pCompAlpha,
1847 pSrcSurface,
1848 pRenderTarget,
1849 pRenderData);
1850
1851 // Update Vebox Rendering Flags when the output pipe is SFC.
1852 // If input surface format is AYUV, and just have one layer as primary,Procamp can also enable.
1853 // Those flags cannot be updated inside Vebox's SetRenderingFlags due to ScalingPreference option will
1854 // turn back to composition when Vebox is not needed in above code.
1855 pRenderData->bProcamp = (IS_YUV_FORMAT(pSrcSurface->Format) ||
1856 (pSrcSurface->Format == Format_AYUV &&
1857 pcRenderParams->uSrcCount == 1)) &&
1858 pSrcSurface->pProcampParams &&
1859 pSrcSurface->pProcampParams->bEnabled;
1860 pRenderData->bBeCsc = IS_RGB_CSPACE(pSrcSurface->ColorSpace);
1861 pRenderData->bIECP = pRenderData->bIECP ||
1862 pRenderData->bProcamp ||
1863 pRenderData->bBeCsc;
1864
1865 bVeboxNeeded = true;
1866 }
1867
1868 finish:
1869 return bVeboxNeeded;
1870 }
1871
1872 //!
1873 //! \brief Vebox get the back-end colorspace conversion matrix
1874 //! \details When the i/o is A8R8G8B8 or X8R8G8B8, the transfer matrix
1875 //! needs to be updated accordingly
1876 //! \param [in] pSrcSurface
1877 //! Pointer to input surface of Vebox
1878 //! \param [in] pOutSurface
1879 //! Pointer to output surface of Vebox
1880 //! \return void
1881 //!
VeboxGetBeCSCMatrix(PVPHAL_SURFACE pSrcSurface,PVPHAL_SURFACE pOutSurface)1882 void VPHAL_VEBOX_STATE_G9_BASE::VeboxGetBeCSCMatrix(
1883 PVPHAL_SURFACE pSrcSurface,
1884 PVPHAL_SURFACE pOutSurface)
1885 {
1886 PVPHAL_VEBOX_STATE_G9_BASE pVeboxState = this;
1887 float fTemp[3];
1888
1889 // Get the matrix to use for conversion
1890 VpHal_GetCscMatrix(
1891 pSrcSurface->ColorSpace,
1892 pOutSurface->ColorSpace,
1893 pVeboxState->fCscCoeff,
1894 pVeboxState->fCscInOffset,
1895 pVeboxState->fCscOutOffset);
1896
1897 // Vebox CSC converts RGB input to YUV for SFC
1898 // Vebox only supports A8B8G8R8 input, swap the 1st and 3rd
1899 // columns of the transfer matrix for A8R8G8B8 and X8R8G8B8
1900 // This only happens when SFC output is used
1901 if ((pSrcSurface->Format == Format_A8R8G8B8) ||
1902 (pSrcSurface->Format == Format_X8R8G8B8))
1903 {
1904 fTemp[0] = pVeboxState->fCscCoeff[0];
1905 fTemp[1] = pVeboxState->fCscCoeff[3];
1906 fTemp[2] = pVeboxState->fCscCoeff[6];
1907
1908 pVeboxState->fCscCoeff[0] = pVeboxState->fCscCoeff[2];
1909 pVeboxState->fCscCoeff[3] = pVeboxState->fCscCoeff[5];
1910 pVeboxState->fCscCoeff[6] = pVeboxState->fCscCoeff[8];
1911
1912 pVeboxState->fCscCoeff[2] = fTemp[0];
1913 pVeboxState->fCscCoeff[5] = fTemp[1];
1914 pVeboxState->fCscCoeff[8] = fTemp[2];
1915 }
1916 }
1917
1918 #if VEBOX_AUTO_DENOISE_SUPPORTED
1919 //!
1920 //! \brief Load update kernel curbe data
1921 //! \details Loads the static data of update kernel to curbe
1922 //! \param [out] iCurbeOffsetOutDN
1923 //! Pointer to DN kernel curbe offset
1924 //! \return MOS_STATUS
1925 //! Return MOS_STATUS_SUCCESS if successful, otherwise failed
1926 //!
LoadUpdateDenoiseKernelStaticData(int32_t * iCurbeOffsetOutDN)1927 MOS_STATUS VPHAL_VEBOX_STATE_G9_BASE::LoadUpdateDenoiseKernelStaticData(
1928 int32_t* iCurbeOffsetOutDN)
1929 {
1930 PRENDERHAL_INTERFACE pRenderHal;
1931 VEBOX_STATE_UPDATE_STATIC_DATA_G9 DNStaticData; // DN Update kernelStatic parameters
1932 PMHW_VEBOX_INTERFACE pVeboxInterface;
1933 PVPHAL_DENOISE_PARAMS pDenoiseParams; // Denoise
1934 int32_t iOffset0, iOffset1;
1935 MOS_STATUS eStatus;
1936 PVPHAL_VEBOX_STATE_G9_BASE pVeboxState = this;
1937 PVPHAL_VEBOX_RENDER_DATA pRenderData = GetLastExecRenderData();
1938
1939 pRenderHal = pVeboxState->m_pRenderHal;
1940 pVeboxInterface = pVeboxState->m_pVeboxInterface;
1941 eStatus = MOS_STATUS_SUCCESS;
1942
1943 // init the static data
1944 MOS_ZeroMemory(&DNStaticData, sizeof(VEBOX_STATE_UPDATE_STATIC_DATA_G9));
1945
1946 pDenoiseParams = m_currentSurface->pDenoiseParams;
1947 VPHAL_RENDER_ASSERT(pDenoiseParams);
1948
1949 // Get offset for slice0 and slice1
1950 VPHAL_RENDER_CHK_STATUS(VeboxGetStatisticsSurfaceOffsets(
1951 &iOffset0,
1952 &iOffset1));
1953
1954 // Load DN update kernel CURBE data
1955 if (pRenderData->bAutoDenoise)
1956 {
1957 // set the curbe data for DN update kernel
1958 DNStaticData.DW00.OffsetToSlice0 = iOffset0;
1959 DNStaticData.DW01.OffsetToSlice1 = iOffset1;
1960 DNStaticData.DW02.FirstFrameFlag = pVeboxState->bFirstFrame;
1961 DNStaticData.DW02.NoiseLevel = pDenoiseParams->NoiseLevel;
1962 DNStaticData.DW03.RangeThrAdp2NLvl = 1;
1963 DNStaticData.DW04.VeboxStatisticsSurface = BI_DN_STATISTICS_SURFACE;
1964 DNStaticData.DW05.VeboxDndiStateSurface = BI_DN_VEBOX_STATE_SURFACE;
1965 DNStaticData.DW06.VeboxTempSurface = BI_DN_TEMP_SURFACE;
1966 DNStaticData.DW07.VeboxSpatialAttributesConfigurationSurface = BI_DN_SPATIAL_ATTRIBUTES_CONFIGURATION_SURFACE;
1967
1968 *iCurbeOffsetOutDN = pRenderHal->pfnLoadCurbeData(
1969 pRenderHal,
1970 pRenderData->pMediaState,
1971 &DNStaticData,
1972 sizeof(DNStaticData));
1973
1974 if (*iCurbeOffsetOutDN < 0)
1975 {
1976 eStatus = MOS_STATUS_UNKNOWN;
1977 goto finish;
1978 }
1979
1980 pRenderData->iCurbeLength += sizeof(DNStaticData);
1981 }
1982
1983 finish:
1984 return eStatus;
1985 }
1986
1987 //!
1988 //! \brief Setup surface states for Denoise
1989 //! \details Setup Surface State for Vebox States Auto DN kernel
1990 //! \return MOS_STATUS
1991 //! Return MOS_STATUS_SUCCESS if successful, otherwise failed
1992 //!
SetupSurfaceStatesForDenoise()1993 MOS_STATUS VPHAL_VEBOX_STATE_G9_BASE::SetupSurfaceStatesForDenoise()
1994 {
1995 PRENDERHAL_INTERFACE pRenderHal;
1996 PMOS_INTERFACE pOsInterface;
1997 RENDERHAL_SURFACE_STATE_PARAMS SurfaceParams;
1998 MOS_STATUS eStatus;
1999 MOS_FORMAT tmpFormat;
2000 bool bUseKernelResource;
2001 const MHW_VEBOX_HEAP *pVeboxHeap = nullptr;
2002 PVPHAL_VEBOX_STATE_G9_BASE pVeboxState = this;
2003 PVPHAL_VEBOX_RENDER_DATA pRenderData = GetLastExecRenderData();
2004
2005 eStatus = MOS_STATUS_SUCCESS;
2006 pRenderHal = pVeboxState->m_pRenderHal;
2007 pOsInterface = pVeboxState->m_pOsInterface;
2008 VPHAL_RENDER_CHK_STATUS(pVeboxState->m_pVeboxInterface->GetVeboxHeapInfo(
2009 &pVeboxHeap));
2010 VPHAL_RENDER_CHK_NULL(pVeboxHeap);
2011 VPHAL_RENDER_CHK_NULL(pOsInterface);
2012 VPHAL_RENDER_CHK_NULL(pOsInterface->osCpInterface);
2013
2014 bUseKernelResource = UseKernelResource();
2015
2016 MOS_ZeroMemory(&SurfaceParams, sizeof(SurfaceParams));
2017 MOS_ZeroMemory(&pVeboxState->VeboxHeapResource, sizeof(VPHAL_SURFACE));
2018 MOS_ZeroMemory(&pVeboxState->tmpResource, sizeof(VPHAL_SURFACE));
2019
2020 // Treat the 1D buffer as 2D surface
2021 // VEBox State Surface
2022 pVeboxState->VeboxHeapResource.Format = Format_L8;
2023 pVeboxState->VeboxHeapResource.dwWidth = SECURE_BLOCK_COPY_KERNEL_SURF_WIDTH; // Hard code for secure Block Copy kernel
2024 pVeboxState->VeboxHeapResource.dwPitch = SECURE_BLOCK_COPY_KERNEL_SURF_WIDTH; // Hard code for secure Block Copy kernel
2025 pVeboxState->VeboxHeapResource.dwHeight =
2026 MOS_ROUNDUP_DIVIDE(pVeboxHeap->uiInstanceSize, SECURE_BLOCK_COPY_KERNEL_SURF_WIDTH);
2027 pVeboxState->VeboxHeapResource.dwOffset =
2028 pVeboxHeap->uiInstanceSize *
2029 pVeboxHeap->uiCurState;
2030 pVeboxState->VeboxHeapResource.TileType = MOS_TILE_LINEAR;
2031 pVeboxState->VeboxHeapResource.OsResource = bUseKernelResource ?
2032 pVeboxHeap->KernelResource :
2033 pVeboxHeap->DriverResource;
2034
2035 // Temp Surface: for Noise Level History
2036 pVeboxState->tmpResource.Format = Format_L8;
2037 pVeboxState->tmpResource.dwWidth = SECURE_BLOCK_COPY_KERNEL_SURF_WIDTH; // Hard code for secure Block Copy kernel
2038 pVeboxState->tmpResource.dwPitch = SECURE_BLOCK_COPY_KERNEL_SURF_WIDTH; // Hard code for secure Block Copy kernel
2039 pVeboxState->tmpResource.dwHeight =
2040 MOS_ROUNDUP_DIVIDE(MHW_PAGE_SIZE, SECURE_BLOCK_COPY_KERNEL_SURF_WIDTH);
2041 pVeboxState->tmpResource.dwOffset = 0;
2042 pVeboxState->tmpResource.TileType = MOS_TILE_LINEAR;
2043 pVeboxState->tmpResource.OsResource = pVeboxState->VeboxTempSurface.OsResource;
2044
2045 // Statistics Surface-----------------------------------------------------------
2046 tmpFormat = pVeboxState->VeboxStatisticsSurface.Format;
2047 pVeboxState->VeboxStatisticsSurface.Format = Format_RAW;
2048
2049 VPHAL_RENDER_CHK_STATUS(VpHal_CommonSetBufferSurfaceForHwAccess(
2050 pRenderHal,
2051 &pVeboxState->VeboxStatisticsSurface,
2052 &pVeboxState->RenderHalVeboxStatisticsSurface,
2053 nullptr,
2054 pRenderData->iBindingTable,
2055 BI_DN_STATISTICS_SURFACE,
2056 false));
2057
2058 pVeboxState->VeboxStatisticsSurface.Format = tmpFormat;
2059
2060 // VEBox State Surface-----------------------------------------------------------
2061 MOS_ZeroMemory(&SurfaceParams, sizeof(SurfaceParams));
2062
2063 SurfaceParams.Type = pRenderHal->SurfaceTypeDefault;
2064 SurfaceParams.isOutput = true;
2065 SurfaceParams.bWidthInDword_Y = true;
2066 SurfaceParams.bWidthInDword_UV = true;
2067 SurfaceParams.Boundary = RENDERHAL_SS_BOUNDARY_ORIGINAL;
2068 SurfaceParams.bWidth16Align = false;
2069
2070 VPHAL_RENDER_CHK_STATUS(VpHal_CommonSetSurfaceForHwAccess(
2071 pRenderHal,
2072 &pVeboxState->VeboxHeapResource,
2073 &pVeboxState->RenderHalVeboxHeapResource,
2074 &SurfaceParams,
2075 pRenderData->iBindingTable,
2076 BI_DN_VEBOX_STATE_SURFACE,
2077 true));
2078
2079 // VEBox Temp Surface-----------------------------------------------------------
2080 MOS_ZeroMemory(&SurfaceParams, sizeof(SurfaceParams));
2081
2082 SurfaceParams.Type = pRenderHal->SurfaceTypeDefault;
2083 SurfaceParams.isOutput = true;
2084 SurfaceParams.bWidthInDword_Y = true;
2085 SurfaceParams.bWidthInDword_UV = true;
2086 SurfaceParams.Boundary = RENDERHAL_SS_BOUNDARY_ORIGINAL;
2087 SurfaceParams.bWidth16Align = false;
2088
2089 // set isOutput=false to skip first frame for PermeatePatchForHM().
2090 if (pVeboxState->bFirstFrame && pOsInterface->osCpInterface->IsHMEnabled())
2091 {
2092 SurfaceParams.isOutput = false;
2093 }
2094
2095 VPHAL_RENDER_CHK_STATUS(VpHal_CommonSetSurfaceForHwAccess(
2096 pRenderHal,
2097 &pVeboxState->tmpResource,
2098 &pVeboxState->RenderHalTmpResource,
2099 &SurfaceParams,
2100 pRenderData->iBindingTable,
2101 BI_DN_TEMP_SURFACE,
2102 true));
2103
2104 // Spatial Attributes Configuration Surface------------------------------------
2105 MOS_ZeroMemory(&SurfaceParams, sizeof(SurfaceParams));
2106
2107 VPHAL_RENDER_CHK_STATUS(VpHal_CommonSetBufferSurfaceForHwAccess(
2108 pRenderHal,
2109 &pVeboxState->VeboxSpatialAttributesConfigurationSurface,
2110 &pVeboxState->RenderHalVeboxSpatialAttributesConfigurationSurface,
2111 &SurfaceParams,
2112 pRenderData->iBindingTable,
2113 BI_DN_SPATIAL_ATTRIBUTES_CONFIGURATION_SURFACE,
2114 false));
2115
2116 finish:
2117 return eStatus;
2118 }
2119 #endif
2120
2121 //!
2122 //! \brief Setup kernels for Vebox auto mode features
2123 //! \details Setup kernels that co-operate with Vebox auto mode features
2124 //! \param [in] iKDTIndex
2125 //! Index to Kernel Parameter Array (defined platform specific)
2126 //! \return MOS_STATUS
2127 //! Return MOS_STATUS_SUCCESS if successful, otherwise failed
2128 //!
SetupVeboxKernel(int32_t iKDTIndex)2129 MOS_STATUS VPHAL_VEBOX_STATE_G9_BASE::SetupVeboxKernel(
2130 int32_t iKDTIndex)
2131 {
2132 Kdll_CacheEntry *pCacheEntryTable; // Kernel Cache Entry table
2133 Kdll_FilterEntry *pFilter; // Kernel Filter (points to base of filter array)
2134 int32_t iKUID; // Kernel Unique ID (DNDI uses combined kernels)
2135 int32_t iInlineLength; // Inline data length
2136 MOS_STATUS eStatus; // Return code
2137 PVPHAL_VEBOX_STATE_G9_BASE pVeboxState = this;
2138 PVPHAL_VEBOX_RENDER_DATA pRenderData = GetLastExecRenderData();
2139
2140 // Initialize Variables
2141 eStatus = MOS_STATUS_SUCCESS;
2142 pFilter = &pVeboxState->SearchFilter[0];
2143 pCacheEntryTable = pVeboxState->m_pKernelDllState->ComponentKernelCache.pCacheEntries;
2144
2145 // Initialize States
2146 MOS_ZeroMemory(pFilter, sizeof(pVeboxState->SearchFilter));
2147 MOS_ZeroMemory(&pRenderData->KernelEntry[iKDTIndex], sizeof(Kdll_CacheEntry));
2148
2149 #if VEBOX_AUTO_DENOISE_SUPPORTED
2150 if (iKDTIndex == KERNEL_UPDATEDNSTATE)
2151 {
2152 iKUID = IDR_VP_UpdateDNState;
2153 iInlineLength = 0; // No inline data
2154 pRenderData->PerfTag = VPHAL_VEBOX_UPDATE_DN_STATE;
2155 }
2156 else // Incorrect index to kernel parameters array
2157 #endif
2158 {
2159 VPHAL_RENDER_ASSERTMESSAGE(
2160 "Incorrect index to kernel parameters array.");
2161 eStatus = MOS_STATUS_UNKNOWN;
2162 goto finish;
2163 }
2164
2165 // Store pointer to Kernel Parameter
2166 pRenderData->pKernelParam[iKDTIndex] =
2167 &pVeboxState->pKernelParamTable[iKDTIndex];
2168
2169 // Set Parameters for Kernel Entry
2170 pRenderData->KernelEntry[iKDTIndex].iKUID = iKUID;
2171 pRenderData->KernelEntry[iKDTIndex].iKCID = -1;
2172 pRenderData->KernelEntry[iKDTIndex].iFilterSize = 2;
2173 pRenderData->KernelEntry[iKDTIndex].pFilter = pFilter;
2174 pRenderData->KernelEntry[iKDTIndex].iSize = pCacheEntryTable[iKUID].iSize;
2175 pRenderData->KernelEntry[iKDTIndex].pBinary = pCacheEntryTable[iKUID].pBinary;
2176
2177 // set the Inline Data length
2178 pRenderData->iInlineLength = iInlineLength;
2179
2180 VPHAL_RENDER_NORMALMESSAGE(
2181 "Vebox Kernels: %s", g_KernelDNDI_Str_g9[iKDTIndex]);
2182
2183 finish:
2184 return eStatus;
2185 }
2186
2187 //!
2188 //! \brief Vebox format support check
2189 //! \details Checks to see if Vebox operation is supported with source surface format
2190 //! \param [in] pSrcSurface
2191 //! Pointer to input surface of Vebox
2192 //! \return bool
2193 //! return true if input surface format is supported, otherwise false
2194 //!
IsFormatSupported(PVPHAL_SURFACE pSrcSurface)2195 bool VPHAL_VEBOX_STATE_G9_BASE::IsFormatSupported(
2196 PVPHAL_SURFACE pSrcSurface)
2197 {
2198 bool bRet;
2199
2200 bRet = false;
2201
2202 // Check if Sample Format is supported
2203 // Vebox only support P016 format, P010 format can be supported by faking it as P016
2204 if (pSrcSurface->Format != Format_NV12 &&
2205 pSrcSurface->Format != Format_AYUV &&
2206 pSrcSurface->Format != Format_P010 &&
2207 pSrcSurface->Format != Format_P016 &&
2208 pSrcSurface->Format != Format_P210 &&
2209 pSrcSurface->Format != Format_P216 &&
2210 pSrcSurface->Format != Format_Y8 &&
2211 pSrcSurface->Format != Format_Y16U &&
2212 pSrcSurface->Format != Format_Y16S &&
2213 (!IS_PA_FORMAT(pSrcSurface->Format) ||
2214 pSrcSurface->Format == Format_Y410 || // Gen9 can't support Y410/Y416/Y210/Y216 Format
2215 pSrcSurface->Format == Format_Y416 ||
2216 pSrcSurface->Format == Format_Y210 ||
2217 pSrcSurface->Format == Format_Y216))
2218 {
2219 VPHAL_RENDER_NORMALMESSAGE("Unsupported Source Format '0x%08x' for VEBOX.", pSrcSurface->Format);
2220 goto finish;
2221 }
2222
2223 bRet = true;
2224
2225 finish:
2226 return bRet;
2227 }
2228
2229 //!
2230 //! \brief Vebox format support check
2231 //! \details Checks to see if RT format is supported when Vebox output pipe is selected
2232 //! \param [in] pSrcSurface
2233 //! Pointer to Render source surface of VPP BLT
2234 //! \param [in] pRTSurface
2235 //! Pointer to Render target surface of VPP BLT
2236 //! \return bool
2237 //! return true if render target surface format is supported, otherwise false
2238 //!
IsRTFormatSupported(PVPHAL_SURFACE pSrcSurface,PVPHAL_SURFACE pRTSurface)2239 bool VPHAL_VEBOX_STATE_G9_BASE::IsRTFormatSupported(
2240 PVPHAL_SURFACE pSrcSurface,
2241 PVPHAL_SURFACE pRTSurface)
2242 {
2243 bool bRet;
2244
2245 bRet = false;
2246
2247 // Check if RT Format is supported by Vebox
2248 if (IS_PA_FORMAT(pRTSurface->Format) ||
2249 pRTSurface->Format == Format_NV12 ||
2250 pRTSurface->Format == Format_AYUV ||
2251 pRTSurface->Format == Format_P010 ||
2252 pRTSurface->Format == Format_P016 ||
2253 pRTSurface->Format == Format_P210 ||
2254 pRTSurface->Format == Format_P216 ||
2255 pRTSurface->Format == Format_Y8 ||
2256 pRTSurface->Format == Format_Y16U ||
2257 pRTSurface->Format == Format_Y16S)
2258 {
2259 // Supported Vebox Render Target format. Vebox Pipe Output can be selected.
2260 bRet = true;
2261 }
2262
2263 if ((pSrcSurface->ColorSpace == CSpace_BT2020) &&
2264 ((pSrcSurface->Format == Format_P010) ||
2265 (pSrcSurface->Format == Format_P016)) &&
2266 IS_RGB32_FORMAT(pRTSurface->Format))
2267 {
2268 bRet = true;
2269 }
2270
2271 return bRet;
2272 }
2273
2274 //!
2275 //! \brief Vebox format support check for DN
2276 //! \details Check if the input surface format is supported for DN
2277 //! \param [in] pSrcSurface
2278 //! Pointer to input surface of Vebox
2279 //! \return bool
2280 //! return true if input surface format is supported, otherwise false
2281 //!
IsDnFormatSupported(PVPHAL_SURFACE pSrcSurface)2282 bool VPHAL_VEBOX_STATE_G9_BASE::IsDnFormatSupported(
2283 PVPHAL_SURFACE pSrcSurface)
2284 {
2285 bool bRet;
2286
2287 bRet = false;
2288 VPHAL_RENDER_CHK_NULL_NO_STATUS(pSrcSurface);
2289
2290 if ((pSrcSurface->Format != Format_YUYV) &&
2291 (pSrcSurface->Format != Format_VYUY) &&
2292 (pSrcSurface->Format != Format_YVYU) &&
2293 (pSrcSurface->Format != Format_UYVY) &&
2294 (pSrcSurface->Format != Format_YUY2) &&
2295 (pSrcSurface->Format != Format_Y8) &&
2296 (pSrcSurface->Format != Format_NV12) &&
2297 (pSrcSurface->Format != Format_A8B8G8R8) &&
2298 (pSrcSurface->Format != Format_A16B16G16R16))
2299 {
2300 VPHAL_RENDER_NORMALMESSAGE("Unsupported Format '0x%08x' for VEBOX DN.", pSrcSurface->Format);
2301 goto finish;
2302 }
2303
2304 bRet = true;
2305
2306 finish:
2307 return bRet;
2308 }
2309
2310 //!
2311 //! \brief Check if surface format is supported by DI
2312 //! \details Check if surface format is supported by DI
2313 //! \param [in] pSrc
2314 //! Pointer to input surface of Vebox
2315 //! \return bool
2316 //! Return true if surface format is supported, otherwise return false
2317 //!
IsDiFormatSupported(PVPHAL_SURFACE pSrc)2318 bool VPHAL_VEBOX_STATE_G9_BASE::IsDiFormatSupported(
2319 PVPHAL_SURFACE pSrc)
2320 {
2321 bool bRet = false;
2322
2323 VPHAL_RENDER_CHK_NULL_NO_STATUS(pSrc);
2324
2325 if (pSrc->Format != Format_AYUV &&
2326 pSrc->Format != Format_Y410 &&
2327 pSrc->Format != Format_Y416 &&
2328 pSrc->Format != Format_P010 &&
2329 pSrc->Format != Format_P016 &&
2330 pSrc->Format != Format_A8B8G8R8 &&
2331 pSrc->Format != Format_A8R8G8B8 &&
2332 pSrc->Format != Format_B10G10R10A2 &&
2333 pSrc->Format != Format_R10G10B10A2 &&
2334 pSrc->Format != Format_A16B16G16R16 &&
2335 pSrc->Format != Format_A16R16G16B16)
2336 {
2337 bRet = true;
2338 }
2339 else
2340 {
2341 bRet = false;
2342 }
2343
2344 finish:
2345 return bRet;
2346 }
2347
CreateSfcState()2348 VphalSfcState* VPHAL_VEBOX_STATE_G9_BASE::CreateSfcState()
2349 {
2350 #if __VPHAL_SFC_SUPPORTED
2351 VphalSfcState *sfcState = MOS_New(VphalSfcStateG9, m_pOsInterface, m_pRenderHal, m_pSfcInterface);
2352 #else
2353 VphalSfcState *sfcState = nullptr;
2354 #endif
2355
2356 return sfcState;
2357 }
2358
VPHAL_VEBOX_STATE_G9_BASE(PMOS_INTERFACE pOsInterface,PMHW_VEBOX_INTERFACE pVeboxInterface,PMHW_SFC_INTERFACE pSfcInterface,PRENDERHAL_INTERFACE pRenderHal,PVPHAL_VEBOX_EXEC_STATE pVeboxExecState,PVPHAL_RNDR_PERF_DATA pPerfData,const VPHAL_DNDI_CACHE_CNTL & dndiCacheCntl,MOS_STATUS * peStatus)2359 VPHAL_VEBOX_STATE_G9_BASE::VPHAL_VEBOX_STATE_G9_BASE(
2360 PMOS_INTERFACE pOsInterface,
2361 PMHW_VEBOX_INTERFACE pVeboxInterface,
2362 PMHW_SFC_INTERFACE pSfcInterface,
2363 PRENDERHAL_INTERFACE pRenderHal,
2364 PVPHAL_VEBOX_EXEC_STATE pVeboxExecState,
2365 PVPHAL_RNDR_PERF_DATA pPerfData,
2366 const VPHAL_DNDI_CACHE_CNTL &dndiCacheCntl,
2367 MOS_STATUS *peStatus) :
2368 VPHAL_VEBOX_STATE(pOsInterface, pVeboxInterface, pSfcInterface, pRenderHal, pVeboxExecState, pPerfData, dndiCacheCntl, peStatus)
2369 {
2370 // States
2371 pKernelParamTable = (PRENDERHAL_KERNEL_PARAM)g_Vebox_KernelParam_g9;
2372 iNumFFDISurfaces = 2; // PE on: 4 used. PE off: 2 used
2373
2374 #if defined(ENABLE_KERNELS) && !defined(_FULL_OPEN_SOURCE)
2375 m_hvsKernelBinary = (uint8_t *)IGVP_HVS_DENOISE_G900;
2376 m_hvsKernelBinarySize = IGVP_HVS_DENOISE_G900_SIZE;
2377 #endif
2378 }
2379
2380