1 /*
2 * Copyright (c) 2011-2021, Intel Corporation
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice shall be included
12 * in all copies or substantial portions of the Software.
13 *
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
15 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20 * OTHER DEALINGS IN THE SOFTWARE.
21 */
22 //!
23 //! \file codechal_fei_avc_g8.cpp
24 //! \brief This file implements the C++ class/interface for Gen8 platform's AVC
25 //! FEI encoding to be used across CODECHAL components.
26 //!
27
28 #include "codechal_fei_avc_g8.h"
29 #include "codeckrnheader.h"
30 #include "igcodeckrn_g8.h"
31 #include "hal_oca_interface.h"
32
33 #ifdef FEI_ENABLE_CMRT
34 static const char * strDsIsaName = "/opt/intel/mediasdk/lib64/hme_downscale_gen8.isa";
35 static const char * strMbEncIsaName = "/opt/intel/mediasdk/lib64/AVCEncKernel_BDW_genx.isa";
36 static const char * strPreProcIsaName = "/opt/intel/mediasdk/lib64/FEI_gen8.isa";
37 static const char * strMeIsaName = "/opt/intel/mediasdk/lib64/hme_gen8.isa";
38 #endif
39
40 #define CODECHAL_ENCODE_AVC_MAX_NUM_REF_L0 4
41 #define CODECHAL_ENCODE_AVC_MAX_NUM_REF_L1 2
42
43 //this enum should be moved into base
44 typedef enum _BINDING_TABLE_OFFSET_2xSCALING_CM
45 {
46 SCALING_2x_FRAME_SRC_Y_CM = 0,
47 SCALING_2x_FRAME_DST_Y_CM = 1,
48 SCALING_2x_FIELD_TOP_SRC_Y_CM = 0,
49 SCALING_2x_FIELD_TOP_DST_Y_CM = 1,
50 SCALING_2x_FIELD_BOT_SRC_Y_CM = 2,
51 SCALINGL_2x_FIELD_BOT_DST_Y_CM = 3,
52 SCALING_2x_NUM_SURFACES_CM = 4
53 }BINDING_TABLE_OFFSET_2xSCALING_CM;
54
55 typedef struct _KERNEL_HEADER_FEI_CM {
56 int nKernelCount;
57
58 // MbEnc FEI for Frame/Field
59 CODECHAL_KERNEL_HEADER AVCMBEnc_Fei_I;
60 CODECHAL_KERNEL_HEADER AVCMBEnc_Fei_P;
61 CODECHAL_KERNEL_HEADER AVCMBEnc_Fei_B;
62 // PreProc
63 CODECHAL_KERNEL_HEADER AVC_Fei_ProProc;
64 // HME
65 CODECHAL_KERNEL_HEADER AVC_ME_P;
66 CODECHAL_KERNEL_HEADER AVC_ME_B;
67 // DownScaling
68 CODECHAL_KERNEL_HEADER PLY_DScale_PLY;
69 CODECHAL_KERNEL_HEADER PLY_DScale_2f_PLY_2f;
70 // 2x DownScaling
71 CODECHAL_KERNEL_HEADER PLY_2xDScale_PLY;
72 CODECHAL_KERNEL_HEADER PLY_2xDScale_2f_PLY_2f;
73 //Weighted Prediction Kernel
74 CODECHAL_KERNEL_HEADER AVC_WeightedPrediction;
75 } KERNEL_HEADER_FEI_CM, *PKERNEL_HEADER_FEI_CM;
76
77 static const CODECHAL_ENCODE_AVC_IPCM_THRESHOLD g_cInit_CODECHAL_ENCODE_AVC_IPCM_Threshold_Table_G8[5] =
78 {
79 { 2, 3000 },
80 { 4, 3600 },
81 { 6, 5000 },
82 { 10, 8000 },
83 { 18, 9000 },
84 };
85
86 typedef enum _MBENC_BINDING_TABLE_OFFSET_CM_FEI
87 {
88 MBENC_MFC_AVC_PAK_OBJ_CM_FEI = 0,
89 MBENC_IND_MV_DATA_CM_FEI = 1,
90 MBENC_BRC_DISTORTION_CM_FEI = 2, // For BRC distortion for I
91 MBENC_CURR_Y_CM_FEI = 3,
92 MBENC_CURR_UV_CM_FEI = 4,
93 MBENC_MB_SPECIFIC_DATA_CM_FEI = 5,
94 MBENC_AUX_VME_OUT_CM_FEI = 6,
95 MBENC_REFPICSELECT_L0_CM_FEI = 7,
96 MBENC_MV_DATA_FROM_ME_CM_FEI = 8,
97 MBENC_4xME_DISTORTION_CM_FEI = 9,
98 MBENC_REFPICSELECT_L1_CM_FEI = 10,
99 MBENC_FWD_MB_DATA_CM_FEI = 11,
100 MBENC_FWD_MV_DATA_CM_FEI = 12,
101 MBENC_MBQP_CM_FEI = 13,
102 MBENC_MBBRC_CONST_DATA_CM_FEI = 14,
103 MBENC_VME_INTER_PRED_CURR_PIC_IDX_0_CM_FEI = 15,
104 MBENC_RESERVED0_CM_FEI = 21,
105 MBENC_RESERVED1_CM_FEI = 23,
106 MBENC_RESERVED2_CM_FEI = 25,
107 MBENC_RESERVED3_CM_FEI = 27,
108 MBENC_RESERVED4_CM_FEI = 29,
109 MBENC_RESERVED5_CM_FEI = 31,
110 MBENC_VME_INTER_PRED_CURR_PIC_IDX_1_CM_FEI = 32,
111 MBENC_VME_INTER_PRED_BWD_PIC_IDX0_1_CM_FEI = 33,
112 MBENC_RESERVED6_CM_FEI = 34,
113 MBENC_VME_INTER_PRED_BWD_PIC_IDX1_1_CM_FEI = 35,
114 MBENC_RESERVED7_CM_FEI = 36,
115 MBENC_FLATNESS_CHECK_CM_FEI = 37,
116 MBENC_MAD_DATA_CM_FEI = 38,
117 MBENC_INTER_DISTORTION_CM_FEI = 39,
118 MBENC_BEST_INTER_INTRA_CM_FEI = 40,
119 MBENC_BRC_CURBE_DATA_CM_FEI = 41,
120 MBENC_MV_PREDICTOR_CM_FEI = 42,
121 MBENC_NUM_SURFACES_CM_FEI = 43
122 } MBENC_BINDING_TABLE_OFFSET_CM_FEI;
123
124 //should be moved into fei base use base!
125 typedef struct _MEDIA_OBJECT_2xSCALING_STATIC_DATA_CM_FEI_G8
126 {
127 // uint32_t 0 - GRF R1.0
128 union
129 {
130 struct
131 {
132 uint32_t InputPictureWidth : MOS_BITFIELD_RANGE( 0,15 );
133 uint32_t InputPictureHeight : MOS_BITFIELD_RANGE( 16,31 );
134 };
135
136 uint32_t Value;
137 } DW0;
138
139 // DW1
140 union
141 {
142 struct
143 {
144 uint32_t Reserved : MOS_BITFIELD_RANGE( 1,31 );
145 };
146 struct
147 {
148 uint32_t Value;
149 };
150 } DW1;
151
152 // DW2
153 union
154 {
155 struct
156 {
157 uint32_t Reserved : MOS_BITFIELD_RANGE( 1,31 );
158 };
159 struct
160 {
161 uint32_t Value;
162 };
163 } DW2;
164
165 // DW3
166 union
167 {
168 struct
169 {
170 uint32_t Reserved : MOS_BITFIELD_RANGE( 1,31 );
171 };
172 struct
173 {
174 uint32_t Value;
175 };
176 } DW3;
177
178 // DW4
179 union
180 {
181 struct
182 {
183 uint32_t Reserved : MOS_BITFIELD_RANGE( 1,31 );
184 };
185 struct
186 {
187 uint32_t Value;
188 };
189 } DW4;
190
191 // DW5
192 union
193 {
194 struct
195 {
196 uint32_t Reserved : MOS_BITFIELD_RANGE( 1,31 );
197 };
198 struct
199 {
200 uint32_t Value;
201 };
202 } DW5;
203
204 // DW6
205 union
206 {
207 struct
208 {
209 uint32_t Reserved : MOS_BITFIELD_RANGE( 1,31 );
210 };
211 struct
212 {
213 uint32_t Value;
214 };
215 } DW6;
216
217 // DW7
218 union
219 {
220 struct
221 {
222 uint32_t Reserved : MOS_BITFIELD_RANGE( 1,31 );
223 };
224 struct
225 {
226 uint32_t Value;
227 };
228 } DW7;
229
230 // DW8
231 union
232 {
233 struct
234 {
235 uint32_t InputYBTIFrame : MOS_BITFIELD_RANGE( 0,31 );
236 };
237 struct
238 {
239 uint32_t InputYBTITopField : MOS_BITFIELD_RANGE( 0,31 );
240 };
241 struct
242 {
243 uint32_t Value;
244 };
245 } DW8;
246
247 // DW9
248 union
249 {
250 struct
251 {
252 uint32_t OutputYBTIFrame : MOS_BITFIELD_RANGE( 0,31 );
253 };
254 struct
255 {
256 uint32_t OutputYBTITopField : MOS_BITFIELD_RANGE( 0,31 );
257 };
258 struct
259 {
260 uint32_t Value;
261 };
262 } DW9;
263
264 // DW10
265 union
266 {
267 struct
268 {
269 uint32_t InputYBTIBottomField : MOS_BITFIELD_RANGE( 0,31 );
270 };
271 struct
272 {
273 uint32_t Value;
274 };
275 } DW10;
276
277 // DW11
278 union
279 {
280 struct
281 {
282 uint32_t OutputYBTIBottomField : MOS_BITFIELD_RANGE( 0,31 );
283 };
284 struct
285 {
286 uint32_t Value;
287 };
288 } DW11;
289 } MEDIA_OBJECT_2xSCALING_STATIC_DATA_CM_FEI_G8, *PMEDIA_OBJECT_2xSCALING_STATIC_DATA_CM_FEI_G8;
290
291 C_ASSERT(MOS_BYTES_TO_DWORDS(sizeof(MEDIA_OBJECT_2xSCALING_STATIC_DATA_CM_FEI_G8)) == 12);
292 //different with g9, but seem as legacy
293 typedef struct _ME_CURBE_CM_FEI
294 {
295 // DW0
296 union
297 {
298 struct
299 {
300 uint32_t SkipModeEn : MOS_BITFIELD_BIT( 0 );
301 uint32_t AdaptiveEn : MOS_BITFIELD_BIT( 1 );
302 uint32_t BiMixDis : MOS_BITFIELD_BIT( 2 );
303 uint32_t : MOS_BITFIELD_RANGE( 3, 4 );
304 uint32_t EarlyImeSuccessEn : MOS_BITFIELD_BIT( 5 );
305 uint32_t : MOS_BITFIELD_BIT( 6 );
306 uint32_t T8x8FlagForInterEn : MOS_BITFIELD_BIT( 7 );
307 uint32_t : MOS_BITFIELD_RANGE( 8,23 );
308 uint32_t EarlyImeStop : MOS_BITFIELD_RANGE( 24,31 );
309 };
310 struct
311 {
312 uint32_t Value;
313 };
314 } DW0;
315
316 // DW1
317 union
318 {
319 struct
320 {
321 uint32_t MaxNumMVs : MOS_BITFIELD_RANGE( 0, 5 );
322 uint32_t : MOS_BITFIELD_RANGE( 6,15 );
323 uint32_t BiWeight : MOS_BITFIELD_RANGE( 16,21 );
324 uint32_t : MOS_BITFIELD_RANGE( 22,27 );
325 uint32_t UniMixDisable : MOS_BITFIELD_BIT( 28 );
326 uint32_t : MOS_BITFIELD_RANGE( 29,31 );
327 };
328 struct
329 {
330 uint32_t Value;
331 };
332 } DW1;
333
334 // DW2
335 union
336 {
337 struct
338 {
339 uint32_t LenSP : MOS_BITFIELD_RANGE( 0, 7 );
340 uint32_t MaxNumSU : MOS_BITFIELD_RANGE( 8,15 );
341 uint32_t : MOS_BITFIELD_RANGE( 16,31 );
342 };
343 struct
344 {
345 uint32_t Value;
346 };
347 } DW2;
348
349 // DW3
350 union
351 {
352 struct
353 {
354 uint32_t SrcSize : MOS_BITFIELD_RANGE( 0, 1 );
355 uint32_t : MOS_BITFIELD_RANGE( 2, 3 );
356 uint32_t MbTypeRemap : MOS_BITFIELD_RANGE( 4, 5 );
357 uint32_t SrcAccess : MOS_BITFIELD_BIT( 6 );
358 uint32_t RefAccess : MOS_BITFIELD_BIT( 7 );
359 uint32_t SearchCtrl : MOS_BITFIELD_RANGE( 8,10 );
360 uint32_t DualSearchPathOption : MOS_BITFIELD_BIT( 11 );
361 uint32_t SubPelMode : MOS_BITFIELD_RANGE( 12,13 );
362 uint32_t SkipType : MOS_BITFIELD_BIT( 14 );
363 uint32_t DisableFieldCacheAlloc : MOS_BITFIELD_BIT( 15 );
364 uint32_t InterChromaMode : MOS_BITFIELD_BIT( 16 );
365 uint32_t FTEnable : MOS_BITFIELD_BIT( 17 );
366 uint32_t BMEDisableFBR : MOS_BITFIELD_BIT( 18 );
367 uint32_t BlockBasedSkipEnable : MOS_BITFIELD_BIT( 19 );
368 uint32_t InterSAD : MOS_BITFIELD_RANGE( 20,21 );
369 uint32_t IntraSAD : MOS_BITFIELD_RANGE( 22,23 );
370 uint32_t SubMbPartMask : MOS_BITFIELD_RANGE( 24,30 );
371 uint32_t : MOS_BITFIELD_BIT( 31 );
372 };
373 struct
374 {
375 uint32_t Value;
376 };
377 } DW3;
378
379 // DW4
380 union
381 {
382 struct
383 {
384 uint32_t : MOS_BITFIELD_RANGE( 0, 7 );
385 uint32_t PictureHeightMinus1 : MOS_BITFIELD_RANGE( 8,15 );
386 uint32_t PictureWidth : MOS_BITFIELD_RANGE( 16,23 );
387 uint32_t : MOS_BITFIELD_RANGE( 24,31 );
388 };
389 struct
390 {
391 uint32_t Value;
392 };
393 } DW4;
394
395 // DW5
396 union
397 {
398 struct
399 {
400 uint32_t : MOS_BITFIELD_RANGE( 0, 7 );
401 uint32_t QpPrimeY : MOS_BITFIELD_RANGE( 8,15 );
402 uint32_t RefWidth : MOS_BITFIELD_RANGE( 16,23 );
403 uint32_t RefHeight : MOS_BITFIELD_RANGE( 24,31 );
404
405 };
406 struct
407 {
408 uint32_t Value;
409 };
410 } DW5;
411
412 // DW6
413 union
414 {
415 struct
416 {
417 uint32_t : MOS_BITFIELD_RANGE( 0, 2 );
418 uint32_t WriteDistortions : MOS_BITFIELD_BIT( 3 );
419 uint32_t UseMvFromPrevStep : MOS_BITFIELD_BIT( 4 );
420 uint32_t : MOS_BITFIELD_RANGE( 5, 7 );
421 uint32_t SuperCombineDist : MOS_BITFIELD_RANGE( 8,15 );
422 uint32_t MaxVmvR : MOS_BITFIELD_RANGE( 16,31 );
423 };
424 struct
425 {
426 uint32_t Value;
427 };
428 } DW6;
429
430 // DW7
431 union
432 {
433 struct
434 {
435 uint32_t : MOS_BITFIELD_RANGE( 0,15 );
436 uint32_t MVCostScaleFactor : MOS_BITFIELD_RANGE( 16,17 );
437 uint32_t BilinearEnable : MOS_BITFIELD_BIT( 18 );
438 uint32_t SrcFieldPolarity : MOS_BITFIELD_BIT( 19 );
439 uint32_t WeightedSADHAAR : MOS_BITFIELD_BIT( 20 );
440 uint32_t AConlyHAAR : MOS_BITFIELD_BIT( 21 );
441 uint32_t RefIDCostMode : MOS_BITFIELD_BIT( 22 );
442 uint32_t : MOS_BITFIELD_BIT( 23 );
443 uint32_t SkipCenterMask : MOS_BITFIELD_RANGE( 24,31 );
444 };
445 struct
446 {
447 uint32_t Value;
448 };
449 } DW7;
450
451 // DW8
452 union
453 {
454 struct
455 {
456 uint32_t Mode0Cost : MOS_BITFIELD_RANGE( 0, 7 );
457 uint32_t Mode1Cost : MOS_BITFIELD_RANGE( 8,15 );
458 uint32_t Mode2Cost : MOS_BITFIELD_RANGE( 16,23 );
459 uint32_t Mode3Cost : MOS_BITFIELD_RANGE( 24,31 );
460 };
461 struct
462 {
463 uint32_t Value;
464 };
465 } DW8;
466
467 // DW9
468 union
469 {
470 struct
471 {
472 uint32_t Mode4Cost : MOS_BITFIELD_RANGE( 0, 7 );
473 uint32_t Mode5Cost : MOS_BITFIELD_RANGE( 8,15 );
474 uint32_t Mode6Cost : MOS_BITFIELD_RANGE( 16,23 );
475 uint32_t Mode7Cost : MOS_BITFIELD_RANGE( 24,31 );
476 };
477 struct
478 {
479 uint32_t Value;
480 };
481 } DW9;
482
483 // DW10
484 union
485 {
486 struct
487 {
488 uint32_t Mode8Cost : MOS_BITFIELD_RANGE( 0, 7 );
489 uint32_t Mode9Cost : MOS_BITFIELD_RANGE( 8,15 );
490 uint32_t RefIDCost : MOS_BITFIELD_RANGE( 16,23 );
491 uint32_t ChromaIntraModeCost : MOS_BITFIELD_RANGE( 24,31 );
492 };
493 struct
494 {
495 uint32_t Value;
496 };
497 } DW10;
498
499 // DW11
500 union
501 {
502 struct
503 {
504 uint32_t MV0Cost : MOS_BITFIELD_RANGE( 0, 7 );
505 uint32_t MV1Cost : MOS_BITFIELD_RANGE( 8,15 );
506 uint32_t MV2Cost : MOS_BITFIELD_RANGE( 16,23 );
507 uint32_t MV3Cost : MOS_BITFIELD_RANGE( 24,31 );
508 };
509 struct
510 {
511 uint32_t Value;
512 };
513 } DW11;
514
515 // DW12
516 union
517 {
518 struct
519 {
520 uint32_t MV4Cost : MOS_BITFIELD_RANGE( 0, 7 );
521 uint32_t MV5Cost : MOS_BITFIELD_RANGE( 8,15 );
522 uint32_t MV6Cost : MOS_BITFIELD_RANGE( 16,23 );
523 uint32_t MV7Cost : MOS_BITFIELD_RANGE( 24,31 );
524 };
525 struct
526 {
527 uint32_t Value;
528 };
529 } DW12;
530
531 // DW13
532 union
533 {
534 struct
535 {
536 uint32_t NumRefIdxL0MinusOne : MOS_BITFIELD_RANGE( 0, 7 );
537 uint32_t NumRefIdxL1MinusOne : MOS_BITFIELD_RANGE( 8,15 );
538 uint32_t ActualMBWidth : MOS_BITFIELD_RANGE( 16,23 );
539 uint32_t ActualMBHeight : MOS_BITFIELD_RANGE( 24,31 );
540 };
541 struct
542 {
543 uint32_t Value;
544 };
545 } DW13;
546
547 // DW14
548 union
549 {
550 struct
551 {
552 uint32_t List0RefID0FieldParity : MOS_BITFIELD_BIT( 0 );
553 uint32_t List0RefID1FieldParity : MOS_BITFIELD_BIT( 1 );
554 uint32_t List0RefID2FieldParity : MOS_BITFIELD_BIT( 2 );
555 uint32_t List0RefID3FieldParity : MOS_BITFIELD_BIT( 3 );
556 uint32_t List0RefID4FieldParity : MOS_BITFIELD_BIT( 4 );
557 uint32_t List0RefID5FieldParity : MOS_BITFIELD_BIT( 5 );
558 uint32_t List0RefID6FieldParity : MOS_BITFIELD_BIT( 6 );
559 uint32_t List0RefID7FieldParity : MOS_BITFIELD_BIT( 7 );
560 uint32_t List1RefID0FieldParity : MOS_BITFIELD_BIT( 8 );
561 uint32_t List1RefID1FieldParity : MOS_BITFIELD_BIT( 9 );
562 uint32_t : MOS_BITFIELD_RANGE( 10,31 );
563 };
564 struct
565 {
566 uint32_t Value;
567 };
568 } DW14;
569
570 // DW15
571 union
572 {
573 struct
574 {
575 uint32_t PrevMvReadPosFactor : MOS_BITFIELD_RANGE( 0, 7 );
576 uint32_t MvShiftFactor : MOS_BITFIELD_RANGE( 8, 15 );
577 uint32_t Reserved : MOS_BITFIELD_RANGE( 16,31 );
578 };
579 struct
580 {
581 uint32_t Value;
582 };
583 } DW15;
584
585 struct
586 {
587 // DW16
588 union
589 {
590 struct
591 {
592 SearchPathDelta SPDelta_0;
593 SearchPathDelta SPDelta_1;
594 SearchPathDelta SPDelta_2;
595 SearchPathDelta SPDelta_3;
596 };
597 struct
598 {
599 uint32_t Value;
600 };
601 } DW16;
602
603 // DW17
604 union
605 {
606 struct
607 {
608 SearchPathDelta SPDelta_4;
609 SearchPathDelta SPDelta_5;
610 SearchPathDelta SPDelta_6;
611 SearchPathDelta SPDelta_7;
612 };
613 struct
614 {
615 uint32_t Value;
616 };
617 } DW17;
618
619 // DW18
620 union
621 {
622 struct
623 {
624 SearchPathDelta SPDelta_8;
625 SearchPathDelta SPDelta_9;
626 SearchPathDelta SPDelta_10;
627 SearchPathDelta SPDelta_11;
628 };
629 struct
630 {
631 uint32_t Value;
632 };
633 } DW18;
634
635 // DW19
636 union
637 {
638 struct
639 {
640 SearchPathDelta SPDelta_12;
641 SearchPathDelta SPDelta_13;
642 SearchPathDelta SPDelta_14;
643 SearchPathDelta SPDelta_15;
644 };
645 struct
646 {
647 uint32_t Value;
648 };
649 } DW19;
650
651 // DW20
652 union
653 {
654 struct
655 {
656 SearchPathDelta SPDelta_16;
657 SearchPathDelta SPDelta_17;
658 SearchPathDelta SPDelta_18;
659 SearchPathDelta SPDelta_19;
660 };
661 struct
662 {
663 uint32_t Value;
664 };
665 } DW20;
666
667 // DW21
668 union
669 {
670 struct
671 {
672 SearchPathDelta SPDelta_20;
673 SearchPathDelta SPDelta_21;
674 SearchPathDelta SPDelta_22;
675 SearchPathDelta SPDelta_23;
676 };
677 struct
678 {
679 uint32_t Value;
680 };
681 } DW21;
682
683 // DW22
684 union
685 {
686 struct
687 {
688 SearchPathDelta SPDelta_24;
689 SearchPathDelta SPDelta_25;
690 SearchPathDelta SPDelta_26;
691 SearchPathDelta SPDelta_27;
692 };
693 struct
694 {
695 uint32_t Value;
696 };
697 } DW22;
698
699 // DW23
700 union
701 {
702 struct
703 {
704 SearchPathDelta SPDelta_28;
705 SearchPathDelta SPDelta_29;
706 SearchPathDelta SPDelta_30;
707 SearchPathDelta SPDelta_31;
708 };
709 struct
710 {
711 uint32_t Value;
712 };
713 } DW23;
714
715 // DW24
716 union
717 {
718 struct
719 {
720 SearchPathDelta SPDelta_32;
721 SearchPathDelta SPDelta_33;
722 SearchPathDelta SPDelta_34;
723 SearchPathDelta SPDelta_35;
724 };
725 struct
726 {
727 uint32_t Value;
728 };
729 } DW24;
730
731 // DW25
732 union
733 {
734 struct
735 {
736 SearchPathDelta SPDelta_36;
737 SearchPathDelta SPDelta_37;
738 SearchPathDelta SPDelta_38;
739 SearchPathDelta SPDelta_39;
740 };
741 struct
742 {
743 uint32_t Value;
744 };
745 } DW25;
746
747 // DW26
748 union
749 {
750 struct
751 {
752 SearchPathDelta SPDelta_40;
753 SearchPathDelta SPDelta_41;
754 SearchPathDelta SPDelta_42;
755 SearchPathDelta SPDelta_43;
756 };
757 struct
758 {
759 uint32_t Value;
760 };
761 } DW26;
762
763 // DW27
764 union
765 {
766 struct
767 {
768 SearchPathDelta SPDelta_44;
769 SearchPathDelta SPDelta_45;
770 SearchPathDelta SPDelta_46;
771 SearchPathDelta SPDelta_47;
772 };
773 struct
774 {
775 uint32_t Value;
776 };
777 } DW27;
778
779 // DW28
780 union
781 {
782 struct
783 {
784 SearchPathDelta SPDelta_48;
785 SearchPathDelta SPDelta_49;
786 SearchPathDelta SPDelta_50;
787 SearchPathDelta SPDelta_51;
788 };
789 struct
790 {
791 uint32_t Value;
792 };
793 } DW28;
794
795 // DW29
796 union
797 {
798 struct
799 {
800 SearchPathDelta SPDelta_52;
801 SearchPathDelta SPDelta_53;
802 SearchPathDelta SPDelta_54;
803 SearchPathDelta SPDelta_55;
804 };
805 struct
806 {
807 uint32_t Value;
808 };
809 } DW29;
810 } SPDelta;
811
812 // DW30
813 union
814 {
815 struct
816 {
817 uint32_t Reserved : MOS_BITFIELD_RANGE( 0,31 );
818 };
819 struct
820 {
821 uint32_t Value;
822 };
823 } DW30;
824
825 // DW31
826 union
827 {
828 struct
829 {
830 uint32_t Reserved : MOS_BITFIELD_RANGE( 0,31 );
831 };
832 struct
833 {
834 uint32_t Value;
835 };
836 } DW31;
837
838 // DW32
839 union
840 {
841 struct
842 {
843 uint32_t _4xMeMvOutputDataSurfIndex : MOS_BITFIELD_RANGE( 0,31 );
844 };
845 struct
846 {
847 uint32_t Value;
848 };
849 } DW32;
850
851 // DW33
852 union
853 {
854 struct
855 {
856 uint32_t _16xOr32xMeMvInputDataSurfIndex : MOS_BITFIELD_RANGE( 0,31 );
857 };
858 struct
859 {
860 uint32_t Value;
861 };
862 } DW33;
863
864 // DW34
865 union
866 {
867 struct
868 {
869 uint32_t _4xMeOutputDistSurfIndex : MOS_BITFIELD_RANGE( 0,31 );
870 };
871 struct
872 {
873 uint32_t Value;
874 };
875 } DW34;
876
877 // DW35
878 union
879 {
880 struct
881 {
882 uint32_t _4xMeOutputBrcDistSurfIndex : MOS_BITFIELD_RANGE( 0,31 );
883 };
884 struct
885 {
886 uint32_t Value;
887 };
888 } DW35;
889
890 // DW36
891 union
892 {
893 struct
894 {
895 uint32_t VMEFwdInterPredictionSurfIndex : MOS_BITFIELD_RANGE( 0,31 );
896 };
897 struct
898 {
899 uint32_t Value;
900 };
901 } DW36;
902
903 // DW37
904 union
905 {
906 struct
907 {
908 uint32_t VMEBwdInterPredictionSurfIndex : MOS_BITFIELD_RANGE( 0,31 );
909 };
910 struct
911 {
912 uint32_t Value;
913 };
914 } DW37;
915
916 // DW38
917 union
918 {
919 struct
920 {
921 uint32_t Reserved : MOS_BITFIELD_RANGE( 0,31 );
922 };
923 struct
924 {
925 uint32_t Value;
926 };
927 } DW38;
928
929 } ME_CURBE_CM_FEI, *PME_CURBE_CM_FEI;
930 C_ASSERT(MOS_BYTES_TO_DWORDS(sizeof(ME_CURBE_CM_FEI)) == 39);
931 //seem as legacy
932 const uint32_t CodechalEncodeAvcEncFeiG8::m_modeMvCost_Cm_PreProc[3][CODEC_AVC_NUM_QP][8] =
933 {
934 // I-Frame
935 {
936 { 0x1e03000a, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0xff000000, 0x00000000, 0x00000000 },
937 { 0x1e03000a, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0xff010101, 0x00000000, 0x00000000 },
938 { 0x1e03000a, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0xff020202, 0x00000000, 0x00000000 },
939 { 0x1e03000a, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0xff030303, 0x00000000, 0x00000000 },
940 { 0x1e03000a, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0xff040404, 0x00000000, 0x00000000 },
941 { 0x1e03000a, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0xff050505, 0x00000000, 0x00000000 },
942 { 0x1e03000a, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0xff060606, 0x00000000, 0x00000000 },
943 { 0x1e03000a, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0xff070707, 0x01010001, 0x01010101 },
944 { 0x1e03000a, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0xff080808, 0x01010001, 0x01010101 },
945 { 0x1e03000a, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0xff090909, 0x03030003, 0x03030303 },
946 { 0x1e03000a, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0xff0a0a0a, 0x03030003, 0x03030303 },
947 { 0x1e03000a, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0xff0b0b0b, 0x06060006, 0x06060606 },
948 { 0x1e03000a, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0xff0c0c0c, 0x06060006, 0x06060606 },
949 { 0x1e03000a, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0xff0d0d0d, 0x08080008, 0x08080808 },
950 { 0x1e03000a, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0xff0e0e0e, 0x08080008, 0x08080808 },
951 { 0x1e03000a, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0xff0f0f0f, 0x0b0b000b, 0x0b0b0b0b },
952 { 0x2e06001a, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0xff101010, 0x0b0b000b, 0x0b0b0b0b },
953 { 0x2e06001a, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0xff111111, 0x0d0d000d, 0x0d0d0d0d },
954 { 0x2e06001a, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0xff121212, 0x0d0d000d, 0x0d0d0d0d },
955 { 0x2e06001a, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0xff131313, 0x10100010, 0x10101010 },
956 { 0x3b09001f, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0xff141414, 0x10100010, 0x10101010 },
957 { 0x3b09001f, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0xff151515, 0x13130013, 0x13131313 },
958 { 0x3b09001f, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0xff161616, 0x13130013, 0x13131313 },
959 { 0x3e0c002a, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0xff171717, 0x16160016, 0x16161616 },
960 { 0x3e0c002a, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0xff181818, 0x16160016, 0x16161616 },
961 { 0x3e0c002a, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0xff191919, 0x1a1a001a, 0x1a1a1a1a },
962 { 0x490f002d, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0xff1a1a1a, 0x1a1a001a, 0x1a1a1a1a },
963 { 0x4b19002f, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0xff1b1b1b, 0x1e1e001e, 0x1e1e1e1e },
964 { 0x4b19002f, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0xff1c1c1c, 0x1e1e001e, 0x1e1e1e1e },
965 { 0x4c1b0039, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0xff1d1d1d, 0x22220022, 0x22222222 },
966 { 0x4e1c003a, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0xff1e1e1e, 0x22220022, 0x22222222 },
967 { 0x581e003b, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0xff1f1f1f, 0x27270027, 0x27272727 },
968 { 0x591f003d, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0xff202020, 0x27270027, 0x27272727 },
969 { 0x5a28003e, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0xff212121, 0x2c2c002c, 0x2c2c2c2c },
970 { 0x5b2a0048, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0xff222222, 0x2c2c002c, 0x2c2c2c2c },
971 { 0x5c2b0049, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0xff232323, 0x32320032, 0x32323232 },
972 { 0x5e2c004a, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0xff242424, 0x32320032, 0x32323232 },
973 { 0x682e004b, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0xff252525, 0x38380038, 0x38383838 },
974 { 0x692f004d, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0xff262626, 0x38380038, 0x38383838 },
975 { 0x6a39004e, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0xff272727, 0x3e3e003e, 0x3e3e3e3e },
976 { 0x6b390058, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0xff282828, 0x3e3e003e, 0x3e3e3e3e },
977 { 0x6d3b0059, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0xff292929, 0x45450045, 0x45454545 },
978 { 0x6e3c005a, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0xff2a2a2a, 0x45450045, 0x45454545 },
979 { 0x783e005b, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0xff2b2b2b, 0x4d4d004d, 0x4d4d4d4d },
980 { 0x793f005d, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0xff2c2c2c, 0x4d4d004d, 0x4d4d4d4d },
981 { 0x7a48005e, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0xff2d2d2d, 0x55550055, 0x55555555 },
982 { 0x7b4a0068, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0xff2e2e2e, 0x55550055, 0x55555555 },
983 { 0x7c4b0069, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0xff2f2f2f, 0x5e5e005e, 0x5e5e5e5e },
984 { 0x7e4c006a, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0xff303030, 0x5e5e005e, 0x5e5e5e5e },
985 { 0x884e006b, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0xff313131, 0x68680068, 0x68686868 },
986 { 0x894f006d, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0xff323232, 0x68680068, 0x68686868 },
987 { 0x8a59006e, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0xff333333, 0x73730073, 0x73737373 }
988 },
989 // P-Frame
990 {
991 { 0x391e1a07, 0x06040208, 0x00040005, 0x09050401, 0x0f0e0c0a, 0xff000000, 0x00000000, 0x00000000 },
992 { 0x391e1a07, 0x06040208, 0x00040005, 0x09050401, 0x0f0e0c0a, 0xff010101, 0x00000000, 0x00000000 },
993 { 0x391e1a07, 0x06040208, 0x00040005, 0x09050401, 0x0f0e0c0a, 0xff020202, 0x00000000, 0x00000000 },
994 { 0x391e1a07, 0x06040208, 0x00040005, 0x09050401, 0x0f0e0c0a, 0xff030303, 0x00000000, 0x00000000 },
995 { 0x391e1a07, 0x06040208, 0x00040005, 0x09050401, 0x0f0e0c0a, 0xff040404, 0x00000000, 0x00000000 },
996 { 0x391e1a07, 0x06040208, 0x00040005, 0x09050401, 0x0f0e0c0a, 0xff050505, 0x00000000, 0x00000000 },
997 { 0x391e1a07, 0x06040208, 0x00040005, 0x09050401, 0x0f0e0c0a, 0xff060606, 0x00000000, 0x00000000 },
998 { 0x391e1a07, 0x06040208, 0x00040005, 0x09050401, 0x0f0e0c0a, 0xff070707, 0x01010001, 0x01010101 },
999 { 0x391e1a07, 0x06040208, 0x00040005, 0x09050401, 0x0f0e0c0a, 0xff080808, 0x01010001, 0x01010101 },
1000 { 0x391e1a07, 0x06040208, 0x00040005, 0x09050401, 0x0f0e0c0a, 0xff090909, 0x03030003, 0x03030303 },
1001 { 0x391e1a07, 0x06040208, 0x00040005, 0x09050401, 0x0f0e0c0a, 0xff0a0a0a, 0x03030003, 0x03030303 },
1002 { 0x391e1a07, 0x06040208, 0x00040005, 0x09050401, 0x0f0e0c0a, 0xff0b0b0b, 0x06060006, 0x06060606 },
1003 { 0x391e1a07, 0x06040208, 0x00040005, 0x09050401, 0x0f0e0c0a, 0xff0c0c0c, 0x06060006, 0x06060606 },
1004 { 0x391e1a07, 0x06040208, 0x00040005, 0x09050401, 0x0f0e0c0a, 0xff0d0d0d, 0x08080008, 0x08080808 },
1005 { 0x391e1a07, 0x06040208, 0x00040005, 0x09050401, 0x0f0e0c0a, 0xff0e0e0e, 0x08080008, 0x08080808 },
1006 { 0x391e1a07, 0x06040208, 0x00040005, 0x09050401, 0x0f0e0c0a, 0xff0f0f0f, 0x0b0b000b, 0x0b0b0b0b },
1007 { 0x492e2a0e, 0x0d090519, 0x0008000b, 0x190a0802, 0x1f1e1c1a, 0xff101010, 0x0b0b000b, 0x0b0b0b0b },
1008 { 0x492e2a0e, 0x0d090519, 0x0008000b, 0x190a0802, 0x1f1e1c1a, 0xff111111, 0x0d0d000d, 0x0d0d0d0d },
1009 { 0x492e2a0e, 0x0d090519, 0x0008000b, 0x190a0802, 0x1f1e1c1a, 0xff121212, 0x0d0d000d, 0x0d0d0d0d },
1010 { 0x492e2a0e, 0x0d090519, 0x0008000b, 0x190a0802, 0x1f1e1c1a, 0xff131313, 0x10100010, 0x10101010 },
1011 { 0x4d3b2f1b, 0x1a0d071d, 0x000c0018, 0x1e0f0c03, 0x2b2b291f, 0xff141414, 0x10100010, 0x10101010 },
1012 { 0x4d3b2f1b, 0x1a0d071d, 0x000c0018, 0x1e0f0c03, 0x2b2b291f, 0xff151515, 0x13130013, 0x13131313 },
1013 { 0x4d3b2f1b, 0x1a0d071d, 0x000c0018, 0x1e0f0c03, 0x2b2b291f, 0xff161616, 0x13130013, 0x13131313 },
1014 { 0x593e3a1e, 0x1d190a29, 0x0018001b, 0x291a1804, 0x2f2e2c2a, 0xff171717, 0x16160016, 0x16161616 },
1015 { 0x593e3a1e, 0x1d190a29, 0x0018001b, 0x291a1804, 0x2f2e2c2a, 0xff181818, 0x16160016, 0x16161616 },
1016 { 0x593e3a1e, 0x1d190a29, 0x0018001b, 0x291a1804, 0x2f2e2c2a, 0xff191919, 0x1a1a001a, 0x1a1a1a1a },
1017 { 0x5b493d29, 0x281c0d2b, 0x001a001e, 0x2b1d1a05, 0x39392f2d, 0xff1a1a1a, 0x1a1a001a, 0x1a1a1a1a },
1018 { 0x5d4b3f2b, 0x2a1e0f2d, 0x001c0028, 0x2e1f1c06, 0x3b3b392f, 0xff1b1b1b, 0x1e1e001e, 0x1e1e1e1e },
1019 { 0x5d4b3f2b, 0x2a1e0f2d, 0x001c0028, 0x2e1f1c06, 0x3b3b392f, 0xff1c1c1c, 0x1e1e001e, 0x1e1e1e1e },
1020 { 0x5f4c492c, 0x2c28192f, 0x001e002a, 0x38291e07, 0x3d3c3b39, 0xff1d1d1d, 0x22220022, 0x22222222 },
1021 { 0x694e4a2e, 0x2d291b39, 0x0028002b, 0x392a2808, 0x3f3e3c3a, 0xff1e1e1e, 0x22220022, 0x22222222 },
1022 { 0x6a584b38, 0x2f2a1c3a, 0x0029002c, 0x3a2b2909, 0x48483e3b, 0xff1f1f1f, 0x27270027, 0x27272727 },
1023 { 0x6b594d39, 0x382c1d3b, 0x002a002e, 0x3b2d2a0a, 0x49493f3d, 0xff202020, 0x27270027, 0x27272727 },
1024 { 0x6c5a4e3a, 0x392d1f3c, 0x002b002f, 0x3c2e2b0b, 0x4a4a483e, 0xff212121, 0x2c2c002c, 0x2c2c2c2c },
1025 { 0x6e5b583b, 0x3b2f293e, 0x002d0039, 0x3f382d0d, 0x4c4b4a48, 0xff222222, 0x2c2c002c, 0x2c2c2c2c },
1026 { 0x6f5c593c, 0x3c38293f, 0x002e003a, 0x48392e0e, 0x4d4c4b49, 0xff232323, 0x32320032, 0x32323232 },
1027 { 0x795e5a3e, 0x3d392b49, 0x0038003b, 0x493a3818, 0x4f4e4c4a, 0xff242424, 0x32320032, 0x32323232 },
1028 { 0x7a685b48, 0x3f3a2c4a, 0x0039003c, 0x4a3b3919, 0x58584e4b, 0xff252525, 0x38380038, 0x38383838 },
1029 { 0x7b695d49, 0x483c2d4b, 0x003a003e, 0x4b3d3a1a, 0x59594f4d, 0xff262626, 0x38380038, 0x38383838 },
1030 { 0x7d6a5e4a, 0x4a3d2f4c, 0x003c0048, 0x4d3e3c1c, 0x5b5a594e, 0xff272727, 0x3e3e003e, 0x3e3e3e3e },
1031 { 0x7e6b684b, 0x4a3e384d, 0x003d0049, 0x4e483d1d, 0x5c5b5958, 0xff282828, 0x3e3e003e, 0x3e3e3e3e },
1032 { 0x886d694d, 0x4c483a4f, 0x003f004a, 0x58493f1f, 0x5e5d5b59, 0xff292929, 0x45450045, 0x45454545 },
1033 { 0x896e6a4e, 0x4d493b59, 0x0048004b, 0x594a4828, 0x5f5e5c5a, 0xff2a2a2a, 0x45450045, 0x45454545 },
1034 { 0x8a786b58, 0x4f4a3c5a, 0x0049004c, 0x5a4b4929, 0x68685e5b, 0xff2b2b2b, 0x4d4d004d, 0x4d4d4d4d },
1035 { 0x8b796d59, 0x584c3d5b, 0x004a004e, 0x5b4d4a2a, 0x69695f5d, 0xff2c2c2c, 0x4d4d004d, 0x4d4d4d4d },
1036 { 0x8c7a6e5a, 0x594d3f5c, 0x004b004f, 0x5d4e4b2b, 0x6b6a685e, 0xff2d2d2d, 0x55550055, 0x55555555 },
1037 { 0x8e7b785b, 0x5b4f485e, 0x004d0059, 0x5e584d2d, 0x6c6b6a68, 0xff2e2e2e, 0x55550055, 0x55555555 },
1038 { 0x8f7c795c, 0x5c58495f, 0x004e005a, 0x68594e2e, 0x6d6c6b69, 0xff2f2f2f, 0x5e5e005e, 0x5e5e5e5e },
1039 { 0x8f7e7a5e, 0x5d594b69, 0x0058005b, 0x695a5838, 0x6f6e6c6a, 0xff303030, 0x5e5e005e, 0x5e5e5e5e },
1040 { 0x8f887b68, 0x5f5a4c6a, 0x0059005c, 0x6a5b5939, 0x6f6f6e6b, 0xff313131, 0x68680068, 0x68686868 },
1041 { 0x8f897d69, 0x685c4d6b, 0x005a005e, 0x6b5d5a3a, 0x6f6f6f6d, 0xff323232, 0x68680068, 0x68686868 },
1042 { 0x8f8a7e6a, 0x695d4f6c, 0x005b0068, 0x6d5e5b3b, 0x6f6f6f6e, 0xff333333, 0x73730073, 0x73737373 }
1043 },
1044 // B-Frame
1045 {
1046 { 0x3a2a2907, 0x0a08060c, 0x00040206, 0x06020200, 0x180e0c0a, 0xff000000, 0x00000000, 0x00000000 },
1047 { 0x3a2a2907, 0x0a08060c, 0x00040206, 0x06020200, 0x180e0c0a, 0xff010101, 0x00000000, 0x00000000 },
1048 { 0x3a2a2907, 0x0a08060c, 0x00040206, 0x06020200, 0x180e0c0a, 0xff020202, 0x00000000, 0x00000000 },
1049 { 0x3a2a2907, 0x0a08060c, 0x00040206, 0x06020200, 0x180e0c0a, 0xff030303, 0x00000000, 0x00000000 },
1050 { 0x3a2a2907, 0x0a08060c, 0x00040206, 0x06020200, 0x180e0c0a, 0xff040404, 0x00000000, 0x00000000 },
1051 { 0x3a2a2907, 0x0a08060c, 0x00040206, 0x06020200, 0x180e0c0a, 0xff050505, 0x00000000, 0x00000000 },
1052 { 0x3a2a2907, 0x0a08060c, 0x00040206, 0x06020200, 0x180e0c0a, 0xff060606, 0x00000000, 0x00000000 },
1053 { 0x3a2a2907, 0x0a08060c, 0x00040206, 0x06020200, 0x180e0c0a, 0xff070707, 0x01010001, 0x01010101 },
1054 { 0x3a2a2907, 0x0a08060c, 0x00040206, 0x06020200, 0x180e0c0a, 0xff080808, 0x01010001, 0x01010101 },
1055 { 0x3a2a2907, 0x0a08060c, 0x00040206, 0x06020200, 0x180e0c0a, 0xff090909, 0x03030003, 0x03030303 },
1056 { 0x3a2a2907, 0x0a08060c, 0x00040206, 0x06020200, 0x180e0c0a, 0xff0a0a0a, 0x03030003, 0x03030303 },
1057 { 0x3a2a2907, 0x0a08060c, 0x00040206, 0x06020200, 0x180e0c0a, 0xff0b0b0b, 0x06060006, 0x06060606 },
1058 { 0x3a2a2907, 0x0a08060c, 0x00040206, 0x06020200, 0x180e0c0a, 0xff0c0c0c, 0x06060006, 0x06060606 },
1059 { 0x3a2a2907, 0x0a08060c, 0x00040206, 0x06020200, 0x180e0c0a, 0xff0d0d0d, 0x08080008, 0x08080808 },
1060 { 0x3a2a2907, 0x0a08060c, 0x00040206, 0x06020200, 0x180e0c0a, 0xff0e0e0e, 0x08080008, 0x08080808 },
1061 { 0x3a2a2907, 0x0a08060c, 0x00040206, 0x06020200, 0x180e0c0a, 0xff0f0f0f, 0x0b0b000b, 0x0b0b0b0b },
1062 { 0x4a3a390e, 0x1b190d1c, 0x0008040c, 0x0c040400, 0x281e1c1a, 0xff101010, 0x0b0b000b, 0x0b0b0b0b },
1063 { 0x4a3a390e, 0x1b190d1c, 0x0008040c, 0x0c040400, 0x281e1c1a, 0xff111111, 0x0d0d000d, 0x0d0d0d0d },
1064 { 0x4a3a390e, 0x1b190d1c, 0x0008040c, 0x0c040400, 0x281e1c1a, 0xff121212, 0x0d0d000d, 0x0d0d0d0d },
1065 { 0x4a3a390e, 0x1b190d1c, 0x0008040c, 0x0c040400, 0x281e1c1a, 0xff131313, 0x10100010, 0x10101010 },
1066 { 0x4f3f3d1b, 0x281d1a29, 0x000c0619, 0x19060600, 0x2c2b291f, 0xff141414, 0x10100010, 0x10101010 },
1067 { 0x4f3f3d1b, 0x281d1a29, 0x000c0619, 0x19060600, 0x2c2b291f, 0xff151515, 0x13130013, 0x13131313 },
1068 { 0x4f3f3d1b, 0x281d1a29, 0x000c0619, 0x19060600, 0x2c2b291f, 0xff161616, 0x13130013, 0x13131313 },
1069 { 0x5a4a491e, 0x2b291d2c, 0x0018081c, 0x1c080800, 0x382e2c2a, 0xff171717, 0x16160016, 0x16161616 },
1070 { 0x5a4a491e, 0x2b291d2c, 0x0018081c, 0x1c080800, 0x382e2c2a, 0xff181818, 0x16160016, 0x16161616 },
1071 { 0x5a4a491e, 0x2b291d2c, 0x0018081c, 0x1c080800, 0x382e2c2a, 0xff191919, 0x1a1a001a, 0x1a1a1a1a },
1072 { 0x5d4d4b29, 0x2d2b282f, 0x001a0a1f, 0x1f0a0a00, 0x3a392f2d, 0xff1a1a1a, 0x1a1a001a, 0x1a1a1a1a },
1073 { 0x5f4f4d2b, 0x382d2a39, 0x001c0c29, 0x290c0c00, 0x3c3b392f, 0xff1b1b1b, 0x1e1e001e, 0x1e1e1e1e },
1074 { 0x5f4f4d2b, 0x382d2a39, 0x001c0c29, 0x290c0c00, 0x3c3b392f, 0xff1c1c1c, 0x1e1e001e, 0x1e1e1e1e },
1075 { 0x69594f2c, 0x392f2b3b, 0x001e0e2b, 0x2b0e0e00, 0x3e3c3b39, 0xff1d1d1d, 0x22220022, 0x22222222 },
1076 { 0x6a5a592e, 0x3b392d3c, 0x0028182c, 0x2c181800, 0x483e3c3a, 0xff1e1e1e, 0x22220022, 0x22222222 },
1077 { 0x6b5b5a38, 0x3c3a2f3e, 0x0029192e, 0x2e191900, 0x49483e3b, 0xff1f1f1f, 0x27270027, 0x27272727 },
1078 { 0x6d5d5b39, 0x3d3b383f, 0x002a1a2f, 0x2f1a1a00, 0x4a493f3d, 0xff202020, 0x27270027, 0x27272727 },
1079 { 0x6e5e5c3a, 0x3e3c3948, 0x002b1b38, 0x381b1b00, 0x4b4a483e, 0xff212121, 0x2c2c002c, 0x2c2c2c2c },
1080 { 0x78685e3b, 0x493e3b4a, 0x002d1d3a, 0x3a1d1d00, 0x4d4b4a48, 0xff222222, 0x2c2c002c, 0x2c2c2c2c },
1081 { 0x79695f3c, 0x493f3b4b, 0x002e1e3b, 0x3b1e1e00, 0x4e4c4b49, 0xff232323, 0x32320032, 0x32323232 },
1082 { 0x7a6a693e, 0x4b493d4c, 0x0038283c, 0x3c282800, 0x584e4c4a, 0xff242424, 0x32320032, 0x32323232 },
1083 { 0x7b6b6a48, 0x4c4a3f4e, 0x0039293e, 0x3e292900, 0x59584e4b, 0xff252525, 0x38380038, 0x38383838 },
1084 { 0x7d6d6b49, 0x4d4b484f, 0x003a2a3f, 0x3f2a2a00, 0x5a594f4d, 0xff262626, 0x38380038, 0x38383838 },
1085 { 0x7e6e6c4a, 0x4f4c4959, 0x003c2c49, 0x492c2c00, 0x5c5a594e, 0xff272727, 0x3e3e003e, 0x3e3e3e3e },
1086 { 0x88786d4b, 0x584d4a59, 0x003d2d49, 0x492d2d00, 0x5d5b5958, 0xff282828, 0x3e3e003e, 0x3e3e3e3e },
1087 { 0x89796f4d, 0x5a4f4c5b, 0x003f2f4b, 0x4b2f2f00, 0x5f5d5b59, 0xff292929, 0x45450045, 0x45454545 },
1088 { 0x8a7a794e, 0x5b594d5c, 0x0048384c, 0x4c383800, 0x685e5c5a, 0xff2a2a2a, 0x45450045, 0x45454545 },
1089 { 0x8b7b7a58, 0x5c5a4f5e, 0x0049394e, 0x4e393900, 0x69685e5b, 0xff2b2b2b, 0x4d4d004d, 0x4d4d4d4d },
1090 { 0x8d7d7b59, 0x5d5b585f, 0x004a3a4f, 0x4f3a3a00, 0x6a695f5d, 0xff2c2c2c, 0x4d4d004d, 0x4d4d4d4d },
1091 { 0x8e7e7c5a, 0x5f5c5968, 0x004b3b58, 0x583b3b00, 0x6b6a685e, 0xff2d2d2d, 0x55550055, 0x55555555 },
1092 { 0x8f887e5b, 0x685e5a6a, 0x004d3d5a, 0x5a3d3d00, 0x6d6b6a68, 0xff2e2e2e, 0x55550055, 0x55555555 },
1093 { 0x8f897f5c, 0x695f5c6b, 0x004e3e5b, 0x5b3e3e00, 0x6e6c6b69, 0xff2f2f2f, 0x5e5e005e, 0x5e5e5e5e },
1094 { 0x8f8a895e, 0x6b695d6c, 0x0058485c, 0x5c484800, 0x6f6e6c6a, 0xff303030, 0x5e5e005e, 0x5e5e5e5e },
1095 { 0x8f8b8a68, 0x6c6a5f6e, 0x0059495e, 0x5e494900, 0x6f6f6e6b, 0xff313131, 0x68680068, 0x68686868 },
1096 { 0x8f8d8b69, 0x6d6b686f, 0x005a4a5f, 0x5f4a4a00, 0x6f6f6f6d, 0xff323232, 0x68680068, 0x68686868 },
1097 { 0x8f8e8c6a, 0x6f6c6979, 0x005b4b69, 0x694b4b00, 0x6f6f6f6e, 0xff333333, 0x73730073, 0x73737373 }
1098 }
1099 };
1100
1101 const uint32_t CodechalEncodeAvcEncFeiG8::m_meCurbeCmFei[39] =
1102 {
1103 0x00000000, 0x00200010, 0x00003939, 0x77a43000, 0x00000000, 0x28300000, 0x00000000, 0x00000000,
1104 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
1105 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
1106 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
1107 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff
1108 };
1109
1110 // AVC PreProc CURBE init data for G9 CM Kernel
1111 const uint32_t CodechalEncodeAvcEncFeiG8::m_preProcCurbeCmNormalIFrame[49] =
1112 {
1113 0x00000082, 0x00000000, 0x00003910, 0x00a83000, 0x00000000, 0x28300000, 0x00000000, 0x00000000,
1114 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
1115 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
1116 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
1117 0x00000000, 0x00040c24, 0x00000000, 0x00000000, 0x40000000, 0x00000080, 0x00003900, 0x28301000,
1118 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff,
1119 0xffffffff
1120 };
1121
1122 const uint32_t CodechalEncodeAvcEncFeiG8::m_preProcCurbeCmNormalIfield[49] =
1123 {
1124 0x00000082, 0x00000000, 0x00003910, 0x00a830c0, 0x00000000, 0x28300000, 0x00000000, 0x00000000,
1125 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
1126 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
1127 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
1128 0x00000000, 0x00040c24, 0x00000000, 0x00000000, 0x40000000, 0x00000080, 0x00003900, 0x28301000,
1129 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff,
1130 0xffffffff
1131 };
1132
1133 const uint32_t CodechalEncodeAvcEncFeiG8::m_preProcCurbeCmNormalPFrame[49] =
1134 {
1135 0x000000a3, 0x00000008, 0x00003910, 0x00ae3000, 0x00000000, 0x28300000, 0x00000000, 0x01400060,
1136 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
1137 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
1138 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
1139 0x00000000, 0x00040c24, 0x00000000, 0x00000000, 0x60000000, 0x000000a1, 0x00003900, 0x28301000,
1140 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff,
1141 0xffffffff
1142 };
1143
1144 const uint32_t CodechalEncodeAvcEncFeiG8::m_preProcCurbeCmNormalPField[49] =
1145 {
1146 0x000000a3, 0x00000008, 0x00003910, 0x00ae30c0, 0x00000000, 0x28300000, 0x00000000, 0x01400060,
1147 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
1148 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
1149 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
1150 0x00000000, 0x00040c24, 0x00000000, 0x00000000, 0x40000000, 0x000000a1, 0x00003900, 0x28301000,
1151 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff,
1152 0xffffffff
1153 };
1154
1155 const uint32_t CodechalEncodeAvcEncFeiG8::m_preProcCurbeCmNormalBFrame[49] =
1156 {
1157 0x000000a3, 0x00200008, 0x00003910, 0x00aa7700, 0x00000000, 0x20200000, 0x00000000, 0xff400000,
1158 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
1159 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
1160 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
1161 0x00000000, 0x00040c24, 0x00000000, 0x00000000, 0x60000000, 0x000000a1, 0x00003900, 0x28301000,
1162 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff,
1163 0xffffffff
1164 };
1165
1166 const uint32_t CodechalEncodeAvcEncFeiG8::m_preProcCurbeCmNormalBField[49] =
1167 {
1168 0x000000a3, 0x00200008, 0x00003919, 0x00aa77c0, 0x00000000, 0x20200000, 0x00000000, 0xff400000,
1169 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
1170 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
1171 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
1172 0x00000000, 0x00040c24, 0x00000000, 0x00000000, 0x40000000, 0x000000a1, 0x00003900, 0x28301000,
1173 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff,
1174 0xffffffff
1175 };
1176
1177 typedef struct _MBENC_CURBE_CM_FEI
1178 {
1179 // DW0
1180 union
1181 {
1182 struct
1183 {
1184 uint32_t SkipModeEn : MOS_BITFIELD_BIT( 0 );
1185 uint32_t AdaptiveEn : MOS_BITFIELD_BIT( 1 );
1186 uint32_t BiMixDis : MOS_BITFIELD_BIT( 2 );
1187 uint32_t : MOS_BITFIELD_RANGE( 3, 4 );
1188 uint32_t EarlyImeSuccessEn : MOS_BITFIELD_BIT( 5 );
1189 uint32_t : MOS_BITFIELD_BIT( 6 );
1190 uint32_t T8x8FlagForInterEn : MOS_BITFIELD_BIT( 7 );
1191 uint32_t : MOS_BITFIELD_RANGE( 8,23 );
1192 uint32_t EarlyImeStop : MOS_BITFIELD_RANGE( 24,31 );
1193 };
1194 struct
1195 {
1196 uint32_t Value;
1197 };
1198 } DW0;
1199
1200 // DW1
1201 union
1202 {
1203 struct
1204 {
1205 uint32_t MaxNumMVs : MOS_BITFIELD_RANGE( 0, 5 );
1206 uint32_t : MOS_BITFIELD_RANGE( 6,15 );
1207 uint32_t BiWeight : MOS_BITFIELD_RANGE( 16,21 );
1208 uint32_t : MOS_BITFIELD_RANGE( 22,27 );
1209 uint32_t UniMixDisable : MOS_BITFIELD_BIT( 28 );
1210 uint32_t : MOS_BITFIELD_RANGE( 29,31 );
1211 };
1212 struct
1213 {
1214 uint32_t Value;
1215 };
1216 } DW1;
1217
1218 // DW2
1219 union
1220 {
1221 struct
1222 {
1223 uint32_t LenSP : MOS_BITFIELD_RANGE( 0, 7 );
1224 uint32_t MaxNumSU : MOS_BITFIELD_RANGE( 8,15 );
1225 uint32_t PicWidth : MOS_BITFIELD_RANGE( 16,31 );
1226 };
1227 struct
1228 {
1229 uint32_t Value;
1230 };
1231 } DW2;
1232
1233 // DW3
1234 union
1235 {
1236 struct
1237 {
1238 uint32_t SrcSize : MOS_BITFIELD_RANGE( 0, 1 );
1239 uint32_t : MOS_BITFIELD_RANGE( 2, 3 );
1240 uint32_t MbTypeRemap : MOS_BITFIELD_RANGE( 4, 5 );
1241 uint32_t SrcAccess : MOS_BITFIELD_BIT( 6 );
1242 uint32_t RefAccess : MOS_BITFIELD_BIT( 7 );
1243 uint32_t SearchCtrl : MOS_BITFIELD_RANGE( 8,10 );
1244 uint32_t DualSearchPathOption : MOS_BITFIELD_BIT( 11 );
1245 uint32_t SubPelMode : MOS_BITFIELD_RANGE( 12,13 );
1246 uint32_t SkipType : MOS_BITFIELD_BIT( 14 );
1247 uint32_t DisableFieldCacheAlloc : MOS_BITFIELD_BIT( 15 );
1248 uint32_t InterChromaMode : MOS_BITFIELD_BIT( 16 );
1249 uint32_t FTEnable : MOS_BITFIELD_BIT( 17 );
1250 uint32_t BMEDisableFBR : MOS_BITFIELD_BIT( 18 );
1251 uint32_t BlockBasedSkipEnable : MOS_BITFIELD_BIT( 19 );
1252 uint32_t InterSAD : MOS_BITFIELD_RANGE( 20,21 );
1253 uint32_t IntraSAD : MOS_BITFIELD_RANGE( 22,23 );
1254 uint32_t SubMbPartMask : MOS_BITFIELD_RANGE( 24,30 );
1255 uint32_t : MOS_BITFIELD_BIT( 31 );
1256 };
1257 struct
1258 {
1259 uint32_t Value;
1260 };
1261 } DW3;
1262
1263 // DW4
1264 union
1265 {
1266 struct
1267 {
1268 uint32_t PicHeightMinus1 : MOS_BITFIELD_RANGE( 0,15 );
1269 uint32_t MvRestrictionInSliceEnable : MOS_BITFIELD_BIT( 16 );
1270 uint32_t DeltaMvEnable : MOS_BITFIELD_BIT( 17 );
1271 uint32_t TrueDistortionEnable : MOS_BITFIELD_BIT( 18 );
1272 uint32_t FEIEnable : MOS_BITFIELD_BIT( 19);
1273 uint32_t MultipleMVPredictorPerMBEnable : MOS_BITFIELD_BIT( 20);
1274 uint32_t VMEDistortionOutputEnable : MOS_BITFIELD_BIT( 21);
1275 uint32_t PerMBQpEnable : MOS_BITFIELD_BIT( 22);
1276 uint32_t MBInputEnable : MOS_BITFIELD_BIT( 23);
1277 uint32_t : MOS_BITFIELD_BIT( 24);
1278 uint32_t bCurFldIDR : MOS_BITFIELD_BIT( 25 );
1279 uint32_t ConstrainedIntraPredFlag : MOS_BITFIELD_BIT( 26 );
1280 uint32_t FieldParityFlag : MOS_BITFIELD_BIT( 27 );
1281 uint32_t HMEEnable : MOS_BITFIELD_BIT( 28 );
1282 uint32_t PictureType : MOS_BITFIELD_RANGE( 29,30 );
1283 uint32_t UseActualRefQPValue : MOS_BITFIELD_BIT( 31 );
1284 };
1285 struct
1286 {
1287 uint32_t Value;
1288 };
1289 } DW4;
1290
1291 // DW5
1292 union
1293 {
1294 struct
1295 {
1296 uint32_t SliceMbHeight : MOS_BITFIELD_RANGE( 0,15 );
1297 uint32_t RefWidth : MOS_BITFIELD_RANGE( 16,23 );
1298 uint32_t RefHeight : MOS_BITFIELD_RANGE( 24,31 );
1299 };
1300 struct
1301 {
1302 uint32_t Value;
1303 };
1304 } DW5;
1305
1306 // DW6
1307 union
1308 {
1309 struct
1310 {
1311 uint32_t BatchBufferEnd : MOS_BITFIELD_RANGE( 0,31 );
1312 };
1313 struct
1314 {
1315 uint32_t Value;
1316 };
1317 } DW6;
1318
1319 // DW7
1320 union
1321 {
1322 struct
1323 {
1324 uint32_t IntraPartMask : MOS_BITFIELD_RANGE( 0, 4 );
1325 uint32_t NonSkipZMvAdded : MOS_BITFIELD_BIT( 5 );
1326 uint32_t NonSkipModeAdded : MOS_BITFIELD_BIT( 6 );
1327 uint32_t LumaIntraSrcCornerSwap : MOS_BITFIELD_BIT( 7 );
1328 uint32_t : MOS_BITFIELD_RANGE( 8,15 );
1329 uint32_t MVCostScaleFactor : MOS_BITFIELD_RANGE( 16,17 );
1330 uint32_t BilinearEnable : MOS_BITFIELD_BIT( 18 );
1331 uint32_t SrcFieldPolarity : MOS_BITFIELD_BIT( 19 );
1332 uint32_t WeightedSADHAAR : MOS_BITFIELD_BIT( 20 );
1333 uint32_t AConlyHAAR : MOS_BITFIELD_BIT( 21 );
1334 uint32_t RefIDCostMode : MOS_BITFIELD_BIT( 22 );
1335 uint32_t : MOS_BITFIELD_BIT( 23 );
1336 uint32_t SkipCenterMask : MOS_BITFIELD_RANGE( 24,31 );
1337 };
1338 struct
1339 {
1340 uint32_t Value;
1341 };
1342 } DW7;
1343
1344 struct
1345 {
1346 // DW8
1347 union
1348 {
1349 struct
1350 {
1351 uint32_t Mode0Cost : MOS_BITFIELD_RANGE( 0, 7 );
1352 uint32_t Mode1Cost : MOS_BITFIELD_RANGE( 8,15 );
1353 uint32_t Mode2Cost : MOS_BITFIELD_RANGE( 16,23 );
1354 uint32_t Mode3Cost : MOS_BITFIELD_RANGE( 24,31 );
1355 };
1356 struct
1357 {
1358 uint32_t Value;
1359 };
1360 } DW8;
1361
1362 // DW9
1363 union
1364 {
1365 struct
1366 {
1367 uint32_t Mode4Cost : MOS_BITFIELD_RANGE( 0, 7 );
1368 uint32_t Mode5Cost : MOS_BITFIELD_RANGE( 8,15 );
1369 uint32_t Mode6Cost : MOS_BITFIELD_RANGE( 16,23 );
1370 uint32_t Mode7Cost : MOS_BITFIELD_RANGE( 24,31 );
1371 };
1372 struct
1373 {
1374 uint32_t Value;
1375 };
1376 } DW9;
1377
1378 // DW10
1379 union
1380 {
1381 struct
1382 {
1383 uint32_t Mode8Cost : MOS_BITFIELD_RANGE( 0, 7 );
1384 uint32_t Mode9Cost : MOS_BITFIELD_RANGE( 8,15 );
1385 uint32_t RefIDCost : MOS_BITFIELD_RANGE( 16,23 );
1386 uint32_t ChromaIntraModeCost : MOS_BITFIELD_RANGE( 24,31 );
1387 };
1388 struct
1389 {
1390 uint32_t Value;
1391 };
1392 } DW10;
1393
1394 // DW11
1395 union
1396 {
1397 struct
1398 {
1399 uint32_t MV0Cost : MOS_BITFIELD_RANGE( 0, 7 );
1400 uint32_t MV1Cost : MOS_BITFIELD_RANGE( 8,15 );
1401 uint32_t MV2Cost : MOS_BITFIELD_RANGE( 16,23 );
1402 uint32_t MV3Cost : MOS_BITFIELD_RANGE( 24,31 );
1403 };
1404 struct
1405 {
1406 uint32_t Value;
1407 };
1408 } DW11;
1409
1410 // DW12
1411 union
1412 {
1413 struct
1414 {
1415 uint32_t MV4Cost : MOS_BITFIELD_RANGE( 0, 7 );
1416 uint32_t MV5Cost : MOS_BITFIELD_RANGE( 8,15 );
1417 uint32_t MV6Cost : MOS_BITFIELD_RANGE( 16,23 );
1418 uint32_t MV7Cost : MOS_BITFIELD_RANGE( 24,31 );
1419 };
1420 struct
1421 {
1422 uint32_t Value;
1423 };
1424 } DW12;
1425
1426 // DW13
1427 union
1428 {
1429 struct
1430 {
1431 uint32_t QpPrimeY : MOS_BITFIELD_RANGE( 0, 7 );
1432 uint32_t QpPrimeCb : MOS_BITFIELD_RANGE( 8,15 );
1433 uint32_t QpPrimeCr : MOS_BITFIELD_RANGE( 16,23 );
1434 uint32_t TargetSizeInWord : MOS_BITFIELD_RANGE( 24,31 );
1435 };
1436 struct
1437 {
1438 uint32_t Value;
1439 };
1440 } DW13;
1441
1442 // DW14
1443 union
1444 {
1445 struct
1446 {
1447 uint32_t SICFwdTransCoeffThreshold_0 : MOS_BITFIELD_RANGE( 0,15 );
1448 uint32_t SICFwdTransCoeffThreshold_1 : MOS_BITFIELD_RANGE( 16,23 );
1449 uint32_t SICFwdTransCoeffThreshold_2 : MOS_BITFIELD_RANGE( 24,31 );
1450 };
1451 struct
1452 {
1453 uint32_t Value;
1454 };
1455 } DW14;
1456
1457 // DW15
1458 union
1459 {
1460 struct
1461 {
1462 uint32_t SICFwdTransCoeffThreshold_3 : MOS_BITFIELD_RANGE( 0, 7 );
1463 uint32_t SICFwdTransCoeffThreshold_4 : MOS_BITFIELD_RANGE( 8,15 );
1464 uint32_t SICFwdTransCoeffThreshold_5 : MOS_BITFIELD_RANGE( 16,23 );
1465 uint32_t SICFwdTransCoeffThreshold_6 : MOS_BITFIELD_RANGE( 24,31 ); // Highest Freq
1466 };
1467 struct
1468 {
1469 uint32_t Value;
1470 };
1471 } DW15;
1472 } ModeMvCost;
1473
1474 struct
1475 {
1476 // DW16
1477 union
1478 {
1479 struct
1480 {
1481 SearchPathDelta SPDelta_0;
1482 SearchPathDelta SPDelta_1;
1483 SearchPathDelta SPDelta_2;
1484 SearchPathDelta SPDelta_3;
1485 };
1486 struct
1487 {
1488 uint32_t Value;
1489 };
1490 } DW16;
1491
1492 // DW17
1493 union
1494 {
1495 struct
1496 {
1497 SearchPathDelta SPDelta_4;
1498 SearchPathDelta SPDelta_5;
1499 SearchPathDelta SPDelta_6;
1500 SearchPathDelta SPDelta_7;
1501 };
1502 struct
1503 {
1504 uint32_t Value;
1505 };
1506 } DW17;
1507
1508 // DW18
1509 union
1510 {
1511 struct
1512 {
1513 SearchPathDelta SPDelta_8;
1514 SearchPathDelta SPDelta_9;
1515 SearchPathDelta SPDelta_10;
1516 SearchPathDelta SPDelta_11;
1517 };
1518 struct
1519 {
1520 uint32_t Value;
1521 };
1522 } DW18;
1523
1524 // DW19
1525 union
1526 {
1527 struct
1528 {
1529 SearchPathDelta SPDelta_12;
1530 SearchPathDelta SPDelta_13;
1531 SearchPathDelta SPDelta_14;
1532 SearchPathDelta SPDelta_15;
1533 };
1534 struct
1535 {
1536 uint32_t Value;
1537 };
1538 } DW19;
1539
1540 // DW20
1541 union
1542 {
1543 struct
1544 {
1545 SearchPathDelta SPDelta_16;
1546 SearchPathDelta SPDelta_17;
1547 SearchPathDelta SPDelta_18;
1548 SearchPathDelta SPDelta_19;
1549 };
1550 struct
1551 {
1552 uint32_t Value;
1553 };
1554 } DW20;
1555
1556 // DW21
1557 union
1558 {
1559 struct
1560 {
1561 SearchPathDelta SPDelta_20;
1562 SearchPathDelta SPDelta_21;
1563 SearchPathDelta SPDelta_22;
1564 SearchPathDelta SPDelta_23;
1565 };
1566 struct
1567 {
1568 uint32_t Value;
1569 };
1570 } DW21;
1571
1572 // DW22
1573 union
1574 {
1575 struct
1576 {
1577 SearchPathDelta SPDelta_24;
1578 SearchPathDelta SPDelta_25;
1579 SearchPathDelta SPDelta_26;
1580 SearchPathDelta SPDelta_27;
1581 };
1582 struct
1583 {
1584 uint32_t Value;
1585 };
1586 } DW22;
1587
1588 // DW23
1589 union
1590 {
1591 struct
1592 {
1593 SearchPathDelta SPDelta_28;
1594 SearchPathDelta SPDelta_29;
1595 SearchPathDelta SPDelta_30;
1596 SearchPathDelta SPDelta_31;
1597 };
1598 struct
1599 {
1600 uint32_t Value;
1601 };
1602 } DW23;
1603
1604 // DW24
1605 union
1606 {
1607 struct
1608 {
1609 SearchPathDelta SPDelta_32;
1610 SearchPathDelta SPDelta_33;
1611 SearchPathDelta SPDelta_34;
1612 SearchPathDelta SPDelta_35;
1613 };
1614 struct
1615 {
1616 uint32_t Value;
1617 };
1618 } DW24;
1619
1620 // DW25
1621 union
1622 {
1623 struct
1624 {
1625 SearchPathDelta SPDelta_36;
1626 SearchPathDelta SPDelta_37;
1627 SearchPathDelta SPDelta_38;
1628 SearchPathDelta SPDelta_39;
1629 };
1630 struct
1631 {
1632 uint32_t Value;
1633 };
1634 } DW25;
1635
1636 // DW26
1637 union
1638 {
1639 struct
1640 {
1641 SearchPathDelta SPDelta_40;
1642 SearchPathDelta SPDelta_41;
1643 SearchPathDelta SPDelta_42;
1644 SearchPathDelta SPDelta_43;
1645 };
1646 struct
1647 {
1648 uint32_t Value;
1649 };
1650 } DW26;
1651
1652 // DW27
1653 union
1654 {
1655 struct
1656 {
1657 SearchPathDelta SPDelta_44;
1658 SearchPathDelta SPDelta_45;
1659 SearchPathDelta SPDelta_46;
1660 SearchPathDelta SPDelta_47;
1661 };
1662 struct
1663 {
1664 uint32_t Value;
1665 };
1666 } DW27;
1667
1668 // DW28
1669 union
1670 {
1671 struct
1672 {
1673 SearchPathDelta SPDelta_48;
1674 SearchPathDelta SPDelta_49;
1675 SearchPathDelta SPDelta_50;
1676 SearchPathDelta SPDelta_51;
1677 };
1678 struct
1679 {
1680 uint32_t Value;
1681 };
1682 } DW28;
1683
1684 // DW29
1685 union
1686 {
1687 struct
1688 {
1689 SearchPathDelta SPDelta_52;
1690 SearchPathDelta SPDelta_53;
1691 SearchPathDelta SPDelta_54;
1692 SearchPathDelta SPDelta_55;
1693 };
1694 struct
1695 {
1696 uint32_t Value;
1697 };
1698 } DW29;
1699
1700 // DW30
1701 union
1702 {
1703 struct
1704 {
1705 uint32_t Intra4x4ModeMask : MOS_BITFIELD_RANGE( 0, 8 );
1706 uint32_t : MOS_BITFIELD_RANGE( 9,15 );
1707 uint32_t Intra8x8ModeMask : MOS_BITFIELD_RANGE( 16,24 );
1708 uint32_t : MOS_BITFIELD_RANGE( 25,31 );
1709 };
1710 struct
1711 {
1712 uint32_t Value;
1713 };
1714 } DW30;
1715
1716 // DW31
1717 union
1718 {
1719 struct
1720 {
1721 uint32_t Intra16x16ModeMask : MOS_BITFIELD_RANGE( 0, 3 );
1722 uint32_t IntraChromaModeMask : MOS_BITFIELD_RANGE( 4, 7 );
1723 uint32_t IntraComputeType : MOS_BITFIELD_RANGE( 8, 9 );
1724 uint32_t : MOS_BITFIELD_RANGE( 10,31 );
1725 };
1726 struct
1727 {
1728 uint32_t Value;
1729 };
1730 } DW31;
1731 } SPDelta;
1732
1733 // DW32
1734 union
1735 {
1736 struct
1737 {
1738 uint32_t SkipVal : MOS_BITFIELD_RANGE( 0,15 );
1739 uint32_t MultiPredL0Disable : MOS_BITFIELD_RANGE( 16,23 );
1740 uint32_t MultiPredL1Disable : MOS_BITFIELD_RANGE( 24,31 );
1741 };
1742 struct
1743 {
1744 uint32_t Value;
1745 };
1746 } DW32;
1747
1748 // DW33
1749 union
1750 {
1751 struct
1752 {
1753 uint32_t Intra16x16NonDCPredPenalty : MOS_BITFIELD_RANGE( 0,7 );
1754 uint32_t Intra8x8NonDCPredPenalty : MOS_BITFIELD_RANGE( 8,15 );
1755 uint32_t Intra4x4NonDCPredPenalty : MOS_BITFIELD_RANGE( 16,23 );
1756 uint32_t : MOS_BITFIELD_RANGE( 24,31 );
1757 };
1758 struct
1759 {
1760 uint32_t Value;
1761 };
1762 } DW33;
1763
1764 // DW34
1765 union
1766 {
1767 struct
1768 {
1769 uint32_t List0RefID0FieldParity : MOS_BITFIELD_BIT( 0 );
1770 uint32_t List0RefID1FieldParity : MOS_BITFIELD_BIT( 1 );
1771 uint32_t List0RefID2FieldParity : MOS_BITFIELD_BIT( 2 );
1772 uint32_t List0RefID3FieldParity : MOS_BITFIELD_BIT( 3 );
1773 uint32_t List0RefID4FieldParity : MOS_BITFIELD_BIT( 4 );
1774 uint32_t List0RefID5FieldParity : MOS_BITFIELD_BIT( 5 );
1775 uint32_t List0RefID6FieldParity : MOS_BITFIELD_BIT( 6 );
1776 uint32_t List0RefID7FieldParity : MOS_BITFIELD_BIT( 7 );
1777 uint32_t List1RefID0FrameFieldFlag : MOS_BITFIELD_BIT( 8 );
1778 uint32_t List1RefID1FrameFieldFlag : MOS_BITFIELD_BIT( 9 );
1779 uint32_t : MOS_BITFIELD_RANGE( 10,19 );
1780 uint32_t NumMVPredictorsL1 : MOS_BITFIELD_RANGE( 20,23 );
1781 uint32_t List1RefID0FieldParity : MOS_BITFIELD_BIT( 24 );
1782 uint32_t List1RefID1FieldParity : MOS_BITFIELD_BIT( 25 );
1783 uint32_t MADEnableFlag : MOS_BITFIELD_BIT( 26 );
1784 uint32_t ROIEnableFlag : MOS_BITFIELD_BIT( 27 );
1785 uint32_t EnableMBFlatnessChkOptimization : MOS_BITFIELD_BIT( 28 );
1786 uint32_t bDirectMode : MOS_BITFIELD_BIT( 29 );
1787 uint32_t MBBrcEnable : MOS_BITFIELD_BIT( 30 );
1788 uint32_t bOriginalBff : MOS_BITFIELD_BIT( 31 );
1789 };
1790 struct
1791 {
1792 uint32_t Value;
1793 };
1794 } DW34;
1795
1796 // DW35
1797 union
1798 {
1799 struct
1800 {
1801 uint32_t PanicModeMBThreshold : MOS_BITFIELD_RANGE( 0,15 );
1802 uint32_t SmallMbSizeInWord : MOS_BITFIELD_RANGE( 16,23 );
1803 uint32_t LargeMbSizeInWord : MOS_BITFIELD_RANGE( 24,31 );
1804 };
1805 struct
1806 {
1807 uint32_t Value;
1808 };
1809 } DW35;
1810
1811 // DW36
1812 union
1813 {
1814 struct
1815 {
1816 uint32_t NumRefIdxL0MinusOne : MOS_BITFIELD_RANGE( 0, 7 );
1817 uint32_t HMECombinedExtraSUs : MOS_BITFIELD_RANGE( 8,15 );
1818 uint32_t NumRefIdxL1MinusOne : MOS_BITFIELD_RANGE( 16,23 );
1819 uint32_t NumMVPredictors : MOS_BITFIELD_RANGE( 24,27 ); // FEI only
1820 uint32_t IsFwdFrameShortTermRef : MOS_BITFIELD_BIT( 28 );
1821 uint32_t CheckAllFractionalEnable : MOS_BITFIELD_BIT( 29 );
1822 uint32_t HMECombineOverlap : MOS_BITFIELD_RANGE( 30,31 );
1823 };
1824 struct
1825 {
1826 uint32_t Value;
1827 };
1828 } DW36;
1829
1830 // DW37
1831 union
1832 {
1833 struct
1834 {
1835 uint32_t SkipModeEn : MOS_BITFIELD_BIT( 0 );
1836 uint32_t AdaptiveEn : MOS_BITFIELD_BIT( 1 );
1837 uint32_t BiMixDis : MOS_BITFIELD_BIT( 2 );
1838 uint32_t : MOS_BITFIELD_RANGE( 3, 4 );
1839 uint32_t EarlyImeSuccessEn : MOS_BITFIELD_BIT( 5 );
1840 uint32_t : MOS_BITFIELD_BIT( 6 );
1841 uint32_t T8x8FlagForInterEn : MOS_BITFIELD_BIT( 7 );
1842 uint32_t : MOS_BITFIELD_RANGE( 8,23 );
1843 uint32_t EarlyImeStop : MOS_BITFIELD_RANGE( 24,31 );
1844 };
1845 struct
1846 {
1847 uint32_t Value;
1848 };
1849 } DW37;
1850
1851 // DW38
1852 union
1853 {
1854 struct
1855 {
1856 uint32_t LenSP : MOS_BITFIELD_RANGE( 0, 7 );
1857 uint32_t MaxNumSU : MOS_BITFIELD_RANGE( 8,15 );
1858 uint32_t RefThreshold : MOS_BITFIELD_RANGE( 16,31 );
1859 };
1860 struct
1861 {
1862 uint32_t Value;
1863 };
1864 } DW38;
1865
1866 // DW39
1867 union
1868 {
1869 struct
1870 {
1871 uint32_t : MOS_BITFIELD_RANGE( 0, 7 );
1872 uint32_t HMERefWindowsCombThreshold : MOS_BITFIELD_RANGE( 8,15 );
1873 uint32_t RefWidth : MOS_BITFIELD_RANGE( 16,23 );
1874 uint32_t RefHeight : MOS_BITFIELD_RANGE( 24,31 );
1875 };
1876 struct
1877 {
1878 uint32_t Value;
1879 };
1880 } DW39;
1881
1882 // DW40
1883 union
1884 {
1885 struct
1886 {
1887 uint32_t DistScaleFactorRefID0List0 : MOS_BITFIELD_RANGE( 0,15 );
1888 uint32_t DistScaleFactorRefID1List0 : MOS_BITFIELD_RANGE( 16,31 );
1889 };
1890 struct
1891 {
1892 uint32_t Value;
1893 };
1894 } DW40;
1895
1896 // DW41
1897 union
1898 {
1899 struct
1900 {
1901 uint32_t DistScaleFactorRefID2List0 : MOS_BITFIELD_RANGE( 0,15 );
1902 uint32_t DistScaleFactorRefID3List0 : MOS_BITFIELD_RANGE( 16,31 );
1903 };
1904 struct
1905 {
1906 uint32_t Value;
1907 };
1908 } DW41;
1909
1910 // DW42
1911 union
1912 {
1913 struct
1914 {
1915 uint32_t DistScaleFactorRefID4List0 : MOS_BITFIELD_RANGE( 0,15 );
1916 uint32_t DistScaleFactorRefID5List0 : MOS_BITFIELD_RANGE( 16,31 );
1917 };
1918 struct
1919 {
1920 uint32_t Value;
1921 };
1922 } DW42;
1923
1924 // DW43
1925 union
1926 {
1927 struct
1928 {
1929 uint32_t DistScaleFactorRefID6List0 : MOS_BITFIELD_RANGE( 0,15 );
1930 uint32_t DistScaleFactorRefID7List0 : MOS_BITFIELD_RANGE( 16,31 );
1931 };
1932 struct
1933 {
1934 uint32_t Value;
1935 };
1936 } DW43;
1937
1938 // DW44
1939 union
1940 {
1941 struct
1942 {
1943 uint32_t ActualQPValueForRefID0List0 : MOS_BITFIELD_RANGE( 0, 7 );
1944 uint32_t ActualQPValueForRefID1List0 : MOS_BITFIELD_RANGE( 8,15 );
1945 uint32_t ActualQPValueForRefID2List0 : MOS_BITFIELD_RANGE( 16,23 );
1946 uint32_t ActualQPValueForRefID3List0 : MOS_BITFIELD_RANGE( 24,31 );
1947 };
1948 struct
1949 {
1950 uint32_t Value;
1951 };
1952 } DW44;
1953
1954 // DW45
1955 union
1956 {
1957 struct
1958 {
1959 uint32_t ActualQPValueForRefID4List0 : MOS_BITFIELD_RANGE( 0, 7 );
1960 uint32_t ActualQPValueForRefID5List0 : MOS_BITFIELD_RANGE( 8,15 );
1961 uint32_t ActualQPValueForRefID6List0 : MOS_BITFIELD_RANGE( 16,23 );
1962 uint32_t ActualQPValueForRefID7List0 : MOS_BITFIELD_RANGE( 24,31 );
1963 };
1964 struct
1965 {
1966 uint32_t Value;
1967 };
1968 } DW45;
1969
1970 // DW46
1971 union
1972 {
1973 struct
1974 {
1975 uint32_t ActualQPValueForRefID0List1 : MOS_BITFIELD_RANGE( 0, 7 );
1976 uint32_t ActualQPValueForRefID1List1 : MOS_BITFIELD_RANGE( 8,15 );
1977 uint32_t RefCost : MOS_BITFIELD_RANGE( 16,31 );
1978 };
1979 struct
1980 {
1981 uint32_t Value;
1982 };
1983 } DW46;
1984
1985 // DW47
1986 union
1987 {
1988 struct
1989 {
1990 uint32_t : MOS_BITFIELD_RANGE( 0, 7 );
1991 uint32_t IntraCostSF : MOS_BITFIELD_RANGE( 8,15 );
1992 uint32_t MaxVmvR : MOS_BITFIELD_RANGE( 16,31 );
1993 };
1994 struct
1995 {
1996 uint32_t Value;
1997 };
1998 } DW47;
1999
2000 //DW48
2001 union
2002 {
2003 struct
2004 {
2005 uint32_t IntraRefreshMBNum : MOS_BITFIELD_RANGE( 0,15 );
2006 uint32_t IntraRefreshUnitInMBMinus1 : MOS_BITFIELD_RANGE( 16,23 );
2007 uint32_t IntraRefreshQPDelta : MOS_BITFIELD_RANGE( 24,31 );
2008 };
2009 struct
2010 {
2011 uint32_t Value;
2012 };
2013 } DW48;
2014
2015 // DW49
2016 union
2017 {
2018 struct
2019 {
2020 uint32_t ROI1_X_left : MOS_BITFIELD_RANGE( 0,15 );
2021 uint32_t ROI1_Y_top : MOS_BITFIELD_RANGE( 16,31 );
2022 };
2023 struct
2024 {
2025 uint32_t Value;
2026 };
2027 } DW49;
2028
2029 // DW50
2030 union
2031 {
2032 struct
2033 {
2034 uint32_t ROI1_X_right : MOS_BITFIELD_RANGE( 0,15 );
2035 uint32_t ROI1_Y_bottom : MOS_BITFIELD_RANGE( 16,31 );
2036 };
2037 struct
2038 {
2039 uint32_t Value;
2040 };
2041 } DW50;
2042
2043 // DW51
2044 union
2045 {
2046 struct
2047 {
2048 uint32_t ROI2_X_left : MOS_BITFIELD_RANGE( 0,15 );
2049 uint32_t ROI2_Y_top : MOS_BITFIELD_RANGE( 16,31 );
2050 };
2051 struct
2052 {
2053 uint32_t Value;
2054 };
2055 } DW51;
2056
2057 // DW52
2058 union
2059 {
2060 struct
2061 {
2062 uint32_t ROI2_X_right : MOS_BITFIELD_RANGE( 0,15 );
2063 uint32_t ROI2_Y_bottom : MOS_BITFIELD_RANGE( 16,31 );
2064 };
2065 struct
2066 {
2067 uint32_t Value;
2068 };
2069 } DW52;
2070
2071 // DW53
2072 union
2073 {
2074 struct
2075 {
2076 uint32_t ROI3_X_left : MOS_BITFIELD_RANGE( 0,15 );
2077 uint32_t ROI3_Y_top : MOS_BITFIELD_RANGE( 16,31 );
2078 };
2079 struct
2080 {
2081 uint32_t Value;
2082 };
2083 } DW53;
2084
2085 // DW54
2086 union
2087 {
2088 struct
2089 {
2090 uint32_t ROI3_X_right : MOS_BITFIELD_RANGE( 0,15 );
2091 uint32_t ROI3_Y_bottom : MOS_BITFIELD_RANGE( 16,31 );
2092 };
2093 struct
2094 {
2095 uint32_t Value;
2096 };
2097 } DW54;
2098
2099 // DW55
2100 union
2101 {
2102 struct
2103 {
2104 uint32_t ROI4_X_left : MOS_BITFIELD_RANGE( 0,15 );
2105 uint32_t ROI4_Y_top : MOS_BITFIELD_RANGE( 16,31 );
2106 };
2107 struct
2108 {
2109 uint32_t Value;
2110 };
2111 } DW55;
2112
2113 // DW56
2114 union
2115 {
2116 struct
2117 {
2118 uint32_t ROI4_X_right : MOS_BITFIELD_RANGE( 0,15 );
2119 uint32_t ROI4_Y_bottom : MOS_BITFIELD_RANGE( 16,31 );
2120 };
2121 struct
2122 {
2123 uint32_t Value;
2124 };
2125 } DW56;
2126
2127 // DW57
2128 union
2129 {
2130 struct
2131 {
2132 uint32_t ROI1_dQpPrimeY : MOS_BITFIELD_RANGE( 0, 7 );
2133 uint32_t ROI2_dQpPrimeY : MOS_BITFIELD_RANGE( 8,15 );
2134 uint32_t ROI3_dQpPrimeY : MOS_BITFIELD_RANGE( 16,23 );
2135 uint32_t ROI4_dQpPrimeY : MOS_BITFIELD_RANGE( 24,31 );
2136 };
2137 struct
2138 {
2139 uint32_t Value;
2140 };
2141 } DW57;
2142
2143 // DW58
2144 union
2145 {
2146 struct
2147 {
2148 uint32_t Reserved : MOS_BITFIELD_RANGE( 0,31 );
2149 };
2150 struct
2151 {
2152 uint32_t Value;
2153 };
2154 } DW58;
2155
2156 // DW59
2157 union
2158 {
2159 struct
2160 {
2161 uint32_t IPCM_QP0 : MOS_BITFIELD_RANGE( 0, 7 );
2162 uint32_t IPCM_QP1 : MOS_BITFIELD_RANGE( 8,15 );
2163 uint32_t IPCM_QP2 : MOS_BITFIELD_RANGE( 16,23 );
2164 uint32_t IPCM_QP3 : MOS_BITFIELD_RANGE( 24,31 );
2165 };
2166 struct
2167 {
2168 uint32_t Value;
2169 };
2170 } DW59;
2171
2172 // DW60
2173 union
2174 {
2175 struct
2176 {
2177 uint32_t IPCM_QP4 : MOS_BITFIELD_RANGE( 0, 7 );
2178 uint32_t Reserved : MOS_BITFIELD_RANGE( 8,15 );
2179 uint32_t IPCM_Thresh0 : MOS_BITFIELD_RANGE( 16,31 );
2180 };
2181 struct
2182 {
2183 uint32_t Value;
2184 };
2185 } DW60;
2186
2187 // DW61
2188 union
2189 {
2190 struct
2191 {
2192 uint32_t IPCM_Thresh1 : MOS_BITFIELD_RANGE( 0,15 );
2193 uint32_t IPCM_Thresh2 : MOS_BITFIELD_RANGE( 16,31 );
2194 };
2195 struct
2196 {
2197 uint32_t Value;
2198 };
2199 } DW61;
2200
2201 // DW62
2202 union
2203 {
2204 struct
2205 {
2206 uint32_t IPCM_Thresh3 : MOS_BITFIELD_RANGE( 0,15 );
2207 uint32_t IPCM_Thresh4 : MOS_BITFIELD_RANGE( 16,31 );
2208 };
2209 struct
2210 {
2211 uint32_t Value;
2212 };
2213 } DW62;
2214
2215 // DW63
2216 union
2217 {
2218 struct
2219 {
2220 uint32_t L1ListRef0PictureCodingType : MOS_BITFIELD_RANGE( 0, 1 ); // 0-invalid, 1-TFF, 2-invalid, 3-BFF
2221 uint32_t Reserved : MOS_BITFIELD_RANGE( 2,31 );
2222 };
2223 struct
2224 {
2225 uint32_t Value;
2226 };
2227 } DW63;
2228
2229 // DW64
2230 union
2231 {
2232 struct
2233 {
2234 uint32_t BottomFieldOffsetL1ListRef0MV : MOS_BITFIELD_RANGE( 0,31 );
2235 };
2236 struct
2237 {
2238 uint32_t Value;
2239 };
2240 } DW64;
2241
2242 // DW65
2243 union
2244 {
2245 struct
2246 {
2247 uint32_t BottomFieldOffsetL1ListRef0MBCode : MOS_BITFIELD_RANGE( 0,31 );
2248 };
2249 struct
2250 {
2251 uint32_t Value;
2252 };
2253 } DW65;
2254
2255 // DW66
2256 union
2257 {
2258 struct
2259 {
2260 uint32_t MBDataSurfIndex : MOS_BITFIELD_RANGE( 0,31 );
2261 };
2262 struct
2263 {
2264 uint32_t Value;
2265 };
2266 } DW66;
2267
2268 // DW67
2269 union
2270 {
2271 struct
2272 {
2273 uint32_t MVDataSurfIndex : MOS_BITFIELD_RANGE( 0,31 );
2274 };
2275 struct
2276 {
2277 uint32_t Value;
2278 };
2279 } DW67;
2280
2281 // DW68
2282 union
2283 {
2284 struct
2285 {
2286 uint32_t IDistSurfIndex : MOS_BITFIELD_RANGE( 0,31 );
2287 };
2288 struct
2289 {
2290 uint32_t Value;
2291 };
2292 } DW68;
2293
2294 // DW69
2295 union
2296 {
2297 struct
2298 {
2299 uint32_t SrcYSurfIndex : MOS_BITFIELD_RANGE( 0,31 );
2300 };
2301 struct
2302 {
2303 uint32_t Value;
2304 };
2305 } DW69;
2306
2307 // DW70
2308 union
2309 {
2310 struct
2311 {
2312 uint32_t MBSpecificDataSurfIndex : MOS_BITFIELD_RANGE( 0,31 );
2313 };
2314 struct
2315 {
2316 uint32_t Value;
2317 };
2318 } DW70;
2319
2320 // DW71
2321 union
2322 {
2323 struct
2324 {
2325 uint32_t AuxVmeOutSurfIndex : MOS_BITFIELD_RANGE( 0,31 );
2326 };
2327 struct
2328 {
2329 uint32_t Value;
2330 };
2331 } DW71;
2332
2333 // DW72
2334 union
2335 {
2336 struct
2337 {
2338 uint32_t CurrRefPicSelSurfIndex : MOS_BITFIELD_RANGE( 0,31 );
2339 };
2340 struct
2341 {
2342 uint32_t Value;
2343 };
2344 } DW72;
2345
2346 // DW73
2347 union
2348 {
2349 struct
2350 {
2351 uint32_t HMEMVPredFwdBwdSurfIndex : MOS_BITFIELD_RANGE( 0,31 );
2352 };
2353 struct
2354 {
2355 uint32_t Value;
2356 };
2357 } DW73;
2358
2359 // DW74
2360 union
2361 {
2362 struct
2363 {
2364 uint32_t HMEDistSurfIndex : MOS_BITFIELD_RANGE( 0,31 );
2365 };
2366 struct
2367 {
2368 uint32_t Value;
2369 };
2370 } DW74;
2371
2372 // DW75
2373 union
2374 {
2375 struct
2376 {
2377 uint32_t RefPicSelectL1SurfIndex : MOS_BITFIELD_RANGE( 0,31 );
2378 };
2379 struct
2380 {
2381 uint32_t Value;
2382 };
2383 } DW75;
2384
2385 // DW76
2386 union
2387 {
2388 struct
2389 {
2390 uint32_t FwdFrmMBDataSurfIndex : MOS_BITFIELD_RANGE( 0,31 );
2391 };
2392 struct
2393 {
2394 uint32_t Value;
2395 };
2396 } DW76;
2397
2398 // DW77
2399 union
2400 {
2401 struct
2402 {
2403 uint32_t FwdFrmMVSurfIndex : MOS_BITFIELD_RANGE( 0,31 );
2404 };
2405 struct
2406 {
2407 uint32_t Value;
2408 };
2409 } DW77;
2410
2411 // DW78
2412 union
2413 {
2414 struct
2415 {
2416 uint32_t MBQPBuffer : MOS_BITFIELD_RANGE( 0,31 );
2417 };
2418 struct
2419 {
2420 uint32_t Value;
2421 };
2422 } DW78;
2423
2424 // DW79
2425 union
2426 {
2427 struct
2428 {
2429 uint32_t MBBRCLut : MOS_BITFIELD_RANGE( 0,31 );
2430 };
2431 struct
2432 {
2433 uint32_t Value;
2434 };
2435 } DW79;
2436
2437 // DW80
2438 union
2439 {
2440 struct
2441 {
2442 uint32_t VMEInterPredictionSurfIndex : MOS_BITFIELD_RANGE( 0,31 );
2443 };
2444 struct
2445 {
2446 uint32_t Value;
2447 };
2448 } DW80;
2449
2450 // DW81
2451 union
2452 {
2453 struct
2454 {
2455 uint32_t VMEInterPredictionMRSurfIndex : MOS_BITFIELD_RANGE( 0,31 );
2456 };
2457 struct
2458 {
2459 uint32_t Value;
2460 };
2461 } DW81;
2462
2463 // DW82
2464 union
2465 {
2466 struct
2467 {
2468 uint32_t FlatnessChkSurfIndex : MOS_BITFIELD_RANGE( 0,31 );
2469 };
2470 struct
2471 {
2472 uint32_t Value;
2473 };
2474 } DW82;
2475
2476 // DW83
2477 union
2478 {
2479 struct
2480 {
2481 uint32_t MADSurfIndex : MOS_BITFIELD_RANGE( 0,31 );
2482 };
2483 struct
2484 {
2485 uint32_t Value;
2486 };
2487 } DW83;
2488
2489 // DW84
2490 union
2491 {
2492 struct
2493 {
2494 uint32_t InterDistortionSurfIndex : MOS_BITFIELD_RANGE( 0,31 );
2495 };
2496 struct
2497 {
2498 uint32_t Value;
2499 };
2500 } DW84;
2501
2502 // DW85
2503 union
2504 {
2505 struct
2506 {
2507 uint32_t Reserved : MOS_BITFIELD_RANGE( 0,31 );
2508 };
2509 struct
2510 {
2511 uint32_t Value;
2512 };
2513 } DW85;
2514
2515 // DW86
2516 union
2517 {
2518 struct
2519 {
2520 uint32_t BRCCurbeSurfIndex : MOS_BITFIELD_RANGE( 0,31 );
2521 };
2522 struct
2523 {
2524 uint32_t Value;
2525 };
2526 } DW86;
2527
2528 // DW87
2529 union
2530 {
2531 struct
2532 {
2533 uint32_t MvPredictorSurfIndex : MOS_BITFIELD_RANGE(0, 31);
2534 };
2535 struct
2536 {
2537 uint32_t Value;
2538 };
2539 } DW87;
2540
2541 // DW88
2542 union
2543 {
2544 struct
2545 {
2546 uint32_t Reserved : MOS_BITFIELD_RANGE( 0,31 );
2547 };
2548 struct
2549 {
2550 uint32_t Value;
2551 };
2552 } DW88;
2553
2554 // DW89
2555 union
2556 {
2557 struct
2558 {
2559 uint32_t Reserved : MOS_BITFIELD_RANGE( 0,31 );
2560 };
2561 struct
2562 {
2563 uint32_t Value;
2564 };
2565 } DW89;
2566
2567 // DW90
2568 union
2569 {
2570 struct
2571 {
2572 uint32_t Reserved : MOS_BITFIELD_RANGE( 0,31 );
2573 };
2574 struct
2575 {
2576 uint32_t Value;
2577 };
2578 } DW90;
2579
2580 // DW91
2581 union
2582 {
2583 struct
2584 {
2585 uint32_t Reserved : MOS_BITFIELD_RANGE( 0,31 );
2586 };
2587 struct
2588 {
2589 uint32_t Value;
2590 };
2591 } DW91;
2592
2593 // DW92
2594 union
2595 {
2596 struct
2597 {
2598 uint32_t Reserved : MOS_BITFIELD_RANGE( 0,31 );
2599 };
2600 struct
2601 {
2602 uint32_t Value;
2603 };
2604 } DW92;
2605
2606 // DW93
2607 union
2608 {
2609 struct
2610 {
2611 uint32_t Reserved : MOS_BITFIELD_RANGE( 0,31 );
2612 };
2613 struct
2614 {
2615 uint32_t Value;
2616 };
2617 } DW93;
2618
2619 // DW94
2620 union
2621 {
2622 struct
2623 {
2624 uint32_t Reserved : MOS_BITFIELD_RANGE( 0,31 );
2625 };
2626 struct
2627 {
2628 uint32_t Value;
2629 };
2630 } DW94;
2631
2632 }MBENC_CURBE_CM_FEI, *PMBENC_CURBE_CM_FEI;
2633 C_ASSERT(MOS_BYTES_TO_DWORDS(sizeof(MBENC_CURBE_CM_FEI)) == CodechalEncodeAvcEncFeiG8::m_feiMBEncCurbeSizeInDword);
2634
2635 typedef struct _PREPROC_CURBE_CM
2636 {
2637 // DW0
2638 union
2639 {
2640 struct
2641 {
2642 uint32_t SkipModeEn : MOS_BITFIELD_BIT( 0 );
2643 uint32_t AdaptiveEn : MOS_BITFIELD_BIT( 1 );
2644 uint32_t BiMixDis : MOS_BITFIELD_BIT( 2 );
2645 uint32_t : MOS_BITFIELD_RANGE( 3, 4 );
2646 uint32_t EarlyImeSuccessEn : MOS_BITFIELD_BIT( 5 );
2647 uint32_t : MOS_BITFIELD_BIT( 6 );
2648 uint32_t T8x8FlagForInterEn : MOS_BITFIELD_BIT( 7 );
2649 uint32_t : MOS_BITFIELD_RANGE( 8,23 );
2650 uint32_t EarlyImeStop : MOS_BITFIELD_RANGE( 24,31 );
2651 };
2652 struct
2653 {
2654 uint32_t Value;
2655 };
2656 } DW0;
2657
2658 // DW1
2659 union
2660 {
2661 struct
2662 {
2663 uint32_t MaxNumMVs : MOS_BITFIELD_RANGE( 0, 5 );
2664 uint32_t : MOS_BITFIELD_RANGE( 6,15 );
2665 uint32_t BiWeight : MOS_BITFIELD_RANGE( 16,21 );
2666 uint32_t : MOS_BITFIELD_RANGE( 22,27 );
2667 uint32_t UniMixDisable : MOS_BITFIELD_BIT( 28 );
2668 uint32_t : MOS_BITFIELD_RANGE( 29,31 );
2669 };
2670 struct
2671 {
2672 uint32_t Value;
2673 };
2674 } DW1;
2675
2676 // DW2
2677 union
2678 {
2679 struct
2680 {
2681 uint32_t LenSP : MOS_BITFIELD_RANGE( 0, 7 );
2682 uint32_t MaxNumSU : MOS_BITFIELD_RANGE( 8,15 );
2683 uint32_t PicWidth : MOS_BITFIELD_RANGE( 16,31 );
2684 };
2685 struct
2686 {
2687 uint32_t Value;
2688 };
2689 } DW2;
2690
2691 // DW3
2692 union
2693 {
2694 struct
2695 {
2696 uint32_t SrcSize : MOS_BITFIELD_RANGE( 0, 1 );
2697 uint32_t : MOS_BITFIELD_RANGE( 2, 3 );
2698 uint32_t MbTypeRemap : MOS_BITFIELD_RANGE( 4, 5 );
2699 uint32_t SrcAccess : MOS_BITFIELD_BIT( 6 );
2700 uint32_t RefAccess : MOS_BITFIELD_BIT( 7 );
2701 uint32_t SearchCtrl : MOS_BITFIELD_RANGE( 8,10 );
2702 uint32_t DualSearchPathOption : MOS_BITFIELD_BIT( 11 );
2703 uint32_t SubPelMode : MOS_BITFIELD_RANGE( 12,13 );
2704 uint32_t SkipType : MOS_BITFIELD_BIT( 14 );
2705 uint32_t DisableFieldCacheAlloc : MOS_BITFIELD_BIT( 15 );
2706 uint32_t InterChromaMode : MOS_BITFIELD_BIT( 16 );
2707 uint32_t FTEnable : MOS_BITFIELD_BIT( 17 );
2708 uint32_t BMEDisableFBR : MOS_BITFIELD_BIT( 18 );
2709 uint32_t BlockBasedSkipEnable : MOS_BITFIELD_BIT( 19 );
2710 uint32_t InterSAD : MOS_BITFIELD_RANGE( 20,21 );
2711 uint32_t IntraSAD : MOS_BITFIELD_RANGE( 22,23 );
2712 uint32_t SubMbPartMask : MOS_BITFIELD_RANGE( 24,30 );
2713 uint32_t : MOS_BITFIELD_BIT( 31 );
2714 };
2715 struct
2716 {
2717 uint32_t Value;
2718 };
2719 } DW3;
2720
2721 // DW4
2722 union
2723 {
2724 struct
2725 {
2726 uint32_t FrameQp : MOS_BITFIELD_RANGE( 0, 7 );
2727 uint32_t PerMBQpEnable : MOS_BITFIELD_BIT( 8 );
2728 uint32_t FieldParityFlag : MOS_BITFIELD_BIT( 9 );
2729 uint32_t HMEEnable : MOS_BITFIELD_BIT( 10 );
2730 uint32_t MultipleMVPredictorPerMBEnable : MOS_BITFIELD_RANGE( 11,12 );
2731 uint32_t DisableMvOutput : MOS_BITFIELD_BIT( 13 );
2732 uint32_t DisableMbStats : MOS_BITFIELD_BIT( 14 );
2733 uint32_t BwdRefPicFrameFieldFlag : MOS_BITFIELD_BIT( 15 );
2734 uint32_t FwdRefPicFrameFieldFlag : MOS_BITFIELD_BIT( 16 );
2735 uint32_t BwdRefPicFieldParityFlag : MOS_BITFIELD_BIT( 17 );
2736 uint32_t FwdRefPicFieldParityFlag : MOS_BITFIELD_BIT( 18 );
2737 uint32_t CurrPicFieldParityFlag : MOS_BITFIELD_BIT( 19 );
2738 uint32_t BwdRefPicEnable : MOS_BITFIELD_BIT( 20 );
2739 uint32_t FwdRefPicEnable : MOS_BITFIELD_BIT( 21 );
2740 uint32_t : MOS_BITFIELD_RANGE( 22,31 );
2741 };
2742 struct
2743 {
2744 uint32_t Value;
2745 };
2746 } DW4;
2747
2748 // DW5
2749 union
2750 {
2751 struct
2752 {
2753 uint32_t SliceMbHeight : MOS_BITFIELD_RANGE( 0,15 );
2754 uint32_t RefWidth : MOS_BITFIELD_RANGE( 16,23 );
2755 uint32_t RefHeight : MOS_BITFIELD_RANGE( 24,31 );
2756 };
2757 struct
2758 {
2759 uint32_t Value;
2760 };
2761 } DW5;
2762
2763 // DW6
2764 union
2765 {
2766 struct
2767 {
2768 uint32_t PicHeight : MOS_BITFIELD_RANGE( 0,15 );
2769 uint32_t : MOS_BITFIELD_RANGE( 16,31 );
2770 };
2771 struct
2772 {
2773 uint32_t Value;
2774 };
2775 } DW6;
2776
2777 // DW7
2778 union
2779 {
2780 struct
2781 {
2782 uint32_t IntraPartMask : MOS_BITFIELD_RANGE( 0, 4 );
2783 uint32_t NonSkipZMvAdded : MOS_BITFIELD_BIT( 5 );
2784 uint32_t NonSkipModeAdded : MOS_BITFIELD_BIT( 6 );
2785 uint32_t LumaIntraSrcCornerSwap : MOS_BITFIELD_BIT( 7 );
2786 uint32_t : MOS_BITFIELD_RANGE( 8,15 );
2787 uint32_t MVCostScaleFactor : MOS_BITFIELD_RANGE( 16,17 );
2788 uint32_t BilinearEnable : MOS_BITFIELD_BIT( 18 );
2789 uint32_t SrcFieldPolarity : MOS_BITFIELD_BIT( 19 );
2790 uint32_t WeightedSADHAAR : MOS_BITFIELD_BIT( 20 );
2791 uint32_t AConlyHAAR : MOS_BITFIELD_BIT( 21 );
2792 uint32_t RefIDCostMode : MOS_BITFIELD_BIT( 22 );
2793 uint32_t : MOS_BITFIELD_BIT( 23 );
2794 uint32_t SkipCenterMask : MOS_BITFIELD_RANGE( 24,31 );
2795 };
2796 struct
2797 {
2798 uint32_t Value;
2799 };
2800 } DW7;
2801
2802 struct
2803 {
2804 // DW8
2805 union
2806 {
2807 struct
2808 {
2809 uint32_t Mode0Cost : MOS_BITFIELD_RANGE( 0, 7 );
2810 uint32_t Mode1Cost : MOS_BITFIELD_RANGE( 8,15 );
2811 uint32_t Mode2Cost : MOS_BITFIELD_RANGE( 16,23 );
2812 uint32_t Mode3Cost : MOS_BITFIELD_RANGE( 24,31 );
2813 };
2814 struct
2815 {
2816 uint32_t Value;
2817 };
2818 } DW8;
2819
2820 // DW9
2821 union
2822 {
2823 struct
2824 {
2825 uint32_t Mode4Cost : MOS_BITFIELD_RANGE( 0, 7 );
2826 uint32_t Mode5Cost : MOS_BITFIELD_RANGE( 8,15 );
2827 uint32_t Mode6Cost : MOS_BITFIELD_RANGE( 16,23 );
2828 uint32_t Mode7Cost : MOS_BITFIELD_RANGE( 24,31 );
2829 };
2830 struct
2831 {
2832 uint32_t Value;
2833 };
2834 } DW9;
2835
2836 // DW10
2837 union
2838 {
2839 struct
2840 {
2841 uint32_t Mode8Cost : MOS_BITFIELD_RANGE( 0, 7 );
2842 uint32_t Mode9Cost : MOS_BITFIELD_RANGE( 8,15 );
2843 uint32_t RefIDCost : MOS_BITFIELD_RANGE( 16,23 );
2844 uint32_t ChromaIntraModeCost : MOS_BITFIELD_RANGE( 24,31 );
2845 };
2846 struct
2847 {
2848 uint32_t Value;
2849 };
2850 } DW10;
2851
2852 // DW11
2853 union
2854 {
2855 struct
2856 {
2857 uint32_t MV0Cost : MOS_BITFIELD_RANGE( 0, 7 );
2858 uint32_t MV1Cost : MOS_BITFIELD_RANGE( 8,15 );
2859 uint32_t MV2Cost : MOS_BITFIELD_RANGE( 16,23 );
2860 uint32_t MV3Cost : MOS_BITFIELD_RANGE( 24,31 );
2861 };
2862 struct
2863 {
2864 uint32_t Value;
2865 };
2866 } DW11;
2867
2868 // DW12
2869 union
2870 {
2871 struct
2872 {
2873 uint32_t MV4Cost : MOS_BITFIELD_RANGE( 0, 7 );
2874 uint32_t MV5Cost : MOS_BITFIELD_RANGE( 8,15 );
2875 uint32_t MV6Cost : MOS_BITFIELD_RANGE( 16,23 );
2876 uint32_t MV7Cost : MOS_BITFIELD_RANGE( 24,31 );
2877 };
2878 struct
2879 {
2880 uint32_t Value;
2881 };
2882 } DW12;
2883
2884 // DW13
2885 union
2886 {
2887 struct
2888 {
2889 uint32_t : MOS_BITFIELD_RANGE( 0, 31 );
2890 };
2891 struct
2892 {
2893 uint32_t Value;
2894 };
2895 } DW13;
2896
2897 // DW14
2898 union
2899 {
2900 struct
2901 {
2902 uint32_t SICFwdTransCoeffThreshold_0 : MOS_BITFIELD_RANGE( 0,15 );
2903 uint32_t SICFwdTransCoeffThreshold_1 : MOS_BITFIELD_RANGE( 16,23 );
2904 uint32_t SICFwdTransCoeffThreshold_2 : MOS_BITFIELD_RANGE( 24,31 );
2905 };
2906 struct
2907 {
2908 uint32_t Value;
2909 };
2910 } DW14;
2911
2912 // DW15
2913 union
2914 {
2915 struct
2916 {
2917 uint32_t SICFwdTransCoeffThreshold_3 : MOS_BITFIELD_RANGE( 0, 7 );
2918 uint32_t SICFwdTransCoeffThreshold_4 : MOS_BITFIELD_RANGE( 8,15 );
2919 uint32_t SICFwdTransCoeffThreshold_5 : MOS_BITFIELD_RANGE( 16,23 );
2920 uint32_t SICFwdTransCoeffThreshold_6 : MOS_BITFIELD_RANGE( 24,31 ); // Highest Freq
2921 };
2922 struct
2923 {
2924 uint32_t Value;
2925 };
2926 } DW15;
2927 } ModeMvCost;
2928
2929 struct
2930 {
2931 // DW16
2932 union
2933 {
2934 struct
2935 {
2936 SearchPathDelta SPDelta_0;
2937 SearchPathDelta SPDelta_1;
2938 SearchPathDelta SPDelta_2;
2939 SearchPathDelta SPDelta_3;
2940 };
2941 struct
2942 {
2943 uint32_t Value;
2944 };
2945 } DW16;
2946
2947 // DW17
2948 union
2949 {
2950 struct
2951 {
2952 SearchPathDelta SPDelta_4;
2953 SearchPathDelta SPDelta_5;
2954 SearchPathDelta SPDelta_6;
2955 SearchPathDelta SPDelta_7;
2956 };
2957 struct
2958 {
2959 uint32_t Value;
2960 };
2961 } DW17;
2962
2963 // DW18
2964 union
2965 {
2966 struct
2967 {
2968 SearchPathDelta SPDelta_8;
2969 SearchPathDelta SPDelta_9;
2970 SearchPathDelta SPDelta_10;
2971 SearchPathDelta SPDelta_11;
2972 };
2973 struct
2974 {
2975 uint32_t Value;
2976 };
2977 } DW18;
2978
2979 // DW19
2980 union
2981 {
2982 struct
2983 {
2984 SearchPathDelta SPDelta_12;
2985 SearchPathDelta SPDelta_13;
2986 SearchPathDelta SPDelta_14;
2987 SearchPathDelta SPDelta_15;
2988 };
2989 struct
2990 {
2991 uint32_t Value;
2992 };
2993 } DW19;
2994
2995 // DW20
2996 union
2997 {
2998 struct
2999 {
3000 SearchPathDelta SPDelta_16;
3001 SearchPathDelta SPDelta_17;
3002 SearchPathDelta SPDelta_18;
3003 SearchPathDelta SPDelta_19;
3004 };
3005 struct
3006 {
3007 uint32_t Value;
3008 };
3009 } DW20;
3010
3011 // DW21
3012 union
3013 {
3014 struct
3015 {
3016 SearchPathDelta SPDelta_20;
3017 SearchPathDelta SPDelta_21;
3018 SearchPathDelta SPDelta_22;
3019 SearchPathDelta SPDelta_23;
3020 };
3021 struct
3022 {
3023 uint32_t Value;
3024 };
3025 } DW21;
3026
3027 // DW22
3028 union
3029 {
3030 struct
3031 {
3032 SearchPathDelta SPDelta_24;
3033 SearchPathDelta SPDelta_25;
3034 SearchPathDelta SPDelta_26;
3035 SearchPathDelta SPDelta_27;
3036 };
3037 struct
3038 {
3039 uint32_t Value;
3040 };
3041 } DW22;
3042
3043 // DW23
3044 union
3045 {
3046 struct
3047 {
3048 SearchPathDelta SPDelta_28;
3049 SearchPathDelta SPDelta_29;
3050 SearchPathDelta SPDelta_30;
3051 SearchPathDelta SPDelta_31;
3052 };
3053 struct
3054 {
3055 uint32_t Value;
3056 };
3057 } DW23;
3058
3059 // DW24
3060 union
3061 {
3062 struct
3063 {
3064 SearchPathDelta SPDelta_32;
3065 SearchPathDelta SPDelta_33;
3066 SearchPathDelta SPDelta_34;
3067 SearchPathDelta SPDelta_35;
3068 };
3069 struct
3070 {
3071 uint32_t Value;
3072 };
3073 } DW24;
3074
3075 // DW25
3076 union
3077 {
3078 struct
3079 {
3080 SearchPathDelta SPDelta_36;
3081 SearchPathDelta SPDelta_37;
3082 SearchPathDelta SPDelta_38;
3083 SearchPathDelta SPDelta_39;
3084 };
3085 struct
3086 {
3087 uint32_t Value;
3088 };
3089 } DW25;
3090
3091 // DW26
3092 union
3093 {
3094 struct
3095 {
3096 SearchPathDelta SPDelta_40;
3097 SearchPathDelta SPDelta_41;
3098 SearchPathDelta SPDelta_42;
3099 SearchPathDelta SPDelta_43;
3100 };
3101 struct
3102 {
3103 uint32_t Value;
3104 };
3105 } DW26;
3106
3107 // DW27
3108 union
3109 {
3110 struct
3111 {
3112 SearchPathDelta SPDelta_44;
3113 SearchPathDelta SPDelta_45;
3114 SearchPathDelta SPDelta_46;
3115 SearchPathDelta SPDelta_47;
3116 };
3117 struct
3118 {
3119 uint32_t Value;
3120 };
3121 } DW27;
3122
3123 // DW28
3124 union
3125 {
3126 struct
3127 {
3128 SearchPathDelta SPDelta_48;
3129 SearchPathDelta SPDelta_49;
3130 SearchPathDelta SPDelta_50;
3131 SearchPathDelta SPDelta_51;
3132 };
3133 struct
3134 {
3135 uint32_t Value;
3136 };
3137 } DW28;
3138
3139 // DW29
3140 union
3141 {
3142 struct
3143 {
3144 SearchPathDelta SPDelta_52;
3145 SearchPathDelta SPDelta_53;
3146 SearchPathDelta SPDelta_54;
3147 SearchPathDelta SPDelta_55;
3148 };
3149 struct
3150 {
3151 uint32_t Value;
3152 };
3153 } DW29;
3154
3155 // DW30
3156 union
3157 {
3158 struct
3159 {
3160 uint32_t Intra4x4ModeMask : MOS_BITFIELD_RANGE( 0, 8 );
3161 uint32_t : MOS_BITFIELD_RANGE( 9,15 );
3162 uint32_t Intra8x8ModeMask : MOS_BITFIELD_RANGE( 16,24 );
3163 uint32_t : MOS_BITFIELD_RANGE( 25,31 );
3164 };
3165 struct
3166 {
3167 uint32_t Value;
3168 };
3169 } DW30;
3170
3171 // DW31
3172 union
3173 {
3174 struct
3175 {
3176 uint32_t Intra16x16ModeMask : MOS_BITFIELD_RANGE( 0, 3 );
3177 uint32_t IntraChromaModeMask : MOS_BITFIELD_RANGE( 4, 7 );
3178 uint32_t IntraComputeType : MOS_BITFIELD_RANGE( 8, 9 );
3179 uint32_t : MOS_BITFIELD_RANGE( 10,31 );
3180 };
3181 struct
3182 {
3183 uint32_t Value;
3184 };
3185 } DW31;
3186 } SPDelta;
3187
3188 // DW32
3189 union
3190 {
3191 struct
3192 {
3193 uint32_t MaxVmvR : MOS_BITFIELD_RANGE( 0,15 );
3194 uint32_t : MOS_BITFIELD_RANGE( 16,31 );
3195 };
3196 struct
3197 {
3198 uint32_t Value;
3199 };
3200 } DW32;
3201
3202 // DW33
3203 union
3204 {
3205 struct
3206 {
3207 uint32_t Intra16x16NonDCPredPenalty : MOS_BITFIELD_RANGE( 0,7 );
3208 uint32_t Intra8x8NonDCPredPenalty : MOS_BITFIELD_RANGE( 8,15 );
3209 uint32_t Intra4x4NonDCPredPenalty : MOS_BITFIELD_RANGE( 16,23 );
3210 uint32_t : MOS_BITFIELD_RANGE( 24,31 );
3211 };
3212 struct
3213 {
3214 uint32_t Value;
3215 };
3216 } DW33;
3217
3218 // DW34
3219 union
3220 {
3221 struct
3222 {
3223 uint32_t : MOS_BITFIELD_RANGE( 0,31 );
3224 };
3225 struct
3226 {
3227 uint32_t Value;
3228 };
3229 } DW34;
3230
3231 // DW35
3232 union
3233 {
3234 struct
3235 {
3236 uint32_t : MOS_BITFIELD_RANGE( 0,31 );
3237 };
3238 struct
3239 {
3240 uint32_t Value;
3241 };
3242 } DW35;
3243
3244 // DW36
3245 union
3246 {
3247 struct
3248 {
3249 uint32_t : MOS_BITFIELD_RANGE( 0, 7 );
3250 uint32_t HMECombinedExtraSUs : MOS_BITFIELD_RANGE( 8,15 );
3251 uint32_t : MOS_BITFIELD_RANGE( 16,29 );
3252 uint32_t HMECombineOverlap : MOS_BITFIELD_RANGE( 30,31 );
3253 };
3254 struct
3255 {
3256 uint32_t Value;
3257 };
3258 } DW36;
3259
3260 // DW37
3261 union
3262 {
3263 struct
3264 {
3265 uint32_t SkipModeEn : MOS_BITFIELD_BIT( 0 );
3266 uint32_t AdaptiveEn : MOS_BITFIELD_BIT( 1 );
3267 uint32_t BiMixDis : MOS_BITFIELD_BIT( 2 );
3268 uint32_t : MOS_BITFIELD_RANGE( 3, 4 );
3269 uint32_t EarlyImeSuccessEn : MOS_BITFIELD_BIT( 5 );
3270 uint32_t : MOS_BITFIELD_BIT( 6 );
3271 uint32_t T8x8FlagForInterEn : MOS_BITFIELD_BIT( 7 );
3272 uint32_t : MOS_BITFIELD_RANGE( 8,23 );
3273 uint32_t EarlyImeStop : MOS_BITFIELD_RANGE( 24,31 );
3274 };
3275 struct
3276 {
3277 uint32_t Value;
3278 };
3279 } DW37;
3280
3281 // DW38
3282 union
3283 {
3284 struct
3285 {
3286 uint32_t LenSP : MOS_BITFIELD_RANGE( 0, 7 );
3287 uint32_t MaxNumSU : MOS_BITFIELD_RANGE( 8,15 );
3288 uint32_t RefThreshold : MOS_BITFIELD_RANGE( 16,31 );
3289 };
3290 struct
3291 {
3292 uint32_t Value;
3293 };
3294 } DW38;
3295
3296 // DW39
3297 union
3298 {
3299 struct
3300 {
3301 uint32_t : MOS_BITFIELD_RANGE( 0, 7 );
3302 uint32_t HMERefWindowsCombThreshold : MOS_BITFIELD_RANGE( 8,15 );
3303 uint32_t RefWidth : MOS_BITFIELD_RANGE( 16,23 );
3304 uint32_t RefHeight : MOS_BITFIELD_RANGE( 24,31 );
3305 };
3306 struct
3307 {
3308 uint32_t Value;
3309 };
3310 } DW39;
3311
3312 // DW40
3313 union
3314 {
3315 struct
3316 {
3317 uint32_t CurrPicSurfIndex : MOS_BITFIELD_RANGE( 0,31 );
3318 };
3319 struct
3320 {
3321 uint32_t Value;
3322 };
3323 } DW40;
3324
3325 // DW41
3326 union
3327 {
3328 struct
3329 {
3330 uint32_t HMEMvDataSurfIndex : MOS_BITFIELD_RANGE( 0,31 );
3331 };
3332 struct
3333 {
3334 uint32_t Value;
3335 };
3336 } DW41;
3337
3338 // DW42
3339 union
3340 {
3341 struct
3342 {
3343 uint32_t MvPredictorSurfIndex : MOS_BITFIELD_RANGE( 0,31 );
3344 };
3345 struct
3346 {
3347 uint32_t Value;
3348 };
3349 } DW42;
3350
3351 // DW43
3352 union
3353 {
3354 struct
3355 {
3356 uint32_t MbQpSurfIndex : MOS_BITFIELD_RANGE( 0,31 );
3357 };
3358 struct
3359 {
3360 uint32_t Value;
3361 };
3362 } DW43;
3363
3364 // DW44
3365 union
3366 {
3367 struct
3368 {
3369 uint32_t MvDataOutSurfIndex : MOS_BITFIELD_RANGE( 0,31 );
3370 };
3371 struct
3372 {
3373 uint32_t Value;
3374 };
3375 } DW44;
3376
3377 // DW45
3378 union
3379 {
3380 struct
3381 {
3382 uint32_t MbStatsOutSurfIndex : MOS_BITFIELD_RANGE( 0,31 );
3383 };
3384 struct
3385 {
3386 uint32_t Value;
3387 };
3388 } DW45;
3389
3390 // DW46
3391 union
3392 {
3393 struct
3394 {
3395 uint32_t VMEInterPredictionSurfIndex : MOS_BITFIELD_RANGE( 0,31 );
3396 };
3397 struct
3398 {
3399 uint32_t Value;
3400 };
3401 } DW46;
3402
3403 // DW47
3404 union
3405 {
3406 struct
3407 {
3408 uint32_t VMEInterPredictionMRSurfIndex : MOS_BITFIELD_RANGE( 0,31 );
3409 };
3410 struct
3411 {
3412 uint32_t Value;
3413 };
3414 } DW47;
3415
3416 // DW48
3417 union
3418 {
3419 struct
3420 {
3421 uint32_t FtqLutSurfIndex : MOS_BITFIELD_RANGE( 0,31 );
3422 };
3423 struct
3424 {
3425 uint32_t Value;
3426 };
3427 } DW48;
3428
3429 } PREPROC_CURBE_CM, *PPREPROC_CURBE_CM;
3430
3431 #ifdef FEI_ENABLE_CMRT
3432 typedef struct _CODECHAL_ENCODE_AVC_SURFACE_IDX{
3433 union{
3434 struct{
3435 SurfaceIndex * pCmSurfIdx[28];
3436 };
3437 struct{
3438 SurfaceIndex * MBDataSurfIndex;
3439 SurfaceIndex * MVDataSurfIndex;
3440 SurfaceIndex * MBDistIndex;
3441 SurfaceIndex * SrcYSurfIndex;
3442 SurfaceIndex * MBSpecficDataSurfIndex;
3443 SurfaceIndex * AuxVmeOutSurfIndex;
3444 SurfaceIndex * CurrRefPicSelSurfIndex;
3445 SurfaceIndex * HMEMVPredFwdBwdSurfIndex;
3446 SurfaceIndex * HMEDistSurfIndex;
3447 SurfaceIndex * SliceMapSurfIndex;
3448 SurfaceIndex * FwdFrmMBDataSurfIndex;
3449 SurfaceIndex * FwdFrmMVSurfIndex;
3450 SurfaceIndex * MBQPBuffer;
3451 SurfaceIndex * MBBRCLut;
3452 SurfaceIndex * MBVMEInterPredictionSurfIndex;
3453 SurfaceIndex * MBVMEInterPredictionMRSurfIndex;
3454 SurfaceIndex * MBstats;
3455 SurfaceIndex * MADSurfIndex;
3456 SurfaceIndex * ForceNonSkipMBMap;
3457 SurfaceIndex * ReservedIndex;
3458 SurfaceIndex * BRCCurbeSurfIndex;
3459 SurfaceIndex * StaticDetectionCostTableIndex;
3460 SurfaceIndex * FEI_MVPredSurfIndex;
3461 SurfaceIndex * L1RefPicSelSurfIndex;
3462 SurfaceIndex * Flatnesschk;
3463 SurfaceIndex * InterDistortionIndex;
3464 SurfaceIndex * BestInterIntraSurfIndex;
3465 SurfaceIndex * Reserved0;
3466 };
3467 };
3468 }CODECHAL_ENCODE_AVC_SURFACE_IDX, *PCODECHAL_ENCODE_AVC_SURFACE_IDX;
3469
3470 typedef struct _CODECHAL_ENCODE_AVC_MBENC_DISPATCH_PARAMS
3471 {
3472 CodechalEncodeMdfKernelResource* kernelRes;
3473 PCODECHAL_ENCODE_AVC_SURFACE_IDX avcMBEncSurface;
3474 uint16_t frameWidthInMBs;
3475 uint16_t sliceHeight;
3476 uint16_t numSlices;
3477 uint16_t sliceType;
3478 uint32_t numMBs;
3479 bool enableArbitrarySliceSize;
3480 uint8_t enableWavefrontOptimization;
3481 uint8_t reserved0;
3482 uint8_t reserved1;
3483 uint8_t reserved2;
3484 }CODECHAL_ENCODE_AVC_MBENC_DISPATCH_PARAMS, *PCODECHAL_ENCODE_AVC_MBENC_DISPATCH_PARAMS;
3485 #endif
3486
3487 C_ASSERT(MOS_BYTES_TO_DWORDS(sizeof(PREPROC_CURBE_CM)) == 49);
3488
3489 // AVC FEI MBEnc CURBE init data for G9 Kernel
3490 const uint32_t CodechalEncodeAvcEncFeiG8::m_feiMbEncCurbeNormalIFrame[m_feiMBEncCurbeSizeInDword] =
3491 {
3492 0x00000082, 0x00000000, 0x00003910, 0x00a83000, 0x00000000, 0x28300000, 0x05000000, 0x00000000,
3493 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
3494 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
3495 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
3496 0x80800000, 0x00040c24, 0x00000000, 0xffff00ff, 0x40000000, 0x00000080, 0x00003900, 0x28301000,
3497 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000002,
3498 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
3499 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
3500 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff,
3501 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff,
3502 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff,
3503 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff
3504 };
3505
3506 const uint32_t CodechalEncodeAvcEncFeiG8::m_feiMbEncCurbeNormalIField[m_feiMBEncCurbeSizeInDword] =
3507 {
3508 0x00000082, 0x00000000, 0x00003910, 0x00a830c0, 0x02000000, 0x28300000, 0x05000000, 0x00000000,
3509 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
3510 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
3511 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
3512 0x80800000, 0x00040c24, 0x00000000, 0xffff00ff, 0x40000000, 0x00000080, 0x00003900, 0x28301000,
3513 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000002,
3514 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
3515 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
3516 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff,
3517 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff,
3518 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff,
3519 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff
3520 };
3521
3522 const uint32_t CodechalEncodeAvcEncFeiG8::m_feiMbEncCurbeNormalPFrame[m_feiMBEncCurbeSizeInDword] =
3523 {
3524 0x000000a3, 0x00000008, 0x00003910, 0x00ae3000, 0x30000000, 0x28300000, 0x05000000, 0x01400060,
3525 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
3526 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
3527 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
3528 0x80010000, 0x00040c24, 0x00000000, 0xffff00ff, 0x60000000, 0x000000a1, 0x00003900, 0x28301000,
3529 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x08000002,
3530 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
3531 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
3532 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff,
3533 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff,
3534 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff,
3535 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff
3536 };
3537
3538 const uint32_t CodechalEncodeAvcEncFeiG8::m_feiMbEncCurbeNormalPfield[m_feiMBEncCurbeSizeInDword] =
3539 {
3540 0x000000a3, 0x00000008, 0x00003910, 0x00ae30c0, 0x30000000, 0x28300000, 0x05000000, 0x01400060,
3541 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
3542 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
3543 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
3544 0x80010000, 0x00040c24, 0x00000000, 0xffff00ff, 0x40000000, 0x000000a1, 0x00003900, 0x28301000,
3545 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x04000002,
3546 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
3547 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
3548 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff,
3549 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff,
3550 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff,
3551 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff
3552
3553 };
3554
3555 const uint32_t CodechalEncodeAvcEncFeiG8::m_feiMbEncCurbeNormalBFrame[m_feiMBEncCurbeSizeInDword] =
3556 {
3557 0x000000a3, 0x00200008, 0x00003910, 0x00aa7700, 0x50020000, 0x20200000, 0x05000000, 0xff400000,
3558 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
3559 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
3560 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
3561 0x01010000, 0x00040c24, 0x00000000, 0xffff00ff, 0x60000000, 0x000000a1, 0x00003900, 0x28301000,
3562 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x08000002,
3563 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
3564 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
3565 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff,
3566 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff,
3567 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff,
3568 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff
3569 };
3570
3571 const uint32_t CodechalEncodeAvcEncFeiG8::m_feiMbEncCurbeNormalBField[m_feiMBEncCurbeSizeInDword] =
3572 {
3573 0x000000a3, 0x00200008, 0x00003919, 0x00aa77c0, 0x50020000, 0x20200000, 0x05000000, 0xff400000,
3574 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
3575 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
3576 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
3577 0x01010000, 0x00040c24, 0x00000000, 0xffff00ff, 0x40000000, 0x000000a1, 0x00003900, 0x28301000,
3578 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x04000002,
3579 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
3580 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
3581 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff,
3582 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff,
3583 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff,
3584 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff
3585
3586 };
3587
3588 // FEI AVC I_DIST CURBE init data for G9 Kernel
3589 const uint32_t CodechalEncodeAvcEncFeiG8::m_feiMbEncCurbeIFrameDist[m_feiMBEncCurbeSizeInDword] =
3590 {
3591 0x00000082, 0x00200008, 0x001e3910, 0x00a83000, 0x90000000, 0x28300000, 0x00000000, 0x00000000,
3592 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0xff000000, 0x00000000, 0x00000000,
3593 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
3594 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000100,
3595 0x80800000, 0x00000000, 0x00000800, 0xffff00ff, 0x40000000, 0x00000080, 0x00003900, 0x28300000,
3596 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
3597 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
3598 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
3599 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff,
3600 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff,
3601 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff,
3602 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff
3603 };
3604
3605 typedef enum _CODECHAL_ENCODE_AVC_BINDING_TABLE_OFFSET_PREPROC_CM_G8
3606 {
3607 CODECHAL_ENCODE_AVC_PREPROC_CURR_Y_CM_G8 = 0,
3608 CODECHAL_ENCODE_AVC_PREPROC_CURR_UV_CM_G8 = 1,
3609 CODECHAL_ENCODE_AVC_PREPROC_HME_MV_DATA_CM_G8 = 2,
3610 CODECHAL_ENCODE_AVC_PREPROC_MV_PREDICTOR_CM_G8 = 3,
3611 CODECHAL_ENCODE_AVC_PREPROC_MBQP_CM_G8 = 4,
3612 CODECHAL_ENCODE_AVC_PREPROC_MV_DATA_CM_G8 = 5,
3613 CODECHAL_ENCODE_AVC_PREPROC_MB_STATS_CM_G8 = 6,
3614 CODECHAL_ENCODE_AVC_PREPROC_VME_CURR_PIC_IDX_0_CM_G8 = 7,
3615 CODECHAL_ENCODE_AVC_PREPROC_VME_FWD_PIC_IDX0_CM_G8 = 8,
3616 CODECHAL_ENCODE_AVC_PREPROC_VME_BWD_PIC_IDX0_0_CM_G8 = 9,
3617 CODECHAL_ENCODE_AVC_PREPROC_VME_CURR_PIC_IDX_1_CM_G8 = 10,
3618 CODECHAL_ENCODE_AVC_PREPROC_VME_BWD_PIC_IDX0_1_CM_G8 = 11,
3619 CODECHAL_ENCODE_AVC_PREPROC_RESERVED1_CM_G8 = 12,
3620 CODECHAL_ENCODE_AVC_PREPROC_FTQ_LUT_CM_G8 = 13,
3621 CODECHAL_ENCODE_AVC_PREPROC_NUM_SURFACES_CM_G8 = 14
3622 } CODECHAL_ENCODE_AVC_BINDING_TABLE_OFFSET_PREPROC_CM_G8;
3623
3624 typedef enum _CODECHAL_ENCODE_AVC_BINDING_TABLE_OFFSET_PREPROC_FIELD_CM_G8
3625 {
3626 CODECHAL_ENCODE_AVC_PREPROC_VME_FIELD_CURR_PIC_IDX_0_CM_G8 = 7,
3627 CODECHAL_ENCODE_AVC_PREPROC_VME_FIELD_FWD_PIC_IDX0_0_CM_G8 = 8,
3628 CODECHAL_ENCODE_AVC_PREPROC_FIELD_RESERVED0_CM_G8 = 9,
3629 CODECHAL_ENCODE_AVC_PREPROC_VME_FIELD_FWD_PIC_IDX0_1_CM_G8 = 10,
3630 CODECHAL_ENCODE_AVC_PREPROC_FIELD_RESERVED1_CM_G8 = 11,
3631 CODECHAL_ENCODE_AVC_PREPROC_VME_FIELD_CURR_PIC_IDX_1_CM_G8 = 12,
3632 CODECHAL_ENCODE_AVC_PREPROC_VME_FIELD_BWD_PIC_IDX0_0_CM_G8 = 13,
3633 CODECHAL_ENCODE_AVC_PREPROC_FIELD_RESERVED2_CM_G8 = 14,
3634 CODECHAL_ENCODE_AVC_PREPROC_VME_FIELD_BWD_PIC_IDX0_1_CM_G8 = 15,
3635 CODECHAL_ENCODE_AVC_PREPROC_FIELD_RESERVED3_CM_G8 = 16,
3636 CODECHAL_ENCODE_AVC_PREPROC_FIELD_FTQ_LUT_CM_G8 = 17,
3637 CODECHAL_ENCODE_AVC_PREPROC_FIELD_NUM_SURFACES_CM_G8 = 18
3638 } CODECHAL_ENCODE_AVC_BINDING_TABLE_OFFSET_PREPROC_FIELD_CM_G8;
3639
CodechalEncodeAvcEncFeiG8(CodechalHwInterface * hwInterface,CodechalDebugInterface * debugInterface,PCODECHAL_STANDARD_INFO standardInfo)3640 CodechalEncodeAvcEncFeiG8::CodechalEncodeAvcEncFeiG8(
3641 CodechalHwInterface * hwInterface,
3642 CodechalDebugInterface *debugInterface,
3643 PCODECHAL_STANDARD_INFO standardInfo) : CodechalEncodeAvcEncG8(hwInterface, debugInterface, standardInfo)
3644 {
3645 CODECHAL_ENCODE_FUNCTION_ENTER;
3646
3647 m_cmKernelEnable = true;
3648 bHighTextureModeCostEnable = false;
3649
3650 #ifdef FEI_ENABLE_CMRT
3651 m_avcCmSurfIdx = nullptr;
3652 m_avcCmSurfIdx = MOS_New(CODECHAL_ENCODE_AVC_SURFACE_IDX);
3653 #endif
3654 this->pfnGetKernelHeaderAndSize = this->EncodeGetKernelHeaderAndSize;
3655 m_feiEnable = true;
3656
3657 if (m_codecFunction == CODECHAL_FUNCTION_FEI_PRE_ENC)
3658 {
3659 m_hmeSupported = true;
3660 m_flatnessCheckSupported = true;
3661 }
3662
3663 m_16xMeSupported = false;
3664 m_32xMeSupported = false;
3665
3666 //FEI output Stats which is a superset of MbStats buffer, so no need for MbStats
3667 m_mbStatsSupported = false;
3668 m_kuid = IDR_CODEC_AllAVCEnc_FEI;
3669 AddIshSize(m_kuid, m_kernelBase);
3670 }
3671
~CodechalEncodeAvcEncFeiG8()3672 CodechalEncodeAvcEncFeiG8::~CodechalEncodeAvcEncFeiG8()
3673 {
3674 #ifdef FEI_ENABLE_CMRT
3675 CodecHalEncode_DestroyMDFKernelResource(this,&m_resMBEncKernel);
3676 CodecHalEncode_DestroyMDFKernelResource(this,&m_resPreProcKernel);
3677 CodecHalEncode_DestroyMDFKernelResource(this,&m_resMEKernel);
3678 CodecHalEncode_DestroyMDFKernelResource(this,&resDSKernel);
3679 if(nullptr != m_avcCmSurfIdx)
3680 {
3681 MOS_Delete((PCODECHAL_ENCODE_AVC_SURFACE_IDX)m_avcCmSurfIdx);
3682 m_avcCmSurfIdx = nullptr;
3683 }
3684 #endif
3685 }
3686
InitializePicture(const EncoderParams & params)3687 MOS_STATUS CodechalEncodeAvcEncFeiG8::InitializePicture(const EncoderParams& params)
3688 {
3689 CODECHAL_ENCODE_FUNCTION_ENTER;
3690 if (m_codecFunction == CODECHAL_FUNCTION_FEI_PRE_ENC)
3691 {
3692 return EncodePreEncInitialize(params);
3693 }
3694 else
3695 {
3696 return CodechalEncodeAvcEnc::InitializePicture( params);
3697 }
3698 }
3699
EncodePreEncInitialize(const EncoderParams & params)3700 MOS_STATUS CodechalEncodeAvcEncFeiG8::EncodePreEncInitialize(const EncoderParams& params)
3701 {
3702 MOS_STATUS eStatus = MOS_STATUS_SUCCESS;
3703
3704 CODECHAL_ENCODE_FUNCTION_ENTER;
3705
3706 auto preEncParams = (FeiPreEncParams*)params.pPreEncParams;
3707
3708 CODECHAL_ENCODE_CHK_NULL_RETURN(m_osInterface);
3709 CODECHAL_ENCODE_CHK_NULL_RETURN(preEncParams->psCurrOriginalSurface);
3710
3711 auto avcRefList = &m_refList[0];
3712 auto avcPicIdx = &m_picIdx[0];
3713
3714 CodecHalGetResourceInfo(m_osInterface, preEncParams->psCurrOriginalSurface);
3715 m_rawSurface = *(preEncParams->psCurrOriginalSurface);
3716 m_rawSurfaceToEnc =
3717 m_rawSurfaceToPak = &m_rawSurface;
3718 m_targetUsage = TARGETUSAGE_RT_SPEED;
3719 m_kernelMode = CodecHal_TargetUsageToMode_AVC[m_targetUsage];
3720 m_flatnessCheckEnabled = m_flatnessCheckSupported;
3721
3722 auto prevPic = m_currOriginalPic;
3723 uint8_t prevIdx = prevPic.FrameIdx;
3724 uint8_t currIdx = preEncParams->CurrOriginalPicture.FrameIdx;
3725 bool firstFieldInput = (prevPic.PicFlags == PICTURE_INVALID) && ((preEncParams->CurrOriginalPicture.PicFlags == PICTURE_TOP_FIELD) || (preEncParams->CurrOriginalPicture.PicFlags == PICTURE_BOTTOM_FIELD));
3726
3727 avcRefList[currIdx]->sRefBuffer = avcRefList[currIdx]->sRefRawBuffer = m_rawSurface;
3728 avcRefList[currIdx]->RefPic = m_currOriginalPic;
3729 avcRefList[currIdx]->bUsedAsRef = true;
3730
3731 // FEI PreEnc doesn't have CurrReconstructedPicture, here we set m_currReconstructedPic = pPreEncParams->CurrOriginalPicture
3732 // so it can resue the AVC functions.
3733 m_currOriginalPic = preEncParams->CurrOriginalPicture;
3734 m_currReconstructedPic = preEncParams->CurrOriginalPicture;
3735 m_currRefList = m_refList[m_currOriginalPic.FrameIdx];
3736
3737 uint8_t numRef = 0;
3738 for (uint8_t i = 0; i < CODEC_AVC_MAX_NUM_REF_FRAME; i++)
3739 {
3740 avcPicIdx[i].bValid = false;
3741 }
3742
3743 // FEI only support one past and one future reference picture now
3744 uint8_t index;
3745 if (preEncParams->dwNumPastReferences > 0)
3746 {
3747 CODECHAL_ENCODE_ASSERT(preEncParams->dwNumPastReferences == 1);
3748 CODECHAL_ENCODE_ASSERT(!CodecHal_PictureIsInvalid(preEncParams->PastRefPicture));
3749 index = preEncParams->PastRefPicture.FrameIdx;
3750 avcPicIdx[numRef].bValid = true;
3751 avcPicIdx[numRef].ucPicIdx = index;
3752 avcRefList[index]->RefPic.PicFlags =
3753 CodecHal_CombinePictureFlags(avcRefList[index]->RefPic, preEncParams->PastRefPicture);
3754 avcRefList[currIdx]->RefList[numRef] = preEncParams->PastRefPicture;
3755 numRef++;
3756 }
3757
3758 if (preEncParams->dwNumFutureReferences > 0)
3759 {
3760 CODECHAL_ENCODE_ASSERT(preEncParams->dwNumFutureReferences == 1);
3761 CODECHAL_ENCODE_ASSERT(!CodecHal_PictureIsInvalid(preEncParams->FutureRefPicture))
3762 index = preEncParams->FutureRefPicture.FrameIdx;
3763 avcPicIdx[numRef].bValid = true;
3764 avcPicIdx[numRef].ucPicIdx = index;
3765 avcRefList[index]->RefPic.PicFlags =
3766 CodecHal_CombinePictureFlags(avcRefList[index]->RefPic, preEncParams->FutureRefPicture);
3767 avcRefList[currIdx]->RefList[numRef] = preEncParams->FutureRefPicture;
3768 numRef++;
3769 }
3770 avcRefList[currIdx]->ucNumRef = numRef;
3771
3772 m_verticalLineStride = CODECHAL_VLINESTRIDE_FRAME;
3773 m_verticalLineStrideOffset = CODECHAL_VLINESTRIDEOFFSET_TOP_FIELD;
3774 m_meDistortionBottomFieldOffset = 0;
3775 m_meMvBottomFieldOffset = 0;
3776
3777 if (CodecHal_PictureIsField(m_currOriginalPic))
3778 {
3779 m_frameFieldHeight = ((m_frameHeight + 1) >> 1);
3780 m_frameFieldHeightInMb = ((m_picHeightInMb + 1) >> 1);
3781 m_downscaledFrameFieldHeightInMb4x = ((m_downscaledHeightInMb4x + 1) >> 1);
3782 m_downscaledFrameFieldHeightInMb16x = ((m_downscaledHeightInMb16x + 1) >> 1);
3783 m_downscaledFrameFieldHeightInMb32x = ((m_downscaledHeightInMb32x + 1) >> 1);
3784 if (CodecHal_PictureIsFrame(prevPic) || prevIdx != currIdx || firstFieldInput)
3785 {
3786 m_firstField = 1;
3787 }
3788 else
3789 {
3790 m_firstField = 0;
3791 }
3792
3793 m_verticalLineStride = CODECHAL_VLINESTRIDE_FIELD;
3794 m_frameHeight = m_frameFieldHeightInMb * 2 * 16;
3795 m_picHeightInMb = (uint16_t)(m_frameHeight / 16);
3796 m_mbvProcStatsBottomFieldOffset = 0;
3797
3798 if (CodecHal_PictureIsBottomField(m_currOriginalPic))
3799 {
3800 m_verticalLineStrideOffset = CODECHAL_VLINESTRIDEOFFSET_BOT_FIELD;
3801
3802 m_meDistortionBottomFieldOffset =
3803 MOS_ALIGN_CEIL((m_downscaledWidthInMb4x * 8), 64) *
3804 MOS_ALIGN_CEIL((m_downscaledFrameFieldHeightInMb4x * 4 * 10), 8);
3805 m_meMvBottomFieldOffset =
3806 MOS_ALIGN_CEIL((m_downscaledWidthInMb4x * 32), 64) *
3807 (m_downscaledFrameFieldHeightInMb4x * 4);
3808 }
3809 }
3810 else
3811 {
3812 m_frameFieldHeight = m_frameHeight;
3813 m_frameFieldHeightInMb = m_picHeightInMb;
3814 m_downscaledFrameFieldHeightInMb4x = m_downscaledHeightInMb4x;
3815 m_downscaledFrameFieldHeightInMb16x = m_downscaledHeightInMb16x;
3816 m_downscaledFrameFieldHeightInMb32x = m_downscaledHeightInMb32x;
3817 m_firstField = 1;
3818 }
3819
3820 if ((preEncParams->bDisableMVOutput == 1) && (preEncParams->bDisableStatisticsOutput == 1))
3821 {
3822 m_hmeEnabled = false;
3823 }
3824 else
3825 {
3826 m_hmeEnabled = (preEncParams->dwNumPastReferences + preEncParams->dwNumFutureReferences) > 0 ? true : false;
3827 }
3828 m_scalingEnabled = m_firstField && preEncParams->bInputUpdated;
3829 m_useRawForRef = m_userFlags.bUseRawPicForRef;
3830
3831 m_scalingEnabled = (m_hmeSupported || bBrcEnabled) && m_firstField;
3832
3833 // PREENC doesn't differentiate picture by its "PictureCodingType". However in order to reuse the CODECHAL function,
3834 // we manually assign the PictureCodingType given its past/future references.
3835 if (preEncParams->dwNumFutureReferences > 0)
3836 {
3837 m_pictureCodingType = B_TYPE;
3838 }
3839 else if (preEncParams->dwNumPastReferences > 0)
3840 {
3841 m_pictureCodingType = P_TYPE;
3842 }
3843 else
3844 {
3845 m_pictureCodingType = I_TYPE;
3846 }
3847
3848 CODECHAL_ENCODE_CHK_STATUS_RETURN(SetStatusReportParams(
3849 m_refList[m_currOriginalPic.FrameIdx]));
3850
3851 CODECHAL_DEBUG_TOOL(
3852 m_debugInterface->m_currPic = m_currOriginalPic;
3853 m_debugInterface->m_bufferDumpFrameNum = m_storeData;
3854 m_debugInterface->m_frameType = m_pictureCodingType;)
3855
3856 return eStatus;
3857 }
3858
ExecuteKernelFunctions()3859 MOS_STATUS CodechalEncodeAvcEncFeiG8::ExecuteKernelFunctions()
3860 {
3861 if (m_codecFunction == CODECHAL_FUNCTION_FEI_PRE_ENC)
3862 {
3863 return EncodePreEncKernelFunctions();
3864 }
3865 else
3866 {
3867 #ifdef FEI_ENABLE_CMRT
3868 return EncodeMbEncKernelFunctions();
3869 #else
3870 return CodechalEncodeAvcEncG8::ExecuteKernelFunctions();
3871 #endif
3872 }
3873 }
3874
EncodePreEncKernelFunctions()3875 MOS_STATUS CodechalEncodeAvcEncFeiG8::EncodePreEncKernelFunctions()
3876 {
3877 MOS_STATUS eStatus = MOS_STATUS_SUCCESS;
3878
3879 CODECHAL_ENCODE_FUNCTION_ENTER;
3880
3881 auto preEncParams = (FeiPreEncParams*)m_encodeParams.pPreEncParams;
3882 auto avcRefList = &m_refList[0];
3883
3884 CODECHAL_DEBUG_TOOL(CODECHAL_ENCODE_CHK_STATUS_RETURN(m_debugInterface->DumpYUVSurface(
3885 m_rawSurfaceToEnc,
3886 CodechalDbgAttr::attrEncodeRawInputSurface,
3887 "SrcSurf"))
3888 );
3889
3890 // save these 2 flags
3891 auto firstField = m_firstField;
3892 auto currRefList = m_currRefList;
3893
3894 // Scaling, HME and PreProc are included in the same task phase
3895 m_lastEncPhase = true;
3896 m_firstTaskInPhase = true;
3897
3898 UpdateSSDSliceCount();
3899
3900 m_trackedBuf->ResetUsedForCurrFrame();
3901
3902 bool dsSurfaceInCache;
3903 uint8_t scaledIdx = m_trackedBuf->PreencLookUpBufIndex(m_currOriginalPic.FrameIdx, &dsSurfaceInCache);
3904 m_trackedBuf->AllocateForCurrFramePreenc(scaledIdx);
3905 CODECHAL_ENCODE_CHK_STATUS_RETURN(m_trackedBuf->AllocateSurfaceDS());
3906
3907 bool dsPastRefInCache = false;
3908 bool callDsPastRef = false;
3909 uint8_t pastRefScaledIdx = 0;
3910 if (preEncParams->dwNumPastReferences > 0)
3911 {
3912 pastRefScaledIdx = m_trackedBuf->PreencLookUpBufIndex(preEncParams->PastRefPicture.FrameIdx, &dsPastRefInCache);
3913 if ((!preEncParams->bPastRefUpdated) && dsPastRefInCache)
3914 {
3915 CODECHAL_ENCODE_VERBOSEMESSAGE("find PastRef Downscaled Surface in cache, so skip DS");
3916 }
3917 else
3918 {
3919 callDsPastRef = true;
3920 }
3921 }
3922
3923 bool dsFutureRefInCache = false;
3924 bool callDsFutureRef = false;
3925 uint8_t futureRefScaledIdx = 0;
3926 if (preEncParams->dwNumFutureReferences > 0)
3927 {
3928 futureRefScaledIdx = m_trackedBuf->PreencLookUpBufIndex(preEncParams->FutureRefPicture.FrameIdx, &dsFutureRefInCache);
3929 if ((!preEncParams->bFutureRefUpdated) && dsFutureRefInCache)
3930 {
3931 CODECHAL_ENCODE_VERBOSEMESSAGE("find FutureRef Downscaled Surface in cache, so skip DS");
3932 }
3933 else
3934 {
3935 callDsFutureRef = true;
3936 }
3937 }
3938
3939 bool callPreEncKernel = (preEncParams->bDisableMVOutput == 0) || (preEncParams->bDisableStatisticsOutput == 0);
3940
3941 CodechalEncodeCscDs::KernelParams cscScalingKernelParams;
3942 #ifdef FEI_ENABLE_CMRT
3943 m_dsKernelIdx = 0;
3944 #endif
3945 if ((!preEncParams->bCurPicUpdated) && dsSurfaceInCache)
3946 {
3947 CODECHAL_ENCODE_VERBOSEMESSAGE("find Downscaled Surface in cache, so skip DS");
3948 }
3949 else
3950 {
3951 if (!preEncParams->bCurPicUpdated)
3952 {
3953 CODECHAL_ENCODE_VERBOSEMESSAGE("Cannot find matched Downscaled Surface, DS again");
3954 }
3955 if (scaledIdx == CODEC_NUM_TRACKED_BUFFERS)
3956 {
3957 CODECHAL_ENCODE_ASSERTMESSAGE("Cannot find empty DS slot for preenc.");
3958 eStatus = MOS_STATUS_INVALID_PARAMETER;
3959 return eStatus;
3960 }
3961
3962 m_firstField = preEncParams->bCurPicUpdated ? 1 : m_firstField;
3963 m_currRefList->ucScalingIdx = scaledIdx;
3964 m_currRefList->b4xScalingUsed = false;
3965 m_currRefList->b16xScalingUsed = false;
3966 m_currRefList->b32xScalingUsed = false;
3967
3968 MOS_ZeroMemory(&cscScalingKernelParams, sizeof(cscScalingKernelParams));
3969 cscScalingKernelParams.bLastTaskInPhase4xDS = !(callDsPastRef || callDsFutureRef || m_hmeEnabled || callPreEncKernel);
3970 cscScalingKernelParams.b32xScalingInUse = false;
3971 cscScalingKernelParams.b16xScalingInUse = false;
3972 cscScalingKernelParams.bLastTaskInPhase4xDS = !m_hmeEnabled;
3973 #ifdef FEI_ENABLE_CMRT
3974 CODECHAL_ENCODE_CHK_STATUS_RETURN(EncodeScalingKernel(&cscScalingKernelParams));
3975 m_dsKernelIdx ++;
3976 #else
3977 CODECHAL_ENCODE_CHK_STATUS_RETURN(m_cscDsState->DsKernel(&cscScalingKernelParams));
3978 #endif
3979
3980 }
3981
3982 // Scaling for Past ref
3983 if (callDsPastRef)
3984 {
3985 if (!preEncParams->bPastRefUpdated)
3986 {
3987 CODECHAL_ENCODE_VERBOSEMESSAGE("Cannot find matched Downscaled Surface, DS again");
3988 }
3989 if (pastRefScaledIdx == CODEC_NUM_TRACKED_BUFFERS)
3990 {
3991 CODECHAL_ENCODE_ASSERTMESSAGE("Cannot find empty DS slot for preenc.");
3992 eStatus = MOS_STATUS_INVALID_PARAMETER;
3993 return eStatus;
3994 }
3995
3996 uint8_t pastRefIdx = preEncParams->PastRefPicture.FrameIdx;
3997 avcRefList[pastRefIdx]->sRefBuffer = avcRefList[pastRefIdx]->sRefRawBuffer = preEncParams->sPastRefSurface;
3998 avcRefList[pastRefIdx]->RefPic = preEncParams->PastRefPicture;
3999 avcRefList[pastRefIdx]->bUsedAsRef = true;
4000 m_firstField = true;
4001 m_currRefList = avcRefList[pastRefIdx];
4002 m_currRefList->ucScalingIdx = pastRefScaledIdx;
4003 m_currRefList->b4xScalingUsed = false;
4004 m_currRefList->b16xScalingUsed = false;
4005 m_currRefList->b32xScalingUsed = false;
4006
4007 MOS_ZeroMemory(&cscScalingKernelParams, sizeof(cscScalingKernelParams));
4008 cscScalingKernelParams.bLastTaskInPhase4xDS = !(callDsFutureRef || m_hmeEnabled || callPreEncKernel);
4009 cscScalingKernelParams.b32xScalingInUse = false;
4010 cscScalingKernelParams.b16xScalingInUse = false;
4011 cscScalingKernelParams.bRawInputProvided = true;
4012 cscScalingKernelParams.bScalingforRef = true;
4013 cscScalingKernelParams.sInputRawSurface = preEncParams->sPastRefSurface;
4014 cscScalingKernelParams.inputPicture = preEncParams->PastRefPicture;
4015
4016 if (preEncParams->bPastRefStatsNeeded)
4017 {
4018 cscScalingKernelParams.sInputStatsBuffer = preEncParams->sPastRefStatsBuffer;
4019 if (CodecHal_PictureIsField(m_currOriginalPic))
4020 {
4021 cscScalingKernelParams.sInputStatsBotFieldBuffer = preEncParams->sPastRefStatsBotFieldBuffer;
4022 }
4023 cscScalingKernelParams.bStatsInputProvided = true;
4024 }
4025 #ifdef FEI_ENABLE_CMRT
4026 CODECHAL_ENCODE_CHK_STATUS_RETURN(EncodeScalingKernel(&cscScalingKernelParams));
4027 m_dsKernelIdx++;
4028 #else
4029 m_trackedBuf->AllocateForCurrFramePreenc(pastRefScaledIdx);
4030 CODECHAL_ENCODE_CHK_STATUS_RETURN(m_cscDsState->DsKernel(&cscScalingKernelParams));
4031 #endif
4032 }
4033
4034 // Scaling for Future ref
4035 if (callDsFutureRef)
4036 {
4037 if (!preEncParams->bFutureRefUpdated)
4038 {
4039 CODECHAL_ENCODE_VERBOSEMESSAGE("Cannot find matched Downscaled Surface, DS again");
4040 }
4041 if (futureRefScaledIdx == CODEC_NUM_TRACKED_BUFFERS)
4042 {
4043 CODECHAL_ENCODE_ASSERTMESSAGE("Cannot find empty DS slot for preenc.");
4044 eStatus = MOS_STATUS_INVALID_PARAMETER;
4045 return eStatus;
4046 }
4047
4048 uint8_t futureRefIdx = preEncParams->FutureRefPicture.FrameIdx;
4049 avcRefList[futureRefIdx]->sRefBuffer = avcRefList[futureRefIdx]->sRefRawBuffer = preEncParams->sFutureRefSurface;
4050 avcRefList[futureRefIdx]->RefPic = preEncParams->FutureRefPicture;
4051 avcRefList[futureRefIdx]->bUsedAsRef = true;
4052 m_firstField = true;
4053 m_currRefList = avcRefList[futureRefIdx];
4054 m_currRefList->ucScalingIdx = futureRefScaledIdx;
4055 m_currRefList->b4xScalingUsed = false;
4056 m_currRefList->b16xScalingUsed = false;
4057 m_currRefList->b32xScalingUsed = false;
4058
4059 m_lastTaskInPhase = false;
4060 MOS_ZeroMemory(&cscScalingKernelParams, sizeof(cscScalingKernelParams));
4061 cscScalingKernelParams.bLastTaskInPhase4xDS = !(m_hmeEnabled || callPreEncKernel);
4062 cscScalingKernelParams.b32xScalingInUse = false;
4063 cscScalingKernelParams.b16xScalingInUse = false;
4064 cscScalingKernelParams.bRawInputProvided = true;
4065 cscScalingKernelParams.bScalingforRef = true;
4066 cscScalingKernelParams.sInputRawSurface = preEncParams->sFutureRefSurface;
4067 cscScalingKernelParams.inputPicture = preEncParams->FutureRefPicture;
4068
4069 if (preEncParams->bFutureRefStatsNeeded)
4070 {
4071 cscScalingKernelParams.sInputStatsBuffer = preEncParams->sFutureRefStatsBuffer;
4072 if (CodecHal_PictureIsField(m_currOriginalPic))
4073 {
4074 cscScalingKernelParams.sInputStatsBotFieldBuffer = preEncParams->sFutureRefStatsBotFieldBuffer;
4075 }
4076 cscScalingKernelParams.bStatsInputProvided = true;
4077 }
4078 #ifdef FEI_ENABLE_CMRT
4079 CODECHAL_ENCODE_CHK_STATUS_RETURN(EncodeScalingKernel(&cscScalingKernelParams));
4080 m_dsKernelIdx++;
4081 #else
4082 m_trackedBuf->AllocateForCurrFramePreenc(futureRefScaledIdx);
4083 CODECHAL_ENCODE_CHK_STATUS_RETURN(m_cscDsState->DsKernel(&cscScalingKernelParams));
4084 #endif
4085 }
4086
4087 m_firstField = firstField;
4088 m_currRefList = currRefList;
4089
4090 if (m_hmeEnabled)
4091 {
4092 CODEC_AVC_ENCODE_SLICE_PARAMS avcSliceParams;
4093
4094 memset(&avcSliceParams, 0, sizeof(CODEC_AVC_ENCODE_SLICE_PARAMS));
4095 if (preEncParams->dwNumPastReferences > 0)
4096 {
4097 avcSliceParams.num_ref_idx_l0_active_minus1 = 0;
4098 avcSliceParams.RefPicList[LIST_0][0] = preEncParams->PastRefPicture;
4099 avcSliceParams.RefPicList[LIST_0][0].FrameIdx = 0;
4100 }
4101 else
4102 {
4103 avcSliceParams.RefPicList[LIST_0][0].PicFlags = PICTURE_INVALID;
4104 }
4105
4106 if (preEncParams->dwNumFutureReferences > 0)
4107 {
4108 avcSliceParams.num_ref_idx_l1_active_minus1 = 0;
4109 avcSliceParams.RefPicList[LIST_1][0] = preEncParams->FutureRefPicture;
4110 avcSliceParams.RefPicList[LIST_1][0].FrameIdx = (preEncParams->dwNumPastReferences > 0) ? 1 : 0;
4111 }
4112 else
4113 {
4114 avcSliceParams.RefPicList[LIST_1][0].PicFlags = PICTURE_INVALID;
4115 }
4116
4117 m_avcSliceParams = &avcSliceParams;
4118 m_lastTaskInPhase = !callPreEncKernel;
4119 CODECHAL_ENCODE_CHK_STATUS_RETURN(GenericEncodeMeKernel(&BrcBuffers, HME_LEVEL_4x));
4120
4121 }
4122
4123 m_lastTaskInPhase = true;
4124 if (callPreEncKernel)
4125 {
4126 // Execute the PreEnc kernel only when MV and/or Statistics output required.
4127 // Especially for I frame case, if user disables the statistics output, the PreEnc can be skipped
4128 CODECHAL_ENCODE_CHK_STATUS_RETURN(PreProcKernel());
4129 if(preEncParams->bMBQp){
4130 CODECHAL_DEBUG_TOOL(CODECHAL_ENCODE_CHK_STATUS_RETURN(m_debugInterface->DumpBuffer(
4131 &preEncParams->resMbQpBuffer,
4132 CodechalDbgAttr::attrInput,
4133 "MbQp",
4134 m_picWidthInMb * m_frameFieldHeightInMb,
4135 0,
4136 CODECHAL_MEDIA_STATE_PREPROC)));
4137 }
4138 if(preEncParams->dwMVPredictorCtrl){
4139 CODECHAL_DEBUG_TOOL(CODECHAL_ENCODE_CHK_STATUS_RETURN(m_debugInterface->DumpBuffer(
4140 &preEncParams->resMvPredBuffer,
4141 CodechalDbgAttr::attrInput,
4142 "MvPredictor",
4143 m_picWidthInMb * m_frameFieldHeightInMb * 8,
4144 0,
4145 CODECHAL_MEDIA_STATE_PREPROC)));
4146 }
4147
4148 }
4149 #ifdef FEI_ENABLE_CMRT
4150 CodecHalEncode_FreeMDFKernelSurfaces(this, &m_resPreProcKernel);
4151 CodecHalEncode_FreeMDFKernelSurfaces(this, &m_resMEKernel);
4152 CodecHalEncode_FreeMDFKernelSurfaces(this, &resDSKernel);
4153 #endif
4154 // Reset buffer ID used for MbEnc kernel performance reports
4155 m_osInterface->pfnResetPerfBufferID(m_osInterface);
4156
4157 m_setRequestedEUSlices = false;
4158
4159 return eStatus;
4160 }
4161
4162 #ifdef FEI_ENABLE_CMRT
DispatchKernelMe(SurfaceIndex ** surfIdxArray,uint16_t width,uint16_t height,bool isBFrame)4163 MOS_STATUS CodechalEncodeAvcEncFeiG8::DispatchKernelMe(SurfaceIndex** surfIdxArray,uint16_t width,uint16_t height,bool isBFrame)
4164 {
4165 MOS_STATUS eStatus = MOS_STATUS_SUCCESS;
4166
4167 CODECHAL_ENCODE_FUNCTION_ENTER;
4168 CODECHAL_ENCODE_CHK_NULL_RETURN(pCmDev);
4169
4170 auto kernelRes = &m_resMEKernel;
4171 CmKernel * pKernel;
4172 if (isBFrame)
4173 {
4174 pKernel = kernelRes->ppKernel[1];
4175 }
4176 else
4177 {
4178 pKernel = kernelRes->ppKernel[0];
4179 }
4180
4181 //identify field or frame from curbe
4182 bool isField = (kernelRes->pCurbe[12] >> 7) & 1;
4183 // config thread space
4184 uint32_t threadWidth = CODECHAL_GET_WIDTH_IN_MACROBLOCKS(width);
4185 uint32_t threadHeight = CODECHAL_GET_HEIGHT_IN_MACROBLOCKS(height);
4186 if (isField)
4187 {
4188 threadHeight = (height + 31) >> 5;
4189 }
4190 CODECHAL_ENCODE_CHK_STATUS_RETURN(pKernel->SetThreadCount(threadWidth * threadHeight));
4191
4192 uint32_t kernelArgIdx = 0;
4193 //curbe data
4194 CODECHAL_ENCODE_CHK_STATUS_RETURN(pKernel->SetKernelArg(kernelArgIdx++, m_feiMeCurbeDataSize, kernelRes->pCurbe));
4195 // output surface
4196 CODECHAL_ENCODE_CHK_STATUS_RETURN(pKernel->SetKernelArg(kernelArgIdx++, sizeof(SurfaceIndex), surfIdxArray[0]));
4197 // input MV surface. if not provided, set to output surface
4198 CODECHAL_ENCODE_CHK_STATUS_RETURN(pKernel->SetKernelArg(kernelArgIdx++, sizeof(SurfaceIndex), surfIdxArray[1]));
4199 // dist surfaces
4200 CODECHAL_ENCODE_CHK_STATUS_RETURN(pKernel->SetKernelArg(kernelArgIdx++, sizeof(SurfaceIndex), surfIdxArray[2]));
4201 // dist
4202 CODECHAL_ENCODE_CHK_STATUS_RETURN(pKernel->SetKernelArg(kernelArgIdx++, sizeof(SurfaceIndex), surfIdxArray[3]));
4203 // fwd ref surfaces. if not provided, set to output surface
4204 CODECHAL_ENCODE_CHK_STATUS_RETURN(pKernel->SetKernelArg(kernelArgIdx++, sizeof(SurfaceIndex), surfIdxArray[4]));
4205 // bwd ref surfaces. if not provided, set to output surface
4206 CODECHAL_ENCODE_CHK_STATUS_RETURN(pKernel->SetKernelArg(kernelArgIdx++, sizeof(SurfaceIndex), surfIdxArray[5]));
4207 if(kernelRes->pTS == nullptr)
4208 {
4209 CODECHAL_ENCODE_CHK_STATUS_RETURN(pCmDev->CreateThreadSpace(threadWidth, threadHeight, kernelRes->pTS));
4210 }
4211
4212 bool isEnqueue = false;
4213 if (!m_singleTaskPhaseSupported || m_lastTaskInPhase)
4214 {
4215 isEnqueue = true;
4216 m_lastTaskInPhase = false;
4217 }
4218 AddKernelMdf(pCmDev,pCmQueue,pKernel,pCmTask, kernelRes->pTS,kernelRes->e,isEnqueue);
4219 return eStatus;
4220 }
4221
EncodeMeKernel(EncodeBrcBuffers * brcBuffers,hmeLevel hmeLevel)4222 MOS_STATUS CodechalEncodeAvcEncFeiG8::EncodeMeKernel(EncodeBrcBuffers* brcBuffers, hmeLevel hmeLevel)
4223 {
4224 MOS_STATUS eStatus = MOS_STATUS_SUCCESS;
4225
4226 CODECHAL_ENCODE_FUNCTION_ENTER;
4227
4228 CODECHAL_ENCODE_CHK_NULL_RETURN(pCmDev);
4229
4230 auto kernelRes = &m_resMEKernel;
4231 auto cmSurf = kernelRes->ppCmSurf;
4232 auto cmVmeSurfIdx = kernelRes->ppCmVmeSurf;
4233
4234 // Setup AVC Curbe
4235 MeCurbeParams meParams;
4236 MOS_ZeroMemory(&meParams, sizeof(meParams));
4237 meParams.hmeLvl = hmeLevel;
4238 meParams.pCurbeBinary = kernelRes->pCurbe;
4239
4240 SetCurbeMe(&meParams);
4241 SurfaceIndex *cmSurfIdx[6];
4242 CODECHAL_ENCODE_CHK_STATUS_RETURN(pCmDev->CreateSurface2D(&m_4xMeMvDataBuffer.OsResource, cmSurf[0]));
4243 CODECHAL_ENCODE_CHK_STATUS_RETURN(cmSurf[0]->GetIndex(cmSurfIdx[0]));
4244 cmSurfIdx[1] = cmSurfIdx[0];
4245 cmSurfIdx[3] = (SurfaceIndex *)CM_NULL_SURFACE;
4246
4247 CODECHAL_ENCODE_CHK_STATUS_RETURN(pCmDev->CreateSurface2D(&m_4xMeDistortionBuffer.OsResource, cmSurf[2]));
4248 CODECHAL_ENCODE_CHK_STATUS_RETURN(cmSurf[2]->GetIndex(cmSurfIdx[2]));
4249
4250 //maxium reference L0 is 4
4251 uint32_t baseIdx = 4;//FWD_BASE_INDEX;
4252 //for FEI, m_currReconstructedPic = m_currOriginalPic
4253 //scaledIdx = m_refList[m_currReconstructedPic.FrameIdx]->ucScalingIdx;
4254 uint8_t scaledIdx = m_refList[m_currOriginalPic.FrameIdx]->ucScalingIdx;
4255 PMOS_SURFACE currScaledSurface = m_trackedBuf->Get4xDsSurface(scaledIdx);
4256
4257 SurfaceIndex *cmTmpSurfIdx[3];
4258 CODECHAL_ENCODE_CHK_STATUS_RETURN(pCmDev->CreateSurface2D(&currScaledSurface->OsResource, cmSurf[baseIdx]));
4259 CODECHAL_ENCODE_CHK_STATUS_RETURN(cmSurf[baseIdx]->GetIndex(cmTmpSurfIdx[0]));
4260
4261 uint32_t numRef = 0;
4262 CmSurface2D * surfArray[8];
4263 for(uint8_t refIdx = 0; refIdx <= m_avcSliceParams->num_ref_idx_l0_active_minus1;refIdx ++)
4264 {
4265 CODEC_PICTURE refPic = m_avcSliceParams->RefPicList[LIST_0][refIdx];
4266 if(!CodecHal_PictureIsInvalid(refPic) && m_picIdx[refPic.FrameIdx].bValid)
4267 {
4268 uint8_t refPicIdx = m_picIdx[refPic.FrameIdx].ucPicIdx;
4269 uint8_t scaledIdx = m_refList[refPicIdx]->ucScalingIdx;
4270
4271 CODECHAL_ENCODE_CHK_STATUS_RETURN(pCmDev->CreateSurface2D(&m_trackedBuf->Get4xDsSurface(scaledIdx)->OsResource, cmSurf[baseIdx + 1 + refIdx]));
4272 CODECHAL_ENCODE_CHK_STATUS_RETURN(cmSurf[baseIdx + 1 + refIdx]->GetIndex(cmTmpSurfIdx[1]));
4273
4274 surfArray[numRef] = (CmSurface2D*)cmSurf[baseIdx + 1 + refIdx];
4275 numRef ++;
4276 }
4277 }
4278 CODECHAL_ENCODE_CHK_STATUS_RETURN(pCmDev->CreateVmeSurfaceG7_5(cmSurf[baseIdx], surfArray, nullptr, numRef, 0, cmVmeSurfIdx[0]));
4279
4280 baseIdx = 9;
4281 numRef = 0;
4282 auto cmSurfForVME = cmSurf[4];
4283 //maxium L1 size is 2
4284 for(uint8_t refIdx = 0; refIdx <= m_avcSliceParams->num_ref_idx_l1_active_minus1;refIdx ++)
4285 {
4286 CODEC_PICTURE refPic = m_avcSliceParams->RefPicList[LIST_1][refIdx];
4287 if(!CodecHal_PictureIsInvalid(refPic) && m_picIdx[refPic.FrameIdx].bValid)
4288 {
4289 uint8_t refPicIdx = m_picIdx[refPic.FrameIdx].ucPicIdx;
4290 uint8_t scaledIdx = m_refList[refPicIdx]->ucScalingIdx;
4291
4292 CODECHAL_ENCODE_CHK_STATUS_RETURN(pCmDev->CreateSurface2D(&m_trackedBuf->Get4xDsSurface(scaledIdx)->OsResource, cmSurf[baseIdx + 1 + refIdx]));
4293 CODECHAL_ENCODE_CHK_STATUS_RETURN(cmSurf[baseIdx + 1 + refIdx]->GetIndex(cmTmpSurfIdx[2]));
4294
4295 surfArray[numRef] = (CmSurface2D*)cmSurf[baseIdx + 1 + refIdx];
4296 numRef ++;
4297 }
4298 }
4299 CODECHAL_ENCODE_CHK_STATUS_RETURN(pCmDev->CreateVmeSurfaceG7_5( cmSurfForVME, surfArray, nullptr, numRef, 0, cmVmeSurfIdx[1]));
4300 cmSurfIdx[4] = cmVmeSurfIdx[0];
4301 cmSurfIdx[5] = cmVmeSurfIdx[1];
4302
4303 bool isB = (m_pictureCodingType == B_TYPE);
4304
4305 CODECHAL_ENCODE_CHK_STATUS_RETURN(DispatchKernelMe(
4306 &cmSurfIdx[0],
4307 (uint16_t)(m_frameWidth / 4), //CODECHAL_GET_HEIGHT_IN_MACROBLOCKS(m_frameWidth / 4),
4308 (uint16_t)(m_frameHeight/4),//CODECHAL_GET_HEIGHT_IN_MACROBLOCKS(m_frameFieldHeight / 4),
4309 isB));
4310 return eStatus;
4311 }
4312
InitKernelStateMe()4313 MOS_STATUS CodechalEncodeAvcEncFeiG8::InitKernelStateMe()
4314 {
4315 MOS_STATUS eStatus = MOS_STATUS_SUCCESS;
4316
4317 CODECHAL_ENCODE_FUNCTION_ENTER;
4318
4319 auto kernelRes = &m_resMEKernel;
4320
4321 CODECHAL_ENCODE_CHK_STATUS_RETURN(CodecHalEncode_CreateMDFKernelResource(this, kernelRes, 2, m_mdfMeBufSize, m_mdfMeSurfSize, m_mdfMeVmeSurfSize, m_feiMeCurbeDataSize));
4322 uint32_t codeSize;
4323 CODECHAL_ENCODE_CHK_STATUS_RETURN(MosUtilities::MosReadFileToPtr(strMeIsaName, &codeSize, &kernelRes->pCommonISA));
4324
4325 CODECHAL_ENCODE_CHK_STATUS_RETURN(pCmDev->LoadProgram(kernelRes->pCommonISA, codeSize, kernelRes->pCmProgram, "-nojitter"));
4326 CODECHAL_ENCODE_CHK_STATUS_RETURN(pCmDev->CreateKernel(kernelRes->pCmProgram, "HME_P", kernelRes->ppKernel[0]));
4327 CODECHAL_ENCODE_CHK_STATUS_RETURN(pCmDev->CreateKernel(kernelRes->pCmProgram, "HME_B", kernelRes->ppKernel[1]));
4328
4329 return eStatus;
4330 }
4331
InitKernelStateScaling(PCODECHAL_ENCODER avcEncoder)4332 MOS_STATUS CodechalEncodeAvcEncFeiG8::InitKernelStateScaling(PCODECHAL_ENCODER avcEncoder)
4333 {
4334 MOS_STATUS eStatus = MOS_STATUS_SUCCESS;
4335
4336 CODECHAL_ENCODE_FUNCTION_ENTER;
4337
4338 CODECHAL_ENCODE_CHK_NULL_RETURN(avcEncoder->pCmDev);
4339
4340 auto kernelRes = &avcEncoder->resDSKernel;
4341 CodecHalEncode_CreateMDFKernelResource(this, kernelRes, 6, m_mdfDsBufSize * 3, m_mdfDsSurfSize * 3, m_mdfDsVmeSurfSize, 0);
4342
4343 uint32_t codeSize;
4344 CODECHAL_ENCODE_CHK_STATUS_RETURN(MosUtilities::MosReadFileToPtr(strDsIsaName, &codeSize, &kernelRes->pCommonISA));
4345 CODECHAL_ENCODE_CHK_STATUS_RETURN(avcEncoder->pCmDev->LoadProgram(kernelRes->pCommonISA, codeSize, kernelRes->pCmProgram, "-nojitter"));
4346 CODECHAL_ENCODE_CHK_STATUS_RETURN(avcEncoder->pCmDev->CreateKernel(kernelRes->pCmProgram, "hme_frame_downscale", kernelRes->ppKernel[0]));
4347 CODECHAL_ENCODE_CHK_STATUS_RETURN(avcEncoder->pCmDev->CreateKernel(kernelRes->pCmProgram, "hme_frame_downscale", kernelRes->ppKernel[1]));
4348 CODECHAL_ENCODE_CHK_STATUS_RETURN(avcEncoder->pCmDev->CreateKernel(kernelRes->pCmProgram, "hme_frame_downscale", kernelRes->ppKernel[2]));
4349 CODECHAL_ENCODE_CHK_STATUS_RETURN(avcEncoder->pCmDev->CreateKernel(kernelRes->pCmProgram, "hme_field_downscale", kernelRes->ppKernel[3]));
4350 CODECHAL_ENCODE_CHK_STATUS_RETURN(avcEncoder->pCmDev->CreateKernel(kernelRes->pCmProgram, "hme_field_downscale", kernelRes->ppKernel[4]));
4351 CODECHAL_ENCODE_CHK_STATUS_RETURN(avcEncoder->pCmDev->CreateKernel(kernelRes->pCmProgram, "hme_field_downscale", kernelRes->ppKernel[5]));
4352 kernelRes->e = CM_NO_EVENT;
4353 return eStatus;
4354 }
4355
DispatchKernelScaling(uint32_t flatnessThreshold,uint32_t options,uint16_t sourceWidth,uint16_t sourceHeight,uint32_t kernelType,SurfaceIndex ** surfIdxArray)4356 MOS_STATUS CodechalEncodeAvcEncFeiG8::DispatchKernelScaling(
4357 uint32_t flatnessThreshold,
4358 uint32_t options,
4359 uint16_t sourceWidth,
4360 uint16_t sourceHeight,
4361 uint32_t kernelType,
4362 SurfaceIndex** surfIdxArray)
4363 {
4364
4365 MOS_STATUS eStatus = MOS_STATUS_SUCCESS;
4366
4367 CODECHAL_ENCODE_FUNCTION_ENTER;
4368
4369 CODECHAL_ENCODE_CHK_NULL_RETURN(pCmDev);
4370
4371 uint16_t sourceFieldHeight = (sourceHeight + 1) >> 1;
4372 uint16_t ds4xWidth = ((sourceWidth + 32) >> 6) << 4;
4373 uint16_t dx4xHeight = ((sourceHeight + 32) >> 6) << 4;
4374 uint16_t ds4xFieldWidth = ds4xWidth;
4375 uint16_t ds4xFieldHeight = ((sourceFieldHeight + 32) >> 6) << 4;
4376
4377 //if the width or height is less than 48 which is the search window size, ceil it to 48
4378 if (ds4xWidth<48)
4379 {
4380 ds4xWidth = 48;
4381 ds4xFieldWidth = 48;
4382 }
4383 if (dx4xHeight<48)
4384 {
4385 dx4xHeight = 48;
4386 ds4xFieldHeight = 24;
4387 }
4388
4389 int threadSpaceWidth = (ds4xWidth + 4)>>3; // Each 8x8 pixel output is completed by 1 thread
4390 int threadSpaceHeight = (dx4xHeight + 4) >> 3; // Each 8x8 pixel output is completed by 1 thread
4391 if (kernelType == 1){
4392 threadSpaceWidth = (ds4xFieldWidth + 4) >> 3; // Each 4x8 pixel output is completed by 1 thread
4393 threadSpaceHeight = (ds4xFieldHeight + 2) >> 2; // Each 4x8 pixel output is completed by 1 thread
4394 }
4395
4396 uint32_t reserved[3];
4397 reserved[0] = 0;
4398 reserved[1] = 0;
4399 reserved[2] = 0;
4400 auto kernelRes = &resDSKernel;
4401
4402 SurfaceIndex* surfaceIndex_SrcSurf_Top = nullptr;
4403 SurfaceIndex* surfaceIndex_SrcSurf_Bot = nullptr;
4404 SurfaceIndex* surfaceIndex_DSSurf_Top = nullptr;
4405 SurfaceIndex* surfaceIndex_DSSurf_Bot = nullptr;
4406 SurfaceIndex* surfaceIndex_MB_VProc_Stats_Top = nullptr;
4407 SurfaceIndex* surfaceIndex_MB_VProc_Stats_Bot = nullptr;
4408
4409 CmKernel* kernel;
4410 if (kernelType == 0)
4411 {
4412 kernel = kernelRes->ppKernel[m_dsKernelIdx];
4413 CODECHAL_ENCODE_CHK_STATUS_RETURN(kernel->SetThreadCount(threadSpaceWidth*threadSpaceHeight));
4414
4415 surfaceIndex_SrcSurf_Top = surfIdxArray[0];
4416 surfaceIndex_DSSurf_Top = surfIdxArray[1];
4417 surfaceIndex_MB_VProc_Stats_Top = surfIdxArray[4];
4418 surfaceIndex_MB_VProc_Stats_Bot = surfIdxArray[4];
4419
4420 CODECHAL_ENCODE_CHK_STATUS_RETURN(kernel->SetKernelArg(4, sizeof(reserved[0]), &reserved[0]));
4421 CODECHAL_ENCODE_CHK_STATUS_RETURN(kernel->SetKernelArg(5, sizeof(reserved[1]), &reserved[1]));
4422 }
4423 else
4424 {
4425 kernel = kernelRes->ppKernel[m_dsKernelIdx + 3];
4426 CODECHAL_ENCODE_CHK_STATUS_RETURN(kernel->SetThreadCount(threadSpaceWidth*threadSpaceHeight));
4427
4428 surfaceIndex_SrcSurf_Top = surfIdxArray[0];
4429 surfaceIndex_DSSurf_Top = surfIdxArray[1];
4430 surfaceIndex_SrcSurf_Bot = surfIdxArray[2];
4431 surfaceIndex_DSSurf_Bot = surfIdxArray[3];
4432
4433 surfaceIndex_MB_VProc_Stats_Top = surfIdxArray[4];
4434 surfaceIndex_MB_VProc_Stats_Bot = surfIdxArray[5];
4435 CODECHAL_ENCODE_CHK_STATUS_RETURN(kernel->SetKernelArg(4, sizeof(SurfaceIndex), surfaceIndex_SrcSurf_Bot)); // DW3
4436 CODECHAL_ENCODE_CHK_STATUS_RETURN(kernel->SetKernelArg(5, sizeof(SurfaceIndex), surfaceIndex_DSSurf_Bot)); // DW4
4437 CODECHAL_ENCODE_CHK_STATUS_RETURN(kernel->SetKernelArg(10, sizeof(SurfaceIndex), surfaceIndex_MB_VProc_Stats_Bot)); // DW9
4438 }
4439 CODECHAL_ENCODE_CHK_STATUS_RETURN(kernel->SetKernelArg(0, sizeof(uint16_t), &sourceWidth)); // DW0
4440 CODECHAL_ENCODE_CHK_STATUS_RETURN(kernel->SetKernelArg(1, sizeof(uint16_t), &sourceHeight)); // DW0
4441 CODECHAL_ENCODE_CHK_STATUS_RETURN(kernel->SetKernelArg(2, sizeof(SurfaceIndex), surfaceIndex_SrcSurf_Top)); // DW1
4442 CODECHAL_ENCODE_CHK_STATUS_RETURN(kernel->SetKernelArg(3, sizeof(SurfaceIndex), surfaceIndex_DSSurf_Top)); // DW2
4443 CODECHAL_ENCODE_CHK_STATUS_RETURN(kernel->SetKernelArg(6, sizeof(uint32_t), &flatnessThreshold)); // DW5
4444 CODECHAL_ENCODE_CHK_STATUS_RETURN(kernel->SetKernelArg(7, sizeof(uint32_t), &options)); // DW6
4445 CODECHAL_ENCODE_CHK_STATUS_RETURN(kernel->SetKernelArg(8, sizeof(uint32_t), &reserved[2]));
4446 CODECHAL_ENCODE_CHK_STATUS_RETURN(kernel->SetKernelArg(9, sizeof(SurfaceIndex), surfaceIndex_MB_VProc_Stats_Top));// DW8
4447
4448 // Setup Dispatch Pattern ======================================================
4449 bool isEnqueue = false;
4450
4451 if(kernelRes->pTS == nullptr)
4452 {
4453 CODECHAL_ENCODE_CHK_STATUS_RETURN(pCmDev->CreateThreadSpace(threadSpaceWidth, threadSpaceHeight, kernelRes->pTS));
4454 }
4455 if((!m_singleTaskPhaseSupported) || m_lastTaskInPhase)
4456 {
4457 isEnqueue = true;
4458 m_lastTaskInPhase = false;
4459 }
4460 return AddKernelMdf(pCmDev,pCmQueue,kernel,pCmTask,kernelRes->pTS,kernelRes->e,isEnqueue);
4461
4462 }
4463
EncodeScalingKernel(CodechalEncodeCscDs::KernelParams * pParams)4464 MOS_STATUS CodechalEncodeAvcEncFeiG8::EncodeScalingKernel(CodechalEncodeCscDs::KernelParams* pParams)
4465 {
4466 MOS_STATUS eStatus = MOS_STATUS_SUCCESS;
4467
4468 CODECHAL_ENCODE_FUNCTION_ENTER;
4469
4470 auto kernelRes = &resDSKernel;
4471 auto cmSurf = &kernelRes->ppCmSurf[m_dsKernelIdx * m_mdfDsBufSize];
4472 auto cmBuf = &kernelRes->ppCmBuf[m_dsKernelIdx * m_mdfDsBufSize];
4473
4474 m_lastTaskInPhase = pParams->bLastTaskInPhase4xDS;
4475
4476 // setup kernel required parameters
4477 if (!m_firstField)
4478 {
4479 // Both fields are scaled when the first field comes in, no need to scale again
4480 return eStatus;
4481 }
4482
4483 auto preEncParams = (FeiPreEncParams*)m_encodeParams.pPreEncParams;
4484 CODECHAL_ENCODE_CHK_NULL_RETURN(preEncParams);
4485 bool fieldPicture = CodecHal_PictureIsField(m_currOriginalPic);
4486
4487 //only 4x
4488 uint16_t srcWidth = (uint16_t)m_oriFrameWidth;
4489 uint16_t srcHeight = (uint16_t)m_oriFrameHeight;
4490 auto inputSurface = (pParams->bRawInputProvided)? &pParams->sInputRawSurface : m_rawSurfaceToEnc;
4491 auto outputSurface = m_trackedBuf->Get4xDsSurface(CODEC_CURR_TRACKED_BUFFER);
4492 m_currRefList->b4xScalingUsed = true;
4493
4494 uint32_t enableFlatness = 0;
4495 uint32_t enableVarianceOutput = 0;
4496 uint32_t enableAverageOutput = 0;
4497 uint32_t enable8x8Stats = 0;
4498 uint32_t flatnessTh = 0;
4499
4500 if((!pParams->bScalingforRef) || (pParams->bStatsInputProvided))
4501 {
4502 enableFlatness = (!pParams->b32xScalingInUse && !pParams->b16xScalingInUse) ? m_flatnessCheckEnabled : 0;
4503 enableVarianceOutput = (preEncParams) ? !preEncParams->bDisableStatisticsOutput : ((!pParams->b32xScalingInUse && !pParams->b16xScalingInUse) ? m_mbStatsEnabled : 0);
4504 enableAverageOutput = (preEncParams) ? !preEncParams->bDisableStatisticsOutput : ((!pParams->b32xScalingInUse && !pParams->b16xScalingInUse) ? m_mbStatsEnabled : 0);
4505 flatnessTh = 128;
4506 enable8x8Stats = (preEncParams) ? preEncParams->bEnable8x8Statistics : 0;
4507 }
4508
4509 SurfaceIndex *cmSurfIdx[6];
4510 if(!fieldPicture)
4511 {
4512 CODECHAL_ENCODE_CHK_STATUS_RETURN(pCmDev->CreateSurface2D(&inputSurface->OsResource, cmSurf[0]));
4513 CODECHAL_ENCODE_CHK_STATUS_RETURN(cmSurf[0]->GetIndex(cmSurfIdx[0]));
4514
4515 CODECHAL_ENCODE_CHK_STATUS_RETURN(pCmDev->CreateSurface2D(&outputSurface->OsResource, cmSurf[1]));
4516 CODECHAL_ENCODE_CHK_STATUS_RETURN(cmSurf[1]->GetIndex(cmSurfIdx[1]));
4517 }
4518 else
4519 {
4520 // src top
4521 CODECHAL_ENCODE_CHK_STATUS_RETURN(pCmDev->CreateSurface2D(&inputSurface->OsResource, cmSurf[0]));
4522 CODECHAL_ENCODE_CHK_STATUS_RETURN(cmSurf[0]->GetIndex(cmSurfIdx[0]));
4523 cmSurf[0]->SetProperty(CM_TOP_FIELD);
4524 // dst top
4525 CODECHAL_ENCODE_CHK_STATUS_RETURN(pCmDev->CreateSurface2D(&outputSurface->OsResource, cmSurf[1]));
4526 CODECHAL_ENCODE_CHK_STATUS_RETURN(cmSurf[1]->GetIndex(cmSurfIdx[1]));
4527 cmSurf[1]->SetProperty(CM_TOP_FIELD);
4528
4529 // src bottom
4530 CODECHAL_ENCODE_CHK_STATUS_RETURN(pCmDev->CreateSurface2D(&inputSurface->OsResource, cmSurf[2]));
4531 CODECHAL_ENCODE_CHK_STATUS_RETURN(cmSurf[2]->GetIndex(cmSurfIdx[2]));
4532 cmSurf[2]->SetProperty(CM_BOTTOM_FIELD);
4533
4534 CODECHAL_ENCODE_CHK_STATUS_RETURN(pCmDev->CreateSurface2D(&outputSurface->OsResource, cmSurf[3]));
4535 CODECHAL_ENCODE_CHK_STATUS_RETURN(cmSurf[3]->GetIndex(cmSurfIdx[3]));
4536 cmSurf[3]->SetProperty(CM_BOTTOM_FIELD);
4537
4538 if((pParams->bScalingforRef) && (pParams->bStatsInputProvided))
4539 {
4540 CODECHAL_ENCODE_CHK_STATUS_RETURN(pCmDev->CreateBuffer(&pParams->sInputStatsBotFieldBuffer, cmBuf[1]));
4541 CODECHAL_ENCODE_CHK_STATUS_RETURN(cmBuf[1]->GetIndex(cmSurfIdx[5]));
4542 }
4543 else
4544 {
4545 CODECHAL_ENCODE_CHK_STATUS_RETURN(pCmDev->CreateBuffer(&preEncParams->resStatsBotFieldBuffer, cmBuf[1]));
4546 CODECHAL_ENCODE_CHK_STATUS_RETURN(cmBuf[1]->GetIndex(cmSurfIdx[5]));
4547 }
4548 }
4549 if((pParams->bScalingforRef)&&(pParams->bStatsInputProvided))
4550 {
4551 {
4552 CODECHAL_ENCODE_CHK_STATUS_RETURN(pCmDev->CreateBuffer(&pParams->sInputStatsBuffer, cmBuf[0]));
4553 }
4554 }
4555 else
4556 {
4557 CODECHAL_ENCODE_CHK_STATUS_RETURN(pCmDev->CreateBuffer(&preEncParams->resStatsBuffer, cmBuf[0]));
4558 }
4559 CODECHAL_ENCODE_CHK_STATUS_RETURN(cmBuf[0]->GetIndex(cmSurfIdx[4]));
4560
4561 uint32_t curbe_R1_5 = flatnessTh;
4562 uint32_t curbe_R1_6 = enableFlatness | (enableVarianceOutput << 1) | (enableAverageOutput << 2) | (enable8x8Stats << 3);
4563
4564 CODECHAL_ENCODE_CHK_STATUS_RETURN(DispatchKernelScaling(curbe_R1_5, curbe_R1_6,
4565 srcWidth, srcHeight, fieldPicture, cmSurfIdx));
4566 return eStatus;
4567 }
4568
InitKernelStateMbEnc()4569 MOS_STATUS CodechalEncodeAvcEncFeiG8::InitKernelStateMbEnc()
4570 {
4571 MOS_STATUS eStatus = MOS_STATUS_SUCCESS;
4572
4573 CODECHAL_ENCODE_FUNCTION_ENTER;
4574
4575 CODECHAL_ENCODE_CHK_NULL_RETURN(pCmDev);
4576
4577 auto kernelRes = &m_resMBEncKernel;
4578 CodecHalEncode_CreateMDFKernelResource(this, kernelRes, 3, m_mdfMbencBufSize, m_mdfMbencSurfSize, m_mdfMbencVmeSurfSize, m_feiMBEncCurbeDataSizeExcludeSurfaceIdx);
4579 uint32_t codeSize;
4580 CODECHAL_ENCODE_CHK_STATUS_RETURN(MosUtilities::MosReadFileToPtr(strMbEncIsaName, &codeSize, &kernelRes->pCommonISA));
4581 CODECHAL_ENCODE_CHK_STATUS_RETURN(pCmDev->LoadProgram(kernelRes->pCommonISA, codeSize, kernelRes->pCmProgram, "-nojitter"));
4582 CODECHAL_ENCODE_CHK_STATUS_RETURN(pCmDev->CreateKernel(kernelRes->pCmProgram, "AVCEncMB_I", kernelRes->ppKernel[0]));
4583 CODECHAL_ENCODE_CHK_STATUS_RETURN(pCmDev->CreateKernel(kernelRes->pCmProgram, "AVCEncMB_P", kernelRes->ppKernel[1]));
4584 CODECHAL_ENCODE_CHK_STATUS_RETURN(pCmDev->CreateKernel(kernelRes->pCmProgram, "AVCEncMB_B", kernelRes->ppKernel[2]));
4585
4586 return eStatus;
4587 }
4588
InitKernelStatePreProc()4589 MOS_STATUS CodechalEncodeAvcEncFeiG8::InitKernelStatePreProc()
4590 {
4591 MOS_STATUS eStatus = MOS_STATUS_SUCCESS;
4592
4593 CODECHAL_ENCODE_FUNCTION_ENTER;
4594
4595 CODECHAL_ENCODE_CHK_NULL_RETURN(pCmDev);
4596
4597 auto kernelRes = &m_resPreProcKernel;
4598 CodecHalEncode_CreateMDFKernelResource(this, kernelRes, 1, m_mdfPreProcBufSize, m_mdfPreProcSurfSize, m_mdfPreProcVmeSurfSize,m_feiPreProcCurbeDataSize);
4599 uint32_t codeSize;
4600 CODECHAL_ENCODE_CHK_STATUS_RETURN(MosUtilities::MosReadFileToPtr(strPreProcIsaName, &codeSize, &kernelRes->pCommonISA));
4601 CODECHAL_ENCODE_CHK_STATUS_RETURN(pCmDev->LoadProgram(kernelRes->pCommonISA, codeSize, kernelRes->pCmProgram, "-nojitter"));
4602 CODECHAL_ENCODE_CHK_STATUS_RETURN(pCmDev->CreateKernel(kernelRes->pCmProgram, "FEI_PreEnc", kernelRes->ppKernel[0]));
4603
4604 return eStatus;
4605 }
4606
4607 //private function, not export the parameters.
DispatchKernelMbEnc(void * params)4608 MOS_STATUS CodechalEncodeAvcEncFeiG8::DispatchKernelMbEnc(
4609 void* params)
4610 {
4611 MOS_STATUS eStatus = MOS_STATUS_SUCCESS;
4612
4613 CODECHAL_ENCODE_FUNCTION_ENTER;
4614
4615 auto dispatchParams = (PCODECHAL_ENCODE_AVC_MBENC_DISPATCH_PARAMS) params;
4616 CODECHAL_ENCODE_CHK_NULL_RETURN(pCmDev);
4617 CODECHAL_ENCODE_CHK_NULL_RETURN(dispatchParams);
4618 CODECHAL_ENCODE_CHK_NULL_RETURN(dispatchParams->kernelRes);
4619 CODECHAL_ENCODE_CHK_NULL_RETURN(dispatchParams->avcMBEncSurface);
4620
4621 uint32_t threadCount = dispatchParams->frameWidthInMBs * dispatchParams->sliceHeight * dispatchParams->numSlices;
4622
4623 uint32_t index = 0;
4624 auto kernel = dispatchParams->kernelRes->ppKernel[dispatchParams->sliceType - 1];
4625 auto avcMbEncSurface = dispatchParams->avcMBEncSurface;
4626
4627 CODECHAL_ENCODE_CHK_STATUS_RETURN(kernel->SetThreadCount(threadCount));
4628 CODECHAL_ENCODE_CHK_STATUS_RETURN(kernel->SetKernelArg(index++, dispatchParams->kernelRes->wCurbeSize, dispatchParams->kernelRes->pCurbe));
4629 CODECHAL_ENCODE_CHK_STATUS_RETURN(kernel->SetKernelArg(index++, sizeof(SurfaceIndex), avcMbEncSurface->MBDataSurfIndex));
4630 CODECHAL_ENCODE_CHK_STATUS_RETURN(kernel->SetKernelArg(index++, sizeof(SurfaceIndex), avcMbEncSurface->MVDataSurfIndex));
4631 CODECHAL_ENCODE_CHK_STATUS_RETURN(kernel->SetKernelArg(index++, sizeof(SurfaceIndex), avcMbEncSurface->MBDistIndex));
4632 CODECHAL_ENCODE_CHK_STATUS_RETURN(kernel->SetKernelArg(index++, sizeof(SurfaceIndex), avcMbEncSurface->SrcYSurfIndex));
4633 CODECHAL_ENCODE_CHK_STATUS_RETURN(kernel->SetKernelArg(index++, sizeof(SurfaceIndex), avcMbEncSurface->MBSpecficDataSurfIndex));
4634 CODECHAL_ENCODE_CHK_STATUS_RETURN(kernel->SetKernelArg(index++, sizeof(SurfaceIndex), avcMbEncSurface->AuxVmeOutSurfIndex)); //FEI distortion output
4635 CODECHAL_ENCODE_CHK_STATUS_RETURN(kernel->SetKernelArg(index++, sizeof(SurfaceIndex), avcMbEncSurface->CurrRefPicSelSurfIndex));
4636 CODECHAL_ENCODE_CHK_STATUS_RETURN(kernel->SetKernelArg(index++, sizeof(SurfaceIndex), avcMbEncSurface->HMEMVPredFwdBwdSurfIndex));
4637 CODECHAL_ENCODE_CHK_STATUS_RETURN(kernel->SetKernelArg(index++, sizeof(SurfaceIndex), avcMbEncSurface->HMEDistSurfIndex));
4638 CODECHAL_ENCODE_CHK_STATUS_RETURN(kernel->SetKernelArg(index++, sizeof(SurfaceIndex), avcMbEncSurface->L1RefPicSelSurfIndex));
4639 CODECHAL_ENCODE_CHK_STATUS_RETURN(kernel->SetKernelArg(index++, sizeof(SurfaceIndex), avcMbEncSurface->FwdFrmMBDataSurfIndex));
4640 CODECHAL_ENCODE_CHK_STATUS_RETURN(kernel->SetKernelArg(index++, sizeof(SurfaceIndex), avcMbEncSurface->FwdFrmMVSurfIndex));
4641 CODECHAL_ENCODE_CHK_STATUS_RETURN(kernel->SetKernelArg(index++, sizeof(SurfaceIndex), avcMbEncSurface->MBQPBuffer));
4642 CODECHAL_ENCODE_CHK_STATUS_RETURN(kernel->SetKernelArg(index++, sizeof(SurfaceIndex), avcMbEncSurface->MBBRCLut));
4643 CODECHAL_ENCODE_CHK_STATUS_RETURN(kernel->SetKernelArg(index++, sizeof(SurfaceIndex), avcMbEncSurface->MBVMEInterPredictionSurfIndex));
4644 CODECHAL_ENCODE_CHK_STATUS_RETURN(kernel->SetKernelArg(index++, sizeof(SurfaceIndex), avcMbEncSurface->MBVMEInterPredictionMRSurfIndex));
4645 CODECHAL_ENCODE_CHK_STATUS_RETURN(kernel->SetKernelArg(index++, sizeof(SurfaceIndex), avcMbEncSurface->Flatnesschk));
4646 CODECHAL_ENCODE_CHK_STATUS_RETURN(kernel->SetKernelArg(index++, sizeof(SurfaceIndex), avcMbEncSurface->MADSurfIndex));
4647 CODECHAL_ENCODE_CHK_STATUS_RETURN(kernel->SetKernelArg(index++, sizeof(SurfaceIndex), avcMbEncSurface->InterDistortionIndex));
4648 CODECHAL_ENCODE_CHK_STATUS_RETURN(kernel->SetKernelArg(index++, sizeof(SurfaceIndex), avcMbEncSurface->BestInterIntraSurfIndex));
4649 CODECHAL_ENCODE_CHK_STATUS_RETURN(kernel->SetKernelArg(index++, sizeof(SurfaceIndex), avcMbEncSurface->BRCCurbeSurfIndex));
4650 CODECHAL_ENCODE_CHK_STATUS_RETURN(kernel->SetKernelArg(index++, sizeof(SurfaceIndex), avcMbEncSurface->FEI_MVPredSurfIndex));
4651 //currently , it's always false.
4652 CODECHAL_ENCODE_CHK_STATUS_RETURN(pCmDev->CreateThreadSpace(dispatchParams->frameWidthInMBs, dispatchParams->sliceHeight, dispatchParams->kernelRes->pTS));
4653 auto cmThreadSpace = dispatchParams->kernelRes->pTS;
4654 if (I_TYPE == dispatchParams->sliceType) // INTRASLICE
4655 {
4656 CODECHAL_ENCODE_CHK_STATUS_RETURN(cmThreadSpace->SelectThreadDependencyPattern(CM_WAVEFRONT));
4657 }
4658 else
4659 {
4660 CODECHAL_ENCODE_CHK_STATUS_RETURN(cmThreadSpace->SelectThreadDependencyPattern(CM_WAVEFRONT26));
4661 }
4662 cmThreadSpace->SetThreadSpaceColorCount(dispatchParams->numSlices);
4663 return eStatus;
4664 }
4665
SendAvcMbEncSurfaces(PMOS_COMMAND_BUFFER cmdBuffer,PCODECHAL_ENCODE_AVC_MBENC_SURFACE_PARAMS params)4666 MOS_STATUS CodechalEncodeAvcEncFeiG8::SendAvcMbEncSurfaces(PMOS_COMMAND_BUFFER cmdBuffer, PCODECHAL_ENCODE_AVC_MBENC_SURFACE_PARAMS params)
4667 {
4668 MOS_STATUS eStatus = MOS_STATUS_SUCCESS;
4669
4670 CODECHAL_ENCODE_FUNCTION_ENTER;
4671
4672 CODECHAL_ENCODE_CHK_NULL_RETURN(pCmDev);
4673
4674 auto kernelRes = &m_resMBEncKernel;
4675 auto cmSurfaces = (PCODECHAL_ENCODE_AVC_SURFACE_IDX)m_avcCmSurfIdx;
4676
4677 CodecEncodeAvcFeiPicParams *feiPicParams = (CodecEncodeAvcFeiPicParams *)params->pFeiPicParams;
4678
4679 bool currFieldPicture = CodecHal_PictureIsField(*(params->pCurrOriginalPic)) ? 1 : 0;
4680 bool currBottomField = CodecHal_PictureIsBottomField(*(params->pCurrOriginalPic)) ? 1 : 0;
4681 auto currPicRefListEntry = params->ppRefList[params->pCurrReconstructedPic->FrameIdx];
4682 auto mbCodeBuffer = &currPicRefListEntry->resRefMbCodeBuffer;
4683 auto mvDataBuffer = &currPicRefListEntry->resRefMvDataBuffer;
4684
4685 for(uint8_t refIdx = 0; refIdx < 28; refIdx ++)
4686 {
4687 cmSurfaces->pCmSurfIdx[refIdx] = (SurfaceIndex*)CM_NULL_SURFACE;
4688 }
4689
4690 auto cmSurf = kernelRes->ppCmSurf;
4691 auto cmBuf = kernelRes->ppCmBuf;
4692 auto cmVmeSurfIdx = kernelRes->ppCmVmeSurf;
4693
4694 uint32_t refMbCodeBottomFieldOffset;
4695 uint32_t refMvBottomFieldOffset;
4696
4697 if (feiPicParams->MbCodeMvEnable)
4698 {
4699 refMbCodeBottomFieldOffset = 0;
4700 refMvBottomFieldOffset = 0;
4701 }
4702 else
4703 {
4704 refMbCodeBottomFieldOffset = m_mbcodeBottomFieldOffset;
4705 refMvBottomFieldOffset =
4706 MOS_ALIGN_CEIL(params->dwFrameFieldHeightInMb * params->dwFrameWidthInMb * (32 * 4), CODECHAL_PAGE_SIZE);
4707 }
4708
4709 uint32_t mbCodeSize = params->dwFrameWidthInMb * params->dwFrameFieldHeightInMb * 16 * 4; // 11DW + 5DW padding
4710 uint32_t mvSize = params->dwFrameWidthInMb * params->dwFrameFieldHeightInMb * 32 * 4;
4711
4712 // PAK Obj command buffer
4713 //dwSize = params->dwFrameWidthInMb * params->dwFrameFieldHeightInMb * 16 * 4; // 11DW + 5DW padding
4714 // mb code offset SurfaceCodecParams.dwOffset = params->dwMbCodeBottomFieldOffset;
4715 CODECHAL_ENCODE_CHK_STATUS_RETURN(pCmDev->CreateBuffer(mbCodeBuffer,cmBuf[0]));
4716 CODECHAL_ENCODE_CHK_STATUS_RETURN(pCmDev->CreateBuffer(mvDataBuffer,cmBuf[1]));
4717 if((feiPicParams->MbCodeMvEnable) || ((params->dwMbCodeBottomFieldOffset == 0) && (params->dwMvBottomFieldOffset == 0)))
4718 {
4719 CODECHAL_ENCODE_CHK_STATUS_RETURN(cmBuf[0]->GetIndex(cmSurfaces->MBDataSurfIndex));
4720 //MV data offset SurfaceCodecParams.dwOffset = params->dwMvBottomFieldOffset;
4721 //dwSize = params->dwFrameWidthInMb * params->dwFrameFieldHeightInMb * 32 * 4;
4722 CODECHAL_ENCODE_CHK_STATUS_RETURN(cmBuf[1]->GetIndex(cmSurfaces->MVDataSurfIndex));
4723 }
4724 else
4725 {
4726 SurfaceIndex *aliasIndex;
4727 CODECHAL_ENCODE_CHK_STATUS_RETURN(pCmDev->CreateBufferAlias(cmBuf[0], aliasIndex));
4728 CM_BUFFER_STATE_PARAM param;
4729 MOS_ZeroMemory(¶m,sizeof(param));
4730 param.uiSize = mbCodeSize;
4731 param.uiBaseAddressOffset = params->dwMbCodeBottomFieldOffset;
4732 cmBuf[0]->SetSurfaceStateParam(aliasIndex, ¶m);
4733 cmSurfaces->MBDataSurfIndex = aliasIndex;
4734
4735 CODECHAL_ENCODE_CHK_STATUS_RETURN(pCmDev->CreateBufferAlias(cmBuf[1], aliasIndex));
4736 param.uiSize = mvSize;
4737 param.uiBaseAddressOffset = params->dwMvBottomFieldOffset;
4738 cmBuf[1]->SetSurfaceStateParam(aliasIndex, ¶m);
4739 cmSurfaces->MVDataSurfIndex = aliasIndex;
4740 }
4741
4742 // Current picture Y 2D, and offset = params->dwCurrPicSurfaceOffset;
4743 CODECHAL_ENCODE_CHK_STATUS_RETURN(pCmDev->CreateSurface2D(¶ms->psCurrPicSurface->OsResource,cmSurf[0]));
4744 CODECHAL_ENCODE_CHK_STATUS_RETURN(cmSurf[0]->GetIndex(cmSurfaces->SrcYSurfIndex));
4745
4746 if(currFieldPicture)
4747 {
4748 if(CodecHal_PictureIsBottomField((*params->pCurrOriginalPic)))
4749 {
4750 cmSurf[0]->SetProperty(CM_BOTTOM_FIELD);
4751 }
4752 else
4753 {
4754 cmSurf[0]->SetProperty(CM_TOP_FIELD);
4755 }
4756 }
4757 // AVC_ME MV data buffer
4758 if (params->bHmeEnabled)
4759 {
4760 //2D, and offset = params->dwMeMvBottomFieldOffset;
4761 CODECHAL_ENCODE_CHK_STATUS_RETURN(pCmDev->CreateSurface2D(¶ms->ps4xMeMvDataBuffer->OsResource,cmSurf[1]));
4762 CODECHAL_ENCODE_CHK_STATUS_RETURN(cmSurf[1]->GetIndex(cmSurfaces->HMEMVPredFwdBwdSurfIndex));
4763
4764 //HMEdistortion 2D, offset = params->dwMeDistortionBottomFieldOffset;
4765 CODECHAL_ENCODE_CHK_NULL_RETURN(params->ps4xMeDistortionBuffer);
4766 CODECHAL_ENCODE_CHK_STATUS_RETURN(pCmDev->CreateSurface2D(¶ms->ps4xMeDistortionBuffer->OsResource,cmSurf[2]));
4767 CODECHAL_ENCODE_CHK_STATUS_RETURN(cmSurf[2]->GetIndex(cmSurfaces->HMEDistSurfIndex));
4768 }
4769 //current piture Y take two binding table offset , dwAvcMBEncCurrPicFrame[0] dwAvcMBEncCurrPicFrame[1] dwAvcMBEncFieldCurrPic[0] dwAvcMBEncFieldCurrPic[1]
4770
4771 //CODECHAL_ENCODE_CHK_STATUS_RETURN(pCmDev->CreateSurface2D(¶ms->psCurrPicSurface->OsResource,pCmSurfForVME));
4772 // Setup references 1...n
4773 // LIST 0 references
4774 uint8_t refNum0 = 0;
4775 uint8_t refNum1 = 0;
4776 CmSurface2D *surfArrayL0[8];
4777 CmSurface2D *surfArrayL1[8];
4778
4779 CmSurface2D *cmSurfForVME = cmSurf[0];
4780 MOS_ZeroMemory(&surfArrayL0[0],8 * sizeof(CmSurface2D *));
4781 MOS_ZeroMemory(&surfArrayL1[0],8 * sizeof(CmSurface2D *));
4782 for (uint8_t refIdx = 0; refIdx <= params->pAvcSlcParams->num_ref_idx_l0_active_minus1; refIdx++)
4783 {
4784 CODEC_PICTURE refPic = params->pAvcSlcParams->RefPicList[LIST_0][refIdx];
4785 if (!CodecHal_PictureIsInvalid(refPic) && params->pAvcPicIdx[refPic.FrameIdx].bValid)
4786 {
4787 uint8_t refPicIdx = params->pAvcPicIdx[refPic.FrameIdx].ucPicIdx;
4788 bool refBottomField = (CodecHal_PictureIsBottomField(refPic)) ? 1 : 0;
4789 refNum0 ++;
4790 CODECHAL_ENCODE_CHK_STATUS_RETURN(pCmDev->CreateSurface2D(¶ms->ppRefList[refPicIdx]->sRefBuffer.OsResource,cmSurf[3 + refIdx]))
4791 surfArrayL0[refIdx] = (CmSurface2D *)cmSurf[3 + refIdx];
4792
4793 }
4794 }
4795 for (uint8_t refIdx = 0; refIdx <= params->pAvcSlcParams->num_ref_idx_l1_active_minus1; refIdx++)
4796 {
4797 CODEC_PICTURE refPic = params->pAvcSlcParams->RefPicList[LIST_1][refIdx];
4798 if (!CodecHal_PictureIsInvalid(refPic) && params->pAvcPicIdx[refPic.FrameIdx].bValid)
4799 {
4800 uint8_t refPicIdx = params->pAvcPicIdx[refPic.FrameIdx].ucPicIdx;
4801 bool refBottomField = (CodecHal_PictureIsBottomField(refPic)) ? 1 : 0;
4802
4803 CODECHAL_ENCODE_CHK_STATUS_RETURN(pCmDev->CreateSurface2D(¶ms->ppRefList[refPicIdx]->sRefBuffer.OsResource,cmSurf[9 + refIdx]))
4804 surfArrayL1[refIdx] = (CmSurface2D *)cmSurf[9 + refIdx];
4805
4806 refNum1 ++;
4807 if (refIdx == 0)
4808 {
4809 // MB data buffer offset = dwRefMbCodeBottomFieldOffsetUsed;
4810 if((feiPicParams->MbCodeMvEnable) && currFieldPicture)
4811 {
4812 if(refBottomField)
4813 {
4814 CODECHAL_ENCODE_CHK_STATUS_RETURN(pCmDev->CreateBuffer(¶ms->ppRefList[refPicIdx]->resRefBotFieldMbCodeBuffer, cmBuf[3]));
4815 }
4816 else
4817 {
4818 CODECHAL_ENCODE_CHK_STATUS_RETURN(pCmDev->CreateBuffer(¶ms->ppRefList[refPicIdx]->resRefTopFieldMbCodeBuffer, cmBuf[3]));
4819 }
4820 CODECHAL_ENCODE_CHK_STATUS_RETURN(cmBuf[3]->GetIndex(cmSurfaces->FwdFrmMBDataSurfIndex));
4821 }
4822 else
4823 {
4824 CODECHAL_ENCODE_CHK_STATUS_RETURN(pCmDev->CreateBuffer(¶ms->ppRefList[refPicIdx]->resRefMbCodeBuffer, cmBuf[3]));
4825
4826 if(currFieldPicture && refBottomField)
4827 {
4828 SurfaceIndex *aliasIndex;
4829 CODECHAL_ENCODE_CHK_STATUS_RETURN(pCmDev->CreateBufferAlias(cmBuf[3], aliasIndex));
4830 CM_BUFFER_STATE_PARAM param;
4831 MOS_ZeroMemory(¶m,sizeof(param));
4832 param.uiSize = mbCodeSize;
4833 param.uiBaseAddressOffset = refMbCodeBottomFieldOffset;
4834 cmBuf[3]->SetSurfaceStateParam(aliasIndex, ¶m);
4835 cmSurfaces->FwdFrmMBDataSurfIndex = aliasIndex;
4836 }
4837 else
4838 {
4839 CODECHAL_ENCODE_CHK_STATUS_RETURN(cmBuf[3]->GetIndex(cmSurfaces->FwdFrmMBDataSurfIndex));
4840 }
4841 }
4842
4843 // MV data buffer offset = dwRefMvBottomFieldOffsetUsed;
4844 if ( (feiPicParams->MbCodeMvEnable) && currFieldPicture)
4845 {
4846 if(refBottomField)
4847 {
4848 CODECHAL_ENCODE_CHK_STATUS_RETURN(pCmDev->CreateBuffer(¶ms->ppRefList[refPicIdx]->resRefBotFieldMvDataBuffer, cmBuf[4]));
4849 }
4850 else
4851 {
4852 CODECHAL_ENCODE_CHK_STATUS_RETURN(pCmDev->CreateBuffer(¶ms->ppRefList[refPicIdx]->resRefTopFieldMvDataBuffer, cmBuf[4]));
4853 }
4854 CODECHAL_ENCODE_CHK_STATUS_RETURN(cmBuf[4]->GetIndex(cmSurfaces->FwdFrmMVSurfIndex));
4855
4856 }
4857 else
4858 {
4859 CODECHAL_ENCODE_CHK_STATUS_RETURN(pCmDev->CreateBuffer(¶ms->ppRefList[refPicIdx]->resRefMvDataBuffer, cmBuf[4]));
4860 if(currFieldPicture && refBottomField)
4861 {
4862 SurfaceIndex *aliasIndex;
4863 CODECHAL_ENCODE_CHK_STATUS_RETURN(pCmDev->CreateBufferAlias(cmBuf[4], aliasIndex));
4864 CM_BUFFER_STATE_PARAM param;
4865 MOS_ZeroMemory(¶m,sizeof(param));
4866 param.uiSize = mvSize;
4867 param.uiBaseAddressOffset = refMvBottomFieldOffset;
4868 cmBuf[4]->SetSurfaceStateParam(aliasIndex, ¶m);
4869 cmSurfaces->FwdFrmMVSurfIndex = aliasIndex;
4870 }
4871 else
4872 {
4873 CODECHAL_ENCODE_CHK_STATUS_RETURN(cmBuf[4]->GetIndex(cmSurfaces->FwdFrmMVSurfIndex));
4874 }
4875 }
4876 }
4877 }
4878 }
4879 pCmDev->CreateVmeSurfaceG7_5( cmSurfForVME,&surfArrayL0[0],&surfArrayL1[0], refNum0, refNum1,cmVmeSurfIdx[0]);
4880 cmSurfaces->MBVMEInterPredictionSurfIndex = cmVmeSurfIdx[0];
4881
4882 pCmDev->CreateVmeSurfaceG7_5( cmSurfForVME,&surfArrayL1[0],&surfArrayL1[0], refNum1, refNum1,cmVmeSurfIdx[1]);
4883 cmSurfaces->MBVMEInterPredictionMRSurfIndex = cmVmeSurfIdx[1];
4884
4885 CM_VME_SURFACE_STATE_PARAM vmeDimensionParam;
4886 vmeDimensionParam.width = params->dwFrameWidthInMb * 16;
4887 vmeDimensionParam.height = params->dwFrameHeightInMb * 16;
4888 pCmDev->SetVmeSurfaceStateParam(cmSurfaces->MBVMEInterPredictionSurfIndex, &vmeDimensionParam);
4889 pCmDev->SetVmeSurfaceStateParam(cmSurfaces->MBVMEInterPredictionMRSurfIndex, &vmeDimensionParam);
4890
4891 // BRC distortion data buffer for I frame
4892 if (params->bMbEncIFrameDistInUse)
4893 {
4894 CODECHAL_ENCODE_CHK_STATUS_RETURN(pCmDev->CreateSurface2D(¶ms->psMeBrcDistortionBuffer->OsResource,cmSurf[11]));
4895 CODECHAL_ENCODE_CHK_STATUS_RETURN(cmSurf[11]->GetIndex(cmSurfaces->MBDistIndex));
4896 }
4897 // RefPicSelect of Current picture
4898 if (params->bUsedAsRef)
4899 {
4900 CODECHAL_ENCODE_CHK_STATUS_RETURN(pCmDev->CreateSurface2D(&currPicRefListEntry->pRefPicSelectListEntry->sBuffer.OsResource, cmSurf[12]));
4901 CODECHAL_ENCODE_CHK_STATUS_RETURN(cmSurf[12]->GetIndex(cmSurfaces->CurrRefPicSelSurfIndex));
4902 }
4903 if (params->bFlatnessCheckEnabled)
4904 {
4905 CODECHAL_ENCODE_CHK_STATUS_RETURN(pCmDev->CreateSurface2D(¶ms->psFlatnessCheckSurface->OsResource, cmSurf[13]));
4906 CODECHAL_ENCODE_CHK_STATUS_RETURN(cmSurf[13]->GetIndex(cmSurfaces->Flatnesschk));
4907 }
4908 if (params->wPictureCodingType == B_TYPE)
4909 {
4910 auto refPic = params->pAvcSlcParams->RefPicList[LIST_1][0];
4911 if (!CodecHal_PictureIsInvalid(refPic) && params->pAvcPicIdx[refPic.FrameIdx].bValid)
4912 {
4913 auto refPicIdx = params->pAvcPicIdx[refPic.FrameIdx].ucPicIdx;
4914 CODECHAL_ENCODE_CHK_STATUS_RETURN(pCmDev->CreateSurface2D(¶ms->ppRefList[refPicIdx]->pRefPicSelectListEntry->sBuffer.OsResource, cmSurf[14]));
4915 CODECHAL_ENCODE_CHK_STATUS_RETURN(cmSurf[14]->GetIndex(cmSurfaces->L1RefPicSelSurfIndex));
4916 }
4917 }
4918 if (params->bMADEnabled)
4919 {
4920 CODECHAL_ENCODE_CHK_STATUS_RETURN(pCmDev->CreateBuffer(params->presMADDataBuffer, cmBuf[5]));
4921 CODECHAL_ENCODE_CHK_STATUS_RETURN(cmBuf[5]->GetIndex(cmSurfaces->MADSurfIndex));
4922 }
4923 if (feiPicParams->bPerMBInput)
4924 {
4925 CODECHAL_ENCODE_CHK_STATUS_RETURN(pCmDev->CreateBuffer(&(feiPicParams->resMBCtrl), cmBuf[6]));
4926 CODECHAL_ENCODE_CHK_STATUS_RETURN(cmBuf[6]->GetIndex(cmSurfaces->MBSpecficDataSurfIndex));
4927 }
4928 if (feiPicParams->MVPredictorEnable)
4929 {
4930 CODECHAL_ENCODE_CHK_STATUS_RETURN(pCmDev->CreateBuffer(&(feiPicParams->resMVPredictor), cmBuf[7]));
4931 CODECHAL_ENCODE_CHK_STATUS_RETURN(cmBuf[7]->GetIndex(cmSurfaces->FEI_MVPredSurfIndex));
4932 }
4933 if (feiPicParams->DistortionEnable)
4934 {
4935 CODECHAL_ENCODE_CHK_STATUS_RETURN(pCmDev->CreateBuffer(&(feiPicParams->resDistortion), cmBuf[8]));
4936 CODECHAL_ENCODE_CHK_STATUS_RETURN(cmBuf[8]->GetIndex(cmSurfaces->AuxVmeOutSurfIndex));
4937 }
4938 if (feiPicParams->bMBQp)
4939 {
4940 // 16 DWs per QP value
4941 CODECHAL_ENCODE_CHK_STATUS_RETURN(pCmDev->CreateBuffer(params->presMbBrcConstDataBuffer, cmBuf[9]));
4942 CODECHAL_ENCODE_CHK_STATUS_RETURN(cmBuf[9]->GetIndex(cmSurfaces->MBBRCLut));
4943 CODECHAL_ENCODE_CHK_STATUS_RETURN(pCmDev->CreateBuffer(&(feiPicParams->resMBQp), cmBuf[10]));
4944 CODECHAL_ENCODE_CHK_STATUS_RETURN(cmBuf[10]->GetIndex(cmSurfaces->MBQPBuffer));
4945 }
4946 return eStatus;
4947 }
4948
EncodeMbEncKernelFunctions()4949 MOS_STATUS CodechalEncodeAvcEncFeiG8::EncodeMbEncKernelFunctions()
4950 {
4951 MOS_STATUS eStatus = MOS_STATUS_SUCCESS;
4952
4953 CODECHAL_ENCODE_FUNCTION_ENTER;
4954
4955 CODECHAL_ENCODE_CHK_NULL_RETURN(m_hwInterface);
4956 CODECHAL_ENCODE_CHK_NULL_RETURN(m_osInterface);
4957 CODECHAL_ENCODE_CHK_NULL_RETURN(m_refList);
4958
4959 auto kernelRes = &m_resMBEncKernel;
4960
4961 uint8_t ppsIdx = m_avcSliceParams->pic_parameter_set_id;
4962 uint8_t spsIdx = m_avcPicParams[ppsIdx]->seq_parameter_set_id;
4963 auto refList = &m_refList[0];
4964 auto currRefList = m_refList[m_currReconstructedPic.FrameIdx];
4965
4966 bool roiEnabled = (m_avcPicParams[ppsIdx]->NumROI > 0) ? true : false;
4967 uint8_t currScaledIdx = m_refList[m_currReconstructedPic.FrameIdx]->ucScalingIdx;
4968
4969 uint8_t refPicListIdx = m_avcSliceParams[ppsIdx].RefPicList[0][0].FrameIdx;
4970 uint8_t refFrameListIdx = m_avcPicParam[ppsIdx].RefFrameList[refPicListIdx].FrameIdx;
4971
4972 bool dirtyRoiEnabled = (m_pictureCodingType == P_TYPE
4973 && m_avcPicParams[ppsIdx]->NumDirtyROI > 0
4974 && m_prevReconFrameIdx == refFrameListIdx);
4975
4976 // Two flags(bMbConstDataBufferNeeded, bMbQpBufferNeeded)
4977 // would be used as there are two buffers and not all cases need both the buffers
4978 // Constant Data buffer needed for MBBRC, MBQP, ROI, RollingIntraRefresh
4979 // Please note that this surface needs to be programmed for
4980 // all usage cases(including CQP cases) because DWord13 includes mode cost for high texture MBs cost.
4981 bool mbConstDataBufferInUse = bMbBrcEnabled || bMbQpDataEnabled || roiEnabled || dirtyRoiEnabled ||
4982 m_avcPicParam->EnableRollingIntraRefresh || bHighTextureModeCostEnable;
4983
4984 bool mbQpBufferInUse = bMbBrcEnabled || bBrcRoiEnabled || bMbQpDataEnabled;
4985
4986 if (m_feiEnable)
4987 {
4988 CODECHAL_ENCODE_CHK_NULL_RETURN(m_avcFeiPicParams);
4989 mbConstDataBufferInUse |= m_avcFeiPicParams->bMBQp;
4990 mbQpBufferInUse |= m_avcFeiPicParams->bMBQp;
4991 }
4992
4993 // Setup AVC Curbe
4994 CODECHAL_ENCODE_AVC_MBENC_CURBE_PARAMS mbEncCurbeParams;
4995 MOS_ZeroMemory(&mbEncCurbeParams, sizeof(mbEncCurbeParams));
4996 mbEncCurbeParams.pPicParams = m_avcPicParams[ppsIdx];
4997 mbEncCurbeParams.pSeqParams = m_avcSeqParams[spsIdx];
4998 mbEncCurbeParams.pSlcParams = m_avcSliceParams;
4999 mbEncCurbeParams.ppRefList = &(m_refList[0]);
5000 mbEncCurbeParams.pPicIdx = &(m_picIdx[0]);
5001 mbEncCurbeParams.bRoiEnabled = roiEnabled;
5002 mbEncCurbeParams.bDirtyRoiEnabled = dirtyRoiEnabled;
5003 mbEncCurbeParams.bMbEncIFrameDistEnabled = false;
5004 mbEncCurbeParams.pdwBlockBasedSkipEn = & dwMbEncBlockBasedSkipEn;
5005 mbEncCurbeParams.bBrcEnabled = bBrcEnabled;
5006 mbEncCurbeParams.wPicWidthInMb = m_picWidthInMb;
5007 mbEncCurbeParams.wFieldFrameHeightInMb = m_frameFieldHeightInMb;
5008 mbEncCurbeParams.usSliceHeight = (m_arbitraryNumMbsInSlice) ?
5009 m_frameFieldHeightInMb : m_sliceHeight;
5010 mbEncCurbeParams.bUseMbEncAdvKernel = bUseMbEncAdvKernel;
5011 mbEncCurbeParams.pAvcQCParams = m_avcQCParams;
5012 mbEncCurbeParams.bMbDisableSkipMapEnabled = bMbDisableSkipMapEnabled;
5013 mbEncCurbeParams.bStaticFrameDetectionEnabled = bStaticFrameDetectionEnable && m_hmeEnabled;
5014 mbEncCurbeParams.bApdatvieSearchWindowSizeEnabled = bApdatvieSearchWindowEnable;
5015 mbEncCurbeParams.bSquareRollingIEnabled = bSquareRollingIEnabled;
5016 mbEncCurbeParams.pCurbeBinary = kernelRes->pCurbe;
5017 CODECHAL_ENCODE_CHK_STATUS_RETURN( SetCurbeAvcMbEnc(&mbEncCurbeParams));
5018
5019 for (int i = 0; i < CODEC_AVC_MAX_NUM_REF_FRAME; i++)
5020 {
5021 if (m_picIdx[i].bValid)
5022 {
5023 uint8_t index = m_picIdx[i].ucPicIdx;
5024 refList[index]->sRefBuffer = m_userFlags.bUseRawPicForRef ?
5025 refList[index]->sRefRawBuffer : refList[index]->sRefReconBuffer;
5026
5027 CodecHalGetResourceInfo(m_osInterface, &refList[index]->sRefBuffer);
5028 }
5029 }
5030
5031 // Set up MB BRC Constant Data Buffer if there is QP change within a frame
5032 if (mbConstDataBufferInUse)
5033 {
5034 CODECHAL_ENCODE_AVC_INIT_MBBRC_CONSTANT_DATA_BUFFER_PARAMS initMbBrcConstantDataBufferParams;
5035
5036 MOS_ZeroMemory(&initMbBrcConstantDataBufferParams, sizeof(initMbBrcConstantDataBufferParams));
5037 initMbBrcConstantDataBufferParams.pOsInterface = m_osInterface;
5038 initMbBrcConstantDataBufferParams.presBrcConstantDataBuffer =
5039 & BrcBuffers.resMbBrcConstDataBuffer[m_currRecycledBufIdx];
5040 initMbBrcConstantDataBufferParams.dwMbEncBlockBasedSkipEn = dwMbEncBlockBasedSkipEn;
5041 initMbBrcConstantDataBufferParams.pPicParams = m_avcPicParams[ppsIdx];
5042 initMbBrcConstantDataBufferParams.wPictureCodingType = m_pictureCodingType;
5043 initMbBrcConstantDataBufferParams.bSkipBiasAdjustmentEnable = m_skipBiasAdjustmentEnable;
5044 initMbBrcConstantDataBufferParams.bAdaptiveIntraScalingEnable = bAdaptiveIntraScalingEnable;
5045 initMbBrcConstantDataBufferParams.bOldModeCostEnable = bOldModeCostEnable;
5046 initMbBrcConstantDataBufferParams.pAvcQCParams = m_avcQCParams;
5047 initMbBrcConstantDataBufferParams.bEnableKernelTrellis = bKernelTrellis && m_trellisQuantParams.dwTqEnabled;
5048
5049 // Kernel controlled Trellis Quantization
5050 if ( bKernelTrellis && m_trellisQuantParams.dwTqEnabled)
5051 {
5052 CODECHAL_ENCODE_CHK_STATUS_RETURN( CalcLambdaTable(
5053 m_pictureCodingType,
5054 &initMbBrcConstantDataBufferParams.Lambda[0][0]));
5055 }
5056
5057 CODECHAL_ENCODE_CHK_STATUS_RETURN( InitMbBrcConstantDataBuffer(&initMbBrcConstantDataBufferParams));
5058 }
5059
5060 CODECHAL_ENCODE_AVC_MBENC_SURFACE_PARAMS mbEncSurfaceParams;
5061 //Add surface states
5062 MOS_ZeroMemory(&mbEncSurfaceParams, sizeof(mbEncSurfaceParams));
5063 mbEncSurfaceParams.pAvcSlcParams = m_avcSliceParams;
5064 mbEncSurfaceParams.ppRefList = &m_refList[0];
5065 mbEncSurfaceParams.pAvcPicIdx = &m_picIdx[0];
5066 mbEncSurfaceParams.pCurrOriginalPic = &m_currOriginalPic;
5067 mbEncSurfaceParams.pCurrReconstructedPic = &m_currReconstructedPic;
5068 mbEncSurfaceParams.wPictureCodingType = m_pictureCodingType;
5069 mbEncSurfaceParams.psCurrPicSurface = m_rawSurfaceToEnc;
5070 mbEncSurfaceParams.dwMbCodeBottomFieldOffset = m_mbcodeBottomFieldOffset;
5071 mbEncSurfaceParams.dwMvBottomFieldOffset = m_mvBottomFieldOffset;
5072 mbEncSurfaceParams.ps4xMeMvDataBuffer = &m_4xMeMvDataBuffer;
5073 mbEncSurfaceParams.ps4xMeDistortionBuffer = &m_4xMeDistortionBuffer;
5074 mbEncSurfaceParams.dwMeMvBottomFieldOffset = m_meMvBottomFieldOffset;
5075 mbEncSurfaceParams.psMeBrcDistortionBuffer = & BrcBuffers.sMeBrcDistortionBuffer;
5076 mbEncSurfaceParams.dwMeBrcDistortionBottomFieldOffset = BrcBuffers.dwMeBrcDistortionBottomFieldOffset;
5077 mbEncSurfaceParams.dwMeDistortionBottomFieldOffset = m_meDistortionBottomFieldOffset;
5078 mbEncSurfaceParams.dwRefPicSelectBottomFieldOffset = ulRefPicSelectBottomFieldOffset;
5079 mbEncSurfaceParams.dwFrameWidthInMb = m_picWidthInMb;
5080 mbEncSurfaceParams.dwFrameFieldHeightInMb = m_frameFieldHeightInMb;
5081 mbEncSurfaceParams.dwFrameHeightInMb = m_picHeightInMb;
5082 // Interleaved input surfaces
5083 mbEncSurfaceParams.dwVerticalLineStride = m_verticalLineStride;
5084 mbEncSurfaceParams.dwVerticalLineStrideOffset = m_verticalLineStrideOffset;
5085 // Vertical line stride is not used for the case of scaled surfaces saved as separate fields
5086 mbEncSurfaceParams.bHmeEnabled = m_hmeSupported;
5087 mbEncSurfaceParams.presMbBrcConstDataBuffer = & BrcBuffers.resMbBrcConstDataBuffer[m_currRecycledBufIdx];
5088 mbEncSurfaceParams.psMbQpBuffer =
5089 bMbQpDataEnabled ? & sMbQpDataSurface : & BrcBuffers.sBrcMbQpBuffer;
5090 mbEncSurfaceParams.dwMbQpBottomFieldOffset = bMbQpDataEnabled ? 0 : BrcBuffers.dwBrcMbQpBottomFieldOffset;
5091 mbEncSurfaceParams.bUsedAsRef = m_refList[m_currReconstructedPic.FrameIdx]->bUsedAsRef;
5092 mbEncSurfaceParams.presMADDataBuffer = &m_resMadDataBuffer[m_currMadBufferIdx];
5093 mbEncSurfaceParams.bMbQpBufferInUse = mbQpBufferInUse;
5094 mbEncSurfaceParams.bMbConstDataBufferInUse = mbConstDataBufferInUse;
5095 mbEncSurfaceParams.bMADEnabled = m_bMadEnabled;
5096 mbEncSurfaceParams.bUseMbEncAdvKernel = bUseMbEncAdvKernel;
5097 mbEncSurfaceParams.presMbEncCurbeBuffer = & BrcBuffers.resMbEncAdvancedDsh;
5098 mbEncSurfaceParams.presMbEncBRCBuffer = & BrcBuffers.resMbEncBrcBuffer;
5099
5100 if ( bDecoupleMbEncCurbeFromBRC) //Starting from Gen95
5101 {
5102 mbEncSurfaceParams.dwMbEncBRCBufferSize = m_mbencBrcBufferSize;
5103 }
5104
5105 mbEncSurfaceParams.bUseAdvancedDsh = bAdvancedDshInUse;
5106 mbEncSurfaceParams.bBrcEnabled = bBrcEnabled;
5107 mbEncSurfaceParams.bArbitraryNumMbsInSlice = m_arbitraryNumMbsInSlice;
5108 mbEncSurfaceParams.psSliceMapSurface = &m_sliceMapSurface[m_currRecycledBufIdx];
5109 mbEncSurfaceParams.dwSliceMapBottomFieldOffset = m_sliceMapBottomFieldOffset;
5110 mbEncSurfaceParams.pMbEncBindingTable = & MbEncBindingTable;
5111
5112 if(m_mbStatsSupported)
5113 {
5114 mbEncSurfaceParams.bMBVProcStatsEnabled = (m_flatnessCheckEnabled || bAdaptiveTransformDecisionEnabled);
5115 mbEncSurfaceParams.presMBVProcStatsBuffer = &m_resMbStatsBuffer;
5116 mbEncSurfaceParams.dwMBVProcStatsBottomFieldOffset = m_mbStatsBottomFieldOffset;
5117 }
5118 else
5119 {
5120 mbEncSurfaceParams.bFlatnessCheckEnabled = m_flatnessCheckEnabled;
5121 mbEncSurfaceParams.psFlatnessCheckSurface = &m_flatnessCheckSurface;
5122 mbEncSurfaceParams.dwFlatnessCheckBottomFieldOffset = m_flatnessCheckBottomFieldOffset;
5123 }
5124
5125 // Set up pFeiPicParams
5126 mbEncSurfaceParams.pFeiPicParams = m_avcFeiPicParams;
5127
5128 mbEncSurfaceParams.bMbDisableSkipMapEnabled = bMbDisableSkipMapEnabled;
5129 mbEncSurfaceParams.psMbDisableSkipMapSurface = psMbDisableSkipMapSurface;
5130
5131 if( bUseWeightedSurfaceForL0 || bUseWeightedSurfaceForL1)
5132 {
5133 mbEncSurfaceParams.pWeightedPredOutputPicSelectList = &WeightedPredOutputPicSelectList[0];
5134 mbEncSurfaceParams.bUseWeightedSurfaceForL0 = bUseWeightedSurfaceForL0;
5135 mbEncSurfaceParams.bUseWeightedSurfaceForL1 = bUseWeightedSurfaceForL1;
5136 }
5137
5138 // Clear the MAD buffer -- the kernel requires it to be 0 as it accumulates the result
5139 if (mbEncSurfaceParams.bMADEnabled)
5140 {
5141 MOS_LOCK_PARAMS lockFlags;
5142 // set lock flag to WRITE_ONLY
5143 MOS_ZeroMemory(&lockFlags, sizeof(MOS_LOCK_PARAMS));
5144 lockFlags.WriteOnly = 1;
5145
5146 uint8_t* pbData = (uint8_t*)m_osInterface->pfnLockResource(
5147 m_osInterface,
5148 mbEncSurfaceParams.presMADDataBuffer,
5149 &lockFlags);
5150
5151 CODECHAL_ENCODE_CHK_NULL_RETURN(pbData);
5152
5153 MOS_ZeroMemory(pbData, CODECHAL_MAD_BUFFER_SIZE);
5154
5155 m_osInterface->pfnUnlockResource(
5156 m_osInterface,
5157 mbEncSurfaceParams.presMADDataBuffer);
5158
5159 CODECHAL_DEBUG_TOOL(CODECHAL_ENCODE_CHK_STATUS_RETURN(m_debugInterface->DumpBuffer(
5160 &m_resMadDataBuffer[m_currMadBufferIdx],
5161 CodechalDbgAttr::attrOutput,
5162 "MADRead",
5163 CODECHAL_MAD_BUFFER_SIZE,
5164 0,
5165 CODECHAL_MEDIA_STATE_ENC_QUALITY)));
5166 }
5167
5168 // static frame detection buffer
5169 mbEncSurfaceParams.bStaticFrameDetectionEnabled = bStaticFrameDetectionEnable && m_hmeEnabled;
5170 mbEncSurfaceParams.presSFDOutputBuffer = & resSFDOutputBuffer[0];
5171 if (m_pictureCodingType == P_TYPE)
5172 {
5173 mbEncSurfaceParams.presSFDCostTableBuffer = & resSFDCostTablePFrameBuffer;
5174 }
5175 else if (m_pictureCodingType == B_TYPE)
5176 {
5177 mbEncSurfaceParams.presSFDCostTableBuffer = & resSFDCostTableBFrameBuffer;
5178 }
5179
5180 CODECHAL_ENCODE_CHK_STATUS_RETURN( SendAvcMbEncSurfaces(nullptr, &mbEncSurfaceParams));
5181 //CODECHAL_ENCODE_CHK_STATUS_RETURN( pfnSendAvcMbEncSurfaces(m_hwInterface, &CmdBuffer, &mbEncSurfaceParams));
5182 //pay attention height //0 P 1 B 2 I
5183 CODECHAL_ENCODE_AVC_MBENC_DISPATCH_PARAMS dispatchParams;
5184 MOS_ZeroMemory(&dispatchParams,sizeof(dispatchParams));
5185 dispatchParams.kernelRes = kernelRes;
5186 dispatchParams.avcMBEncSurface = (PCODECHAL_ENCODE_AVC_SURFACE_IDX)m_avcCmSurfIdx;
5187 dispatchParams.enableArbitrarySliceSize = m_arbitraryNumMbsInSlice;
5188 dispatchParams.frameWidthInMBs = m_picWidthInMb;
5189 dispatchParams.sliceHeight = mbEncCurbeParams.usSliceHeight;
5190 dispatchParams.numSlices = 1;
5191 dispatchParams.sliceType = m_pictureCodingType;
5192 dispatchParams.numMBs = m_frameFieldHeightInMb * m_picWidthInMb;
5193 dispatchParams.enableWavefrontOptimization = false;
5194 CODECHAL_ENCODE_CHK_STATUS_RETURN( DispatchKernelMbEnc(&dispatchParams));
5195
5196 CODECHAL_ENCODE_CHK_STATUS_RETURN(AddKernelMdf(pCmDev,pCmQueue,kernelRes->ppKernel[m_pictureCodingType - 1],pCmTask,kernelRes->pTS,kernelRes->e,true));
5197 if(pCmEvent[nCmEventIdx] )
5198 {
5199 pCmQueue->DestroyEvent(pCmEvent[nCmEventIdx]);
5200 }
5201 pCmEvent[nCmEventIdx] = kernelRes->e;
5202 nCmEventIdx ++;
5203 nCmEventIdx %= CM_EVENT_NUM;
5204
5205 CodecHalEncode_FreeMDFKernelSurfaces(this, kernelRes);
5206 currRefList->ucMADBufferIdx = m_currMadBufferIdx;
5207 currRefList->bMADEnabled = m_bMadEnabled;
5208
5209 return eStatus;
5210 }
5211
DispatchKernelPreProc(SurfaceIndex ** surfIndexArray,uint16_t width,uint16_t height)5212 MOS_STATUS CodechalEncodeAvcEncFeiG8::DispatchKernelPreProc(
5213 SurfaceIndex** surfIndexArray,
5214 uint16_t width,
5215 uint16_t height)
5216 {
5217 MOS_STATUS eStatus = MOS_STATUS_SUCCESS;
5218
5219 CODECHAL_ENCODE_FUNCTION_ENTER;
5220
5221 auto kernelRes = &m_resPreProcKernel;
5222 auto kernel = kernelRes->ppKernel[0];
5223 // config thread space
5224 uint32_t threadswidth = CODECHAL_GET_WIDTH_IN_MACROBLOCKS(width);
5225 uint32_t threadsheight = CODECHAL_GET_WIDTH_IN_MACROBLOCKS(height + 15);
5226 CODECHAL_ENCODE_CHK_STATUS_RETURN(kernel->SetThreadCount(threadswidth * threadsheight));
5227
5228 uint32_t kernelArgIdx = 0;
5229 CODECHAL_ENCODE_CHK_STATUS_RETURN(kernel->SetKernelArg(kernelArgIdx++, kernelRes->wCurbeSize, kernelRes->pCurbe));
5230 // Current Input Picture surface
5231 CODECHAL_ENCODE_CHK_STATUS_RETURN(kernel->SetKernelArg(kernelArgIdx++, sizeof(SurfaceIndex), surfIndexArray[0]));
5232 // HME MV Input Surface
5233 CODECHAL_ENCODE_CHK_STATUS_RETURN(kernel->SetKernelArg(kernelArgIdx++, sizeof(SurfaceIndex), surfIndexArray[1]));
5234 // App Provided Prediction surfaces
5235 CODECHAL_ENCODE_CHK_STATUS_RETURN(kernel->SetKernelArg(kernelArgIdx++, sizeof(SurfaceIndex), surfIndexArray[2]));
5236 // Qp Per MB Input Surface
5237 CODECHAL_ENCODE_CHK_STATUS_RETURN(kernel->SetKernelArg(kernelArgIdx++, sizeof(SurfaceIndex), surfIndexArray[3]));
5238 // MV Data Output Surface
5239 CODECHAL_ENCODE_CHK_STATUS_RETURN(kernel->SetKernelArg(kernelArgIdx++, sizeof(SurfaceIndex), surfIndexArray[4]));
5240 // MB VProc Stats Buffer
5241 CODECHAL_ENCODE_CHK_STATUS_RETURN(kernel->SetKernelArg(kernelArgIdx++, sizeof(SurfaceIndex), surfIndexArray[5]));
5242 // fwd ref surfaces. if not provided, set to output surface
5243 CODECHAL_ENCODE_CHK_STATUS_RETURN(kernel->SetKernelArg(kernelArgIdx++, sizeof(SurfaceIndex), surfIndexArray[6]));
5244 // bwd ref surfaces. if not provided, set to output surface
5245 CODECHAL_ENCODE_CHK_STATUS_RETURN(kernel->SetKernelArg(kernelArgIdx++, sizeof(SurfaceIndex), surfIndexArray[7]));
5246 // Qp and FTQ LUT
5247 CODECHAL_ENCODE_CHK_STATUS_RETURN(kernel->SetKernelArg(kernelArgIdx++, sizeof(SurfaceIndex), surfIndexArray[8]));
5248
5249 if(nullptr == kernelRes->pTS)
5250 {
5251 CODECHAL_ENCODE_CHK_STATUS_RETURN(pCmDev->CreateThreadSpace(threadswidth, threadsheight, kernelRes->pTS));
5252 }
5253 bool isEnqueue = false;
5254 if((!m_singleTaskPhaseSupported) || m_lastTaskInPhase)
5255 {
5256 isEnqueue = true;
5257 m_lastTaskInPhase = false;
5258 }
5259 CODECHAL_ENCODE_CHK_STATUS_RETURN(AddKernelMdf(pCmDev,pCmQueue,kernel,pCmTask,kernelRes->pTS,kernelRes->e,isEnqueue));
5260
5261 // assign the Cm event to global array
5262 // codechal will check the event to process further
5263 if (pCmEvent[nCmEventIdx])
5264 {
5265 pCmQueue->DestroyEvent(pCmEvent[nCmEventIdx]);
5266 }
5267 pCmEvent[nCmEventIdx] = kernelRes->e;
5268 nCmEventIdx = (nCmEventIdx + 1 ) % CM_EVENT_NUM;
5269
5270 return eStatus;
5271 }
5272
PreProcKernel()5273 MOS_STATUS CodechalEncodeAvcEncFeiG8::PreProcKernel()
5274 {
5275 MOS_STATUS eStatus = MOS_STATUS_SUCCESS;
5276
5277 CODECHAL_ENCODE_FUNCTION_ENTER;
5278
5279 CODECHAL_ENCODE_CHK_NULL_RETURN(pCmDev);
5280
5281 auto kernelRes = &m_resPreProcKernel;
5282 auto cmSurf = kernelRes->ppCmSurf;
5283 auto cmBuf = kernelRes->ppCmBuf;
5284 auto cmVmeSurfIdx = kernelRes->ppCmVmeSurf;
5285
5286 auto preEncParams = (FeiPreEncParams*)m_encodeParams.pPreEncParams;
5287 auto refList = &m_refList[0];
5288
5289 CODECHAL_ENCODE_AVC_PREPROC_CURBE_PARAMS preProcCurbeParams;
5290 // Setup Curbe
5291 MOS_ZeroMemory(&preProcCurbeParams, sizeof(preProcCurbeParams));
5292 preProcCurbeParams.pPreEncParams = preEncParams;
5293 preProcCurbeParams.wPicWidthInMb = m_picWidthInMb;
5294 preProcCurbeParams.wFieldFrameHeightInMb = m_frameFieldHeightInMb;
5295 preProcCurbeParams.pCurbeBinary = kernelRes->pCurbe;
5296
5297 SetCurbeAvcPreProc(&preProcCurbeParams);
5298
5299 for (int i = 0; i < CODEC_AVC_MAX_NUM_REF_FRAME; i++)
5300 {
5301 if (m_picIdx[i].bValid)
5302 {
5303 uint8_t index = m_picIdx[i].ucPicIdx;
5304 refList[index]->sRefBuffer = refList[index]->sRefRawBuffer;
5305 CodecHalGetResourceInfo(m_osInterface, &refList[index]->sRefBuffer);
5306 }
5307 }
5308
5309 // Set up FtqLut Buffer if there is QP change within a frame
5310 if (preEncParams->bMBQp)
5311 {
5312 CODECHAL_ENCODE_AVC_INIT_MBBRC_CONSTANT_DATA_BUFFER_PARAMS initMbBrcConstantDataBufferParams;
5313
5314 MOS_ZeroMemory(&initMbBrcConstantDataBufferParams, sizeof(initMbBrcConstantDataBufferParams));
5315 initMbBrcConstantDataBufferParams.pOsInterface = m_osInterface;
5316 initMbBrcConstantDataBufferParams.presBrcConstantDataBuffer =
5317 &BrcBuffers.resMbBrcConstDataBuffer[m_currRecycledBufIdx];
5318 initMbBrcConstantDataBufferParams.bPreProcEnable = true;
5319 initMbBrcConstantDataBufferParams.bEnableKernelTrellis = bKernelTrellis && m_trellisQuantParams.dwTqEnabled;;
5320
5321 CODECHAL_ENCODE_CHK_STATUS_RETURN(InitMbBrcConstantDataBuffer(&initMbBrcConstantDataBufferParams));
5322 }
5323 SurfaceIndex *cmSurfIdx[9];
5324 for(int i = 0; i < 9; i ++)
5325 {
5326 cmSurfIdx[i] = (SurfaceIndex*)CM_NULL_SURFACE;
5327 }
5328
5329 CODECHAL_ENCODE_CHK_STATUS_RETURN(pCmDev->CreateSurface2D(&m_rawSurfaceToEnc->OsResource, cmSurf[0]));
5330 CODECHAL_ENCODE_CHK_STATUS_RETURN(cmSurf[0]->GetIndex(cmSurfIdx[0])); // current input surface
5331
5332 if(CodecHal_PictureIsField(m_currOriginalPic))
5333 {
5334 if(CodecHal_PictureIsTopField(m_currOriginalPic))
5335 {
5336 cmSurf[0]->SetProperty(CM_TOP_FIELD);
5337 }
5338 else
5339 {
5340 cmSurf[0]->SetProperty(CM_BOTTOM_FIELD);
5341 }
5342 }
5343
5344 // HME MV input surface
5345 if(m_hmeEnabled)
5346 {
5347 CODECHAL_ENCODE_CHK_STATUS_RETURN(pCmDev->CreateSurface2D(&m_4xMeMvDataBuffer.OsResource, cmSurf[1]));
5348 CODECHAL_ENCODE_CHK_STATUS_RETURN(cmSurf[1]->GetIndex(cmSurfIdx[1]));
5349 }
5350
5351 // App Provided Prediction surfaces
5352 if(preEncParams->dwMVPredictorCtrl)
5353 {
5354 CODECHAL_ENCODE_CHK_STATUS_RETURN(pCmDev->CreateBuffer(&preEncParams->resMvPredBuffer, cmBuf[0]));
5355 CODECHAL_ENCODE_CHK_STATUS_RETURN(cmBuf[0]->GetIndex(cmSurfIdx[2]));
5356 }
5357
5358 if (preEncParams->bMBQp)
5359 {
5360 // Qp Per MB Input Surface
5361 CODECHAL_ENCODE_CHK_STATUS_RETURN(pCmDev->CreateBuffer(&preEncParams->resMbQpBuffer, cmBuf[1]));
5362 CODECHAL_ENCODE_CHK_STATUS_RETURN(cmBuf[1]->GetIndex(cmSurfIdx[3]));
5363 // Qp and FTQ LUT
5364 CODECHAL_ENCODE_CHK_STATUS_RETURN(pCmDev->CreateBuffer(&BrcBuffers.resMbBrcConstDataBuffer[m_currRecycledBufIdx], cmBuf[2]));
5365 CODECHAL_ENCODE_CHK_STATUS_RETURN(cmBuf[2]->GetIndex(cmSurfIdx[8]));
5366 }
5367
5368 // MV Data Output Surface
5369 if(!preEncParams->bDisableMVOutput)
5370 {
5371 CODECHAL_ENCODE_CHK_STATUS_RETURN(pCmDev->CreateBuffer(&preEncParams->resMvBuffer, cmBuf[3]));
5372 CODECHAL_ENCODE_CHK_STATUS_RETURN(cmBuf[3]->GetIndex(cmSurfIdx[4]));
5373 }
5374
5375 if(!preEncParams->bDisableStatisticsOutput)
5376 {
5377 if(CodecHal_PictureIsBottomField(m_currOriginalPic))
5378 {
5379 CODECHAL_ENCODE_CHK_STATUS_RETURN(pCmDev->CreateBuffer(&preEncParams->resStatsBotFieldBuffer, cmBuf[4]));
5380 CODECHAL_ENCODE_CHK_STATUS_RETURN(cmBuf[4]->GetIndex(cmSurfIdx[5]));
5381 }
5382 else
5383 {
5384 CODECHAL_ENCODE_CHK_STATUS_RETURN(pCmDev->CreateBuffer(&preEncParams->resStatsBuffer, cmBuf[4]));
5385 CODECHAL_ENCODE_CHK_STATUS_RETURN(cmBuf[4]->GetIndex(cmSurfIdx[5]));
5386 }
5387 }
5388
5389 uint8_t baseIdx = 1;
5390 auto cmSurfForVme = cmSurf[0];
5391 uint8_t refIdx = 0;
5392 CmSurface2D *surfArray[8];//[NUM_SURFACES];
5393 if(preEncParams->dwNumPastReferences)
5394 {
5395 CODEC_PICTURE refPic = preEncParams->PastRefPicture;
5396 uint8_t refPicIdx = refPic.FrameIdx;
5397 CODECHAL_ENCODE_CHK_STATUS_RETURN(pCmDev->CreateSurface2D(&m_refList[refPicIdx]->sRefBuffer.OsResource, cmSurf[baseIdx + 1]));
5398 surfArray[0] = (CmSurface2D*)cmSurf[baseIdx + 1];
5399
5400 refIdx = 1;
5401 }
5402 CODECHAL_ENCODE_CHK_STATUS_RETURN(pCmDev->CreateVmeSurfaceG7_5(cmSurfForVme, &surfArray[0], nullptr, refIdx, 0, cmVmeSurfIdx[0]));
5403 cmSurfIdx[6] = cmVmeSurfIdx[0];
5404
5405 baseIdx = 2;
5406 refIdx = 0;
5407 if(preEncParams->dwNumFutureReferences)
5408 {
5409 CODEC_PICTURE refPic = preEncParams->FutureRefPicture;
5410 uint8_t refPicIdx = refPic.FrameIdx;
5411
5412 CODECHAL_ENCODE_CHK_STATUS_RETURN(pCmDev->CreateSurface2D(&m_refList[refPicIdx]->sRefBuffer.OsResource, cmSurf[baseIdx + 1]));
5413 surfArray[0] = (CmSurface2D*)cmSurf[baseIdx + 1];
5414 refIdx = 1;
5415 }
5416
5417 CODECHAL_ENCODE_CHK_STATUS_RETURN(pCmDev->CreateVmeSurfaceG7_5(cmSurfForVme, &surfArray[0], nullptr, refIdx, 0, cmVmeSurfIdx[1]));
5418 cmSurfIdx[7] = cmVmeSurfIdx[1];
5419 CODECHAL_ENCODE_CHK_STATUS_RETURN(DispatchKernelPreProc(cmSurfIdx,(uint16_t)m_frameWidth, (uint16_t)m_frameFieldHeight));
5420 return eStatus;
5421 }
5422
5423 #else
InitKernelStateMe()5424 MOS_STATUS CodechalEncodeAvcEncFeiG8::InitKernelStateMe()
5425 {
5426 MOS_STATUS eStatus = MOS_STATUS_SUCCESS;
5427
5428 CODECHAL_ENCODE_FUNCTION_ENTER;
5429
5430 uint8_t* kernelBinary;
5431 uint32_t kernelSize;
5432
5433 CODECHAL_ENCODE_CHK_STATUS_RETURN(CodecHalGetKernelBinaryAndSize(m_kernelBase, m_kuid, &kernelBinary, &kernelSize));
5434
5435 for (uint32_t krnStateIdx = 0; krnStateIdx < 2; krnStateIdx++)
5436 {
5437 auto kernelStatePtr = &m_meKernelStates[krnStateIdx];
5438 CODECHAL_KERNEL_HEADER currKrnHeader;
5439
5440 CODECHAL_ENCODE_CHK_STATUS_RETURN(EncodeGetKernelHeaderAndSize(
5441 kernelBinary,
5442 ENC_ME,
5443 krnStateIdx,
5444 &currKrnHeader,
5445 &kernelSize));
5446
5447 kernelStatePtr->KernelParams.iBTCount = ME_NUM_SURFACES_CM;
5448 kernelStatePtr->KernelParams.iThreadCount = m_renderEngineInterface->GetHwCaps()->dwMaxThreads;
5449 kernelStatePtr->KernelParams.iCurbeLength = sizeof(ME_CURBE_CM_FEI);
5450 kernelStatePtr->KernelParams.iBlockWidth = CODECHAL_MACROBLOCK_WIDTH;
5451 kernelStatePtr->KernelParams.iBlockHeight = CODECHAL_MACROBLOCK_HEIGHT;
5452 kernelStatePtr->KernelParams.iIdCount = 1;
5453
5454 kernelStatePtr->dwCurbeOffset = m_stateHeapInterface->pStateHeapInterface->GetSizeofCmdInterfaceDescriptorData();
5455 kernelStatePtr->KernelParams.pBinary = kernelBinary + (currKrnHeader.KernelStartPointer << MHW_KERNEL_OFFSET_SHIFT);
5456 kernelStatePtr->KernelParams.iSize = kernelSize;
5457 CODECHAL_ENCODE_CHK_STATUS_RETURN(m_stateHeapInterface->pfnCalculateSshAndBtSizesRequested(
5458 m_stateHeapInterface,
5459 kernelStatePtr->KernelParams.iBTCount,
5460 &kernelStatePtr->dwSshSize,
5461 &kernelStatePtr->dwBindingTableSize));
5462
5463 CODECHAL_ENCODE_CHK_STATUS_RETURN(m_hwInterface->MhwInitISH(m_stateHeapInterface, kernelStatePtr));
5464 }
5465
5466 // Until a better way can be found, maintain old binding table structures
5467 auto bindingTable = &m_meBindingTable;
5468 bindingTable->dwMEMVDataSurface = ME_MV_DATA_SURFACE_CM;
5469 bindingTable->dw16xMEMVDataSurface = ME_16x_MV_DATA_SURFACE_CM;
5470 bindingTable->dw32xMEMVDataSurface = ME_32x_MV_DATA_SURFACE_CM;
5471 bindingTable->dwMEDist = ME_DISTORTION_SURFACE_CM;
5472 bindingTable->dwMEBRCDist = ME_BRC_DISTORTION_CM;
5473 bindingTable->dwMECurrForFwdRef = ME_CURR_FOR_FWD_REF_CM;
5474 bindingTable->dwMEFwdRefPicIdx[0] = ME_FWD_REF_IDX0_CM;
5475 bindingTable->dwMEFwdRefPicIdx[1] = ME_FWD_REF_IDX1_CM;
5476 bindingTable->dwMEFwdRefPicIdx[2] = ME_FWD_REF_IDX2_CM;
5477 bindingTable->dwMEFwdRefPicIdx[3] = ME_FWD_REF_IDX3_CM;
5478 bindingTable->dwMEFwdRefPicIdx[4] = ME_FWD_REF_IDX4_CM;
5479 bindingTable->dwMEFwdRefPicIdx[5] = ME_FWD_REF_IDX5_CM;
5480 bindingTable->dwMEFwdRefPicIdx[6] = ME_FWD_REF_IDX6_CM;
5481 bindingTable->dwMEFwdRefPicIdx[7] = ME_FWD_REF_IDX7_CM;
5482 bindingTable->dwMECurrForBwdRef = ME_CURR_FOR_BWD_REF_CM;
5483 bindingTable->dwMEBwdRefPicIdx[0] = ME_BWD_REF_IDX0_CM;
5484 bindingTable->dwMEBwdRefPicIdx[1] = ME_BWD_REF_IDX1_CM;
5485 return eStatus;
5486 }
5487
InitKernelStateMbEnc()5488 MOS_STATUS CodechalEncodeAvcEncFeiG8::InitKernelStateMbEnc()
5489 {
5490 MOS_STATUS eStatus = MOS_STATUS_SUCCESS;
5491 CODECHAL_ENCODE_FUNCTION_ENTER;
5492 CODECHAL_ENCODE_CHK_NULL_RETURN(m_hwInterface->GetRenderInterface()->GetHwCaps());
5493
5494 uint32_t numMbEncKrnStates =
5495 MBENC_TARGET_USAGE_CM * m_mbencNumTargetUsagesCmFei;
5496 pMbEncKernelStates =
5497 MOS_NewArray(MHW_KERNEL_STATE, numMbEncKrnStates);
5498 CODECHAL_ENCODE_CHK_NULL_RETURN(pMbEncKernelStates);
5499
5500 auto kernelStatePtr = pMbEncKernelStates;
5501 uint8_t* kernelBinary;
5502 uint32_t kernelSize;
5503
5504 CODECHAL_ENCODE_CHK_STATUS_RETURN(CodecHalGetKernelBinaryAndSize(m_kernelBase, m_kuid, &kernelBinary, &kernelSize));
5505
5506 for (uint32_t krnStateIdx = 0; krnStateIdx < numMbEncKrnStates; krnStateIdx++)
5507 {
5508 bool kernelState = (krnStateIdx >= MBENC_TARGET_USAGE_CM);
5509
5510 CODECHAL_KERNEL_HEADER currKrnHeader;
5511 CODECHAL_ENCODE_CHK_STATUS_RETURN(pfnGetKernelHeaderAndSize(
5512 kernelBinary,
5513 (kernelState ? ENC_MBENC_ADV : ENC_MBENC),
5514 (kernelState ? krnStateIdx - MBENC_TARGET_USAGE_CM : krnStateIdx),
5515 &currKrnHeader,
5516 &kernelSize));
5517
5518 kernelStatePtr->KernelParams.iBTCount = MBENC_NUM_SURFACES_CM;
5519 kernelStatePtr->KernelParams.iThreadCount = m_renderEngineInterface->GetHwCaps()->dwMaxThreads;
5520 kernelStatePtr->KernelParams.iCurbeLength = sizeof(MBENC_CURBE_CM_FEI);
5521 kernelStatePtr->KernelParams.iBlockWidth = CODECHAL_MACROBLOCK_WIDTH;
5522 kernelStatePtr->KernelParams.iBlockHeight = CODECHAL_MACROBLOCK_HEIGHT;
5523 kernelStatePtr->KernelParams.iIdCount = 1;
5524
5525 CODECHAL_ENCODE_CHK_NULL_RETURN(m_stateHeapInterface);
5526 kernelStatePtr->dwCurbeOffset = m_stateHeapInterface->pStateHeapInterface->GetSizeofCmdInterfaceDescriptorData();
5527 kernelStatePtr->KernelParams.pBinary = kernelBinary + (currKrnHeader.KernelStartPointer << MHW_KERNEL_OFFSET_SHIFT);
5528 kernelStatePtr->KernelParams.iSize = kernelSize;
5529
5530 CODECHAL_ENCODE_CHK_STATUS_RETURN(m_stateHeapInterface->pfnCalculateSshAndBtSizesRequested(
5531 m_stateHeapInterface,
5532 kernelStatePtr->KernelParams.iBTCount,
5533 &kernelStatePtr->dwSshSize,
5534 &kernelStatePtr->dwBindingTableSize));
5535
5536 CODECHAL_ENCODE_CHK_STATUS_RETURN(m_hwInterface->MhwInitISH(m_stateHeapInterface, kernelStatePtr));
5537
5538 kernelStatePtr++;
5539 }
5540
5541 // Until a better way can be found, maintain old binding table structures
5542 auto bindingTable = &MbEncBindingTable;
5543
5544 bindingTable->dwAvcMBEncMfcAvcPakObj = MBENC_MFC_AVC_PAK_OBJ_CM_FEI;
5545 bindingTable->dwAvcMBEncIndMVData = MBENC_IND_MV_DATA_CM_FEI;
5546 bindingTable->dwAvcMBEncBRCDist = MBENC_BRC_DISTORTION_CM_FEI;
5547 bindingTable->dwAvcMBEncCurrY = MBENC_CURR_Y_CM_FEI;
5548 bindingTable->dwAvcMBEncCurrUV = MBENC_CURR_UV_CM_FEI;
5549 bindingTable->dwAvcMBEncMbSpecificData = MBENC_MB_SPECIFIC_DATA_CM_FEI;
5550 bindingTable->dwAvcMBEncRefPicSelectL0 = MBENC_REFPICSELECT_L0_CM_FEI;
5551 bindingTable->dwAvcMBEncMVDataFromME = MBENC_MV_DATA_FROM_ME_CM_FEI;
5552 bindingTable->dwAvcMBEncMEDist = MBENC_4xME_DISTORTION_CM_FEI;
5553 bindingTable->dwAvcMBEncRefPicSelectL1 = MBENC_REFPICSELECT_L1_CM_FEI;
5554 bindingTable->dwAvcMBEncBwdRefMBData = MBENC_FWD_MB_DATA_CM_FEI;
5555 bindingTable->dwAvcMBEncBwdRefMVData = MBENC_FWD_MV_DATA_CM_FEI;
5556 bindingTable->dwAvcMBEncMbBrcConstData = MBENC_MBBRC_CONST_DATA_CM_FEI;
5557 bindingTable->dwAvcMBEncFlatnessChk = MBENC_FLATNESS_CHECK_CM_FEI;
5558 bindingTable->dwAvcMBEncMADData = MBENC_MAD_DATA_CM_FEI;
5559 bindingTable->dwAvcMBEncVMEDistortion = MBENC_INTER_DISTORTION_CM_FEI;
5560 bindingTable->dwAvcMbEncBRCCurbeData = MBENC_BRC_CURBE_DATA_CM_FEI;
5561 bindingTable->dwAvcMBEncMvPrediction = MBENC_MV_PREDICTOR_CM_FEI;
5562
5563 // Frame
5564 bindingTable->dwAvcMBEncMbQpFrame = MBENC_MBQP_CM;
5565 bindingTable->dwAvcMBEncCurrPicFrame[0] = MBENC_VME_INTER_PRED_CURR_PIC_IDX_0_CM;
5566 bindingTable->dwAvcMBEncFwdPicFrame[0] = MBENC_VME_INTER_PRED_FWD_PIC_IDX0_CM;
5567 bindingTable->dwAvcMBEncBwdPicFrame[0] = MBENC_VME_INTER_PRED_BWD_PIC_IDX0_0_CM;
5568 bindingTable->dwAvcMBEncFwdPicFrame[1] = MBENC_VME_INTER_PRED_FWD_PIC_IDX1_CM;
5569 bindingTable->dwAvcMBEncBwdPicFrame[1] = MBENC_VME_INTER_PRED_BWD_PIC_IDX1_0_CM;
5570 bindingTable->dwAvcMBEncFwdPicFrame[2] = MBENC_VME_INTER_PRED_FWD_PIC_IDX2_CM;
5571 bindingTable->dwAvcMBEncFwdPicFrame[3] = MBENC_VME_INTER_PRED_FWD_PIC_IDX3_CM;
5572 bindingTable->dwAvcMBEncFwdPicFrame[4] = MBENC_VME_INTER_PRED_FWD_PIC_IDX4_CM;
5573 bindingTable->dwAvcMBEncFwdPicFrame[5] = MBENC_VME_INTER_PRED_FWD_PIC_IDX5_CM;
5574 bindingTable->dwAvcMBEncFwdPicFrame[6] = MBENC_VME_INTER_PRED_FWD_PIC_IDX6_CM;
5575 bindingTable->dwAvcMBEncFwdPicFrame[7] = MBENC_VME_INTER_PRED_FWD_PIC_IDX7_CM;
5576 bindingTable->dwAvcMBEncCurrPicFrame[1] = MBENC_VME_INTER_PRED_CURR_PIC_IDX_1_CM;
5577 bindingTable->dwAvcMBEncBwdPicFrame[2] = MBENC_VME_INTER_PRED_BWD_PIC_IDX0_1_CM;
5578 bindingTable->dwAvcMBEncBwdPicFrame[3] = MBENC_VME_INTER_PRED_BWD_PIC_IDX1_1_CM;
5579
5580 // Field
5581 bindingTable->dwAvcMBEncMbQpField = MBENC_MBQP_CM;
5582 bindingTable->dwAvcMBEncFieldCurrPic[0] = MBENC_VME_INTER_PRED_CURR_PIC_IDX_0_CM;
5583 bindingTable->dwAvcMBEncFwdPicTopField[0] = MBENC_VME_INTER_PRED_FWD_PIC_IDX0_CM;
5584 bindingTable->dwAvcMBEncBwdPicTopField[0] = MBENC_VME_INTER_PRED_BWD_PIC_IDX0_0_CM;
5585 bindingTable->dwAvcMBEncFwdPicBotField[0] = MBENC_VME_INTER_PRED_FWD_PIC_IDX0_CM;
5586 bindingTable->dwAvcMBEncBwdPicBotField[0] = MBENC_VME_INTER_PRED_BWD_PIC_IDX0_0_CM;
5587 bindingTable->dwAvcMBEncFwdPicTopField[1] = MBENC_VME_INTER_PRED_FWD_PIC_IDX1_CM;
5588 bindingTable->dwAvcMBEncBwdPicTopField[1] = MBENC_VME_INTER_PRED_BWD_PIC_IDX1_0_CM;
5589 bindingTable->dwAvcMBEncFwdPicBotField[1] = MBENC_VME_INTER_PRED_FWD_PIC_IDX1_CM;
5590 bindingTable->dwAvcMBEncBwdPicBotField[1] = MBENC_VME_INTER_PRED_BWD_PIC_IDX1_0_CM;
5591 bindingTable->dwAvcMBEncFwdPicTopField[2] = MBENC_VME_INTER_PRED_FWD_PIC_IDX2_CM;
5592 bindingTable->dwAvcMBEncFwdPicBotField[2] = MBENC_VME_INTER_PRED_FWD_PIC_IDX2_CM;
5593 bindingTable->dwAvcMBEncFwdPicTopField[3] = MBENC_VME_INTER_PRED_FWD_PIC_IDX3_CM;
5594 bindingTable->dwAvcMBEncFwdPicBotField[3] = MBENC_VME_INTER_PRED_FWD_PIC_IDX3_CM;
5595 bindingTable->dwAvcMBEncFieldCurrPic[1] = MBENC_VME_INTER_PRED_CURR_PIC_IDX_1_CM;
5596 bindingTable->dwAvcMBEncBwdPicTopField[2] = MBENC_VME_INTER_PRED_BWD_PIC_IDX0_1_CM;
5597 bindingTable->dwAvcMBEncBwdPicBotField[2] = MBENC_VME_INTER_PRED_BWD_PIC_IDX0_1_CM;
5598 bindingTable->dwAvcMBEncBwdPicTopField[3] = MBENC_VME_INTER_PRED_BWD_PIC_IDX1_1_CM;
5599 bindingTable->dwAvcMBEncBwdPicBotField[3] = MBENC_VME_INTER_PRED_BWD_PIC_IDX1_1_CM;
5600 return eStatus;
5601 }
5602
InitKernelStatePreProc()5603 MOS_STATUS CodechalEncodeAvcEncFeiG8::InitKernelStatePreProc()
5604 {
5605 MOS_STATUS eStatus = MOS_STATUS_SUCCESS;
5606
5607 CODECHAL_ENCODE_FUNCTION_ENTER;
5608
5609 auto kernelStatePtr = &PreProcKernelState;
5610
5611 uint8_t* kernelBinary;
5612 uint32_t kernelSize;
5613
5614 CODECHAL_ENCODE_CHK_STATUS_RETURN(CodecHalGetKernelBinaryAndSize(m_kernelBase, m_kuid, &kernelBinary, &kernelSize));
5615
5616 uint32_t krnStateIdx = 0;
5617 CODECHAL_KERNEL_HEADER currKrnHeader;
5618 CODECHAL_ENCODE_CHK_STATUS_RETURN(EncodeGetKernelHeaderAndSize(
5619 kernelBinary,
5620 ENC_PREPROC,
5621 krnStateIdx,
5622 &currKrnHeader,
5623 &kernelSize));
5624
5625 kernelStatePtr->KernelParams.iBTCount = CODECHAL_ENCODE_AVC_PREPROC_FIELD_NUM_SURFACES_CM_G8;
5626 kernelStatePtr->KernelParams.iThreadCount = m_renderEngineInterface->GetHwCaps()->dwMaxThreads;
5627 kernelStatePtr->KernelParams.iCurbeLength = sizeof(PREPROC_CURBE_CM);
5628 kernelStatePtr->KernelParams.iBlockWidth = CODECHAL_MACROBLOCK_WIDTH;
5629 kernelStatePtr->KernelParams.iBlockHeight = CODECHAL_MACROBLOCK_HEIGHT;
5630 kernelStatePtr->KernelParams.iIdCount = 1;
5631
5632 kernelStatePtr->dwCurbeOffset = m_stateHeapInterface->pStateHeapInterface->GetSizeofCmdInterfaceDescriptorData();
5633 kernelStatePtr->KernelParams.pBinary = kernelBinary + (currKrnHeader.KernelStartPointer << MHW_KERNEL_OFFSET_SHIFT);
5634 kernelStatePtr->KernelParams.iSize = kernelSize;
5635
5636 CODECHAL_ENCODE_CHK_STATUS_RETURN(m_stateHeapInterface->pfnCalculateSshAndBtSizesRequested(
5637 m_stateHeapInterface,
5638 kernelStatePtr->KernelParams.iBTCount,
5639 &kernelStatePtr->dwSshSize,
5640 &kernelStatePtr->dwBindingTableSize));
5641
5642 CODECHAL_ENCODE_CHK_STATUS_RETURN(m_hwInterface->MhwInitISH(m_stateHeapInterface, kernelStatePtr));
5643
5644 // Until a better way can be found, maintain old binding table structures
5645 auto bindingTable = &PreProcBindingTable;
5646
5647 bindingTable->dwAvcPreProcCurrY = CODECHAL_ENCODE_AVC_PREPROC_CURR_Y_CM_G8;
5648 bindingTable->dwAvcPreProcCurrUV = CODECHAL_ENCODE_AVC_PREPROC_CURR_UV_CM_G8;
5649 bindingTable->dwAvcPreProcMVDataFromHME = CODECHAL_ENCODE_AVC_PREPROC_HME_MV_DATA_CM_G8;
5650 bindingTable->dwAvcPreProcMvPredictor = CODECHAL_ENCODE_AVC_PREPROC_MV_PREDICTOR_CM_G8;
5651 bindingTable->dwAvcPreProcMbQp = CODECHAL_ENCODE_AVC_PREPROC_MBQP_CM_G8;
5652 bindingTable->dwAvcPreProcMvDataOut = CODECHAL_ENCODE_AVC_PREPROC_MV_DATA_CM_G8;
5653 bindingTable->dwAvcPreProcMbStatsOut = CODECHAL_ENCODE_AVC_PREPROC_MB_STATS_CM_G8;
5654 bindingTable->dwAvcPreProcVMECurrPicFrame[0] = CODECHAL_ENCODE_AVC_PREPROC_VME_CURR_PIC_IDX_0_CM_G8;
5655 bindingTable->dwAvcPreProcVMEFwdPicFrame = CODECHAL_ENCODE_AVC_PREPROC_VME_FWD_PIC_IDX0_CM_G8;
5656 bindingTable->dwAvcPreProcVMEBwdPicFrame[0] = CODECHAL_ENCODE_AVC_PREPROC_VME_BWD_PIC_IDX0_0_CM_G8;
5657 bindingTable->dwAvcPreProcVMECurrPicFrame[1] = CODECHAL_ENCODE_AVC_PREPROC_VME_CURR_PIC_IDX_1_CM_G8;
5658 bindingTable->dwAvcPreProcVMEBwdPicFrame[1] = CODECHAL_ENCODE_AVC_PREPROC_VME_BWD_PIC_IDX0_1_CM_G8;
5659 bindingTable->dwAvcPreProcFtqLut = CODECHAL_ENCODE_AVC_PREPROC_FTQ_LUT_CM_G8;
5660
5661 //field case
5662 bindingTable->dwAvcPreProcVMECurrPicField[0] = CODECHAL_ENCODE_AVC_PREPROC_VME_FIELD_CURR_PIC_IDX_0_CM_G8;
5663 bindingTable->dwAvcPreProcVMEFwdPicField[0] = CODECHAL_ENCODE_AVC_PREPROC_VME_FIELD_FWD_PIC_IDX0_0_CM_G8;
5664
5665 bindingTable->dwAvcPreProcVMEFwdPicField[1] = CODECHAL_ENCODE_AVC_PREPROC_VME_FIELD_FWD_PIC_IDX0_1_CM_G8;
5666
5667 bindingTable->dwAvcPreProcVMECurrPicField[1] = CODECHAL_ENCODE_AVC_PREPROC_VME_FIELD_CURR_PIC_IDX_1_CM_G8;
5668 bindingTable->dwAvcPreProcVMEBwdPicField[0] = CODECHAL_ENCODE_AVC_PREPROC_VME_FIELD_BWD_PIC_IDX0_0_CM_G8;
5669
5670 bindingTable->dwAvcPreProcVMEBwdPicField[1] = CODECHAL_ENCODE_AVC_PREPROC_VME_FIELD_BWD_PIC_IDX0_1_CM_G8;
5671
5672 bindingTable->dwAvcPreProcFtqLutField = CODECHAL_ENCODE_AVC_PREPROC_FIELD_FTQ_LUT_CM_G8;
5673
5674 return eStatus;
5675 }
5676
SendAvcMbEncSurfaces(PMOS_COMMAND_BUFFER cmdBuffer,PCODECHAL_ENCODE_AVC_MBENC_SURFACE_PARAMS params)5677 MOS_STATUS CodechalEncodeAvcEncFeiG8::SendAvcMbEncSurfaces(PMOS_COMMAND_BUFFER cmdBuffer, PCODECHAL_ENCODE_AVC_MBENC_SURFACE_PARAMS params)
5678 {
5679 MOS_STATUS eStatus = MOS_STATUS_SUCCESS;
5680 CODECHAL_ENCODE_FUNCTION_ENTER;
5681
5682 CODECHAL_ENCODE_CHK_NULL_RETURN(params);
5683 CODECHAL_ENCODE_CHK_NULL_RETURN(params->pAvcSlcParams);
5684 CODECHAL_ENCODE_CHK_NULL_RETURN(params->ppRefList);
5685 CODECHAL_ENCODE_CHK_NULL_RETURN(params->pCurrOriginalPic);
5686 CODECHAL_ENCODE_CHK_NULL_RETURN(params->pCurrReconstructedPic);
5687 CODECHAL_ENCODE_CHK_NULL_RETURN(params->psCurrPicSurface);
5688
5689 CODECHAL_ENCODE_CHK_NULL_RETURN(params->pMbEncBindingTable);
5690 CODECHAL_ENCODE_CHK_NULL_RETURN(params->pKernelState);
5691 CODECHAL_ENCODE_CHK_NULL_RETURN(params->pFeiPicParams);
5692
5693 auto kernelState = params->pKernelState;
5694
5695 auto feiPicParams = (CodecEncodeAvcFeiPicParams *)params->pFeiPicParams;
5696 auto avcMbEncBindingTable = params->pMbEncBindingTable;
5697
5698 bool currFieldPicture = CodecHal_PictureIsField(*(params->pCurrOriginalPic)) ? 1 : 0;
5699 bool currBottomField = CodecHal_PictureIsBottomField(*(params->pCurrOriginalPic)) ? 1 : 0;
5700 auto currPicRefListEntry = params->ppRefList[params->pCurrReconstructedPic->FrameIdx];
5701 auto mbCodeBuffer = &currPicRefListEntry->resRefMbCodeBuffer;
5702 auto mvDataBuffer = &currPicRefListEntry->resRefMvDataBuffer;
5703 uint32_t refMbCodeBottomFieldOffset;
5704 uint32_t refMvBottomFieldOffset;
5705 if (feiPicParams->MbCodeMvEnable)
5706 {
5707 refMbCodeBottomFieldOffset = 0;
5708 refMvBottomFieldOffset = 0;
5709 }
5710 else
5711 {
5712 refMbCodeBottomFieldOffset =
5713 params->dwFrameFieldHeightInMb * params->dwFrameWidthInMb * 64;
5714 refMvBottomFieldOffset =
5715 MOS_ALIGN_CEIL(params->dwFrameFieldHeightInMb * params->dwFrameWidthInMb * (32 * 4), 0x1000);
5716 }
5717 uint8_t vDirection;
5718 if (params->bMbEncIFrameDistInUse)
5719 {
5720 vDirection = CODECHAL_VDIRECTION_FRAME;
5721 }
5722 else
5723 {
5724 vDirection = (CodecHal_PictureIsFrame(*(params->pCurrOriginalPic))) ? CODECHAL_VDIRECTION_FRAME :
5725 (currBottomField) ? CODECHAL_VDIRECTION_BOT_FIELD : CODECHAL_VDIRECTION_TOP_FIELD;
5726 }
5727
5728 // PAK Obj command buffer
5729 uint32_t size = params->dwFrameWidthInMb * params->dwFrameFieldHeightInMb * 16 * 4; // 11DW + 5DW padding
5730 CODECHAL_SURFACE_CODEC_PARAMS surfaceCodecParams;
5731 MOS_ZeroMemory(&surfaceCodecParams, sizeof(CODECHAL_SURFACE_CODEC_PARAMS));
5732 surfaceCodecParams.presBuffer = mbCodeBuffer;
5733 surfaceCodecParams.dwSize = size;
5734 surfaceCodecParams.dwOffset = params->dwMbCodeBottomFieldOffset;
5735 surfaceCodecParams.dwBindingTableOffset = avcMbEncBindingTable->dwAvcMBEncMfcAvcPakObj;
5736 surfaceCodecParams.dwCacheabilityControl = m_hwInterface->GetCacheabilitySettings()[MOS_CODEC_RESOURCE_USAGE_PAK_OBJECT_ENCODE].Value;
5737 surfaceCodecParams.bRenderTarget = true;
5738 surfaceCodecParams.bIsWritable = true;
5739 CODECHAL_ENCODE_CHK_STATUS_RETURN(CodecHalSetRcsSurfaceState(
5740 m_hwInterface,
5741 cmdBuffer,
5742 &surfaceCodecParams,
5743 kernelState));
5744
5745 // MV data buffer
5746 size = params->dwFrameWidthInMb * params->dwFrameFieldHeightInMb * 32 * 4;
5747 MOS_ZeroMemory(&surfaceCodecParams, sizeof(CODECHAL_SURFACE_CODEC_PARAMS));
5748 surfaceCodecParams.presBuffer = mvDataBuffer;
5749 surfaceCodecParams.dwSize = size;
5750 surfaceCodecParams.dwOffset = params->dwMvBottomFieldOffset;
5751 surfaceCodecParams.dwCacheabilityControl = m_hwInterface->GetCacheabilitySettings()[MOS_CODEC_RESOURCE_USAGE_SURFACE_MV_DATA_ENCODE].Value;
5752 surfaceCodecParams.dwBindingTableOffset = avcMbEncBindingTable->dwAvcMBEncIndMVData;
5753 surfaceCodecParams.bRenderTarget = true;
5754 surfaceCodecParams.bIsWritable = true;
5755 CODECHAL_ENCODE_CHK_STATUS_RETURN(CodecHalSetRcsSurfaceState(
5756 m_hwInterface,
5757 cmdBuffer,
5758 &surfaceCodecParams,
5759 kernelState));
5760
5761 // Current Picture Y
5762 MOS_ZeroMemory(&surfaceCodecParams, sizeof(CODECHAL_SURFACE_CODEC_PARAMS));
5763 surfaceCodecParams.bIs2DSurface = true;
5764 surfaceCodecParams.bUseUVPlane = true;
5765 surfaceCodecParams.psSurface = params->psCurrPicSurface;
5766 surfaceCodecParams.dwOffset = params->dwCurrPicSurfaceOffset;
5767 surfaceCodecParams.dwCacheabilityControl = m_hwInterface->GetCacheabilitySettings()[MOS_CODEC_RESOURCE_USAGE_SURFACE_CURR_ENCODE].Value;
5768 surfaceCodecParams.dwBindingTableOffset = avcMbEncBindingTable->dwAvcMBEncCurrY;
5769 surfaceCodecParams.dwUVBindingTableOffset = avcMbEncBindingTable->dwAvcMBEncCurrUV;
5770 surfaceCodecParams.dwVerticalLineStride = params->dwVerticalLineStride;
5771 surfaceCodecParams.dwVerticalLineStrideOffset = params->dwVerticalLineStrideOffset;
5772 CODECHAL_ENCODE_CHK_STATUS_RETURN(CodecHalSetRcsSurfaceState(
5773 m_hwInterface,
5774 cmdBuffer,
5775 &surfaceCodecParams,
5776 kernelState));
5777
5778 // AVC_ME MV data buffer
5779 if (params->bHmeEnabled)
5780 {
5781 CODECHAL_ENCODE_CHK_NULL_RETURN(params->ps4xMeMvDataBuffer);
5782
5783 MOS_ZeroMemory(&surfaceCodecParams, sizeof(CODECHAL_SURFACE_CODEC_PARAMS));
5784 surfaceCodecParams.bIs2DSurface = true;
5785 surfaceCodecParams.bMediaBlockRW = true;
5786 surfaceCodecParams.psSurface = params->ps4xMeMvDataBuffer;
5787 surfaceCodecParams.dwOffset = params->dwMeMvBottomFieldOffset;
5788 surfaceCodecParams.dwCacheabilityControl = m_hwInterface->GetCacheabilitySettings()[MOS_CODEC_RESOURCE_USAGE_SURFACE_MV_DATA_ENCODE].Value;
5789 surfaceCodecParams.dwBindingTableOffset = avcMbEncBindingTable->dwAvcMBEncMVDataFromME;
5790 CODECHAL_ENCODE_CHK_STATUS_RETURN(CodecHalSetRcsSurfaceState(
5791 m_hwInterface,
5792 cmdBuffer,
5793 &surfaceCodecParams,
5794 kernelState));
5795
5796 CODECHAL_ENCODE_CHK_NULL_RETURN(params->ps4xMeDistortionBuffer);
5797
5798 MOS_ZeroMemory(&surfaceCodecParams, sizeof(CODECHAL_SURFACE_CODEC_PARAMS));
5799 surfaceCodecParams.bIs2DSurface = true;
5800 surfaceCodecParams.bMediaBlockRW = true;
5801 surfaceCodecParams.psSurface = params->ps4xMeDistortionBuffer;
5802 surfaceCodecParams.dwOffset = params->dwMeDistortionBottomFieldOffset;
5803 surfaceCodecParams.dwCacheabilityControl = m_hwInterface->GetCacheabilitySettings()[MOS_CODEC_RESOURCE_USAGE_SURFACE_ME_DISTORTION_ENCODE].Value;
5804 surfaceCodecParams.dwBindingTableOffset = avcMbEncBindingTable->dwAvcMBEncMEDist;
5805 CODECHAL_ENCODE_CHK_STATUS_RETURN(CodecHalSetRcsSurfaceState(
5806 m_hwInterface,
5807 cmdBuffer,
5808 &surfaceCodecParams,
5809 kernelState));
5810 }
5811
5812 // Current Picture Y - VME
5813 MOS_ZeroMemory(&surfaceCodecParams, sizeof(CODECHAL_SURFACE_CODEC_PARAMS));
5814 surfaceCodecParams.bUseAdvState = true;
5815 surfaceCodecParams.psSurface = params->psCurrPicSurface;
5816 surfaceCodecParams.dwOffset = params->dwCurrPicSurfaceOffset;
5817 surfaceCodecParams.dwCacheabilityControl = m_hwInterface->GetCacheabilitySettings()[MOS_CODEC_RESOURCE_USAGE_SURFACE_CURR_ENCODE].Value;
5818 surfaceCodecParams.dwBindingTableOffset = currFieldPicture ?
5819 avcMbEncBindingTable->dwAvcMBEncFieldCurrPic[0] : avcMbEncBindingTable->dwAvcMBEncCurrPicFrame[0];
5820 surfaceCodecParams.ucVDirection = vDirection;
5821 CODECHAL_ENCODE_CHK_STATUS_RETURN(CodecHalSetRcsSurfaceState(
5822 m_hwInterface,
5823 cmdBuffer,
5824 &surfaceCodecParams,
5825 kernelState));
5826
5827 surfaceCodecParams.dwBindingTableOffset = currFieldPicture ?
5828 avcMbEncBindingTable->dwAvcMBEncFieldCurrPic[1] : avcMbEncBindingTable->dwAvcMBEncCurrPicFrame[1];
5829 surfaceCodecParams.ucVDirection = vDirection;
5830 CODECHAL_ENCODE_CHK_STATUS_RETURN(CodecHalSetRcsSurfaceState(
5831 m_hwInterface,
5832 cmdBuffer,
5833 &surfaceCodecParams,
5834 kernelState));
5835
5836 // Setup references 1...n
5837 // LIST 0 references
5838 for (uint8_t refIdx = 0; refIdx <= params->pAvcSlcParams->num_ref_idx_l0_active_minus1; refIdx++)
5839 {
5840 auto refPic = params->pAvcSlcParams->RefPicList[LIST_0][refIdx];
5841 if (!CodecHal_PictureIsInvalid(refPic) && params->pAvcPicIdx[refPic.FrameIdx].bValid)
5842 {
5843 uint8_t refPicIdx = params->pAvcPicIdx[refPic.FrameIdx].ucPicIdx;
5844 bool refBottomField = (CodecHal_PictureIsBottomField(refPic)) ? 1 : 0;
5845 uint32_t refBindingTableOffset;
5846 // Program the surface based on current picture's field/frame mode
5847 uint8_t refVDirection;
5848 if (currFieldPicture) // if current picture is field
5849 {
5850 if (refBottomField)
5851 {
5852 refVDirection = CODECHAL_VDIRECTION_BOT_FIELD;
5853 refBindingTableOffset = avcMbEncBindingTable->dwAvcMBEncFwdPicBotField[refIdx];
5854 }
5855 else
5856 {
5857 refVDirection = CODECHAL_VDIRECTION_TOP_FIELD;
5858 refBindingTableOffset = avcMbEncBindingTable->dwAvcMBEncFwdPicTopField[refIdx];
5859 }
5860 }
5861 else // if current picture is frame
5862 {
5863 refVDirection = CODECHAL_VDIRECTION_FRAME;
5864 refBindingTableOffset = avcMbEncBindingTable->dwAvcMBEncFwdPicFrame[refIdx];
5865 }
5866
5867 // Picture Y VME
5868 MOS_ZeroMemory(&surfaceCodecParams, sizeof(CODECHAL_SURFACE_CODEC_PARAMS));
5869 surfaceCodecParams.bUseAdvState = true;
5870 if((params->bUseWeightedSurfaceForL0) &&
5871 (params->pAvcSlcParams->luma_weight_flag[LIST_0] & (1 << refIdx)) &&
5872 (refIdx < CODEC_AVC_MAX_FORWARD_WP_FRAME))
5873 {
5874 surfaceCodecParams.psSurface = ¶ms->pWeightedPredOutputPicSelectList[CODEC_AVC_WP_OUTPUT_L0_START + refIdx].sBuffer;
5875 }
5876 else
5877 {
5878 surfaceCodecParams.psSurface = ¶ms->ppRefList[refPicIdx]->sRefBuffer;
5879 }
5880 surfaceCodecParams.dwWidthInUse = params->dwFrameWidthInMb * 16;
5881 surfaceCodecParams.dwHeightInUse = params->dwFrameHeightInMb * 16;
5882
5883 surfaceCodecParams.dwBindingTableOffset = refBindingTableOffset;
5884 surfaceCodecParams.ucVDirection = refVDirection;
5885 surfaceCodecParams.dwCacheabilityControl = m_hwInterface->GetCacheabilitySettings()[MOS_CODEC_RESOURCE_USAGE_SURFACE_REF_ENCODE].Value;
5886 CODECHAL_ENCODE_CHK_STATUS_RETURN(CodecHalSetRcsSurfaceState(
5887 m_hwInterface,
5888 cmdBuffer,
5889 &surfaceCodecParams,
5890 kernelState));
5891 }
5892 }
5893
5894 // Setup references 1...n
5895 // LIST 1 references
5896 for (uint8_t refIdx = 0; refIdx <= params->pAvcSlcParams->num_ref_idx_l1_active_minus1; refIdx++)
5897 {
5898 if (!currFieldPicture && refIdx > 0)
5899 {
5900 // Only 1 LIST 1 reference required here since only single ref is supported in frame case
5901 break;
5902 }
5903
5904 auto refPic = params->pAvcSlcParams->RefPicList[LIST_1][refIdx];
5905 if (!CodecHal_PictureIsInvalid(refPic) && params->pAvcPicIdx[refPic.FrameIdx].bValid)
5906 {
5907 uint8_t refPicIdx = params->pAvcPicIdx[refPic.FrameIdx].ucPicIdx;
5908 bool refBottomField = (CodecHal_PictureIsBottomField(refPic)) ? 1 : 0;
5909 uint32_t refMbCodeBottomFieldOffsetUsed;
5910 uint32_t refMvBottomFieldOffsetUsed;
5911 uint8_t refVDirection;
5912 uint32_t refBindingTableOffset;
5913 // Program the surface based on current picture's field/frame mode
5914 if (currFieldPicture) // if current picture is field
5915 {
5916 if (refBottomField)
5917 {
5918 refVDirection = CODECHAL_VDIRECTION_BOT_FIELD;
5919 refMbCodeBottomFieldOffsetUsed = refMbCodeBottomFieldOffset;
5920 refMvBottomFieldOffsetUsed = refMvBottomFieldOffset;
5921 refBindingTableOffset = avcMbEncBindingTable->dwAvcMBEncBwdPicBotField[refIdx];
5922 }
5923 else
5924 {
5925 refVDirection = CODECHAL_VDIRECTION_TOP_FIELD;
5926 refMbCodeBottomFieldOffsetUsed = 0;
5927 refMvBottomFieldOffsetUsed = 0;
5928 refBindingTableOffset = avcMbEncBindingTable->dwAvcMBEncBwdPicTopField[refIdx];
5929 }
5930 }
5931 else // if current picture is frame
5932 {
5933 refVDirection = CODECHAL_VDIRECTION_FRAME;
5934 refMbCodeBottomFieldOffsetUsed = 0;
5935 refMvBottomFieldOffsetUsed = 0;
5936 refBindingTableOffset = avcMbEncBindingTable->dwAvcMBEncBwdPicFrame[refIdx];
5937 }
5938
5939 // Picture Y VME
5940 MOS_ZeroMemory(&surfaceCodecParams, sizeof(CODECHAL_SURFACE_CODEC_PARAMS));
5941 surfaceCodecParams.bUseAdvState = true;
5942 surfaceCodecParams.dwWidthInUse = params->dwFrameWidthInMb * 16;
5943 surfaceCodecParams.dwHeightInUse = params->dwFrameHeightInMb * 16;
5944 // max backforward weight prediction surface is 2
5945 if((params->bUseWeightedSurfaceForL1) &&
5946 (params->pAvcSlcParams->luma_weight_flag[LIST_1]&(1<<refIdx)) &&
5947 (refIdx < CODEC_AVC_MAX_BACKWARD_WP_FRAME))
5948 {
5949 surfaceCodecParams.psSurface = ¶ms->pWeightedPredOutputPicSelectList[CODEC_AVC_WP_OUTPUT_L1_START + refIdx].sBuffer;
5950 }
5951 else
5952 {
5953 surfaceCodecParams.psSurface = ¶ms->ppRefList[refPicIdx]->sRefBuffer;
5954 }
5955 surfaceCodecParams.dwBindingTableOffset = refBindingTableOffset;
5956 surfaceCodecParams.ucVDirection = refVDirection;
5957 surfaceCodecParams.dwCacheabilityControl = m_hwInterface->GetCacheabilitySettings()[MOS_CODEC_RESOURCE_USAGE_SURFACE_REF_ENCODE].Value;
5958 CODECHAL_ENCODE_CHK_STATUS_RETURN(CodecHalSetRcsSurfaceState(
5959 m_hwInterface,
5960 cmdBuffer,
5961 &surfaceCodecParams,
5962 kernelState));
5963
5964 if (refIdx == 0)
5965 {
5966 if(currFieldPicture && (params->ppRefList[refPicIdx]->ucAvcPictureCodingType == CODEC_AVC_PIC_CODING_TYPE_FRAME || params->ppRefList[refPicIdx]->ucAvcPictureCodingType == CODEC_AVC_PIC_CODING_TYPE_INVALID))
5967 {
5968 refMbCodeBottomFieldOffsetUsed = 0;
5969 refMvBottomFieldOffsetUsed = 0;
5970 }
5971 // MB data buffer
5972 size = params->dwFrameWidthInMb * params->dwFrameFieldHeightInMb * 16 * 4;
5973
5974 MOS_ZeroMemory(&surfaceCodecParams, sizeof(CODECHAL_SURFACE_CODEC_PARAMS));
5975 surfaceCodecParams.dwSize = size;
5976 if (feiPicParams->MbCodeMvEnable && currFieldPicture)
5977 {
5978 surfaceCodecParams.presBuffer = refBottomField ? ¶ms->ppRefList[refPicIdx]->resRefBotFieldMbCodeBuffer :
5979 ¶ms->ppRefList[refPicIdx]->resRefTopFieldMbCodeBuffer;
5980 }
5981 else
5982 {
5983 surfaceCodecParams.presBuffer = ¶ms->ppRefList[refPicIdx]->resRefMbCodeBuffer;
5984 }
5985 surfaceCodecParams.dwOffset = refMbCodeBottomFieldOffsetUsed;
5986 surfaceCodecParams.dwCacheabilityControl = m_hwInterface->GetCacheabilitySettings()[MOS_CODEC_RESOURCE_USAGE_PAK_OBJECT_ENCODE].Value;
5987 surfaceCodecParams.dwBindingTableOffset = avcMbEncBindingTable->dwAvcMBEncBwdRefMBData;
5988 CODECHAL_ENCODE_CHK_STATUS_RETURN(CodecHalSetRcsSurfaceState(
5989 m_hwInterface,
5990 cmdBuffer,
5991 &surfaceCodecParams,
5992 kernelState));
5993
5994 // MV data buffer
5995 size = params->dwFrameWidthInMb * params->dwFrameFieldHeightInMb * 32 * 4;
5996 MOS_ZeroMemory(&surfaceCodecParams, sizeof(CODECHAL_SURFACE_CODEC_PARAMS));
5997 surfaceCodecParams.dwSize = size;
5998 if (feiPicParams->MbCodeMvEnable && currFieldPicture)
5999 {
6000 surfaceCodecParams.presBuffer = refBottomField ? ¶ms->ppRefList[refPicIdx]->resRefBotFieldMvDataBuffer :
6001 ¶ms->ppRefList[refPicIdx]->resRefTopFieldMvDataBuffer;
6002 }
6003 else
6004 {
6005 surfaceCodecParams.presBuffer = ¶ms->ppRefList[refPicIdx]->resRefMvDataBuffer;
6006 }
6007 surfaceCodecParams.dwOffset = refMvBottomFieldOffsetUsed;
6008 surfaceCodecParams.dwCacheabilityControl = m_hwInterface->GetCacheabilitySettings()[MOS_CODEC_RESOURCE_USAGE_SURFACE_MV_DATA_ENCODE].Value;
6009 surfaceCodecParams.dwBindingTableOffset = avcMbEncBindingTable->dwAvcMBEncBwdRefMVData;
6010 CODECHAL_ENCODE_CHK_STATUS_RETURN(CodecHalSetRcsSurfaceState(
6011 m_hwInterface,
6012 cmdBuffer,
6013 &surfaceCodecParams,
6014 kernelState));
6015 }
6016
6017 if (refIdx < CODECHAL_ENCODE_NUM_MAX_VME_L1_REF)
6018 {
6019 if (currFieldPicture)
6020 {
6021 // The binding table contains multiple entries for IDX0 backwards references
6022 if (refBottomField)
6023 {
6024 refBindingTableOffset = avcMbEncBindingTable->dwAvcMBEncBwdPicBotField[refIdx + CODECHAL_ENCODE_NUM_MAX_VME_L1_REF];
6025 }
6026 else
6027 {
6028 refBindingTableOffset = avcMbEncBindingTable->dwAvcMBEncBwdPicTopField[refIdx + CODECHAL_ENCODE_NUM_MAX_VME_L1_REF];
6029 }
6030 }
6031 else
6032 {
6033 refBindingTableOffset = avcMbEncBindingTable->dwAvcMBEncBwdPicFrame[refIdx + CODECHAL_ENCODE_NUM_MAX_VME_L1_REF];
6034 }
6035
6036 // Picture Y VME
6037 MOS_ZeroMemory(&surfaceCodecParams, sizeof(CODECHAL_SURFACE_CODEC_PARAMS));
6038 surfaceCodecParams.bUseAdvState = true;
6039
6040 surfaceCodecParams.dwWidthInUse = params->dwFrameWidthInMb * 16;
6041 surfaceCodecParams.dwHeightInUse = params->dwFrameHeightInMb * 16;
6042
6043 surfaceCodecParams.psSurface = ¶ms->ppRefList[refPicIdx]->sRefBuffer;
6044 surfaceCodecParams.dwBindingTableOffset = refBindingTableOffset;
6045 surfaceCodecParams.ucVDirection = refVDirection;
6046 surfaceCodecParams.dwCacheabilityControl = m_hwInterface->GetCacheabilitySettings()[MOS_CODEC_RESOURCE_USAGE_SURFACE_REF_ENCODE].Value;
6047 CODECHAL_ENCODE_CHK_STATUS_RETURN(CodecHalSetRcsSurfaceState(
6048 m_hwInterface,
6049 cmdBuffer,
6050 &surfaceCodecParams,
6051 kernelState));
6052 }
6053 }
6054 }
6055
6056 // BRC distortion data buffer for I frame
6057 if (params->bMbEncIFrameDistInUse)
6058 {
6059 MOS_ZeroMemory(&surfaceCodecParams, sizeof(CODECHAL_SURFACE_CODEC_PARAMS));
6060 surfaceCodecParams.bIs2DSurface = true;
6061 surfaceCodecParams.bMediaBlockRW = true;
6062 surfaceCodecParams.psSurface = params->psMeBrcDistortionBuffer;
6063 surfaceCodecParams.dwOffset = params->dwMeBrcDistortionBottomFieldOffset;
6064 surfaceCodecParams.dwBindingTableOffset = avcMbEncBindingTable->dwAvcMBEncBRCDist;
6065 surfaceCodecParams.bIsWritable = true;
6066 surfaceCodecParams.bRenderTarget = true;
6067 CODECHAL_ENCODE_CHK_STATUS_RETURN(CodecHalSetRcsSurfaceState(
6068 m_hwInterface,
6069 cmdBuffer,
6070 &surfaceCodecParams,
6071 kernelState));
6072 }
6073
6074 // RefPicSelect of Current Picture
6075 if (params->bUsedAsRef)
6076 {
6077 MOS_ZeroMemory(&surfaceCodecParams, sizeof(CODECHAL_SURFACE_CODEC_PARAMS));
6078 surfaceCodecParams.bIs2DSurface = true;
6079 surfaceCodecParams.bMediaBlockRW = true;
6080 surfaceCodecParams.psSurface = &currPicRefListEntry->pRefPicSelectListEntry->sBuffer;
6081 surfaceCodecParams.psSurface->dwHeight = MOS_ALIGN_CEIL(surfaceCodecParams.psSurface->dwHeight, 8);
6082 surfaceCodecParams.dwOffset = params->dwRefPicSelectBottomFieldOffset;
6083 surfaceCodecParams.dwBindingTableOffset = avcMbEncBindingTable->dwAvcMBEncRefPicSelectL0;
6084 surfaceCodecParams.dwCacheabilityControl = m_hwInterface->GetCacheabilitySettings()[MOS_CODEC_RESOURCE_USAGE_SURFACE_REF_ENCODE].Value;
6085 surfaceCodecParams.bRenderTarget = true;
6086 surfaceCodecParams.bIsWritable = true;
6087 CODECHAL_ENCODE_CHK_STATUS_RETURN(CodecHalSetRcsSurfaceState(
6088 m_hwInterface,
6089 cmdBuffer,
6090 &surfaceCodecParams,
6091 kernelState));
6092 }
6093
6094 if (params->bFlatnessCheckEnabled)
6095 {
6096 MOS_ZeroMemory(&surfaceCodecParams, sizeof(CODECHAL_SURFACE_CODEC_PARAMS));
6097 surfaceCodecParams.bIs2DSurface = true;
6098 surfaceCodecParams.bMediaBlockRW = true;
6099 surfaceCodecParams.psSurface = params->psFlatnessCheckSurface;
6100 surfaceCodecParams.dwOffset = currBottomField ? params->dwFlatnessCheckBottomFieldOffset : 0;
6101 surfaceCodecParams.dwBindingTableOffset = avcMbEncBindingTable->dwAvcMBEncFlatnessChk;
6102 surfaceCodecParams.dwCacheabilityControl = m_hwInterface->GetCacheabilitySettings()[MOS_CODEC_RESOURCE_USAGE_SURFACE_FLATNESS_CHECK_ENCODE].Value;
6103 surfaceCodecParams.bRenderTarget = true;
6104 surfaceCodecParams.bIsWritable = true;
6105 CODECHAL_ENCODE_CHK_STATUS_RETURN(CodecHalSetRcsSurfaceState(
6106 m_hwInterface,
6107 cmdBuffer,
6108 &surfaceCodecParams,
6109 kernelState));
6110 }
6111
6112 if (params->wPictureCodingType == B_TYPE)
6113 {
6114 auto refPic = params->pAvcSlcParams->RefPicList[LIST_1][0];
6115 if (!CodecHal_PictureIsInvalid(refPic) && params->pAvcPicIdx[refPic.FrameIdx].bValid)
6116 {
6117 bool refBottomField = CodecHal_PictureIsBottomField(refPic);
6118 auto refPicIdx = params->pAvcPicIdx[refPic.FrameIdx].ucPicIdx;
6119
6120 if (params->ppRefList[refPicIdx]->pRefPicSelectListEntry == nullptr)
6121 {
6122 CODECHAL_ENCODE_ASSERTMESSAGE("The RefPicSelectList entry for L1, IDX0 is not valid.");
6123 return eStatus;
6124 }
6125
6126 MOS_ZeroMemory(&surfaceCodecParams, sizeof(CODECHAL_SURFACE_CODEC_PARAMS));
6127 surfaceCodecParams.bIs2DSurface = true;
6128 surfaceCodecParams.bMediaBlockRW = true;
6129 surfaceCodecParams.psSurface =
6130 ¶ms->ppRefList[refPicIdx]->pRefPicSelectListEntry->sBuffer;
6131 surfaceCodecParams.dwOffset = refBottomField ? params->dwRefPicSelectBottomFieldOffset : 0;
6132 surfaceCodecParams.dwBindingTableOffset = avcMbEncBindingTable->dwAvcMBEncRefPicSelectL1;
6133 surfaceCodecParams.dwCacheabilityControl =
6134 m_hwInterface->ComposeSurfaceCacheabilityControl(
6135 MOS_CODEC_RESOURCE_USAGE_SURFACE_REF_ENCODE,
6136 codechalLLC);
6137 CODECHAL_ENCODE_CHK_STATUS_RETURN(CodecHalSetRcsSurfaceState(
6138 m_hwInterface,
6139 cmdBuffer,
6140 &surfaceCodecParams,
6141 kernelState));
6142 }
6143 }
6144
6145 if (params->bMADEnabled)
6146 {
6147 size = CODECHAL_MAD_BUFFER_SIZE;
6148
6149 MOS_ZeroMemory(&surfaceCodecParams, sizeof(CODECHAL_SURFACE_CODEC_PARAMS));
6150 surfaceCodecParams.bRawSurface = true;
6151 surfaceCodecParams.dwSize = size;
6152 surfaceCodecParams.presBuffer = params->presMADDataBuffer;
6153 surfaceCodecParams.dwBindingTableOffset = avcMbEncBindingTable->dwAvcMBEncMADData;
6154 surfaceCodecParams.bRenderTarget = true;
6155 surfaceCodecParams.bIsWritable = true;
6156 CODECHAL_ENCODE_CHK_STATUS_RETURN(CodecHalSetRcsSurfaceState(
6157 m_hwInterface,
6158 cmdBuffer,
6159 &surfaceCodecParams,
6160 kernelState));
6161 }
6162
6163 // FEI Mb Specific Data surface
6164 if (feiPicParams->bPerMBInput)
6165 {
6166 size = params->dwFrameWidthInMb * params->dwFrameFieldHeightInMb * 16;
6167 MOS_ZeroMemory(&surfaceCodecParams, sizeof(CODECHAL_SURFACE_CODEC_PARAMS));
6168 surfaceCodecParams.dwSize = size;
6169 surfaceCodecParams.presBuffer = &(feiPicParams->resMBCtrl);
6170 surfaceCodecParams.dwOffset = 0;
6171 surfaceCodecParams.dwBindingTableOffset = avcMbEncBindingTable->dwAvcMBEncMbSpecificData;
6172 CODECHAL_ENCODE_CHK_STATUS_RETURN(CodecHalSetRcsSurfaceState(
6173 m_hwInterface,
6174 cmdBuffer,
6175 &surfaceCodecParams,
6176 kernelState));
6177 }
6178
6179 // FEI Multi Mv Predictor Surface
6180 if (feiPicParams->MVPredictorEnable)
6181 {
6182 size = params->dwFrameWidthInMb * params->dwFrameFieldHeightInMb * 40;
6183 MOS_ZeroMemory(&surfaceCodecParams, sizeof(CODECHAL_SURFACE_CODEC_PARAMS));
6184 surfaceCodecParams.dwSize = size;
6185 surfaceCodecParams.presBuffer = &(feiPicParams->resMVPredictor);
6186 surfaceCodecParams.dwOffset = 0;
6187 surfaceCodecParams.dwCacheabilityControl = m_hwInterface->GetCacheabilitySettings()[MOS_CODEC_RESOURCE_USAGE_SURFACE_MV_DATA_ENCODE].Value;
6188 surfaceCodecParams.dwBindingTableOffset = avcMbEncBindingTable->dwAvcMBEncMvPrediction;
6189 CODECHAL_ENCODE_CHK_STATUS_RETURN(CodecHalSetRcsSurfaceState(
6190 m_hwInterface,
6191 cmdBuffer,
6192 &surfaceCodecParams,
6193 kernelState));
6194 }
6195
6196 // FEI distortion surface
6197 if (feiPicParams->DistortionEnable)
6198 {
6199 MOS_ZeroMemory(&surfaceCodecParams, sizeof(CODECHAL_SURFACE_CODEC_PARAMS));
6200 surfaceCodecParams.presBuffer = &(feiPicParams->resDistortion);
6201 surfaceCodecParams.dwOffset = 0;
6202 surfaceCodecParams.dwBindingTableOffset = avcMbEncBindingTable->dwAvcMBEncVMEDistortion;
6203 surfaceCodecParams.dwCacheabilityControl = m_hwInterface->GetCacheabilitySettings()[MOS_CODEC_RESOURCE_USAGE_SURFACE_ME_DISTORTION_ENCODE].Value;
6204 surfaceCodecParams.bRenderTarget = true;
6205 surfaceCodecParams.bIsWritable = true;
6206 CODECHAL_ENCODE_CHK_STATUS_RETURN(CodecHalSetRcsSurfaceState(
6207 m_hwInterface,
6208 cmdBuffer,
6209 &surfaceCodecParams,
6210 kernelState));
6211 }
6212
6213 if (feiPicParams->bMBQp)
6214 {
6215 // 16 DWs per QP value
6216 size = 16 * 52 * sizeof(uint32_t);
6217 MOS_ZeroMemory(&surfaceCodecParams, sizeof(CODECHAL_SURFACE_CODEC_PARAMS));
6218 surfaceCodecParams.presBuffer = params->presMbBrcConstDataBuffer;
6219 surfaceCodecParams.dwSize = size;
6220 surfaceCodecParams.dwBindingTableOffset = avcMbEncBindingTable->dwAvcMBEncMbBrcConstData;
6221 CODECHAL_ENCODE_CHK_STATUS_RETURN(CodecHalSetRcsSurfaceState(
6222 m_hwInterface,
6223 cmdBuffer,
6224 &surfaceCodecParams,
6225 kernelState));
6226
6227 MOS_ZeroMemory(&surfaceCodecParams, sizeof(CODECHAL_SURFACE_CODEC_PARAMS));
6228 surfaceCodecParams.presBuffer = &(feiPicParams->resMBQp);
6229 surfaceCodecParams.dwOffset = 0;
6230 surfaceCodecParams.dwBindingTableOffset = currFieldPicture ? avcMbEncBindingTable->dwAvcMBEncMbQpField :
6231 avcMbEncBindingTable->dwAvcMBEncMbQpFrame;
6232 CODECHAL_ENCODE_CHK_STATUS_RETURN(CodecHalSetRcsSurfaceState(
6233 m_hwInterface,
6234 cmdBuffer,
6235 &surfaceCodecParams,
6236 kernelState));
6237 }
6238
6239 return eStatus;
6240 }
6241
PreProcKernel()6242 MOS_STATUS CodechalEncodeAvcEncFeiG8::PreProcKernel()
6243 {
6244 MOS_STATUS eStatus = MOS_STATUS_SUCCESS;
6245
6246 CODECHAL_ENCODE_FUNCTION_ENTER;
6247
6248 auto preEncParams = (FeiPreEncParams*)m_encodeParams.pPreEncParams;
6249 auto refList = &m_refList[0];
6250
6251 auto encFunctionType = CODECHAL_MEDIA_STATE_PREPROC;
6252 auto kernelState = &PreProcKernelState;
6253
6254 PerfTagSetting perfTag;
6255 perfTag.Value = 0;
6256 perfTag.Mode = (uint16_t)m_mode & CODECHAL_ENCODE_MODE_BIT_MASK;
6257 perfTag.CallType = CODECHAL_ENCODE_PERFTAG_CALL_PREPROC_KERNEL;
6258 perfTag.PictureCodingType = m_pictureCodingType;
6259 m_osInterface->pfnSetPerfTag(m_osInterface, perfTag.Value);
6260
6261 // If Single Task Phase is not enabled, use BT count for the kernel state.
6262 if (m_firstTaskInPhase == true || !m_singleTaskPhaseSupported)
6263 {
6264 uint32_t dwMaxBtCount = m_singleTaskPhaseSupported ?
6265 m_maxBtCount : kernelState->KernelParams.iBTCount;
6266 CODECHAL_ENCODE_CHK_STATUS_RETURN(m_stateHeapInterface->pfnRequestSshSpaceForCmdBuf(
6267 m_stateHeapInterface,
6268 dwMaxBtCount));
6269 m_vmeStatesSize = m_hwInterface->GetKernelLoadCommandSize(dwMaxBtCount);
6270 CODECHAL_ENCODE_CHK_STATUS_RETURN(VerifySpaceAvailable());
6271 }
6272
6273 // Set up the DSH/SSH as normal
6274 CODECHAL_ENCODE_CHK_STATUS_RETURN(m_hwInterface->AssignDshAndSshSpace(
6275 m_stateHeapInterface,
6276 kernelState,
6277 false,
6278 0,
6279 false,
6280 m_storeData));
6281
6282 MHW_INTERFACE_DESCRIPTOR_PARAMS idParams;
6283 MOS_ZeroMemory(&idParams, sizeof(idParams));
6284 idParams.pKernelState = kernelState;
6285 CODECHAL_ENCODE_CHK_STATUS_RETURN(m_stateHeapInterface->pfnSetInterfaceDescriptor(
6286 m_stateHeapInterface,
6287 1,
6288 &idParams));
6289
6290 // Setup Curbe
6291 CODECHAL_ENCODE_AVC_PREPROC_CURBE_PARAMS preProcCurbeParams;
6292 MOS_ZeroMemory(&preProcCurbeParams, sizeof(preProcCurbeParams));
6293 preProcCurbeParams.pPreEncParams = preEncParams;
6294 preProcCurbeParams.wPicWidthInMb = m_picWidthInMb;
6295 preProcCurbeParams.wFieldFrameHeightInMb = m_frameFieldHeightInMb;
6296 preProcCurbeParams.pKernelState = kernelState;
6297
6298 CODECHAL_ENCODE_CHK_STATUS_RETURN(SetCurbeAvcPreProc(
6299 &preProcCurbeParams));
6300
6301 CODECHAL_DEBUG_TOOL(
6302 CODECHAL_ENCODE_CHK_STATUS_RETURN(m_debugInterface->DumpKernelRegion(
6303 encFunctionType,
6304 MHW_DSH_TYPE,
6305 kernelState));
6306
6307 CODECHAL_ENCODE_CHK_STATUS_RETURN(m_debugInterface->DumpCurbe(
6308 encFunctionType,
6309 kernelState));
6310
6311 CODECHAL_ENCODE_CHK_STATUS_RETURN(m_debugInterface->DumpKernelRegion(
6312 encFunctionType,
6313 MHW_ISH_TYPE,
6314 kernelState));
6315 )
6316
6317 for (uint8_t i = 0; i < CODEC_AVC_MAX_NUM_REF_FRAME; i++)
6318 {
6319 if (m_picIdx[i].bValid)
6320 {
6321 uint8_t index = m_picIdx[i].ucPicIdx;
6322 refList[index]->sRefBuffer = refList[index]->sRefRawBuffer;
6323
6324 CodecHalGetResourceInfo(m_osInterface, &refList[index]->sRefBuffer);
6325 }
6326 }
6327
6328 MOS_COMMAND_BUFFER cmdBuffer;
6329 CODECHAL_ENCODE_CHK_STATUS_RETURN(m_osInterface->pfnGetCommandBuffer(m_osInterface, &cmdBuffer, 0));
6330
6331 SendKernelCmdsParams sendKernelCmdsParams = SendKernelCmdsParams();
6332 sendKernelCmdsParams.EncFunctionType = encFunctionType;
6333 sendKernelCmdsParams.ucDmvPredFlag = (m_pictureCodingType == I_TYPE) ? 0 : m_avcSliceParams->direct_spatial_mv_pred_flag;
6334
6335 sendKernelCmdsParams.pKernelState = kernelState;
6336 CODECHAL_ENCODE_CHK_STATUS_RETURN(SendGenericKernelCmds(&cmdBuffer, &sendKernelCmdsParams));
6337
6338 // Set up FtqLut Buffer if there is QP change within a frame
6339 if (preEncParams->bMBQp)
6340 {
6341 CODECHAL_ENCODE_AVC_INIT_MBBRC_CONSTANT_DATA_BUFFER_PARAMS initMbBrcConstantDataBufferParams;
6342
6343 MOS_ZeroMemory(&initMbBrcConstantDataBufferParams, sizeof(initMbBrcConstantDataBufferParams));
6344 initMbBrcConstantDataBufferParams.pOsInterface = m_osInterface;
6345 initMbBrcConstantDataBufferParams.presBrcConstantDataBuffer =
6346 &BrcBuffers.resMbBrcConstDataBuffer[m_currRecycledBufIdx];
6347 initMbBrcConstantDataBufferParams.bPreProcEnable = true;
6348 initMbBrcConstantDataBufferParams.bEnableKernelTrellis = bKernelTrellis && m_trellisQuantParams.dwTqEnabled;;
6349
6350 CODECHAL_ENCODE_CHK_STATUS_RETURN(InitMbBrcConstantDataBuffer(&initMbBrcConstantDataBufferParams));
6351 }
6352
6353 // Add binding table
6354 CODECHAL_ENCODE_CHK_STATUS_RETURN(m_stateHeapInterface->pfnSetBindingTable(
6355 m_stateHeapInterface,
6356 kernelState));
6357
6358 //Add surface states
6359 CODECHAL_ENCODE_AVC_PREPROC_SURFACE_PARAMS preProcSurfaceParams;
6360 MOS_ZeroMemory(&preProcSurfaceParams, sizeof(preProcSurfaceParams));
6361 preProcSurfaceParams.pPreEncParams = preEncParams;
6362 preProcSurfaceParams.ppRefList = &m_refList[0];
6363 preProcSurfaceParams.pCurrOriginalPic = &m_currOriginalPic;
6364 preProcSurfaceParams.psCurrPicSurface = m_rawSurfaceToEnc;
6365 preProcSurfaceParams.ps4xMeMvDataBuffer = &m_4xMeMvDataBuffer;
6366 preProcSurfaceParams.presFtqLutBuffer = &BrcBuffers.resMbBrcConstDataBuffer[m_currRecycledBufIdx];
6367 preProcSurfaceParams.dwMeMvBottomFieldOffset = m_meMvBottomFieldOffset;
6368 preProcSurfaceParams.dwFrameWidthInMb = (uint32_t)m_picWidthInMb;
6369 preProcSurfaceParams.dwFrameFieldHeightInMb = (uint32_t)m_frameFieldHeightInMb;
6370 preProcSurfaceParams.dwMBVProcStatsBottomFieldOffset =
6371 CodecHal_PictureIsBottomField(m_currOriginalPic) ? m_mbvProcStatsBottomFieldOffset : 0;
6372 // Interleaved input surfaces
6373 preProcSurfaceParams.dwVerticalLineStride = m_verticalLineStride;
6374 preProcSurfaceParams.dwVerticalLineStrideOffset = m_verticalLineStrideOffset;
6375 preProcSurfaceParams.bHmeEnabled = m_hmeEnabled;
6376 preProcSurfaceParams.pPreProcBindingTable = &PreProcBindingTable;
6377 preProcSurfaceParams.pKernelState = kernelState;
6378
6379 CODECHAL_ENCODE_CHK_STATUS_RETURN(SendAvcPreProcSurfaces(&cmdBuffer, &preProcSurfaceParams));
6380
6381 uint32_t resolutionX = (uint32_t)m_picWidthInMb;
6382 uint32_t resolutionY = (uint32_t)m_frameFieldHeightInMb;
6383
6384 CODECHAL_WALKER_CODEC_PARAMS walkerCodecParams;
6385 MOS_ZeroMemory(&walkerCodecParams, sizeof(walkerCodecParams));
6386 walkerCodecParams.WalkerMode = m_walkerMode;
6387 walkerCodecParams.dwResolutionX = resolutionX;
6388 walkerCodecParams.dwResolutionY = resolutionY;
6389 walkerCodecParams.bNoDependency = true;
6390 walkerCodecParams.bMbaff = m_mbaffEnabled;
6391 walkerCodecParams.bGroupIdSelectSupported = m_groupIdSelectSupported;
6392 walkerCodecParams.ucGroupId = m_groupId;
6393
6394 MHW_WALKER_PARAMS walkerParams;
6395 CODECHAL_ENCODE_CHK_STATUS_RETURN(CodecHalInitMediaObjectWalkerParams(
6396 m_hwInterface,
6397 &walkerParams,
6398 &walkerCodecParams));
6399
6400 HalOcaInterface::TraceMessage(cmdBuffer, (MOS_CONTEXT_HANDLE)m_osInterface->pOsContext, __FUNCTION__, sizeof(__FUNCTION__));
6401 HalOcaInterface::OnDispatch(cmdBuffer, *m_osInterface, *m_miInterface, *m_renderEngineInterface->GetMmioRegisters());
6402
6403 CODECHAL_ENCODE_CHK_STATUS_RETURN(m_renderEngineInterface->AddMediaObjectWalkerCmd(
6404 &cmdBuffer,
6405 &walkerParams));
6406
6407 CODECHAL_ENCODE_CHK_STATUS_RETURN(EndStatusReport(&cmdBuffer, encFunctionType));
6408
6409 // Add dump for MBEnc surface state heap here
6410 CODECHAL_DEBUG_TOOL(
6411 CODECHAL_ENCODE_CHK_STATUS_RETURN(m_debugInterface->DumpKernelRegion(
6412 encFunctionType,
6413 MHW_SSH_TYPE,
6414 kernelState));
6415 )
6416
6417 CODECHAL_DEBUG_TOOL(CODECHAL_ENCODE_CHK_STATUS_RETURN(m_debugInterface->DumpCmdBuffer(
6418 &cmdBuffer,
6419 encFunctionType,
6420 nullptr)));
6421
6422 CODECHAL_ENCODE_CHK_STATUS_RETURN(m_stateHeapInterface->pfnSubmitBlocks(
6423 m_stateHeapInterface,
6424 kernelState));
6425
6426 if (!m_singleTaskPhaseSupported || m_lastTaskInPhase)
6427 {
6428 CODECHAL_ENCODE_CHK_STATUS_RETURN(m_stateHeapInterface->pfnUpdateGlobalCmdBufId(
6429 m_stateHeapInterface));
6430 CODECHAL_ENCODE_CHK_STATUS_RETURN(m_miInterface->AddMiBatchBufferEnd(&cmdBuffer, nullptr));
6431 }
6432
6433 CODECHAL_ENCODE_CHK_STATUS_RETURN(m_hwInterface->UpdateSSEuForCmdBuffer(&cmdBuffer, m_singleTaskPhaseSupported, m_lastTaskInPhase));
6434
6435 m_osInterface->pfnReturnCommandBuffer(m_osInterface, &cmdBuffer, 0);
6436
6437 if ((!m_singleTaskPhaseSupported || m_lastTaskInPhase))
6438 {
6439 HalOcaInterface::On1stLevelBBEnd(cmdBuffer, *m_osInterface);
6440 m_osInterface->pfnSubmitCommandBuffer(m_osInterface, &cmdBuffer, m_renderContextUsesNullHw);
6441 m_lastTaskInPhase = false;
6442 }
6443
6444 return eStatus;
6445 }
6446
6447 #endif
SetCurbeMe(MeCurbeParams * params)6448 MOS_STATUS CodechalEncodeAvcEncFeiG8::SetCurbeMe(MeCurbeParams* params)
6449 {
6450 MOS_STATUS eStatus = MOS_STATUS_SUCCESS;
6451
6452 CODECHAL_ENCODE_FUNCTION_ENTER;
6453
6454 CODECHAL_ENCODE_CHK_NULL_RETURN(params);
6455
6456 auto preEncParams = (FeiPreEncParams*)m_encodeParams.pPreEncParams;
6457 CODECHAL_ENCODE_CHK_NULL_RETURN(preEncParams);
6458
6459 auto slcParams = m_avcSliceParams;
6460 bool framePicture = CodecHal_PictureIsFrame(m_currOriginalPic);
6461 uint32_t scaleFactor;
6462 uint8_t mvShiftFactor = 0, prevMvReadPosFactor = 0;
6463 bool useMvFromPrevStep, writeDistortions;
6464 switch (params->hmeLvl)
6465 {
6466 case HME_LEVEL_4x:
6467 useMvFromPrevStep = false;
6468 writeDistortions = false;
6469 scaleFactor = SCALE_FACTOR_4x;
6470 mvShiftFactor = 2;
6471 prevMvReadPosFactor = 0;
6472 break;
6473 default:
6474 eStatus = MOS_STATUS_INVALID_PARAMETER;
6475 return eStatus;
6476 break;
6477 }
6478
6479 ME_CURBE_CM_FEI cmd;
6480 CODECHAL_ENCODE_CHK_STATUS_RETURN(MOS_SecureMemcpy(
6481 &cmd,
6482 sizeof(ME_CURBE_CM_FEI),
6483 m_meCurbeCmFei,
6484 sizeof(ME_CURBE_CM_FEI)));
6485
6486 cmd.DW3.SubPelMode = 3;
6487 if (m_fieldScalingOutputInterleaved)
6488 {
6489 cmd.DW3.SrcAccess =
6490 cmd.DW3.RefAccess = CodecHal_PictureIsField(m_currOriginalPic) ? 1 : 0;
6491 cmd.DW7.SrcFieldPolarity = CodecHal_PictureIsBottomField(m_currOriginalPic) ? 1 : 0;
6492 }
6493
6494 cmd.DW4.PictureHeightMinus1 =
6495 CODECHAL_GET_HEIGHT_IN_MACROBLOCKS(m_frameFieldHeight / scaleFactor) - 1;
6496 cmd.DW4.PictureWidth =
6497 CODECHAL_GET_HEIGHT_IN_MACROBLOCKS(m_frameWidth / scaleFactor);
6498 cmd.DW5.QpPrimeY = preEncParams->dwFrameQp;
6499 cmd.DW6.WriteDistortions = writeDistortions;
6500 cmd.DW6.UseMvFromPrevStep = useMvFromPrevStep;
6501
6502 cmd.DW6.SuperCombineDist = m_superCombineDistGeneric[m_targetUsage];
6503 cmd.DW6.MaxVmvR = (framePicture) ?
6504 CodecHalAvcEncode_GetMaxMvLen(CODEC_AVC_LEVEL_52) * 4 :
6505 (CodecHalAvcEncode_GetMaxMvLen(CODEC_AVC_LEVEL_52) >> 1) * 4;
6506
6507 if (m_pictureCodingType == B_TYPE)
6508 {
6509 // This field is irrelevant since we are not using the bi-direct search.
6510 // set it to 32
6511 cmd.DW1.BiWeight = 32;
6512 cmd.DW13.NumRefIdxL1MinusOne = slcParams->num_ref_idx_l1_active_minus1;
6513 }
6514
6515 if (m_pictureCodingType == P_TYPE ||
6516 m_pictureCodingType == B_TYPE)
6517 {
6518 cmd.DW13.NumRefIdxL0MinusOne = slcParams->num_ref_idx_l0_active_minus1;
6519 }
6520
6521 if (!framePicture)
6522 {
6523 if (m_pictureCodingType != I_TYPE)
6524 {
6525 cmd.DW14.List0RefID0FieldParity = CodecHalAvcEncode_GetFieldParity(slcParams, LIST_0, CODECHAL_ENCODE_REF_ID_0);
6526 cmd.DW14.List0RefID1FieldParity = CodecHalAvcEncode_GetFieldParity(slcParams, LIST_0, CODECHAL_ENCODE_REF_ID_1);
6527 cmd.DW14.List0RefID2FieldParity = CodecHalAvcEncode_GetFieldParity(slcParams, LIST_0, CODECHAL_ENCODE_REF_ID_2);
6528 cmd.DW14.List0RefID3FieldParity = CodecHalAvcEncode_GetFieldParity(slcParams, LIST_0, CODECHAL_ENCODE_REF_ID_3);
6529 cmd.DW14.List0RefID4FieldParity = CodecHalAvcEncode_GetFieldParity(slcParams, LIST_0, CODECHAL_ENCODE_REF_ID_4);
6530 cmd.DW14.List0RefID5FieldParity = CodecHalAvcEncode_GetFieldParity(slcParams, LIST_0, CODECHAL_ENCODE_REF_ID_5);
6531 cmd.DW14.List0RefID6FieldParity = CodecHalAvcEncode_GetFieldParity(slcParams, LIST_0, CODECHAL_ENCODE_REF_ID_6);
6532 cmd.DW14.List0RefID7FieldParity = CodecHalAvcEncode_GetFieldParity(slcParams, LIST_0, CODECHAL_ENCODE_REF_ID_7);
6533 }
6534 if (m_pictureCodingType == B_TYPE)
6535 {
6536 cmd.DW14.List1RefID0FieldParity = CodecHalAvcEncode_GetFieldParity(slcParams, LIST_1, CODECHAL_ENCODE_REF_ID_0);
6537 cmd.DW14.List1RefID1FieldParity = CodecHalAvcEncode_GetFieldParity(slcParams, LIST_1, CODECHAL_ENCODE_REF_ID_1);
6538 }
6539 }
6540
6541 cmd.DW15.MvShiftFactor = mvShiftFactor;
6542 cmd.DW15.PrevMvReadPosFactor = prevMvReadPosFactor;
6543
6544 // r3 & r4
6545 uint8_t meMethod = (m_pictureCodingType == B_TYPE) ? m_bMeMethodGeneric[m_targetUsage] : m_meMethodGeneric[m_targetUsage];
6546 uint8_t tableIdx = (m_pictureCodingType == B_TYPE) ? 1 : 0;
6547 eStatus = MOS_SecureMemcpy(&(cmd.SPDelta), 14 * sizeof(uint32_t), CodechalEncoderState::m_encodeSearchPath[tableIdx][meMethod], 14 * sizeof(uint32_t));
6548 if (eStatus != MOS_STATUS_SUCCESS)
6549 {
6550 CODECHAL_ENCODE_ASSERTMESSAGE("Failed to copy memory.");
6551 return eStatus;
6552 }
6553 if(params->pCurbeBinary)
6554 {
6555 MOS_SecureMemcpy(params->pCurbeBinary,m_feiMeCurbeDataSize,&cmd,m_feiMeCurbeDataSize);
6556 return eStatus;
6557 }
6558 // r5
6559 cmd.DW32._4xMeMvOutputDataSurfIndex = ME_MV_DATA_SURFACE_CM;
6560 cmd.DW33._16xOr32xMeMvInputDataSurfIndex = (params->hmeLvl == HME_LEVEL_32x) ?
6561 ME_32x_MV_DATA_SURFACE_CM : ME_16x_MV_DATA_SURFACE_CM;
6562 cmd.DW34._4xMeOutputDistSurfIndex = ME_DISTORTION_SURFACE_CM;
6563 cmd.DW35._4xMeOutputBrcDistSurfIndex = ME_BRC_DISTORTION_CM;
6564 cmd.DW36.VMEFwdInterPredictionSurfIndex = ME_CURR_FOR_FWD_REF_CM;
6565 cmd.DW37.VMEBwdInterPredictionSurfIndex = ME_CURR_FOR_BWD_REF_CM;
6566 cmd.DW38.Value = 0; //MBZ for BDW
6567
6568 CODECHAL_ENCODE_CHK_STATUS_RETURN(params->pKernelState->m_dshRegion.AddData(
6569 &cmd,
6570 params->pKernelState->dwCurbeOffset,
6571 sizeof(cmd)));
6572
6573 return eStatus;
6574 }
6575
SendMeSurfaces(PMOS_COMMAND_BUFFER cmdBuffer,MeSurfaceParams * params)6576 MOS_STATUS CodechalEncodeAvcEncFeiG8::SendMeSurfaces(PMOS_COMMAND_BUFFER cmdBuffer, MeSurfaceParams* params)
6577 {
6578 MOS_STATUS eStatus = MOS_STATUS_SUCCESS;
6579
6580 CODECHAL_ENCODE_FUNCTION_ENTER;
6581
6582 CODECHAL_ENCODE_CHK_NULL_RETURN(m_hwInterface);
6583 CODECHAL_ENCODE_CHK_NULL_RETURN(cmdBuffer);
6584 CODECHAL_ENCODE_CHK_NULL_RETURN(params);
6585 CODECHAL_ENCODE_CHK_NULL_RETURN(params->pKernelState);
6586 CODECHAL_ENCODE_CHK_NULL_RETURN(params->pCurrOriginalPic);
6587 CODECHAL_ENCODE_CHK_NULL_RETURN(params->ps4xMeMvDataBuffer);
6588 CODECHAL_ENCODE_CHK_NULL_RETURN(params->psMeBrcDistortionBuffer);
6589
6590 // only 4x HME is supported for FEI
6591 CODECHAL_ENCODE_ASSERT(!params->b32xMeInUse && !params->b16xMeInUse);
6592 CODECHAL_ENCODE_CHK_NULL_RETURN(params->pMeBindingTable);
6593 auto meBindingTable = params->pMeBindingTable;
6594 bool currFieldPicture = CodecHal_PictureIsField(*(params->pCurrOriginalPic)) ? 1 : 0;
6595 bool currBottomField = CodecHal_PictureIsBottomField(*(params->pCurrOriginalPic)) ? 1 : 0;
6596 uint8_t currVDirection = (!currFieldPicture) ? CODECHAL_VDIRECTION_FRAME :
6597 ((currBottomField) ? CODECHAL_VDIRECTION_BOT_FIELD : CODECHAL_VDIRECTION_TOP_FIELD);
6598 uint8_t scaledIdx = params->ppRefList[m_currReconstructedPic.FrameIdx]->ucScalingIdx;
6599 auto currScaledSurface = m_trackedBuf->Get4xDsSurface(scaledIdx);
6600 CODECHAL_ENCODE_CHK_NULL_RETURN(currScaledSurface);
6601 auto meMvDataBuffer = params->ps4xMeMvDataBuffer;
6602 uint32_t meMvBottomFieldOffset = params->dw4xMeMvBottomFieldOffset;
6603 uint32_t currScaledBottomFieldOffset = params->dw4xScaledBottomFieldOffset;
6604
6605 // Reference height and width information should be taken from the current scaled surface rather
6606 // than from the reference scaled surface in the case of PAFF.
6607 auto refScaledSurface = *currScaledSurface;
6608
6609 uint32_t width = MOS_ALIGN_CEIL(params->dwDownscaledWidthInMb * 32, 64);
6610 uint32_t height = params->dwDownscaledHeightInMb * 4 * CODECHAL_ENCODE_ME_DATA_SIZE_MULTIPLIER;
6611
6612 // Force the values
6613 meMvDataBuffer->dwWidth = width;
6614 meMvDataBuffer->dwHeight = height;
6615 meMvDataBuffer->dwPitch = width;
6616
6617 CODECHAL_SURFACE_CODEC_PARAMS surfaceParams;
6618 MOS_ZeroMemory(&surfaceParams, sizeof(surfaceParams));
6619 surfaceParams.bIs2DSurface = true;
6620 surfaceParams.bMediaBlockRW = true;
6621 surfaceParams.psSurface = meMvDataBuffer;
6622 surfaceParams.dwOffset = meMvBottomFieldOffset;
6623 surfaceParams.dwCacheabilityControl = m_hwInterface->GetCacheabilitySettings()[MOS_CODEC_RESOURCE_USAGE_SURFACE_MV_DATA_ENCODE].Value;
6624 surfaceParams.dwBindingTableOffset = meBindingTable->dwMEMVDataSurface;
6625 surfaceParams.bIsWritable = true;
6626 surfaceParams.bRenderTarget = true;
6627 CODECHAL_ENCODE_CHK_STATUS_RETURN(CodecHalSetRcsSurfaceState(
6628 m_hwInterface,
6629 cmdBuffer,
6630 &surfaceParams,
6631 params->pKernelState));
6632
6633 // Insert Distortion buffers only for 4xMe case
6634 MOS_ZeroMemory(&surfaceParams, sizeof(surfaceParams));
6635 surfaceParams.bIs2DSurface = true;
6636 surfaceParams.bMediaBlockRW = true;
6637 surfaceParams.psSurface = params->psMeBrcDistortionBuffer;
6638 surfaceParams.dwOffset = params->dwMeBrcDistortionBottomFieldOffset;
6639 surfaceParams.dwBindingTableOffset = meBindingTable->dwMEBRCDist;
6640 surfaceParams.dwCacheabilityControl = m_hwInterface->GetCacheabilitySettings()[MOS_CODEC_RESOURCE_USAGE_SURFACE_BRC_ME_DISTORTION_ENCODE].Value;
6641 surfaceParams.bIsWritable = true;
6642 surfaceParams.bRenderTarget = true;
6643 CODECHAL_ENCODE_CHK_STATUS_RETURN(CodecHalSetRcsSurfaceState(
6644 m_hwInterface,
6645 cmdBuffer,
6646 &surfaceParams,
6647 params->pKernelState));
6648
6649 MOS_ZeroMemory(&surfaceParams, sizeof(surfaceParams));
6650 surfaceParams.bIs2DSurface = true;
6651 surfaceParams.bMediaBlockRW = true;
6652 surfaceParams.psSurface = params->psMeDistortionBuffer;
6653 surfaceParams.dwOffset = params->dwMeDistortionBottomFieldOffset;
6654 surfaceParams.dwBindingTableOffset = meBindingTable->dwMEDist;
6655 surfaceParams.dwCacheabilityControl = m_hwInterface->GetCacheabilitySettings()[MOS_CODEC_RESOURCE_USAGE_SURFACE_ME_DISTORTION_ENCODE].Value;
6656 surfaceParams.bIsWritable = true;
6657 surfaceParams.bRenderTarget = true;
6658 CODECHAL_ENCODE_CHK_STATUS_RETURN(CodecHalSetRcsSurfaceState(
6659 m_hwInterface,
6660 cmdBuffer,
6661 &surfaceParams,
6662 params->pKernelState));
6663
6664 // Setup references 1...n
6665 // LIST 0 references
6666 for (uint8_t refIdx = 0; refIdx <= params->dwNumRefIdxL0ActiveMinus1; refIdx++)
6667 {
6668 auto refPic = params->pL0RefFrameList[refIdx];
6669
6670 if (!CodecHal_PictureIsInvalid(refPic) && params->pPicIdx[refPic.FrameIdx].bValid)
6671 {
6672 if (refIdx == 0)
6673 {
6674 // Current Picture Y - VME
6675 MOS_ZeroMemory(&surfaceParams, sizeof(surfaceParams));
6676 surfaceParams.bUseAdvState = true;
6677 surfaceParams.psSurface = currScaledSurface;
6678 surfaceParams.dwOffset = currBottomField ? currScaledBottomFieldOffset : 0;
6679 surfaceParams.dwCacheabilityControl = m_hwInterface->GetCacheabilitySettings()[MOS_CODEC_RESOURCE_USAGE_SURFACE_CURR_ENCODE].Value;
6680 surfaceParams.dwBindingTableOffset = meBindingTable->dwMECurrForFwdRef;
6681 surfaceParams.ucVDirection = currVDirection;
6682 CODECHAL_ENCODE_CHK_STATUS_RETURN(CodecHalSetRcsSurfaceState(
6683 m_hwInterface,
6684 cmdBuffer,
6685 &surfaceParams,
6686 params->pKernelState));
6687 }
6688
6689 bool refFieldPicture = CodecHal_PictureIsField(refPic) ? 1 : 0;
6690 bool refBottomField = (CodecHal_PictureIsBottomField(refPic)) ? 1 : 0;
6691 uint8_t refPicIdx = params->pPicIdx[refPic.FrameIdx].ucPicIdx;
6692 scaledIdx = params->ppRefList[refPicIdx]->ucScalingIdx;
6693
6694 MOS_SURFACE* p4xSurface = m_trackedBuf->Get4xDsSurface(scaledIdx);
6695 if (p4xSurface != nullptr)
6696 {
6697 refScaledSurface.OsResource = p4xSurface->OsResource;
6698 }
6699 else
6700 {
6701 CODECHAL_ENCODE_ASSERTMESSAGE("NULL pointer of DsSurface");
6702 }
6703 uint32_t refScaledBottomFieldOffset = refBottomField ? currScaledBottomFieldOffset : 0;
6704
6705 // L0 Reference Picture Y - VME
6706 MOS_ZeroMemory(&surfaceParams, sizeof(surfaceParams));
6707 surfaceParams.bUseAdvState = true;
6708 surfaceParams.psSurface = &refScaledSurface;
6709 surfaceParams.dwOffset = refBottomField ? refScaledBottomFieldOffset : 0;
6710 surfaceParams.dwCacheabilityControl = m_hwInterface->GetCacheabilitySettings()[MOS_CODEC_RESOURCE_USAGE_SURFACE_REF_ENCODE].Value;
6711 surfaceParams.dwBindingTableOffset = meBindingTable->dwMEFwdRefPicIdx[refIdx];
6712 surfaceParams.ucVDirection = !currFieldPicture ? CODECHAL_VDIRECTION_FRAME :
6713 ((refBottomField) ? CODECHAL_VDIRECTION_BOT_FIELD : CODECHAL_VDIRECTION_TOP_FIELD);
6714 CODECHAL_ENCODE_CHK_STATUS_RETURN(CodecHalSetRcsSurfaceState(
6715 m_hwInterface,
6716 cmdBuffer,
6717 &surfaceParams,
6718 params->pKernelState));
6719
6720 if (currFieldPicture)
6721 {
6722 // VME needs to set ref index 1 too for field case
6723 surfaceParams.dwBindingTableOffset = meBindingTable->dwMEFwdRefPicIdx[refIdx + 1];
6724 CODECHAL_ENCODE_CHK_STATUS_RETURN(CodecHalSetRcsSurfaceState(
6725 m_hwInterface,
6726 cmdBuffer,
6727 &surfaceParams,
6728 params->pKernelState));
6729 }
6730 }
6731 }
6732
6733 // Setup references 1...n
6734 // LIST 1 references
6735 for (uint8_t refIdx = 0; refIdx <= params->dwNumRefIdxL1ActiveMinus1; refIdx++)
6736 {
6737 auto refPic = params->pL1RefFrameList[refIdx];
6738
6739 if (!CodecHal_PictureIsInvalid(refPic) && params->pPicIdx[refPic.FrameIdx].bValid)
6740 {
6741 if (refIdx == 0)
6742 {
6743 // Current Picture Y - VME
6744 MOS_ZeroMemory(&surfaceParams, sizeof(surfaceParams));
6745 surfaceParams.bUseAdvState = true;
6746 surfaceParams.psSurface = currScaledSurface;
6747 surfaceParams.dwOffset = currBottomField ? currScaledBottomFieldOffset : 0;
6748 surfaceParams.dwCacheabilityControl = m_hwInterface->GetCacheabilitySettings()[MOS_CODEC_RESOURCE_USAGE_SURFACE_CURR_ENCODE].Value;
6749 surfaceParams.dwBindingTableOffset = meBindingTable->dwMECurrForBwdRef;
6750 surfaceParams.ucVDirection = currVDirection;
6751 CODECHAL_ENCODE_CHK_STATUS_RETURN(CodecHalSetRcsSurfaceState(
6752 m_hwInterface,
6753 cmdBuffer,
6754 &surfaceParams,
6755 params->pKernelState));
6756 }
6757
6758 bool refFieldPicture = CodecHal_PictureIsField(refPic) ? 1 : 0;
6759 bool refBottomField = (CodecHal_PictureIsBottomField(refPic)) ? 1 : 0;
6760 uint8_t refPicIdx = params->pPicIdx[refPic.FrameIdx].ucPicIdx;
6761 scaledIdx = params->ppRefList[refPicIdx]->ucScalingIdx;
6762
6763 MOS_SURFACE* p4xSurface = m_trackedBuf->Get4xDsSurface(scaledIdx);
6764 if (p4xSurface != nullptr)
6765 {
6766 refScaledSurface.OsResource = p4xSurface->OsResource;
6767 }
6768 else
6769 {
6770 CODECHAL_ENCODE_ASSERTMESSAGE("NULL pointer of DsSurface");
6771 }
6772 uint32_t refScaledBottomFieldOffset = refBottomField ? currScaledBottomFieldOffset : 0;
6773
6774 // L1 Reference Picture Y - VME
6775 MOS_ZeroMemory(&surfaceParams, sizeof(surfaceParams));
6776 surfaceParams.bUseAdvState = true;
6777 surfaceParams.psSurface = &refScaledSurface;
6778 surfaceParams.dwOffset = refBottomField ? refScaledBottomFieldOffset : 0;
6779 surfaceParams.dwCacheabilityControl = m_hwInterface->GetCacheabilitySettings()[MOS_CODEC_RESOURCE_USAGE_SURFACE_REF_ENCODE].Value;
6780 surfaceParams.dwBindingTableOffset = meBindingTable->dwMEBwdRefPicIdx[refIdx];
6781 surfaceParams.ucVDirection = (!currFieldPicture) ? CODECHAL_VDIRECTION_FRAME :
6782 ((refBottomField) ? CODECHAL_VDIRECTION_BOT_FIELD : CODECHAL_VDIRECTION_TOP_FIELD);
6783 CODECHAL_ENCODE_CHK_STATUS_RETURN(CodecHalSetRcsSurfaceState(
6784 m_hwInterface,
6785 cmdBuffer,
6786 &surfaceParams,
6787 params->pKernelState));
6788
6789 if (currFieldPicture)
6790 {
6791 // VME needs to set ref index 1 too for field case
6792 surfaceParams.dwBindingTableOffset = meBindingTable->dwMEBwdRefPicIdx[refIdx + 1];
6793 CODECHAL_ENCODE_CHK_STATUS_RETURN(CodecHalSetRcsSurfaceState(
6794 m_hwInterface,
6795 cmdBuffer,
6796 &surfaceParams,
6797 params->pKernelState));
6798 }
6799 }
6800 }
6801
6802 return eStatus;
6803 }
6804
EncodeGetKernelHeaderAndSize(void * pvBinary,EncOperation operation,uint32_t krnStateIdx,void * pvKrnHeader,uint32_t * pdwKrnSize)6805 MOS_STATUS CodechalEncodeAvcEncFeiG8::EncodeGetKernelHeaderAndSize(void *pvBinary, EncOperation operation, uint32_t krnStateIdx, void* pvKrnHeader, uint32_t *pdwKrnSize)
6806 {
6807 MOS_STATUS eStatus = MOS_STATUS_SUCCESS;
6808
6809 CODECHAL_ENCODE_CHK_NULL_RETURN(pvBinary);
6810 CODECHAL_ENCODE_CHK_NULL_RETURN(pvKrnHeader);
6811 CODECHAL_ENCODE_CHK_NULL_RETURN(pdwKrnSize);
6812
6813 auto kernelHeaderTable = (PKERNEL_HEADER_FEI_CM)pvBinary;
6814 PCODECHAL_KERNEL_HEADER invalidEntry = &(kernelHeaderTable->AVC_WeightedPrediction) + 1;
6815 uint32_t nextKrnOffset = *pdwKrnSize;
6816
6817 PCODECHAL_KERNEL_HEADER currKrnHeader;
6818 if (operation == ENC_SCALING4X)
6819 {
6820 currKrnHeader = &kernelHeaderTable->PLY_DScale_PLY;
6821 }
6822 else if (operation == ENC_ME)
6823 {
6824 currKrnHeader = &kernelHeaderTable->AVC_ME_P;
6825 }
6826 else if (operation == ENC_MBENC)
6827 {
6828 currKrnHeader = &kernelHeaderTable->AVCMBEnc_Fei_I;
6829 }
6830 else if (operation == ENC_PREPROC)
6831 {
6832 currKrnHeader = &kernelHeaderTable->AVC_Fei_ProProc;
6833 }
6834 else if (operation == ENC_WP)
6835 {
6836 currKrnHeader = &kernelHeaderTable->AVC_WeightedPrediction;
6837 }
6838 else
6839 {
6840 CODECHAL_ENCODE_ASSERTMESSAGE("Unsupported ENC mode requested");
6841 eStatus = MOS_STATUS_INVALID_PARAMETER;
6842 return eStatus;
6843 }
6844
6845 currKrnHeader += krnStateIdx;
6846 *((PCODECHAL_KERNEL_HEADER)pvKrnHeader) = *currKrnHeader;
6847
6848 PCODECHAL_KERNEL_HEADER nextKrnHeader = (currKrnHeader + 1);
6849 if (nextKrnHeader < invalidEntry)
6850 {
6851 nextKrnOffset = nextKrnHeader->KernelStartPointer << MHW_KERNEL_OFFSET_SHIFT;
6852 }
6853 *pdwKrnSize = nextKrnOffset - (currKrnHeader->KernelStartPointer << MHW_KERNEL_OFFSET_SHIFT);
6854
6855 return eStatus;
6856 }
6857
InitializeState()6858 MOS_STATUS CodechalEncodeAvcEncFeiG8::InitializeState()
6859 {
6860 MOS_STATUS eStatus = MOS_STATUS_SUCCESS;
6861
6862 CODECHAL_ENCODE_FUNCTION_ENTER;
6863
6864 CODECHAL_ENCODE_CHK_STATUS_RETURN(CodechalEncodeAvcEncG8::InitializeState());
6865
6866 if (m_codecFunction == CODECHAL_FUNCTION_FEI_PRE_ENC)
6867 {
6868 m_hmeSupported = true;
6869 m_flatnessCheckSupported = true;
6870 }
6871
6872 if (m_feiEnable)
6873 {
6874 if (m_codecFunction == CODECHAL_FUNCTION_FEI_PRE_ENC)
6875 {
6876 m_hmeSupported = true;
6877 m_flatnessCheckSupported = true;
6878 }
6879
6880 m_16xMeSupported = false;
6881 m_32xMeSupported = false;
6882 }
6883
6884 bWeightedPredictionSupported = true;
6885 dwBrcConstantSurfaceWidth = m_brcConstantSurfaceWidth;
6886 dwBrcConstantSurfaceHeight = m_brcConstantSurfaceHeight;
6887
6888 return eStatus;
6889 }
6890
ValidateNumReferences(PCODECHAL_ENCODE_AVC_VALIDATE_NUM_REFS_PARAMS params)6891 MOS_STATUS CodechalEncodeAvcEncFeiG8::ValidateNumReferences(PCODECHAL_ENCODE_AVC_VALIDATE_NUM_REFS_PARAMS params)
6892 {
6893 MOS_STATUS eStatus = MOS_STATUS_SUCCESS;
6894
6895 CODECHAL_ENCODE_FUNCTION_ENTER;
6896 CODECHAL_ENCODE_CHK_NULL_RETURN(params);
6897 CODECHAL_ENCODE_CHK_NULL_RETURN(params->pSeqParams);
6898 CODECHAL_ENCODE_CHK_NULL_RETURN(params->pAvcSliceParams);
6899
6900 uint8_t numRefIdx0MinusOne = params->pAvcSliceParams->num_ref_idx_l0_active_minus1;
6901 uint8_t numRefIdx1MinusOne = params->pAvcSliceParams->num_ref_idx_l1_active_minus1;
6902
6903 // Nothing to do here if numRefIdx = 0 and frame encoded
6904 if (numRefIdx0MinusOne == 0 && !CodecHal_PictureIsField(params->pPicParams->CurrOriginalPic))
6905 {
6906 if (params->wPictureCodingType == P_TYPE ||
6907 (params->wPictureCodingType == B_TYPE && numRefIdx1MinusOne == 0))
6908 {
6909 return eStatus;
6910 }
6911 }
6912
6913 if (params->wPictureCodingType == P_TYPE || params->wPictureCodingType == B_TYPE)
6914 {
6915 uint8_t maxPNumRefIdx0MinusOne = CODECHAL_ENCODE_AVC_MAX_NUM_REF_L0 - 1;
6916 uint8_t maxPNumRefIdx1MinusOne = CODECHAL_ENCODE_AVC_MAX_NUM_REF_L1 - 1;
6917 if(params->bPAKonly)
6918 {
6919 maxPNumRefIdx0MinusOne = CODEC_AVC_MAX_NUM_REF_FRAME - 1;
6920 maxPNumRefIdx1MinusOne = CODEC_AVC_MAX_NUM_REF_FRAME - 1;
6921 }
6922 if (params->wPictureCodingType == P_TYPE)
6923 {
6924 if (numRefIdx0MinusOne > maxPNumRefIdx0MinusOne)
6925 {
6926 CODECHAL_ENCODE_NORMALMESSAGE("Invalid active reference list size.");
6927 numRefIdx0MinusOne = maxPNumRefIdx0MinusOne;
6928 }
6929 numRefIdx1MinusOne = 0;
6930 }
6931 else // B_TYPE
6932 {
6933 if (numRefIdx0MinusOne > maxPNumRefIdx0MinusOne)
6934 {
6935 CODECHAL_ENCODE_NORMALMESSAGE("Invalid active reference list size.");
6936 numRefIdx0MinusOne = maxPNumRefIdx0MinusOne;
6937 }
6938
6939 if (numRefIdx1MinusOne > maxPNumRefIdx1MinusOne)
6940 {
6941 CODECHAL_ENCODE_NORMALMESSAGE("Invalid active reference list size.");
6942 numRefIdx1MinusOne = maxPNumRefIdx1MinusOne;
6943 }
6944
6945 // supports at most 1 L1 ref for frame picture for non-PAK only case
6946 if (CodecHal_PictureIsFrame(params->pPicParams->CurrOriginalPic) && numRefIdx1MinusOne > 0 && (!params->bPAKonly))
6947 {
6948 numRefIdx1MinusOne = 0;
6949 }
6950 }
6951 }
6952
6953 // Override number of references used by VME. PAK uses value from DDI (num_ref_idx_l*_active_minus1_from_DDI)
6954 params->pAvcSliceParams->num_ref_idx_l0_active_minus1 = numRefIdx0MinusOne;
6955 params->pAvcSliceParams->num_ref_idx_l1_active_minus1 = numRefIdx1MinusOne;
6956
6957 return eStatus;
6958 }
6959
InitKernelStateWP()6960 MOS_STATUS CodechalEncodeAvcEncFeiG8::InitKernelStateWP()
6961 {
6962 MOS_STATUS eStatus = MOS_STATUS_SUCCESS;
6963
6964 CODECHAL_ENCODE_FUNCTION_ENTER;
6965
6966 pWPKernelState = MOS_New(MHW_KERNEL_STATE);
6967 CODECHAL_ENCODE_CHK_NULL_RETURN(pWPKernelState);
6968
6969 auto kernelStatePtr = pWPKernelState;
6970
6971 uint8_t* kernelBinary;
6972 uint32_t kernelSize;
6973
6974 CODECHAL_ENCODE_CHK_STATUS_RETURN(CodecHalGetKernelBinaryAndSize(m_kernelBase, m_kuid, &kernelBinary, &kernelSize));
6975
6976 CODECHAL_KERNEL_HEADER currKrnHeader;
6977 CODECHAL_ENCODE_CHK_STATUS_RETURN(EncodeGetKernelHeaderAndSize(
6978 kernelBinary,
6979 ENC_WP,
6980 0,
6981 &currKrnHeader,
6982 &kernelSize));
6983 kernelStatePtr->KernelParams.iBTCount = WP_NUM_SURFACES;
6984 kernelStatePtr->KernelParams.iThreadCount = m_renderEngineInterface->GetHwCaps()->dwMaxThreads;
6985 kernelStatePtr->KernelParams.iCurbeLength = sizeof(WP_CURBE);
6986 kernelStatePtr->KernelParams.iBlockWidth = CODECHAL_MACROBLOCK_WIDTH;
6987 kernelStatePtr->KernelParams.iBlockHeight = CODECHAL_MACROBLOCK_HEIGHT;
6988 kernelStatePtr->KernelParams.iIdCount = 1;
6989 kernelStatePtr->KernelParams.iInlineDataLength = 0;
6990
6991 kernelStatePtr->dwCurbeOffset = m_stateHeapInterface->pStateHeapInterface->GetSizeofCmdInterfaceDescriptorData();
6992 kernelStatePtr->KernelParams.pBinary = kernelBinary + (currKrnHeader.KernelStartPointer << MHW_KERNEL_OFFSET_SHIFT);
6993 kernelStatePtr->KernelParams.iSize = kernelSize;
6994 CODECHAL_ENCODE_CHK_STATUS_RETURN(m_stateHeapInterface->pfnCalculateSshAndBtSizesRequested(
6995 m_stateHeapInterface,
6996 kernelStatePtr->KernelParams.iBTCount,
6997 &kernelStatePtr->dwSshSize,
6998 &kernelStatePtr->dwBindingTableSize));
6999
7000 CODECHAL_ENCODE_CHK_STATUS_RETURN(m_hwInterface->MhwInitISH(m_stateHeapInterface, kernelStatePtr));
7001
7002 return eStatus;
7003 }
7004
GetMbEncKernelStateIdx(CodechalEncodeIdOffsetParams * params,uint32_t * pdwKernelOffset)7005 MOS_STATUS CodechalEncodeAvcEncFeiG8::GetMbEncKernelStateIdx(CodechalEncodeIdOffsetParams* params, uint32_t* pdwKernelOffset)
7006 {
7007 MOS_STATUS eStatus = MOS_STATUS_SUCCESS;
7008
7009 CODECHAL_ENCODE_FUNCTION_ENTER;
7010
7011 CODECHAL_ENCODE_CHK_NULL_RETURN(params);
7012 CODECHAL_ENCODE_CHK_NULL_RETURN(pdwKernelOffset);
7013
7014 *pdwKernelOffset = MBENC_I_OFFSET_CM;
7015
7016 if (params->EncFunctionType == CODECHAL_MEDIA_STATE_ENC_ADV)
7017 {
7018 *pdwKernelOffset += MBENC_TARGET_USAGE_CM;
7019 }
7020
7021 if (params->wPictureCodingType == P_TYPE)
7022 {
7023 *pdwKernelOffset += MBENC_P_OFFSET_CM;
7024 }
7025 else if (params->wPictureCodingType == B_TYPE)
7026 {
7027 *pdwKernelOffset += MBENC_B_OFFSET_CM;
7028 }
7029
7030 return eStatus;
7031 }
7032
SetCurbeAvcMbEnc(PCODECHAL_ENCODE_AVC_MBENC_CURBE_PARAMS params)7033 MOS_STATUS CodechalEncodeAvcEncFeiG8::SetCurbeAvcMbEnc(PCODECHAL_ENCODE_AVC_MBENC_CURBE_PARAMS params)
7034 {
7035 MOS_STATUS eStatus = MOS_STATUS_SUCCESS;
7036 CODECHAL_ENCODE_FUNCTION_ENTER;
7037 CODECHAL_ENCODE_CHK_NULL_RETURN(params);
7038 CODECHAL_ENCODE_CHK_NULL_RETURN(params->pPicParams);
7039 CODECHAL_ENCODE_CHK_NULL_RETURN(params->pSeqParams);
7040 CODECHAL_ENCODE_CHK_NULL_RETURN(params->pSlcParams);
7041
7042 auto seqParams = params->pSeqParams;
7043 CODECHAL_ENCODE_ASSERT(seqParams->TargetUsage == TARGETUSAGE_RT_SPEED);
7044 // set sliceQP to MAX_SLICE_QP for MbEnc kernel, we can use it to verify whether QP is changed or not
7045 auto picParams = params->pPicParams;
7046 auto slcParams = params->pSlcParams;
7047 uint8_t sliceQP = (params->bUseMbEncAdvKernel && params->bBrcEnabled) ? CODECHAL_ENCODE_AVC_MAX_SLICE_QP : picParams->pic_init_qp_minus26 + 26 + slcParams->slice_qp_delta;
7048 bool framePicture = CodecHal_PictureIsFrame(picParams->CurrOriginalPic);
7049
7050 MBENC_CURBE_CM_FEI cmd;
7051
7052 if (params->bMbEncIFrameDistEnabled)
7053 {
7054 CODECHAL_ENCODE_CHK_STATUS_RETURN(MOS_SecureMemcpy(
7055 &cmd,
7056 sizeof(MBENC_CURBE_CM_FEI),
7057 m_feiMbEncCurbeIFrameDist,
7058 sizeof(MBENC_CURBE_CM_FEI)));
7059 }
7060 else
7061 {
7062 switch (m_pictureCodingType)
7063 {
7064 case I_TYPE:
7065 if (framePicture)
7066 {
7067 CODECHAL_ENCODE_CHK_STATUS_RETURN(MOS_SecureMemcpy(
7068 &cmd,
7069 sizeof(MBENC_CURBE_CM_FEI),
7070 m_feiMbEncCurbeNormalIFrame,
7071 sizeof(MBENC_CURBE_CM_FEI)));
7072 }
7073 else
7074 {
7075 CODECHAL_ENCODE_CHK_STATUS_RETURN(MOS_SecureMemcpy(
7076 &cmd,
7077 sizeof(MBENC_CURBE_CM_FEI),
7078 m_feiMbEncCurbeNormalIField,
7079 sizeof(MBENC_CURBE_CM_FEI)));
7080 }
7081 break;
7082
7083 case P_TYPE:
7084 if (framePicture)
7085 {
7086 CODECHAL_ENCODE_CHK_STATUS_RETURN(MOS_SecureMemcpy(
7087 &cmd,
7088 sizeof(MBENC_CURBE_CM_FEI),
7089 m_feiMbEncCurbeNormalPFrame,
7090 sizeof(MBENC_CURBE_CM_FEI)));
7091 }
7092 else
7093 {
7094 CODECHAL_ENCODE_CHK_STATUS_RETURN(MOS_SecureMemcpy(
7095 &cmd,
7096 sizeof(MBENC_CURBE_CM_FEI),
7097 m_feiMbEncCurbeNormalPfield,
7098 sizeof(MBENC_CURBE_CM_FEI)));
7099 }
7100 break;
7101
7102 case B_TYPE:
7103 if (framePicture)
7104 {
7105 CODECHAL_ENCODE_CHK_STATUS_RETURN(MOS_SecureMemcpy(
7106 &cmd,
7107 sizeof(MBENC_CURBE_CM_FEI),
7108 m_feiMbEncCurbeNormalBFrame,
7109 sizeof(MBENC_CURBE_CM_FEI)));
7110 }
7111 else
7112 {
7113 CODECHAL_ENCODE_CHK_STATUS_RETURN(MOS_SecureMemcpy(
7114 &cmd,
7115 sizeof(MBENC_CURBE_CM_FEI),
7116 m_feiMbEncCurbeNormalBField,
7117 sizeof(MBENC_CURBE_CM_FEI)));
7118 }
7119 break;
7120
7121 default:
7122 CODECHAL_ENCODE_ASSERTMESSAGE("Invalid picture coding type.");
7123 eStatus = MOS_STATUS_UNKNOWN;
7124 return eStatus;
7125 }
7126 }
7127 auto feiPicParams = (CodecEncodeAvcFeiPicParams *)(m_avcFeiPicParams);
7128 uint8_t ucMeMethod = (feiPicParams->SearchWindow == 5) || (feiPicParams->SearchWindow == 8) ? 4 : 6; // 4 means full search, 6 means diamand search
7129 uint32_t refWidth = feiPicParams->RefWidth;
7130 uint32_t refHeight = feiPicParams->RefHeight;
7131 uint32_t lenSP = feiPicParams->LenSP;
7132 switch (feiPicParams->SearchWindow)
7133 {
7134 case 0:
7135 // not use predefined search window
7136 if((feiPicParams->SearchPath != 0) && (feiPicParams->SearchPath != 1) && (feiPicParams->SearchPath != 2))
7137 {
7138 CODECHAL_ENCODE_ASSERTMESSAGE("Invalid picture FEI MB ENC input SearchPath for SearchWindow=0 case!!!.");
7139 eStatus = MOS_STATUS_INVALID_PARAMETER;
7140 return eStatus;
7141 }
7142 ucMeMethod = (feiPicParams->SearchPath == 1) ? 6 : 4; // 4 means full search, 6 means diamand search
7143 if(((refWidth * refHeight) > 2048) || (refWidth > 64) || (refHeight > 64))
7144 {
7145 CODECHAL_ENCODE_ASSERTMESSAGE("Invalid picture FEI MB ENC input refWidth/refHeight size for SearchWindow=0 case!!!.");
7146 eStatus = MOS_STATUS_INVALID_PARAMETER;
7147 return eStatus;
7148 }
7149 break;
7150 case 1:
7151 // Tiny SUs 24x24 window
7152 refWidth = 24;
7153 refHeight = 24;
7154 lenSP = 4;
7155 break;
7156 case 2:
7157 // Small SUs 28x28 window
7158 refWidth = 28;
7159 refHeight = 28;
7160 lenSP = 9;
7161 break;
7162 case 3:
7163 // Diamond SUs 48x40 window
7164 refWidth = 48;
7165 refHeight = 40;
7166 lenSP = 16;
7167 break;
7168 case 4:
7169 // Large Diamond SUs 48x40 window
7170 refWidth = 48;
7171 refHeight = 40;
7172 lenSP = 32;
7173 break;
7174 case 5:
7175 // Exhaustive SUs 48x40 window
7176 refWidth = 48;
7177 refHeight = 40;
7178 lenSP = 48;
7179 break;
7180 case 6:
7181 // Diamond SUs 64x32 window
7182 refWidth = 64;
7183 refHeight = 32;
7184 lenSP = 16;
7185 break;
7186 case 7:
7187 // Large Diamond SUs 64x32 window
7188 refWidth = 64;
7189 refHeight = 32;
7190 lenSP = 32;
7191 break;
7192 case 8:
7193 // Exhaustive SUs 64x32 window
7194 refWidth = 64;
7195 refHeight = 32;
7196 lenSP = 48;
7197 break;
7198 default:
7199 CODECHAL_ENCODE_ASSERTMESSAGE("Invalid picture FEI MB ENC SearchWindow value!!!.");
7200 eStatus = MOS_STATUS_INVALID_PARAMETER;
7201 return eStatus;
7202 }
7203
7204 if((m_pictureCodingType == B_TYPE) && (cmd.DW3.BMEDisableFBR == 0))
7205 {
7206 if(refWidth > 32)
7207 {
7208 refWidth = 32;
7209 }
7210 if(refHeight > 32)
7211 {
7212 refHeight = 32;
7213 }
7214 }
7215
7216 // r1
7217 cmd.DW0.AdaptiveEn =
7218 cmd.DW37.AdaptiveEn = feiPicParams->AdaptiveSearch;
7219 cmd.DW0.T8x8FlagForInterEn =
7220 cmd.DW37.T8x8FlagForInterEn = picParams->transform_8x8_mode_flag;
7221 cmd.DW2.LenSP = lenSP;
7222 cmd.DW38.LenSP = 0; // MBZ
7223 cmd.DW2.MaxNumSU = cmd.DW38.MaxNumSU = 57;
7224 cmd.DW3.SrcAccess =
7225 cmd.DW3.RefAccess = framePicture ? 0 : 1;
7226 if (m_pictureCodingType != I_TYPE && bFTQEnable)
7227 {
7228 if (m_pictureCodingType == P_TYPE)
7229 {
7230 cmd.DW3.FTEnable = FTQBasedSkip[seqParams->TargetUsage] & 0x01;
7231 }
7232 else // B_TYPE
7233 {
7234 cmd.DW3.FTEnable = (FTQBasedSkip[seqParams->TargetUsage] >> 1) & 0x01;
7235 }
7236 }
7237 else
7238 {
7239 cmd.DW3.FTEnable = 0;
7240 }
7241
7242 cmd.DW2.PicWidth = params->wPicWidthInMb;
7243 cmd.DW3.SubMbPartMask = feiPicParams->SubMBPartMask;
7244 cmd.DW3.SubPelMode = feiPicParams->SubPelMode;
7245 cmd.DW3.InterSAD = feiPicParams->InterSAD;
7246 cmd.DW3.IntraSAD = feiPicParams->IntraSAD;
7247 cmd.DW3.SearchCtrl = (m_pictureCodingType == B_TYPE) ? 7 : 0;
7248 cmd.DW4.PicHeightMinus1 = params->wFieldFrameHeightInMb - 1;
7249 cmd.DW4.TrueDistortionEnable = feiPicParams->DistortionType == 0 ? 1 : 0;
7250
7251 bool bottomField = CodecHal_PictureIsBottomField(picParams->CurrOriginalPic);
7252 cmd.DW4.FieldParityFlag =
7253 cmd.DW7.SrcFieldPolarity = bottomField ? 1 : 0;
7254 cmd.DW4.bCurFldIDR = framePicture ? 0 : (picParams->bIdrPic || m_firstFieldIdrPic);
7255 cmd.DW4.ConstrainedIntraPredFlag = picParams->constrained_intra_pred_flag;
7256 cmd.DW4.HMEEnable = m_hmeEnabled;
7257 cmd.DW4.PictureType = m_pictureCodingType - 1;
7258 cmd.DW4.UseActualRefQPValue = m_hmeEnabled ? (MRDisableQPCheck[seqParams->TargetUsage] == 0) : false;
7259 cmd.DW4.FEIEnable = 1;
7260 cmd.DW4.MultipleMVPredictorPerMBEnable = feiPicParams->MVPredictorEnable;
7261 cmd.DW4.VMEDistortionOutputEnable = feiPicParams->DistortionEnable;
7262 cmd.DW4.PerMBQpEnable = feiPicParams->bMBQp;
7263 cmd.DW4.MBInputEnable = feiPicParams->bPerMBInput;
7264 cmd.DW4.HMEEnable = 0;
7265 cmd.DW5.SliceMbHeight = params->usSliceHeight;
7266 cmd.DW7.IntraPartMask = feiPicParams->IntraPartMask;
7267
7268 // r2
7269 if (params->bMbEncIFrameDistEnabled)
7270 {
7271 cmd.DW6.BatchBufferEnd = 0;
7272 }
7273 else
7274 {
7275 uint8_t tableIdx = m_pictureCodingType - 1;
7276 eStatus = MOS_SecureMemcpy(&(cmd.ModeMvCost), 8 * sizeof(uint32_t), ModeMvCost_Cm[tableIdx][sliceQP], 8 * sizeof(uint32_t));
7277 if (eStatus != MOS_STATUS_SUCCESS)
7278 {
7279 CODECHAL_ENCODE_ASSERTMESSAGE("Failed to copy memory.");
7280 return eStatus;
7281 }
7282
7283 if (m_pictureCodingType == I_TYPE && bOldModeCostEnable)
7284 {
7285 // Old intra mode cost needs to be used if bOldModeCostEnable is 1
7286 cmd.ModeMvCost.DW8.Value = OldIntraModeCost_Cm_Common[sliceQP];
7287 }
7288 else if (m_skipBiasAdjustmentEnable)
7289 {
7290 // Load different MvCost for P picture when SkipBiasAdjustment is enabled
7291 // No need to check for P picture as the flag is only enabled for P picture
7292 cmd.ModeMvCost.DW11.Value = MvCost_PSkipAdjustment_Cm_Common[sliceQP];
7293 }
7294 }
7295
7296 // r3 & r4
7297 if (params->bMbEncIFrameDistEnabled)
7298 {
7299 cmd.SPDelta.DW31.IntraComputeType = 1;
7300 }
7301 else
7302 {
7303 uint8_t tableIdx = (m_pictureCodingType == B_TYPE) ? 1 : 0;
7304 eStatus = MOS_SecureMemcpy(&(cmd.SPDelta), 16 * sizeof(uint32_t), CodechalEncoderState::m_encodeSearchPath[tableIdx][ucMeMethod], 16 * sizeof(uint32_t));
7305 if (eStatus != MOS_STATUS_SUCCESS)
7306 {
7307 CODECHAL_ENCODE_ASSERTMESSAGE("Failed to copy memory.");
7308 return eStatus;
7309 }
7310 }
7311
7312 // r5
7313 if (m_pictureCodingType == P_TYPE)
7314 {
7315 cmd.DW32.SkipVal = SkipVal_P_Common
7316 [cmd.DW3.BlockBasedSkipEnable]
7317 [picParams->transform_8x8_mode_flag]
7318 [sliceQP];
7319 }
7320 else if (m_pictureCodingType == B_TYPE)
7321 {
7322 cmd.DW32.SkipVal = SkipVal_B_Common
7323 [cmd.DW3.BlockBasedSkipEnable]
7324 [picParams->transform_8x8_mode_flag]
7325 [sliceQP];
7326 }
7327
7328 cmd.ModeMvCost.DW13.QpPrimeY = sliceQP;
7329 // QpPrimeCb and QpPrimeCr are not used by Kernel. Following settings are for CModel matching.
7330 cmd.ModeMvCost.DW13.QpPrimeCb = sliceQP;
7331 cmd.ModeMvCost.DW13.QpPrimeCr = sliceQP;
7332 cmd.ModeMvCost.DW13.TargetSizeInWord = 0xff; // hardcoded for BRC disabled
7333
7334 if (bMultiPredEnable && (m_pictureCodingType != I_TYPE))
7335 {
7336 cmd.DW32.MultiPredL0Disable = feiPicParams->MultiPredL0 ? CODECHAL_ENCODE_AVC_MULTIPRED_ENABLE : CODECHAL_ENCODE_AVC_MULTIPRED_DISABLE;
7337 cmd.DW32.MultiPredL1Disable = (m_pictureCodingType == B_TYPE && feiPicParams->MultiPredL1) ? CODECHAL_ENCODE_AVC_MULTIPRED_ENABLE : CODECHAL_ENCODE_AVC_MULTIPRED_DISABLE;
7338 }
7339 else
7340 {
7341 cmd.DW32.MultiPredL0Disable = CODECHAL_ENCODE_AVC_MULTIPRED_DISABLE;
7342 cmd.DW32.MultiPredL1Disable = CODECHAL_ENCODE_AVC_MULTIPRED_DISABLE;
7343 }
7344
7345 if (!framePicture)
7346 {
7347 if (m_pictureCodingType != I_TYPE)
7348 {
7349 cmd.DW34.List0RefID0FieldParity = CodecHalAvcEncode_GetFieldParity(slcParams, LIST_0, CODECHAL_ENCODE_REF_ID_0);
7350 cmd.DW34.List0RefID1FieldParity = CodecHalAvcEncode_GetFieldParity(slcParams, LIST_0, CODECHAL_ENCODE_REF_ID_1);
7351 cmd.DW34.List0RefID2FieldParity = CodecHalAvcEncode_GetFieldParity(slcParams, LIST_0, CODECHAL_ENCODE_REF_ID_2);
7352 cmd.DW34.List0RefID3FieldParity = CodecHalAvcEncode_GetFieldParity(slcParams, LIST_0, CODECHAL_ENCODE_REF_ID_3);
7353 cmd.DW34.List0RefID4FieldParity = CodecHalAvcEncode_GetFieldParity(slcParams, LIST_0, CODECHAL_ENCODE_REF_ID_4);
7354 cmd.DW34.List0RefID5FieldParity = CodecHalAvcEncode_GetFieldParity(slcParams, LIST_0, CODECHAL_ENCODE_REF_ID_5);
7355 cmd.DW34.List0RefID6FieldParity = CodecHalAvcEncode_GetFieldParity(slcParams, LIST_0, CODECHAL_ENCODE_REF_ID_6);
7356 cmd.DW34.List0RefID7FieldParity = CodecHalAvcEncode_GetFieldParity(slcParams, LIST_0, CODECHAL_ENCODE_REF_ID_7);
7357 }
7358 if (m_pictureCodingType == B_TYPE)
7359 {
7360 cmd.DW34.List1RefID0FieldParity = CodecHalAvcEncode_GetFieldParity(slcParams, LIST_1, CODECHAL_ENCODE_REF_ID_0);
7361 cmd.DW34.List1RefID1FieldParity = CodecHalAvcEncode_GetFieldParity(slcParams, LIST_1, CODECHAL_ENCODE_REF_ID_1);
7362 }
7363 }
7364
7365 if (m_pictureCodingType == B_TYPE)
7366 {
7367 cmd.DW34.List1RefID0FrameFieldFlag = GetRefPicFieldFlag(params, LIST_1, CODECHAL_ENCODE_REF_ID_0);
7368 cmd.DW34.List1RefID1FrameFieldFlag = GetRefPicFieldFlag(params, LIST_1, CODECHAL_ENCODE_REF_ID_1);
7369 cmd.DW34.bDirectMode = slcParams->direct_spatial_mv_pred_flag;
7370 }
7371 cmd.DW34.bOriginalBff = framePicture ? 0 :
7372 ((m_firstField && (bottomField)) || (!m_firstField && (!bottomField)));
7373 cmd.DW34.EnableMBFlatnessChkOptimization = m_flatnessCheckEnabled;
7374 cmd.DW34.ROIEnableFlag = params->bRoiEnabled;
7375 cmd.DW34.MADEnableFlag = m_madEnabled;
7376 cmd.DW34.MBBrcEnable = 0;
7377 cmd.DW36.CheckAllFractionalEnable = bCAFEnable;
7378 cmd.DW38.RefThreshold = m_refThreshold;
7379 cmd.DW39.HMERefWindowsCombThreshold = (m_pictureCodingType == B_TYPE) ?
7380 HMEBCombineLen[seqParams->TargetUsage] : HMECombineLen[seqParams->TargetUsage];
7381
7382 // Those fields are not really used for I_dist kernel,
7383 // but set them to 0 to get bit-exact match with kernel prototype
7384 if (params->bMbEncIFrameDistEnabled)
7385 {
7386 cmd.ModeMvCost.DW13.QpPrimeY = 0;
7387 cmd.ModeMvCost.DW13.QpPrimeCb = 0;
7388 cmd.ModeMvCost.DW13.QpPrimeCr = 0;
7389 cmd.DW33.Intra16x16NonDCPredPenalty = 0;
7390 cmd.DW33.Intra4x4NonDCPredPenalty = 0;
7391 cmd.DW33.Intra8x8NonDCPredPenalty = 0;
7392 }
7393
7394 //r6
7395 if (cmd.DW4.UseActualRefQPValue)
7396 {
7397 cmd.DW44.ActualQPValueForRefID0List0 = AVCGetQPValueFromRefList(params, LIST_0, CODECHAL_ENCODE_REF_ID_0);
7398 cmd.DW44.ActualQPValueForRefID1List0 = AVCGetQPValueFromRefList(params, LIST_0, CODECHAL_ENCODE_REF_ID_1);
7399 cmd.DW44.ActualQPValueForRefID2List0 = AVCGetQPValueFromRefList(params, LIST_0, CODECHAL_ENCODE_REF_ID_2);
7400 cmd.DW44.ActualQPValueForRefID3List0 = AVCGetQPValueFromRefList(params, LIST_0, CODECHAL_ENCODE_REF_ID_3);
7401 cmd.DW45.ActualQPValueForRefID4List0 = AVCGetQPValueFromRefList(params, LIST_0, CODECHAL_ENCODE_REF_ID_4);
7402 cmd.DW45.ActualQPValueForRefID5List0 = AVCGetQPValueFromRefList(params, LIST_0, CODECHAL_ENCODE_REF_ID_5);
7403 cmd.DW45.ActualQPValueForRefID6List0 = AVCGetQPValueFromRefList(params, LIST_0, CODECHAL_ENCODE_REF_ID_6);
7404 cmd.DW45.ActualQPValueForRefID7List0 = AVCGetQPValueFromRefList(params, LIST_0, CODECHAL_ENCODE_REF_ID_7);
7405 cmd.DW46.ActualQPValueForRefID0List1 = AVCGetQPValueFromRefList(params, LIST_1, CODECHAL_ENCODE_REF_ID_0);
7406 cmd.DW46.ActualQPValueForRefID1List1 = AVCGetQPValueFromRefList(params, LIST_1, CODECHAL_ENCODE_REF_ID_1);
7407 }
7408
7409 uint8_t tableIdx = m_pictureCodingType - 1;
7410 cmd.DW46.RefCost = RefCost_MultiRefQp[tableIdx][sliceQP];
7411
7412 cmd.DW34.NumMVPredictorsL1 = 0;
7413 // Picture Coding Type dependent parameters
7414 if (m_pictureCodingType == I_TYPE)
7415 {
7416 cmd.DW0.SkipModeEn = 0;
7417 cmd.DW37.SkipModeEn = 0;
7418 cmd.DW36.HMECombineOverlap = 0;
7419 cmd.DW36.CheckAllFractionalEnable = 0;
7420 cmd.DW47.IntraCostSF = 16; // This is not used but recommended to set this to 16 by Kernel team
7421 }
7422 else if (m_pictureCodingType == P_TYPE)
7423 {
7424 cmd.DW1.MaxNumMVs = GetMaxMvsPer2Mb(seqParams->Level) / 2;
7425 cmd.DW3.BMEDisableFBR = 1;
7426 cmd.DW5.RefWidth = cmd.DW39.RefWidth = refWidth;
7427 cmd.DW5.RefHeight = cmd.DW39.RefHeight = refHeight;
7428 cmd.DW7.NonSkipZMvAdded = 1;
7429 cmd.DW7.NonSkipModeAdded = 1;
7430 cmd.DW7.SkipCenterMask = 1;
7431 cmd.DW47.IntraCostSF =
7432 bAdaptiveIntraScalingEnable ?
7433 AdaptiveIntraScalingFactor_Cm_Common[sliceQP] :
7434 IntraScalingFactor_Cm_Common[sliceQP];
7435 cmd.DW47.MaxVmvR = (framePicture) ? CodecHalAvcEncode_GetMaxMvLen(seqParams->Level) * 4 : (CodecHalAvcEncode_GetMaxMvLen(seqParams->Level) >> 1) * 4;
7436 cmd.DW36.HMECombineOverlap = 1;
7437 cmd.DW36.NumRefIdxL0MinusOne = bMultiPredEnable ? slcParams->num_ref_idx_l0_active_minus1 : 0;
7438 cmd.DW36.NumMVPredictors = feiPicParams->NumMVPredictorsL0;
7439 cmd.DW34.NumMVPredictorsL1 = 0;
7440 cmd.DW36.CheckAllFractionalEnable = feiPicParams->RepartitionCheckEnable;
7441 }
7442 else
7443 {
7444 // B_TYPE
7445 cmd.DW1.MaxNumMVs = GetMaxMvsPer2Mb(seqParams->Level) / 2;
7446 cmd.DW1.BiWeight = m_biWeight;
7447 cmd.DW3.SkipType = 1;
7448 cmd.DW5.RefWidth = cmd.DW39.RefWidth = refWidth;
7449 cmd.DW5.RefHeight = cmd.DW39.RefHeight = refHeight;
7450 cmd.DW7.SkipCenterMask = 0xFF;
7451 cmd.DW47.IntraCostSF =
7452 bAdaptiveIntraScalingEnable ?
7453 AdaptiveIntraScalingFactor_Cm_Common[sliceQP] :
7454 IntraScalingFactor_Cm_Common[sliceQP];
7455 cmd.DW47.MaxVmvR = (framePicture) ? CodecHalAvcEncode_GetMaxMvLen(seqParams->Level) * 4 : (CodecHalAvcEncode_GetMaxMvLen(seqParams->Level) >> 1) * 4;
7456 cmd.DW36.HMECombineOverlap = 1;
7457 // Checking if the forward frame (List 1 index 0) is a short term reference
7458 {
7459 auto codecHalPic = params->pSlcParams->RefPicList[LIST_1][0];
7460 if (codecHalPic.PicFlags != PICTURE_INVALID &&
7461 codecHalPic.FrameIdx != CODECHAL_ENCODE_AVC_INVALID_PIC_ID &&
7462 params->pPicIdx[codecHalPic.FrameIdx].bValid)
7463 {
7464 // Although its name is FWD, it actually means the future frame or the backward reference frame
7465 cmd.DW36.IsFwdFrameShortTermRef = CodecHal_PictureIsShortTermRef(params->pPicParams->RefFrameList[codecHalPic.FrameIdx]);
7466 }
7467 else
7468 {
7469 CODECHAL_ENCODE_ASSERTMESSAGE("Invalid backward reference frame.");
7470 eStatus = MOS_STATUS_INVALID_PARAMETER;
7471 return eStatus;
7472 }
7473 }
7474 cmd.DW36.NumRefIdxL0MinusOne = bMultiPredEnable ? slcParams->num_ref_idx_l0_active_minus1 : 0;
7475 cmd.DW36.NumRefIdxL1MinusOne = bMultiPredEnable ? slcParams->num_ref_idx_l1_active_minus1 : 0;
7476 cmd.DW36.NumMVPredictors = feiPicParams->NumMVPredictorsL0;
7477 cmd.DW34.NumMVPredictorsL1 = feiPicParams->NumMVPredictorsL1;
7478 cmd.DW36.CheckAllFractionalEnable = feiPicParams->RepartitionCheckEnable;
7479 cmd.DW40.DistScaleFactorRefID0List0 = m_distScaleFactorList0[0];
7480 cmd.DW40.DistScaleFactorRefID1List0 = m_distScaleFactorList0[1];
7481 cmd.DW41.DistScaleFactorRefID2List0 = m_distScaleFactorList0[2];
7482 cmd.DW41.DistScaleFactorRefID3List0 = m_distScaleFactorList0[3];
7483 cmd.DW42.DistScaleFactorRefID4List0 = m_distScaleFactorList0[4];
7484 cmd.DW42.DistScaleFactorRefID5List0 = m_distScaleFactorList0[5];
7485 cmd.DW43.DistScaleFactorRefID6List0 = m_distScaleFactorList0[6];
7486 cmd.DW43.DistScaleFactorRefID7List0 = m_distScaleFactorList0[7];
7487 {
7488 CODEC_PICTURE refPic;
7489 refPic = slcParams->RefPicList[LIST_1][0];
7490 cmd.DW63.L1ListRef0PictureCodingType = m_refList[m_picIdx[refPic.FrameIdx].ucPicIdx]->ucAvcPictureCodingType;
7491 if(framePicture && ((cmd.DW63.L1ListRef0PictureCodingType == CODEC_AVC_PIC_CODING_TYPE_TFF_FIELD) || (cmd.DW63.L1ListRef0PictureCodingType == CODEC_AVC_PIC_CODING_TYPE_BFF_FIELD)))
7492 {
7493 uint16_t fieldHeightInMb = (params->wFieldFrameHeightInMb + 1) >> 1;
7494 cmd.DW64.BottomFieldOffsetL1ListRef0MV = MOS_ALIGN_CEIL(fieldHeightInMb * params->wPicWidthInMb * (32 * 4), 0x1000);
7495 cmd.DW65.BottomFieldOffsetL1ListRef0MBCode = fieldHeightInMb * params->wPicWidthInMb * 64;
7496 }
7497 }
7498 }
7499
7500 *params->pdwBlockBasedSkipEn = cmd.DW3.BlockBasedSkipEnable;
7501
7502 if (picParams->EnableRollingIntraRefresh)
7503 {
7504 /* Multiple predictor should be completely disabled for the RollingI feature. This does not lead to much quality drop for P frames especially for TU as 1 */
7505 cmd.DW32.MultiPredL0Disable = CODECHAL_ENCODE_AVC_MULTIPRED_DISABLE;
7506
7507 /* Pass the same IntraRefreshUnit to the kernel w/o the adjustment by -1, so as to have an overlap of one MB row or column of Intra macroblocks
7508 across one P frame to another P frame, as needed by the RollingI algo */
7509 cmd.DW48.IntraRefreshMBNum = picParams->IntraRefreshMBNum; /* MB row or column number */
7510 cmd.DW48.IntraRefreshUnitInMBMinus1 = picParams->IntraRefreshUnitinMB;
7511 cmd.DW48.IntraRefreshQPDelta = picParams->IntraRefreshQPDelta;
7512 }
7513
7514 if (true == params->bRoiEnabled)
7515 {
7516 cmd.DW49.ROI1_X_left = picParams->ROI[0].Left;
7517 cmd.DW49.ROI1_Y_top = picParams->ROI[0].Top;
7518 cmd.DW50.ROI1_X_right = picParams->ROI[0].Right;
7519 cmd.DW50.ROI1_Y_bottom = picParams->ROI[0].Bottom;
7520
7521 cmd.DW51.ROI2_X_left = picParams->ROI[1].Left;
7522 cmd.DW51.ROI2_Y_top = picParams->ROI[1].Top;
7523 cmd.DW52.ROI2_X_right = picParams->ROI[1].Right;
7524 cmd.DW52.ROI2_Y_bottom = picParams->ROI[1].Bottom;
7525
7526 cmd.DW53.ROI3_X_left = picParams->ROI[2].Left;
7527 cmd.DW53.ROI3_Y_top = picParams->ROI[2].Top;
7528 cmd.DW54.ROI3_X_right = picParams->ROI[2].Right;
7529 cmd.DW54.ROI3_Y_bottom = picParams->ROI[2].Bottom;
7530
7531 cmd.DW55.ROI4_X_left = picParams->ROI[3].Left;
7532 cmd.DW55.ROI4_Y_top = picParams->ROI[3].Top;
7533 cmd.DW56.ROI4_X_right = picParams->ROI[3].Right;
7534 cmd.DW56.ROI4_Y_bottom = picParams->ROI[3].Bottom;
7535
7536 if (bBrcEnabled == false)
7537 {
7538 uint16_t numROI = picParams->NumROI;
7539 char priorityLevelOrDQp[CODECHAL_ENCODE_AVC_MAX_ROI_NUMBER] = { 0 };
7540
7541 // cqp case
7542 for (unsigned int i = 0; i < numROI; i += 1)
7543 {
7544 char dQpRoi = picParams->ROI[i].PriorityLevelOrDQp;
7545
7546 // clip qp roi in order to have (qp + qpY) in range [0, 51]
7547 priorityLevelOrDQp[i] = (char)CodecHal_Clip3(-sliceQP, CODECHAL_ENCODE_AVC_MAX_SLICE_QP - sliceQP, dQpRoi);
7548 }
7549
7550 cmd.DW57.ROI1_dQpPrimeY = priorityLevelOrDQp[0];
7551 cmd.DW57.ROI2_dQpPrimeY = priorityLevelOrDQp[1];
7552 cmd.DW57.ROI3_dQpPrimeY = priorityLevelOrDQp[2];
7553 cmd.DW57.ROI4_dQpPrimeY = priorityLevelOrDQp[3];
7554 }
7555 else
7556 {
7557 // kernel does not support BRC case
7558 cmd.DW34.ROIEnableFlag = 0;
7559 }
7560 }
7561 //older isa curbe length is 236, new is 252
7562 if(params->pCurbeBinary)
7563 {
7564 MOS_SecureMemcpy(params->pCurbeBinary,m_feiMBEncCurbeDataSizeExcludeSurfaceIdx,&cmd,m_feiMBEncCurbeDataSizeExcludeSurfaceIdx);
7565 return eStatus;
7566 }
7567 //IPCM QP and threshold
7568 cmd.DW59.IPCM_QP0 = g_cInit_CODECHAL_ENCODE_AVC_IPCM_Threshold_Table_G8[0].QP;
7569 cmd.DW59.IPCM_QP1 = g_cInit_CODECHAL_ENCODE_AVC_IPCM_Threshold_Table_G8[1].QP;
7570 cmd.DW59.IPCM_QP2 = g_cInit_CODECHAL_ENCODE_AVC_IPCM_Threshold_Table_G8[2].QP;
7571 cmd.DW59.IPCM_QP3 = g_cInit_CODECHAL_ENCODE_AVC_IPCM_Threshold_Table_G8[3].QP;
7572 cmd.DW60.IPCM_QP4 = g_cInit_CODECHAL_ENCODE_AVC_IPCM_Threshold_Table_G8[4].QP;
7573 cmd.DW60.IPCM_Thresh0 = g_cInit_CODECHAL_ENCODE_AVC_IPCM_Threshold_Table_G8[0].Threshold;
7574 cmd.DW61.IPCM_Thresh1 = g_cInit_CODECHAL_ENCODE_AVC_IPCM_Threshold_Table_G8[1].Threshold;
7575 cmd.DW61.IPCM_Thresh2 = g_cInit_CODECHAL_ENCODE_AVC_IPCM_Threshold_Table_G8[2].Threshold;
7576 cmd.DW62.IPCM_Thresh3 = g_cInit_CODECHAL_ENCODE_AVC_IPCM_Threshold_Table_G8[3].Threshold;
7577 cmd.DW62.IPCM_Thresh4 = g_cInit_CODECHAL_ENCODE_AVC_IPCM_Threshold_Table_G8[4].Threshold;
7578
7579 cmd.DW66.MBDataSurfIndex = MBENC_MFC_AVC_PAK_OBJ_CM_FEI;
7580 cmd.DW67.MVDataSurfIndex = MBENC_IND_MV_DATA_CM_FEI;
7581 cmd.DW68.IDistSurfIndex = MBENC_BRC_DISTORTION_CM_FEI;
7582 cmd.DW69.SrcYSurfIndex = MBENC_CURR_Y_CM_FEI;
7583 cmd.DW70.MBSpecificDataSurfIndex = MBENC_MB_SPECIFIC_DATA_CM_FEI;
7584 cmd.DW71.AuxVmeOutSurfIndex = MBENC_AUX_VME_OUT_CM_FEI;
7585 cmd.DW72.CurrRefPicSelSurfIndex = MBENC_REFPICSELECT_L0_CM_FEI;
7586 cmd.DW73.HMEMVPredFwdBwdSurfIndex = MBENC_MV_DATA_FROM_ME_CM_FEI;
7587 cmd.DW74.HMEDistSurfIndex = MBENC_4xME_DISTORTION_CM_FEI;
7588 cmd.DW75.RefPicSelectL1SurfIndex = MBENC_REFPICSELECT_L1_CM_FEI;
7589 cmd.DW76.FwdFrmMBDataSurfIndex = MBENC_FWD_MB_DATA_CM_FEI;
7590 cmd.DW77.FwdFrmMVSurfIndex = MBENC_FWD_MV_DATA_CM_FEI;
7591 cmd.DW78.MBQPBuffer = MBENC_MBQP_CM_FEI;
7592 cmd.DW79.MBBRCLut = MBENC_MBBRC_CONST_DATA_CM_FEI;
7593 cmd.DW80.VMEInterPredictionSurfIndex = MBENC_VME_INTER_PRED_CURR_PIC_IDX_0_CM_FEI;
7594 cmd.DW81.VMEInterPredictionMRSurfIndex = MBENC_VME_INTER_PRED_CURR_PIC_IDX_1_CM_FEI;
7595 cmd.DW82.FlatnessChkSurfIndex = MBENC_FLATNESS_CHECK_CM_FEI;
7596 cmd.DW83.MADSurfIndex = MBENC_MAD_DATA_CM_FEI;
7597 cmd.DW84.InterDistortionSurfIndex = MBENC_INTER_DISTORTION_CM_FEI;
7598 cmd.DW86.BRCCurbeSurfIndex = MBENC_BRC_CURBE_DATA_CM_FEI;
7599 cmd.DW87.MvPredictorSurfIndex = MBENC_MV_PREDICTOR_CM_FEI;
7600
7601 CODECHAL_ENCODE_CHK_STATUS_RETURN(params->pKernelState->m_dshRegion.AddData(
7602 &cmd,
7603 params->pKernelState->dwCurbeOffset,
7604 sizeof(cmd)));
7605
7606 return eStatus;
7607
7608 }
7609
SetCurbeAvcPreProc(PCODECHAL_ENCODE_AVC_PREPROC_CURBE_PARAMS params)7610 MOS_STATUS CodechalEncodeAvcEncFeiG8::SetCurbeAvcPreProc(PCODECHAL_ENCODE_AVC_PREPROC_CURBE_PARAMS params)
7611 {
7612 MOS_STATUS eStatus = MOS_STATUS_SUCCESS;
7613
7614 CODECHAL_ENCODE_FUNCTION_ENTER;
7615
7616 CODECHAL_ENCODE_CHK_NULL_RETURN(params);
7617 CODECHAL_ENCODE_CHK_NULL_RETURN(params->pPreEncParams);
7618
7619 auto preEncParams = params->pPreEncParams;
7620
7621 uint32_t sliceQp = preEncParams->dwFrameQp;
7622 bool framePicture = CodecHal_PictureIsFrame(m_currOriginalPic);
7623 bool bottomField = CodecHal_PictureIsBottomField(m_currOriginalPic);
7624 PREPROC_CURBE_CM cmd;
7625 switch (m_pictureCodingType)
7626 {
7627 case I_TYPE:
7628 if (framePicture)
7629 {
7630 CODECHAL_ENCODE_CHK_STATUS_RETURN(MOS_SecureMemcpy(
7631 &cmd,
7632 sizeof(PREPROC_CURBE_CM),
7633 m_preProcCurbeCmNormalIFrame,
7634 sizeof(PREPROC_CURBE_CM)));
7635 }
7636 else
7637 {
7638 CODECHAL_ENCODE_CHK_STATUS_RETURN(MOS_SecureMemcpy(
7639 &cmd,
7640 sizeof(PREPROC_CURBE_CM),
7641 m_preProcCurbeCmNormalIfield,
7642 sizeof(PREPROC_CURBE_CM)));
7643 }
7644 break;
7645
7646 case P_TYPE:
7647 if (framePicture)
7648 {
7649 CODECHAL_ENCODE_CHK_STATUS_RETURN(MOS_SecureMemcpy(
7650 &cmd,
7651 sizeof(PREPROC_CURBE_CM),
7652 m_preProcCurbeCmNormalPFrame,
7653 sizeof(PREPROC_CURBE_CM)));
7654 }
7655 else
7656 {
7657 CODECHAL_ENCODE_CHK_STATUS_RETURN(MOS_SecureMemcpy(
7658 &cmd,
7659 sizeof(PREPROC_CURBE_CM),
7660 m_preProcCurbeCmNormalPField,
7661 sizeof(PREPROC_CURBE_CM)));
7662 }
7663 break;
7664
7665 case B_TYPE:
7666 if (framePicture)
7667 {
7668 CODECHAL_ENCODE_CHK_STATUS_RETURN(MOS_SecureMemcpy(
7669 &cmd,
7670 sizeof(PREPROC_CURBE_CM),
7671 m_preProcCurbeCmNormalBFrame,
7672 sizeof(PREPROC_CURBE_CM)));
7673 }
7674 else
7675 {
7676 CODECHAL_ENCODE_CHK_STATUS_RETURN(MOS_SecureMemcpy(
7677 &cmd,
7678 sizeof(PREPROC_CURBE_CM),
7679 m_preProcCurbeCmNormalBField,
7680 sizeof(PREPROC_CURBE_CM)));
7681 }
7682 break;
7683
7684 default:
7685 CODECHAL_ENCODE_ASSERTMESSAGE("Invalid picture coding type.");
7686 eStatus = MOS_STATUS_UNKNOWN;
7687 return eStatus;
7688 }
7689
7690 uint8_t meMethod = (preEncParams->dwSearchWindow == 5) || (preEncParams->dwSearchWindow == 8) ? 4 : 6; // 4 means full search, 6 means diamand search
7691 uint32_t refWidth = preEncParams->dwRefWidth;
7692 uint32_t refHeight = preEncParams->dwRefHeight;
7693 uint32_t lenSP = preEncParams->dwLenSP;
7694 switch (preEncParams->dwSearchWindow)
7695 {
7696 case 0:
7697 // not use predefined search window and search patch
7698 if ((preEncParams->dwSearchPath != 0) && (preEncParams->dwSearchPath != 1) && (preEncParams->dwSearchPath != 2))
7699 {
7700 CODECHAL_ENCODE_ASSERTMESSAGE("Invalid picture FEI PREENC input SearchPath for SearchWindow=0 case!!!.");
7701 eStatus = MOS_STATUS_INVALID_PARAMETER;
7702 return eStatus;
7703 }
7704 meMethod = (preEncParams->dwSearchPath == 1) ? 6 : 4; // 4 means full search, 6 means diamand search
7705 if (((refWidth * refHeight) > 2048) || (refWidth > 64) || (refHeight > 64))
7706 {
7707 CODECHAL_ENCODE_ASSERTMESSAGE("Invalid picture FEI PREENC PreProc input refWidth/refHeight size for SearchWindow=0 case!!!.");
7708 eStatus = MOS_STATUS_INVALID_PARAMETER;
7709 return eStatus;
7710 }
7711 break;
7712 case 1:
7713 // Tiny 4 SUs 24x24 window
7714 refWidth = 24;
7715 refHeight = 24;
7716 lenSP = 4;
7717 break;
7718 case 2:
7719 // Small 9 SUs 28x28 window
7720 refWidth = 28;
7721 refHeight = 28;
7722 lenSP = 9;
7723 break;
7724 case 3:
7725 // Diamond 16 SUs 48x40 window
7726 refWidth = 48;
7727 refHeight = 40;
7728 lenSP = 16;
7729 break;
7730 case 4:
7731 // Large Diamond 32 SUs 48x40 window
7732 refWidth = 48;
7733 refHeight = 40;
7734 lenSP = 32;
7735 break;
7736 case 5:
7737 // Exhaustive 48 SUs 48x40 window
7738 refWidth = 48;
7739 refHeight = 40;
7740 lenSP = 48;
7741 break;
7742 case 6:
7743 // Diamond 16 SUs 64x32 window
7744 refWidth = 64;
7745 refHeight = 32;
7746 lenSP = 16;
7747 break;
7748 case 7:
7749 // Large Diamond 32 SUs 64x32 window
7750 refWidth = 64;
7751 refHeight = 32;
7752 lenSP = 32;
7753 break;
7754 case 8:
7755 // Exhaustive 48 SUs 64x32 window
7756 refWidth = 64;
7757 refHeight = 32;
7758 lenSP = 48;
7759 break;
7760 default:
7761 CODECHAL_ENCODE_ASSERTMESSAGE("Invalid picture FEI PREENC PreProc SearchWindow value!!!.");
7762 eStatus = MOS_STATUS_INVALID_PARAMETER;
7763 return eStatus;
7764 }
7765
7766 // r1
7767 cmd.DW0.AdaptiveEn =
7768 cmd.DW37.AdaptiveEn = preEncParams->bAdaptiveSearch;
7769 cmd.DW2.LenSP = lenSP;
7770 cmd.DW38.LenSP = 0; // MBZ
7771 cmd.DW2.MaxNumSU = cmd.DW38.MaxNumSU = 57;
7772
7773 cmd.DW3.SrcAccess =
7774 cmd.DW3.RefAccess = framePicture ? 0 : 1;
7775
7776 if (m_pictureCodingType != I_TYPE && bFTQEnable)
7777 {
7778 cmd.DW3.FTEnable = preEncParams->bFTEnable;
7779 }
7780 else
7781 {
7782 cmd.DW3.FTEnable = 0;
7783 }
7784 cmd.DW3.SubMbPartMask = preEncParams->dwSubMBPartMask;
7785 cmd.DW3.SubPelMode = preEncParams->dwSubPelMode;
7786 cmd.DW3.IntraSAD = preEncParams->dwIntraSAD;
7787 cmd.DW3.InterSAD = preEncParams->dwInterSAD;
7788
7789 cmd.DW2.PicWidth = params->wPicWidthInMb;
7790 cmd.DW6.PicHeight = cmd.DW5.SliceMbHeight = params->wFieldFrameHeightInMb;
7791
7792 cmd.DW4.FieldParityFlag = cmd.DW4.CurrPicFieldParityFlag =
7793 cmd.DW7.SrcFieldPolarity = bottomField ? 1 : 0;
7794 cmd.DW4.HMEEnable = m_hmeEnabled;
7795 cmd.DW4.FrameQp = sliceQp;
7796 cmd.DW4.PerMBQpEnable = preEncParams->bMBQp;
7797 cmd.DW4.MultipleMVPredictorPerMBEnable = (m_pictureCodingType == I_TYPE) ? 0 : preEncParams->dwMVPredictorCtrl;
7798 cmd.DW4.DisableMvOutput = (m_pictureCodingType == I_TYPE) ? 1 : preEncParams->bDisableMVOutput;
7799 cmd.DW4.DisableMbStats = preEncParams->bDisableStatisticsOutput;
7800 cmd.DW4.FwdRefPicEnable = preEncParams->dwNumPastReferences > 0 ? 1 : 0;
7801 cmd.DW4.FwdRefPicFrameFieldFlag = CodecHal_PictureIsFrame(preEncParams->PastRefPicture) ? 0 : 1;
7802 cmd.DW4.FwdRefPicFieldParityFlag = CodecHal_PictureIsBottomField(preEncParams->PastRefPicture);
7803 cmd.DW4.BwdRefPicEnable = preEncParams->dwNumFutureReferences > 0 ? 1 : 0;
7804 cmd.DW4.BwdRefPicFrameFieldFlag = CodecHal_PictureIsFrame(preEncParams->FutureRefPicture) ? 0 : 1;
7805 cmd.DW4.BwdRefPicFieldParityFlag = CodecHal_PictureIsBottomField(preEncParams->FutureRefPicture);
7806 cmd.DW7.IntraPartMask = preEncParams->dwIntraPartMask;
7807
7808 uint8_t tableIdx = m_pictureCodingType - 1;
7809 eStatus = MOS_SecureMemcpy(&(cmd.ModeMvCost), 8 * sizeof(uint32_t), m_modeMvCost_Cm_PreProc[tableIdx][sliceQp], 8 * sizeof(uint32_t));
7810 if (eStatus != MOS_STATUS_SUCCESS)
7811 {
7812 CODECHAL_ENCODE_ASSERTMESSAGE("Failed to copy memory.");
7813 return eStatus;
7814 }
7815 cmd.ModeMvCost.DW8.Value = 0;
7816 cmd.ModeMvCost.DW9.Value = 0;
7817 cmd.ModeMvCost.DW10.Value = 0;
7818 cmd.ModeMvCost.DW11.Value = 0;
7819 cmd.ModeMvCost.DW12.Value = 0;
7820 cmd.ModeMvCost.DW13.Value = 0;
7821
7822 if (!framePicture && m_pictureCodingType != I_TYPE)
7823 {
7824 /* for field, R2.2 upper word should be set to zero for P and B frames */
7825 cmd.ModeMvCost.DW10.Value &= 0x0000FFFF;
7826 }
7827
7828 tableIdx = (m_pictureCodingType == B_TYPE) ? 1 : 0;
7829 eStatus = MOS_SecureMemcpy(&(cmd.SPDelta), 16 * sizeof(uint32_t), CodechalEncoderState::m_encodeSearchPath[tableIdx][meMethod], 16 * sizeof(uint32_t));
7830 if (eStatus != MOS_STATUS_SUCCESS)
7831 {
7832 CODECHAL_ENCODE_ASSERTMESSAGE("Failed to copy memory.");
7833 return eStatus;
7834 }
7835 // disable Intra Compute when disabling all mode in dwIntraPartMask
7836 if (preEncParams->dwIntraPartMask == 0x7)
7837 {
7838 cmd.SPDelta.DW31.IntraComputeType = 3;
7839 }
7840
7841 cmd.DW38.RefThreshold = m_refThreshold;
7842 cmd.DW39.HMERefWindowsCombThreshold = (m_pictureCodingType == B_TYPE) ?
7843 HMEBCombineLen[m_targetUsage] : HMECombineLen[m_targetUsage];
7844
7845 // Picture Coding Type dependent parameters
7846 if (m_pictureCodingType == I_TYPE)
7847 {
7848 cmd.DW0.SkipModeEn = 0;
7849 cmd.DW37.SkipModeEn = 0;
7850 cmd.DW36.HMECombineOverlap = 0;
7851 }
7852 else if (m_pictureCodingType == P_TYPE)
7853 {
7854 cmd.DW1.MaxNumMVs = GetMaxMvsPer2Mb(CODEC_AVC_LEVEL_52) / 2;
7855 cmd.DW3.BMEDisableFBR = 1;
7856 cmd.DW3.SearchCtrl = 0;
7857 cmd.DW5.RefWidth = cmd.DW39.RefWidth = refWidth;
7858 cmd.DW5.RefHeight = cmd.DW39.RefHeight = refHeight;
7859 cmd.DW7.NonSkipZMvAdded = 1;
7860 cmd.DW7.NonSkipModeAdded = 1;
7861 cmd.DW7.SkipCenterMask = 1;
7862 cmd.DW32.MaxVmvR = (framePicture) ? CodecHalAvcEncode_GetMaxMvLen(CODEC_AVC_LEVEL_52) * 4 : (CodecHalAvcEncode_GetMaxMvLen(CODEC_AVC_LEVEL_52) >> 1) * 4;
7863 cmd.DW36.HMECombineOverlap = 1;
7864 }
7865 else
7866 {
7867 // B_TYPE
7868 cmd.DW1.MaxNumMVs = GetMaxMvsPer2Mb(CODEC_AVC_LEVEL_52) / 2;
7869 cmd.DW3.SearchCtrl = 0;
7870 cmd.DW3.SkipType = 1;
7871 cmd.DW5.RefWidth = cmd.DW39.RefWidth = refWidth;
7872 cmd.DW5.RefHeight = cmd.DW39.RefHeight = refHeight;
7873 cmd.DW7.SkipCenterMask = 0xFF;
7874 cmd.DW32.MaxVmvR = (framePicture) ? CodecHalAvcEncode_GetMaxMvLen(CODEC_AVC_LEVEL_52) * 4 : (CodecHalAvcEncode_GetMaxMvLen(CODEC_AVC_LEVEL_52) >> 1) * 4;
7875 cmd.DW36.HMECombineOverlap = 1;
7876 }
7877 if(params->pCurbeBinary)
7878 {
7879 MOS_SecureMemcpy(params->pCurbeBinary,m_feiPreProcCurbeDataSize,&cmd,m_feiPreProcCurbeDataSize);
7880 return eStatus;
7881 }
7882
7883 cmd.DW40.CurrPicSurfIndex = CODECHAL_ENCODE_AVC_PREPROC_CURR_Y_CM_G8;
7884 cmd.DW41.HMEMvDataSurfIndex = CODECHAL_ENCODE_AVC_PREPROC_HME_MV_DATA_CM_G8;
7885 cmd.DW42.MvPredictorSurfIndex = CODECHAL_ENCODE_AVC_PREPROC_MV_PREDICTOR_CM_G8;
7886 cmd.DW43.MbQpSurfIndex = CODECHAL_ENCODE_AVC_PREPROC_MBQP_CM_G8;
7887 cmd.DW44.MvDataOutSurfIndex = CODECHAL_ENCODE_AVC_PREPROC_MV_DATA_CM_G8;
7888 cmd.DW45.MbStatsOutSurfIndex = CODECHAL_ENCODE_AVC_PREPROC_MB_STATS_CM_G8;
7889 if (framePicture)
7890 {
7891 cmd.DW46.VMEInterPredictionSurfIndex = CODECHAL_ENCODE_AVC_PREPROC_VME_CURR_PIC_IDX_0_CM_G8;
7892 cmd.DW47.VMEInterPredictionMRSurfIndex = CODECHAL_ENCODE_AVC_PREPROC_VME_CURR_PIC_IDX_1_CM_G8;
7893 cmd.DW48.FtqLutSurfIndex = CODECHAL_ENCODE_AVC_PREPROC_FTQ_LUT_CM_G8;
7894 }
7895 else
7896 {
7897 cmd.DW46.VMEInterPredictionSurfIndex = CODECHAL_ENCODE_AVC_PREPROC_VME_FIELD_CURR_PIC_IDX_0_CM_G8;
7898 cmd.DW47.VMEInterPredictionMRSurfIndex = CODECHAL_ENCODE_AVC_PREPROC_VME_FIELD_CURR_PIC_IDX_1_CM_G8;
7899 cmd.DW48.FtqLutSurfIndex = CODECHAL_ENCODE_AVC_PREPROC_FIELD_FTQ_LUT_CM_G8;
7900 }
7901
7902 CODECHAL_ENCODE_CHK_STATUS_RETURN(params->pKernelState->m_dshRegion.AddData(
7903 &cmd,
7904 params->pKernelState->dwCurbeOffset,
7905 sizeof(cmd)));
7906
7907 return eStatus;
7908 }
7909
SendAvcPreProcSurfaces(PMOS_COMMAND_BUFFER cmdBuffer,PCODECHAL_ENCODE_AVC_PREPROC_SURFACE_PARAMS params)7910 MOS_STATUS CodechalEncodeAvcEncFeiG8::SendAvcPreProcSurfaces(PMOS_COMMAND_BUFFER cmdBuffer, PCODECHAL_ENCODE_AVC_PREPROC_SURFACE_PARAMS params)
7911 {
7912 MOS_STATUS eStatus = MOS_STATUS_SUCCESS;
7913
7914 CODECHAL_ENCODE_FUNCTION_ENTER;
7915 CODECHAL_ENCODE_CHK_NULL_RETURN(m_hwInterface);
7916 CODECHAL_ENCODE_CHK_NULL_RETURN(m_hwInterface->GetOsInterface());
7917 CODECHAL_ENCODE_CHK_NULL_RETURN(cmdBuffer);
7918 CODECHAL_ENCODE_CHK_NULL_RETURN(params);
7919 CODECHAL_ENCODE_CHK_NULL_RETURN(params->pCurrOriginalPic);
7920 CODECHAL_ENCODE_CHK_NULL_RETURN(params->psCurrPicSurface);
7921
7922 CODECHAL_ENCODE_CHK_NULL_RETURN(params->pPreProcBindingTable);
7923 CODECHAL_ENCODE_CHK_NULL_RETURN(params->pKernelState);
7924 CODECHAL_ENCODE_CHK_NULL_RETURN(params->pPreEncParams);
7925
7926 auto kernelState = params->pKernelState;
7927
7928 auto preEncParams = (FeiPreEncParams*)params->pPreEncParams;
7929 auto avcPreProcBindingTable = params->pPreProcBindingTable;
7930
7931 bool currFieldPicture = CodecHal_PictureIsField(*(params->pCurrOriginalPic)) ? 1 : 0;
7932 bool currBottomField = CodecHal_PictureIsBottomField(*(params->pCurrOriginalPic)) ? 1 : 0;
7933
7934 uint8_t vDirection = (CodecHal_PictureIsFrame(*(params->pCurrOriginalPic))) ? CODECHAL_VDIRECTION_FRAME :
7935 (currBottomField) ? CODECHAL_VDIRECTION_BOT_FIELD : CODECHAL_VDIRECTION_TOP_FIELD;
7936
7937 CODECHAL_SURFACE_CODEC_PARAMS surfaceCodecParams;
7938 MOS_ZeroMemory(&surfaceCodecParams, sizeof(CODECHAL_SURFACE_CODEC_PARAMS));
7939 surfaceCodecParams.bIs2DSurface = true;
7940 surfaceCodecParams.bMediaBlockRW = true; // Use media block RW for DP 2D surface access
7941 surfaceCodecParams.bUseUVPlane = true;
7942 surfaceCodecParams.psSurface = params->psCurrPicSurface;
7943 surfaceCodecParams.dwOffset = 0;
7944 surfaceCodecParams.dwCacheabilityControl = m_hwInterface->GetCacheabilitySettings()[MOS_CODEC_RESOURCE_USAGE_SURFACE_CURR_ENCODE].Value;
7945 surfaceCodecParams.dwBindingTableOffset = avcPreProcBindingTable->dwAvcPreProcCurrY;
7946 surfaceCodecParams.dwUVBindingTableOffset = avcPreProcBindingTable->dwAvcPreProcCurrUV;
7947 surfaceCodecParams.dwVerticalLineStride = params->dwVerticalLineStride;
7948 surfaceCodecParams.dwVerticalLineStrideOffset = params->dwVerticalLineStrideOffset;
7949
7950 CODECHAL_ENCODE_CHK_STATUS_RETURN(CodecHalSetRcsSurfaceState(
7951 m_hwInterface,
7952 cmdBuffer,
7953 &surfaceCodecParams,
7954 kernelState));
7955
7956 // AVC_ME MV data buffer
7957 if (params->bHmeEnabled)
7958 {
7959 CODECHAL_ENCODE_CHK_NULL_RETURN(params->ps4xMeMvDataBuffer);
7960
7961 MOS_ZeroMemory(&surfaceCodecParams, sizeof(CODECHAL_SURFACE_CODEC_PARAMS));
7962 surfaceCodecParams.bIs2DSurface = true;
7963 surfaceCodecParams.bMediaBlockRW = true;
7964 surfaceCodecParams.psSurface = params->ps4xMeMvDataBuffer;
7965 surfaceCodecParams.dwOffset = params->dwMeMvBottomFieldOffset;
7966 surfaceCodecParams.dwCacheabilityControl = m_hwInterface->GetCacheabilitySettings()[MOS_CODEC_RESOURCE_USAGE_SURFACE_MV_DATA_ENCODE].Value;
7967 surfaceCodecParams.dwBindingTableOffset = avcPreProcBindingTable->dwAvcPreProcMVDataFromHME;
7968 CODECHAL_ENCODE_CHK_STATUS_RETURN(CodecHalSetRcsSurfaceState(
7969 m_hwInterface,
7970 cmdBuffer,
7971 &surfaceCodecParams,
7972 kernelState));
7973 }
7974
7975 if (preEncParams->dwMVPredictorCtrl)
7976 {
7977 MOS_ZeroMemory(&surfaceCodecParams, sizeof(CODECHAL_SURFACE_CODEC_PARAMS));
7978
7979 uint32_t size = params->dwFrameWidthInMb * params->dwFrameFieldHeightInMb * 8;
7980 surfaceCodecParams.dwSize = size;
7981 surfaceCodecParams.presBuffer = &(preEncParams->resMvPredBuffer);
7982 surfaceCodecParams.dwOffset = 0;
7983 surfaceCodecParams.dwCacheabilityControl = m_hwInterface->GetCacheabilitySettings()[MOS_CODEC_RESOURCE_USAGE_SURFACE_MV_DATA_ENCODE].Value;
7984 surfaceCodecParams.dwBindingTableOffset = avcPreProcBindingTable->dwAvcPreProcMvPredictor;
7985 CODECHAL_ENCODE_CHK_STATUS_RETURN(CodecHalSetRcsSurfaceState(
7986 m_hwInterface,
7987 cmdBuffer,
7988 &surfaceCodecParams,
7989 kernelState));
7990 }
7991
7992 if (preEncParams->bMBQp)
7993 {
7994 MOS_ZeroMemory(&surfaceCodecParams, sizeof(CODECHAL_SURFACE_CODEC_PARAMS));
7995
7996 uint32_t size = params->dwFrameWidthInMb * params->dwFrameFieldHeightInMb;
7997 surfaceCodecParams.dwSize = size;
7998 surfaceCodecParams.presBuffer = &(preEncParams->resMbQpBuffer);
7999 surfaceCodecParams.dwOffset = 0;
8000 surfaceCodecParams.dwBindingTableOffset = avcPreProcBindingTable->dwAvcPreProcMbQp;
8001 CODECHAL_ENCODE_CHK_STATUS_RETURN(CodecHalSetRcsSurfaceState(
8002 m_hwInterface,
8003 cmdBuffer,
8004 &surfaceCodecParams,
8005 kernelState));
8006
8007 // 16 DWs per QP value
8008 size = 16 * 52 * sizeof(uint32_t);
8009
8010 MOS_ZeroMemory(&surfaceCodecParams, sizeof(CODECHAL_SURFACE_CODEC_PARAMS));
8011 surfaceCodecParams.presBuffer = params->presFtqLutBuffer;
8012 surfaceCodecParams.dwSize = size;
8013 surfaceCodecParams.dwBindingTableOffset = currFieldPicture ? avcPreProcBindingTable->dwAvcPreProcFtqLutField : avcPreProcBindingTable->dwAvcPreProcFtqLut;
8014 CODECHAL_ENCODE_CHK_STATUS_RETURN(CodecHalSetRcsSurfaceState(
8015 m_hwInterface,
8016 cmdBuffer,
8017 &surfaceCodecParams,
8018 kernelState));
8019
8020 }
8021
8022 if (!preEncParams->bDisableMVOutput)
8023 {
8024 MOS_ZeroMemory(&surfaceCodecParams, sizeof(CODECHAL_SURFACE_CODEC_PARAMS));
8025
8026 uint32_t size = params->dwFrameWidthInMb * params->dwFrameFieldHeightInMb * 32 * 4;
8027 surfaceCodecParams.presBuffer = &(preEncParams->resMvBuffer);
8028 surfaceCodecParams.dwSize = size;
8029 surfaceCodecParams.dwOffset = 0;
8030 surfaceCodecParams.dwCacheabilityControl = m_hwInterface->GetCacheabilitySettings()[MOS_CODEC_RESOURCE_USAGE_SURFACE_MV_DATA_ENCODE].Value;
8031 surfaceCodecParams.dwBindingTableOffset = avcPreProcBindingTable->dwAvcPreProcMvDataOut;
8032 surfaceCodecParams.bRenderTarget = true;
8033 surfaceCodecParams.bIsWritable = true;
8034 CODECHAL_ENCODE_CHK_STATUS_RETURN(CodecHalSetRcsSurfaceState(
8035 m_hwInterface,
8036 cmdBuffer,
8037 &surfaceCodecParams,
8038 kernelState));
8039 }
8040
8041 if (!preEncParams->bDisableStatisticsOutput)
8042 {
8043 MOS_ZeroMemory(&surfaceCodecParams, sizeof(CODECHAL_SURFACE_CODEC_PARAMS));
8044
8045 uint32_t size = params->dwFrameWidthInMb * params->dwFrameFieldHeightInMb * 64;
8046 if (currBottomField)
8047 {
8048 surfaceCodecParams.presBuffer = &(preEncParams->resStatsBotFieldBuffer);
8049 }
8050 else
8051 {
8052 surfaceCodecParams.presBuffer = &(preEncParams->resStatsBuffer);
8053 }
8054 surfaceCodecParams.dwSize = size;
8055 surfaceCodecParams.dwOffset = params->dwMBVProcStatsBottomFieldOffset;
8056 surfaceCodecParams.bRenderTarget = true;
8057 surfaceCodecParams.bIsWritable = true;
8058 surfaceCodecParams.dwBindingTableOffset = avcPreProcBindingTable->dwAvcPreProcMbStatsOut;
8059 CODECHAL_ENCODE_CHK_STATUS_RETURN(CodecHalSetRcsSurfaceState(
8060 m_hwInterface,
8061 cmdBuffer,
8062 &surfaceCodecParams,
8063 kernelState));
8064 }
8065
8066 // Current Picture Y - VME
8067 MOS_ZeroMemory(&surfaceCodecParams, sizeof(CODECHAL_SURFACE_CODEC_PARAMS));
8068 surfaceCodecParams.bUseAdvState = true;
8069 surfaceCodecParams.psSurface = params->psCurrPicSurface;
8070 surfaceCodecParams.dwOffset = 0;
8071 surfaceCodecParams.dwCacheabilityControl = m_hwInterface->GetCacheabilitySettings()[MOS_CODEC_RESOURCE_USAGE_SURFACE_CURR_ENCODE].Value;
8072 surfaceCodecParams.dwBindingTableOffset = currFieldPicture ? avcPreProcBindingTable->dwAvcPreProcVMECurrPicField[0] : avcPreProcBindingTable->dwAvcPreProcVMECurrPicFrame[0];
8073 surfaceCodecParams.ucVDirection = vDirection;
8074
8075 CODECHAL_ENCODE_CHK_STATUS_RETURN(CodecHalSetRcsSurfaceState(
8076 m_hwInterface,
8077 cmdBuffer,
8078 &surfaceCodecParams,
8079 kernelState));
8080
8081 surfaceCodecParams.dwBindingTableOffset = currFieldPicture ? avcPreProcBindingTable->dwAvcPreProcVMECurrPicField[1] : avcPreProcBindingTable->dwAvcPreProcVMECurrPicFrame[1];
8082 surfaceCodecParams.ucVDirection = vDirection;
8083 CODECHAL_ENCODE_CHK_STATUS_RETURN(CodecHalSetRcsSurfaceState(
8084 m_hwInterface,
8085 cmdBuffer,
8086 &surfaceCodecParams,
8087 kernelState));
8088
8089 uint32_t refBindingTableOffset;
8090 if (preEncParams->dwNumPastReferences > 0)
8091 {
8092 auto refPic = preEncParams->PastRefPicture;
8093 uint8_t refPicIdx = refPic.FrameIdx;
8094 bool refBottomField = (CodecHal_PictureIsBottomField(refPic)) ? 1 : 0;
8095 uint8_t refVDirection;
8096 // Program the surface based on current picture's field/frame mode
8097 if (currFieldPicture) // if current picture is field
8098 {
8099 if (refBottomField)
8100 {
8101 refVDirection = CODECHAL_VDIRECTION_BOT_FIELD;
8102 }
8103 else
8104 {
8105 refVDirection = CODECHAL_VDIRECTION_TOP_FIELD;
8106 }
8107 refBindingTableOffset = avcPreProcBindingTable->dwAvcPreProcVMEFwdPicField[0];
8108 }
8109 else // if current picture is frame
8110 {
8111 refVDirection = CODECHAL_VDIRECTION_FRAME;
8112 refBindingTableOffset = avcPreProcBindingTable->dwAvcPreProcVMEFwdPicFrame;
8113 }
8114
8115 // Picture Y VME
8116 MOS_ZeroMemory(&surfaceCodecParams, sizeof(CODECHAL_SURFACE_CODEC_PARAMS));
8117 surfaceCodecParams.bUseAdvState = true;
8118 surfaceCodecParams.psSurface = ¶ms->ppRefList[refPicIdx]->sRefBuffer;
8119 surfaceCodecParams.dwBindingTableOffset = refBindingTableOffset;
8120 surfaceCodecParams.ucVDirection = refVDirection;
8121 surfaceCodecParams.dwCacheabilityControl = m_hwInterface->GetCacheabilitySettings()[MOS_CODEC_RESOURCE_USAGE_SURFACE_REF_ENCODE].Value;
8122
8123 CODECHAL_ENCODE_CHK_STATUS_RETURN(CodecHalSetRcsSurfaceState(
8124 m_hwInterface,
8125 cmdBuffer,
8126 &surfaceCodecParams,
8127 kernelState));
8128
8129 if (currFieldPicture) // if current picture is field
8130 {
8131 surfaceCodecParams.dwBindingTableOffset = avcPreProcBindingTable->dwAvcPreProcVMEFwdPicField[1];
8132
8133 CODECHAL_ENCODE_CHK_STATUS_RETURN(CodecHalSetRcsSurfaceState(
8134 m_hwInterface,
8135 cmdBuffer,
8136 &surfaceCodecParams,
8137 kernelState));
8138 }
8139 }
8140
8141 if (preEncParams->dwNumFutureReferences > 0)
8142 {
8143 auto refPic = preEncParams->FutureRefPicture;
8144 uint8_t refPicIdx = refPic.FrameIdx;
8145 bool refBottomField = (CodecHal_PictureIsBottomField(refPic)) ? 1 : 0;
8146 uint8_t refVDirection;
8147
8148 // Program the surface based on current picture's field/frame mode
8149 if (currFieldPicture) // if current picture is field
8150 {
8151 if (refBottomField)
8152 {
8153 refVDirection = CODECHAL_VDIRECTION_BOT_FIELD;
8154 }
8155 else
8156 {
8157 refVDirection = CODECHAL_VDIRECTION_TOP_FIELD;
8158 }
8159 refBindingTableOffset = avcPreProcBindingTable->dwAvcPreProcVMEBwdPicField[0];
8160 }
8161 else // if current picture is frame
8162 {
8163 refVDirection = CODECHAL_VDIRECTION_FRAME;
8164 refBindingTableOffset = avcPreProcBindingTable->dwAvcPreProcVMEBwdPicFrame[0];
8165 }
8166
8167 // Picture Y VME
8168 MOS_ZeroMemory(&surfaceCodecParams, sizeof(CODECHAL_SURFACE_CODEC_PARAMS));
8169 surfaceCodecParams.bUseAdvState = true;
8170 surfaceCodecParams.psSurface = ¶ms->ppRefList[refPicIdx]->sRefBuffer;
8171 surfaceCodecParams.dwBindingTableOffset = refBindingTableOffset;
8172 surfaceCodecParams.ucVDirection = refVDirection;
8173 surfaceCodecParams.dwCacheabilityControl = m_hwInterface->GetCacheabilitySettings()[MOS_CODEC_RESOURCE_USAGE_SURFACE_REF_ENCODE].Value;
8174
8175 CODECHAL_ENCODE_CHK_STATUS_RETURN(CodecHalSetRcsSurfaceState(
8176 m_hwInterface,
8177 cmdBuffer,
8178 &surfaceCodecParams,
8179 kernelState));
8180
8181 if (currFieldPicture) // if current picture is field
8182 {
8183 refBindingTableOffset = avcPreProcBindingTable->dwAvcPreProcVMEBwdPicField[1];
8184 }
8185 else
8186 {
8187 refBindingTableOffset = avcPreProcBindingTable->dwAvcPreProcVMEBwdPicFrame[1];
8188 }
8189 surfaceCodecParams.dwBindingTableOffset = refBindingTableOffset;
8190
8191 CODECHAL_ENCODE_CHK_STATUS_RETURN(CodecHalSetRcsSurfaceState(
8192 m_hwInterface,
8193 cmdBuffer,
8194 &surfaceCodecParams,
8195 kernelState));
8196 }
8197
8198 return eStatus;
8199 }
8200
UpdateSSDSliceCount()8201 void CodechalEncodeAvcEncFeiG8::UpdateSSDSliceCount()
8202 {
8203 CodechalEncodeAvcBase::UpdateSSDSliceCount();
8204
8205 uint32_t sliceCount;
8206 if (m_frameHeight * m_frameWidth >= 960*540)
8207 {
8208 sliceCount = 2;
8209 }
8210 else
8211 {
8212 sliceCount = 1;
8213 }
8214
8215 if (m_osInterface->pfnSetSliceCount)
8216 {
8217 m_osInterface->pfnSetSliceCount(m_osInterface, &sliceCount);
8218 }
8219 }
8220
8221