1 /* 2 * Copyright (c) 2017-2019, Intel Corporation 3 * 4 * Permission is hereby granted, free of charge, to any person obtaining a 5 * copy of this software and associated documentation files (the "Software"), 6 * to deal in the Software without restriction, including without limitation 7 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 8 * and/or sell copies of the Software, and to permit persons to whom the 9 * Software is furnished to do so, subject to the following conditions: 10 * 11 * The above copyright notice and this permission notice shall be included 12 * in all copies or substantial portions of the Software. 13 * 14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS 15 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 17 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR 18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, 19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 20 * OTHER DEALINGS IN THE SOFTWARE. 21 */ 22 //! 23 //! \file hal_kernelrules_g12lp.c 24 //! \brief Fast Compositing Kernel DLL rules for gen12lp 25 //! 26 #include "hal_kerneldll.h" // Rule definitions 27 #include "vpkrnheader.h" // Kernel IDs 28 29 extern const Kdll_RuleEntry g_KdllRuleTable_g12lp[] = 30 { 31 // Kernel Setup 32 33 { RID_Op_NewEntry , RULE_NO_OVERRIDE , Kdll_None }, 34 { RID_IsParserState , Parser_Begin , Kdll_None }, 35 { RID_SetParserState , Parser_SetRenderMethod , Kdll_None }, 36 37 // Set rendering method 38 39 { RID_Op_NewEntry , RULE_NO_OVERRIDE , Kdll_None }, 40 { RID_IsParserState , Parser_SetRenderMethod , Kdll_None }, 41 { RID_IsRenderMethod , RenderMethod_MediaObject , Kdll_None }, 42 { RID_SetKernel , IDR_VP_VP_Setup , Kdll_None }, 43 { RID_SetParserState , Parser_SetupLayer0 , Kdll_None }, 44 45 { RID_Op_NewEntry , RULE_NO_OVERRIDE , Kdll_None }, 46 { RID_IsParserState , Parser_SetRenderMethod , Kdll_None }, 47 { RID_IsRenderMethod , RenderMethod_MediaObjectWalker , Kdll_None }, 48 { RID_SetKernel , IDR_VP_VP_Setup_MediaWalker , Kdll_None }, 49 { RID_SetParserState , Parser_SetupLayer0 , Kdll_None }, 50 51 // Set Layer 0 52 53 // If first layer is RT, it's colorfill only case. Make sure. 54 { RID_Op_NewEntry , RULE_NO_OVERRIDE , Kdll_None }, 55 { RID_IsParserState , Parser_SetupLayer0 , Kdll_None }, 56 { RID_IsLayerID , Layer_RenderTarget , Kdll_None }, // If it's RT 57 { RID_IsLayerNumber , 0 , Kdll_None }, // If it's first layer. 58 { RID_SetParserState , Parser_SetParamsTarget , Kdll_None }, 59 60 // 1st layer 61 { RID_Op_NewEntry , RULE_NO_OVERRIDE , Kdll_None }, 62 { RID_IsParserState , Parser_SetupLayer0 , Kdll_None }, 63 { RID_IsLayerNumber , 0 , Kdll_None }, 64 { RID_SetKernel , IDR_VP_Set_Layer_0 , Kdll_None }, 65 { RID_SetParserState , Parser_SetParamsLayer0 , Kdll_None }, 66 67 // Set Layer 1 68 69 // Please don't change the order of 2 rulesets below. 70 // Single layer 71 { RID_Op_NewEntry , RULE_NO_OVERRIDE , Kdll_None }, 72 { RID_IsParserState , Parser_SetupLayer1 , Kdll_None }, 73 { RID_IsLayerID , Layer_RenderTarget , Kdll_None }, 74 { RID_IsSrc0Sampling , Sample_Any , Kdll_None }, // Src0 must be valid for single layer case. 75 { RID_SetNextLayer , -1 , Kdll_None }, // backoff one layer 76 { RID_SetParserState , Parser_SampleLayer0 , Kdll_None }, 77 78 // Last layer 79 { RID_Op_NewEntry , RULE_NO_OVERRIDE , Kdll_None }, 80 { RID_IsParserState , Parser_SetupLayer1 , Kdll_None }, 81 { RID_IsLayerID , Layer_RenderTarget , Kdll_None }, 82 { RID_SetParserState , Parser_SetParamsTarget , Kdll_None }, // Setup CSC for render target 83 84 // 2nd layer 85 { RID_Op_NewEntry , RULE_NO_OVERRIDE , Kdll_None }, 86 { RID_IsParserState , Parser_SetupLayer1 , Kdll_None }, 87 { RID_IsLayerNumber , 1 , Kdll_None }, 88 { RID_SetKernel , IDR_VP_Set_Layer_1 , Kdll_None }, 89 { RID_SetParserState , Parser_SetParamsLayer1 , Kdll_None }, 90 91 // 3rd layer 92 { RID_Op_NewEntry , RULE_NO_OVERRIDE , Kdll_None }, 93 { RID_IsParserState , Parser_SetupLayer1 , Kdll_None }, 94 { RID_IsLayerNumber , 2 , Kdll_None }, 95 { RID_SetKernel , IDR_VP_Set_Layer_2 , Kdll_None }, 96 { RID_SetParserState , Parser_SetParamsLayer1 , Kdll_None }, 97 98 // 4th layer 99 { RID_Op_NewEntry , RULE_NO_OVERRIDE , Kdll_None }, 100 { RID_IsParserState , Parser_SetupLayer1 , Kdll_None }, 101 { RID_IsLayerNumber , 3 , Kdll_None }, 102 { RID_SetKernel , IDR_VP_Set_Layer_3 , Kdll_None }, 103 { RID_SetParserState , Parser_SetParamsLayer1 , Kdll_None }, 104 105 // 5th layer 106 { RID_Op_NewEntry , RULE_NO_OVERRIDE , Kdll_None }, 107 { RID_IsParserState , Parser_SetupLayer1 , Kdll_None }, 108 { RID_IsLayerNumber , 4 , Kdll_None }, 109 { RID_SetKernel , IDR_VP_Set_Layer_4 , Kdll_None }, 110 { RID_SetParserState , Parser_SetParamsLayer1 , Kdll_None }, 111 112 // 6th layer 113 { RID_Op_NewEntry , RULE_NO_OVERRIDE , Kdll_None }, 114 { RID_IsParserState , Parser_SetupLayer1 , Kdll_None }, 115 { RID_IsLayerNumber , 5 , Kdll_None }, 116 { RID_SetKernel , IDR_VP_Set_Layer_5 , Kdll_None }, 117 { RID_SetParserState , Parser_SetParamsLayer1 , Kdll_None }, 118 119 // 7th layer 120 { RID_Op_NewEntry , RULE_NO_OVERRIDE , Kdll_None }, 121 { RID_IsParserState , Parser_SetupLayer1 , Kdll_None }, 122 { RID_IsLayerNumber , 6 , Kdll_None }, 123 { RID_SetKernel , IDR_VP_Set_Layer_6 , Kdll_None }, 124 { RID_SetParserState , Parser_SetParamsLayer1 , Kdll_None }, 125 126 // 8th layer 127 { RID_Op_NewEntry , RULE_NO_OVERRIDE , Kdll_None }, 128 { RID_IsParserState , Parser_SetupLayer1 , Kdll_None }, 129 { RID_IsLayerNumber , 7 , Kdll_None }, 130 { RID_SetKernel , IDR_VP_Set_Layer_7 , Kdll_None }, 131 { RID_SetParserState , Parser_SetParamsLayer1 , Kdll_None }, 132 133 // Setup Parameters for Layer 0 134 135 { RID_Op_NewEntry , RULE_NO_OVERRIDE , Kdll_None }, 136 { RID_IsParserState , Parser_SetParamsLayer0 , Kdll_None }, 137 { RID_SetSrc0Format , Format_Source , Kdll_None }, 138 { RID_SetSrc0Coeff , CoeffID_Source , Kdll_None }, 139 { RID_SetSrc0Sampling , Sample_Source , Kdll_None }, 140 { RID_SetSrc0Rotation , Rotate_Source , Kdll_None }, 141 { RID_SetSrc0ColorFill , ColorFill_Source , Kdll_None }, 142 { RID_SetSrc0LumaKey , LumaKey_Source , Kdll_None }, 143 { RID_SetSrc0Procamp , Procamp_Source , Kdll_None }, 144 { RID_SetSrc0Processing, Process_Source , Kdll_None }, 145 { RID_SetNextLayer , 0 , Kdll_None }, 146 { RID_SetParserState , Parser_SetupLayer1 , Kdll_None }, 147 148 // Setup Parameters for Layer 1 149 150 { RID_Op_NewEntry , RULE_NO_OVERRIDE , Kdll_None }, 151 { RID_IsParserState , Parser_SetParamsLayer1 , Kdll_None }, 152 { RID_SetSrc1Format , Format_Source , Kdll_None }, 153 { RID_SetSrc1Coeff , CoeffID_Source , Kdll_None }, 154 { RID_SetSrc1Sampling , Sample_Source , Kdll_None }, 155 { RID_SetSrc1Rotation , Rotate_Source , Kdll_None }, 156 { RID_SetSrc1LumaKey , LumaKey_Source , Kdll_None }, 157 { RID_SetSrc1Procamp , Procamp_Source , Kdll_None }, 158 { RID_SetSrc1Processing, Process_Source , Kdll_None }, 159 { RID_SetParserState , Parser_SampleLayer1 , Kdll_None }, 160 161 // Setup Parameters for Render Target 162 163 //If only RT is present, it's colorfill only case. Go to write directly. 164 { RID_Op_NewEntry , RULE_NO_OVERRIDE , Kdll_None }, 165 { RID_IsParserState , Parser_SetParamsTarget , Kdll_None }, 166 { RID_IsLayerID , Layer_RenderTarget , Kdll_None }, 167 { RID_IsLayerNumber , 0 , Kdll_None }, 168 { RID_SetSrc0ColorFill , ColorFill_Source , Kdll_None }, 169 { RID_SetSrc0Format , Format_Source , Kdll_None }, 170 { RID_SetParserState , Parser_WriteOutput , Kdll_None }, 171 172 // If CSC0 is done before Mix, then jump to SetupCSC1 173 { RID_Op_NewEntry , RULE_NO_OVERRIDE , Kdll_None }, 174 { RID_IsParserState , Parser_SetParamsTarget , Kdll_None }, 175 { RID_IsCSCBeforeMix , true , Kdll_None }, 176 { RID_SetTargetCspace , CSpace_Source , Kdll_None }, 177 { RID_SetParserState , Parser_SetupCSC1 , Kdll_None }, 178 179 { RID_Op_NewEntry , RULE_NO_OVERRIDE , Kdll_None }, 180 { RID_IsParserState , Parser_SetParamsTarget , Kdll_None }, 181 { RID_SetSrc0Format , Format_Source , Kdll_None }, 182 { RID_SetSrc0Coeff , CoeffID_Source , Kdll_None }, 183 { RID_SetTargetCspace , CSpace_Source , Kdll_None }, 184 { RID_SetParserState , Parser_SetupCSC0 , Kdll_None }, 185 186 // Sample Layer 0 187 188 // Sample Y210 -> Src0 189 // Rotate 90 degrees 190 { RID_Op_NewEntry , RULE_DEFAULT , Kdll_None }, 191 { RID_IsParserState , Parser_SampleLayer0 , Kdll_None }, 192 { RID_IsSrc0Format , Format_Y210 , Kdll_None }, 193 { RID_IsSrc0Sampling , Sample_Scaling , Kdll_None }, 194 { RID_IsSrc0Rotation , VPHAL_ROTATION_90 , Kdll_None }, 195 { RID_SetKernel , IDR_VP_Y210_444Scale16_Buf_0_Rot_90, Kdll_None }, 196 { RID_SetKernel , IDR_VP_Y210_444Scale16_Buf_1_Rot_90, Kdll_None }, 197 { RID_SetKernel , IDR_VP_Y210_444Scale16_Buf_2_Rot_90, Kdll_None }, 198 { RID_SetKernel , IDR_VP_Y210_444Scale16_Buf_3_Rot_90, Kdll_None }, 199 { RID_SetParserState , Parser_SampleLayer0Done , Kdll_None }, 200 201 // Rotate 180 degrees 202 { RID_Op_NewEntry , RULE_DEFAULT , Kdll_None }, 203 { RID_IsParserState , Parser_SampleLayer0 , Kdll_None }, 204 { RID_IsSrc0Format , Format_Y210 , Kdll_None }, 205 { RID_IsSrc0Sampling , Sample_Scaling , Kdll_None }, 206 { RID_IsSrc0Rotation , VPHAL_ROTATION_180 , Kdll_None }, 207 { RID_SetKernel , IDR_VP_Y210_444Scale16_Buf_0_Rot_180, Kdll_None }, 208 { RID_SetKernel , IDR_VP_Y210_444Scale16_Buf_1_Rot_180, Kdll_None }, 209 { RID_SetKernel , IDR_VP_Y210_444Scale16_Buf_2_Rot_180, Kdll_None }, 210 { RID_SetKernel , IDR_VP_Y210_444Scale16_Buf_3_Rot_180, Kdll_None }, 211 { RID_SetParserState , Parser_SampleLayer0Done , Kdll_None }, 212 213 // Rotate 270 degrees 214 { RID_Op_NewEntry , RULE_DEFAULT , Kdll_None }, 215 { RID_IsParserState , Parser_SampleLayer0 , Kdll_None }, 216 { RID_IsSrc0Format , Format_Y210 , Kdll_None }, 217 { RID_IsSrc0Sampling , Sample_Scaling , Kdll_None }, 218 { RID_IsSrc0Rotation , VPHAL_ROTATION_270 , Kdll_None }, 219 { RID_SetKernel , IDR_VP_Y210_444Scale16_Buf_0_Rot_270, Kdll_None }, 220 { RID_SetKernel , IDR_VP_Y210_444Scale16_Buf_1_Rot_270, Kdll_None }, 221 { RID_SetKernel , IDR_VP_Y210_444Scale16_Buf_2_Rot_270, Kdll_None }, 222 { RID_SetKernel , IDR_VP_Y210_444Scale16_Buf_3_Rot_270, Kdll_None }, 223 { RID_SetParserState , Parser_SampleLayer0Done , Kdll_None }, 224 225 // Mirror Horizontal 226 { RID_Op_NewEntry , RULE_DEFAULT , Kdll_None }, 227 { RID_IsParserState , Parser_SampleLayer0 , Kdll_None }, 228 { RID_IsSrc0Format , Format_Y210 , Kdll_None }, 229 { RID_IsSrc0Sampling , Sample_Scaling , Kdll_None }, 230 { RID_IsSrc0Rotation , VPHAL_MIRROR_HORIZONTAL , Kdll_None }, 231 { RID_SetKernel , IDR_VP_Y210_444Scale16_Buf_0 , Kdll_None }, 232 { RID_SetKernel , IDR_VP_Call_Mirror_H_YUV , Kdll_None }, 233 { RID_SetKernel , IDR_VP_Y210_444Scale16_Buf_1 , Kdll_None }, 234 { RID_SetKernel , IDR_VP_Call_Mirror_H_YUV , Kdll_None }, 235 { RID_SetKernel , IDR_VP_Y210_444Scale16_Buf_2 , Kdll_None }, 236 { RID_SetKernel , IDR_VP_Call_Mirror_H_YUV , Kdll_None }, 237 { RID_SetKernel , IDR_VP_Y210_444Scale16_Buf_3 , Kdll_None }, 238 { RID_SetKernel , IDR_VP_Call_Mirror_H_YUV , Kdll_None }, 239 { RID_SetParserState , Parser_SampleLayer0Done , Kdll_None }, 240 241 // Mirror Vertical 242 { RID_Op_NewEntry , RULE_DEFAULT , Kdll_None }, 243 { RID_IsParserState , Parser_SampleLayer0 , Kdll_None }, 244 { RID_IsSrc0Format , Format_Y210 , Kdll_None }, 245 { RID_IsSrc0Sampling , Sample_Scaling , Kdll_None }, 246 { RID_IsSrc0Rotation , VPHAL_MIRROR_VERTICAL , Kdll_None }, 247 { RID_SetKernel , IDR_VP_Y210_444Scale16_Buf_0_Rot_180, Kdll_None }, 248 { RID_SetKernel , IDR_VP_Call_Mirror_H_YUV , Kdll_None }, 249 { RID_SetKernel , IDR_VP_Y210_444Scale16_Buf_1_Rot_180, Kdll_None }, 250 { RID_SetKernel , IDR_VP_Call_Mirror_H_YUV , Kdll_None }, 251 { RID_SetKernel , IDR_VP_Y210_444Scale16_Buf_2_Rot_180, Kdll_None }, 252 { RID_SetKernel , IDR_VP_Call_Mirror_H_YUV , Kdll_None }, 253 { RID_SetKernel , IDR_VP_Y210_444Scale16_Buf_3_Rot_180, Kdll_None }, 254 { RID_SetKernel , IDR_VP_Call_Mirror_H_YUV , Kdll_None }, 255 { RID_SetParserState , Parser_SampleLayer0Done , Kdll_None }, 256 257 // Rotate 90 Mirror Vertical 258 { RID_Op_NewEntry , RULE_DEFAULT , Kdll_None }, 259 { RID_IsParserState , Parser_SampleLayer0 , Kdll_None }, 260 { RID_IsSrc0Format , Format_Y210 , Kdll_None }, 261 { RID_IsSrc0Sampling , Sample_Scaling , Kdll_None }, 262 { RID_IsSrc0Rotation , VPHAL_ROTATE_90_MIRROR_VERTICAL , Kdll_None }, 263 { RID_SetKernel , IDR_VP_Y210_444Scale16_Buf_0_Rot_270, Kdll_None }, 264 { RID_SetKernel , IDR_VP_Call_Mirror_H_YUV , Kdll_None }, 265 { RID_SetKernel , IDR_VP_Y210_444Scale16_Buf_1_Rot_270, Kdll_None }, 266 { RID_SetKernel , IDR_VP_Call_Mirror_H_YUV , Kdll_None }, 267 { RID_SetKernel , IDR_VP_Y210_444Scale16_Buf_2_Rot_270, Kdll_None }, 268 { RID_SetKernel , IDR_VP_Call_Mirror_H_YUV , Kdll_None }, 269 { RID_SetKernel , IDR_VP_Y210_444Scale16_Buf_3_Rot_270, Kdll_None }, 270 { RID_SetKernel , IDR_VP_Call_Mirror_H_YUV , Kdll_None }, 271 { RID_SetParserState , Parser_SampleLayer0Done , Kdll_None }, 272 273 // Rotate 90 Mirror Horizontal 274 { RID_Op_NewEntry , RULE_DEFAULT , Kdll_None }, 275 { RID_IsParserState , Parser_SampleLayer0 , Kdll_None }, 276 { RID_IsSrc0Format , Format_Y210 , Kdll_None }, 277 { RID_IsSrc0Sampling , Sample_Scaling , Kdll_None }, 278 { RID_IsSrc0Rotation , VPHAL_ROTATE_90_MIRROR_HORIZONTAL , Kdll_None }, 279 { RID_SetKernel , IDR_VP_Y210_444Scale16_Buf_0_Rot_90 , Kdll_None }, 280 { RID_SetKernel , IDR_VP_Call_Mirror_H_YUV , Kdll_None }, 281 { RID_SetKernel , IDR_VP_Y210_444Scale16_Buf_1_Rot_90 , Kdll_None }, 282 { RID_SetKernel , IDR_VP_Call_Mirror_H_YUV , Kdll_None }, 283 { RID_SetKernel , IDR_VP_Y210_444Scale16_Buf_2_Rot_90 , Kdll_None }, 284 { RID_SetKernel , IDR_VP_Call_Mirror_H_YUV , Kdll_None }, 285 { RID_SetKernel , IDR_VP_Y210_444Scale16_Buf_3_Rot_90 , Kdll_None }, 286 { RID_SetKernel , IDR_VP_Call_Mirror_H_YUV , Kdll_None }, 287 { RID_SetParserState , Parser_SampleLayer0Done , Kdll_None }, 288 289 // No Rotation 290 { RID_Op_NewEntry , RULE_DEFAULT , Kdll_None }, 291 { RID_IsParserState , Parser_SampleLayer0 , Kdll_None }, 292 { RID_IsSrc0Format , Format_Y210 , Kdll_None }, 293 { RID_IsSrc0Sampling , Sample_Scaling , Kdll_None }, 294 { RID_SetKernel , IDR_VP_Y210_444Scale16_Buf_0 , Kdll_None }, 295 { RID_SetKernel , IDR_VP_Y210_444Scale16_Buf_1 , Kdll_None }, 296 { RID_SetKernel , IDR_VP_Y210_444Scale16_Buf_2 , Kdll_None }, 297 { RID_SetKernel , IDR_VP_Y210_444Scale16_Buf_3 , Kdll_None }, 298 { RID_SetParserState , Parser_SampleLayer0Done , Kdll_None }, 299 300 // Sample AVS 301 // Y210 -> Src0 302 // Rotate 90 degrees 303 { RID_Op_NewEntry , RULE_DEFAULT , Kdll_None }, 304 { RID_IsParserState , Parser_SampleLayer0 , Kdll_None }, 305 { RID_IsSrc0Format , Format_Y210 , Kdll_None }, 306 { RID_IsSrc0Sampling , Sample_Scaling_AVS , Kdll_None }, 307 { RID_IsSrc0Rotation , VPHAL_ROTATION_90 , Kdll_None }, 308 { RID_SetKernel , IDR_VP_Y210_444_AVS16_Y_Scale16_UV_Buf_0_Rot_90 , Kdll_None }, 309 { RID_SetKernel , IDR_VP_Y210_444_AVS16_Y_Scale16_UV_Buf_1_Rot_90 , Kdll_None }, 310 { RID_SetKernel , IDR_VP_Y210_444_AVS16_Y_Scale16_UV_Buf_2_Rot_90 , Kdll_None }, 311 { RID_SetKernel , IDR_VP_Y210_444_AVS16_Y_Scale16_UV_Buf_3_Rot_90 , Kdll_None }, 312 { RID_SetParserState , Parser_SampleLayer0Done , Kdll_None }, 313 314 // Rotate 180 degrees 315 { RID_Op_NewEntry , RULE_DEFAULT , Kdll_None }, 316 { RID_IsParserState , Parser_SampleLayer0 , Kdll_None }, 317 { RID_IsSrc0Format , Format_Y210 , Kdll_None }, 318 { RID_IsSrc0Sampling , Sample_Scaling_AVS , Kdll_None }, 319 { RID_IsSrc0Rotation , VPHAL_ROTATION_180 , Kdll_None }, 320 { RID_SetKernel , IDR_VP_Y210_444_AVS16_Y_Scale16_UV_Buf_0_Rot_180, Kdll_None }, 321 { RID_SetKernel , IDR_VP_Y210_444_AVS16_Y_Scale16_UV_Buf_1_Rot_180, Kdll_None }, 322 { RID_SetKernel , IDR_VP_Y210_444_AVS16_Y_Scale16_UV_Buf_2_Rot_180, Kdll_None }, 323 { RID_SetKernel , IDR_VP_Y210_444_AVS16_Y_Scale16_UV_Buf_3_Rot_180, Kdll_None }, 324 { RID_SetParserState , Parser_SampleLayer0Done , Kdll_None }, 325 326 // Rotate 270 degrees 327 { RID_Op_NewEntry , RULE_DEFAULT , Kdll_None }, 328 { RID_IsParserState , Parser_SampleLayer0 , Kdll_None }, 329 { RID_IsSrc0Format , Format_Y210 , Kdll_None }, 330 { RID_IsSrc0Sampling , Sample_Scaling_AVS , Kdll_None }, 331 { RID_IsSrc0Rotation , VPHAL_ROTATION_270 , Kdll_None }, 332 { RID_SetKernel , IDR_VP_Y210_444_AVS16_Y_Scale16_UV_Buf_0_Rot_270, Kdll_None }, 333 { RID_SetKernel , IDR_VP_Y210_444_AVS16_Y_Scale16_UV_Buf_1_Rot_270, Kdll_None }, 334 { RID_SetKernel , IDR_VP_Y210_444_AVS16_Y_Scale16_UV_Buf_2_Rot_270, Kdll_None }, 335 { RID_SetKernel , IDR_VP_Y210_444_AVS16_Y_Scale16_UV_Buf_3_Rot_270, Kdll_None }, 336 { RID_SetParserState , Parser_SampleLayer0Done , Kdll_None }, 337 338 // Mirror Horizontal 339 { RID_Op_NewEntry , RULE_DEFAULT , Kdll_None }, 340 { RID_IsParserState , Parser_SampleLayer0 , Kdll_None }, 341 { RID_IsSrc0Format , Format_Y210 , Kdll_None }, 342 { RID_IsSrc0Sampling , Sample_Scaling_AVS , Kdll_None }, 343 { RID_IsSrc0Rotation , VPHAL_MIRROR_HORIZONTAL , Kdll_None }, 344 { RID_SetKernel , IDR_VP_Y210_444_AVS16_Y_Scale16_UV_Buf_0, Kdll_None }, 345 { RID_SetKernel , IDR_VP_Call_Mirror_H_YUV , Kdll_None }, 346 { RID_SetKernel , IDR_VP_Y210_444_AVS16_Y_Scale16_UV_Buf_1, Kdll_None }, 347 { RID_SetKernel , IDR_VP_Call_Mirror_H_YUV , Kdll_None }, 348 { RID_SetKernel , IDR_VP_Y210_444_AVS16_Y_Scale16_UV_Buf_2, Kdll_None }, 349 { RID_SetKernel , IDR_VP_Call_Mirror_H_YUV , Kdll_None }, 350 { RID_SetKernel , IDR_VP_Y210_444_AVS16_Y_Scale16_UV_Buf_3, Kdll_None }, 351 { RID_SetKernel , IDR_VP_Call_Mirror_H_YUV , Kdll_None }, 352 { RID_SetParserState , Parser_SampleLayer0Done , Kdll_None }, 353 354 // Mirror Vertical 355 { RID_Op_NewEntry , RULE_DEFAULT , Kdll_None }, 356 { RID_IsParserState , Parser_SampleLayer0 , Kdll_None }, 357 { RID_IsSrc0Format , Format_Y210 , Kdll_None }, 358 { RID_IsSrc0Sampling , Sample_Scaling_AVS , Kdll_None }, 359 { RID_IsSrc0Rotation , VPHAL_MIRROR_VERTICAL , Kdll_None }, 360 { RID_SetKernel , IDR_VP_Y210_444_AVS16_Y_Scale16_UV_Buf_0_Rot_180, Kdll_None }, 361 { RID_SetKernel , IDR_VP_Call_Mirror_H_YUV , Kdll_None }, 362 { RID_SetKernel , IDR_VP_Y210_444_AVS16_Y_Scale16_UV_Buf_1_Rot_180, Kdll_None }, 363 { RID_SetKernel , IDR_VP_Call_Mirror_H_YUV , Kdll_None }, 364 { RID_SetKernel , IDR_VP_Y210_444_AVS16_Y_Scale16_UV_Buf_2_Rot_180, Kdll_None }, 365 { RID_SetKernel , IDR_VP_Call_Mirror_H_YUV , Kdll_None }, 366 { RID_SetKernel , IDR_VP_Y210_444_AVS16_Y_Scale16_UV_Buf_3_Rot_180, Kdll_None }, 367 { RID_SetKernel , IDR_VP_Call_Mirror_H_YUV , Kdll_None }, 368 { RID_SetParserState , Parser_SampleLayer0Done , Kdll_None }, 369 370 // Rotate 90 Mirror Vertical 371 { RID_Op_NewEntry , RULE_DEFAULT , Kdll_None }, 372 { RID_IsParserState , Parser_SampleLayer0 , Kdll_None }, 373 { RID_IsSrc0Format , Format_Y210 , Kdll_None }, 374 { RID_IsSrc0Sampling , Sample_Scaling_AVS , Kdll_None }, 375 { RID_IsSrc0Rotation , VPHAL_ROTATE_90_MIRROR_VERTICAL , Kdll_None }, 376 { RID_SetKernel , IDR_VP_Y210_444_AVS16_Y_Scale16_UV_Buf_0_Rot_270, Kdll_None }, 377 { RID_SetKernel , IDR_VP_Call_Mirror_H_YUV , Kdll_None }, 378 { RID_SetKernel , IDR_VP_Y210_444_AVS16_Y_Scale16_UV_Buf_1_Rot_270, Kdll_None }, 379 { RID_SetKernel , IDR_VP_Call_Mirror_H_YUV , Kdll_None }, 380 { RID_SetKernel , IDR_VP_Y210_444_AVS16_Y_Scale16_UV_Buf_2_Rot_270, Kdll_None }, 381 { RID_SetKernel , IDR_VP_Call_Mirror_H_YUV , Kdll_None }, 382 { RID_SetKernel , IDR_VP_Y210_444_AVS16_Y_Scale16_UV_Buf_3_Rot_270, Kdll_None }, 383 { RID_SetKernel , IDR_VP_Call_Mirror_H_YUV , Kdll_None }, 384 { RID_SetParserState , Parser_SampleLayer0Done , Kdll_None }, 385 386 // Rotate 90 Mirror Horizontal 387 { RID_Op_NewEntry , RULE_DEFAULT , Kdll_None }, 388 { RID_IsParserState , Parser_SampleLayer0 , Kdll_None }, 389 { RID_IsSrc0Format , Format_Y210 , Kdll_None }, 390 { RID_IsSrc0Sampling , Sample_Scaling_AVS , Kdll_None }, 391 { RID_IsSrc0Rotation , VPHAL_ROTATE_90_MIRROR_HORIZONTAL , Kdll_None }, 392 { RID_SetKernel , IDR_VP_Y210_444_AVS16_Y_Scale16_UV_Buf_0_Rot_90, Kdll_None }, 393 { RID_SetKernel , IDR_VP_Call_Mirror_H_YUV , Kdll_None }, 394 { RID_SetKernel , IDR_VP_Y210_444_AVS16_Y_Scale16_UV_Buf_1_Rot_90, Kdll_None }, 395 { RID_SetKernel , IDR_VP_Call_Mirror_H_YUV , Kdll_None }, 396 { RID_SetKernel , IDR_VP_Y210_444_AVS16_Y_Scale16_UV_Buf_2_Rot_90, Kdll_None }, 397 { RID_SetKernel , IDR_VP_Call_Mirror_H_YUV , Kdll_None }, 398 { RID_SetKernel , IDR_VP_Y210_444_AVS16_Y_Scale16_UV_Buf_3_Rot_90, Kdll_None }, 399 { RID_SetKernel , IDR_VP_Call_Mirror_H_YUV , Kdll_None }, 400 { RID_SetParserState , Parser_SampleLayer0Done , Kdll_None }, 401 402 // No Rotation 403 { RID_Op_NewEntry , RULE_DEFAULT , Kdll_None }, 404 { RID_IsParserState , Parser_SampleLayer0 , Kdll_None }, 405 { RID_IsSrc0Format , Format_Y210 , Kdll_None }, 406 { RID_IsSrc0Sampling , Sample_Scaling_AVS , Kdll_None }, 407 { RID_SetKernel , IDR_VP_Y210_444_AVS16_Y_Scale16_UV_Buf_0, Kdll_None }, 408 { RID_SetKernel , IDR_VP_Y210_444_AVS16_Y_Scale16_UV_Buf_1, Kdll_None }, 409 { RID_SetKernel , IDR_VP_Y210_444_AVS16_Y_Scale16_UV_Buf_2, Kdll_None }, 410 { RID_SetKernel , IDR_VP_Y210_444_AVS16_Y_Scale16_UV_Buf_3, Kdll_None }, 411 { RID_SetParserState , Parser_SampleLayer0Done , Kdll_None }, 412 413 // Sample Y410 -> Src0 414 // Rotate 90 degrees 415 { RID_Op_NewEntry , RULE_DEFAULT , Kdll_None }, 416 { RID_IsParserState , Parser_SampleLayer0 , Kdll_None }, 417 { RID_IsSrc0Format , Format_Y410 , Kdll_None }, 418 { RID_IsSrc0Sampling , Sample_Scaling_034x , Kdll_None }, 419 { RID_IsSrc0Rotation , VPHAL_ROTATION_90 , Kdll_None }, 420 { RID_SetKernel , IDR_VP_Y410_444DScale16_Buf_0_Rot_90, Kdll_None }, 421 { RID_SetKernel , IDR_VP_Y410_444DScale16_Buf_1_Rot_90, Kdll_None }, 422 { RID_SetKernel , IDR_VP_Y410_444DScale16_Buf_2_Rot_90, Kdll_None }, 423 { RID_SetKernel , IDR_VP_Y410_444DScale16_Buf_3_Rot_90, Kdll_None }, 424 { RID_SetParserState , Parser_SampleLayer0Done , Kdll_None }, 425 426 // Rotate 180 degrees 427 { RID_Op_NewEntry , RULE_DEFAULT , Kdll_None }, 428 { RID_IsParserState , Parser_SampleLayer0 , Kdll_None }, 429 { RID_IsSrc0Format , Format_Y410 , Kdll_None }, 430 { RID_IsSrc0Sampling , Sample_Scaling_034x , Kdll_None }, 431 { RID_IsSrc0Rotation , VPHAL_ROTATION_180 , Kdll_None }, 432 { RID_SetKernel , IDR_VP_Y410_444DScale16_Buf_0_Rot_180, Kdll_None }, 433 { RID_SetKernel , IDR_VP_Y410_444DScale16_Buf_1_Rot_180, Kdll_None }, 434 { RID_SetKernel , IDR_VP_Y410_444DScale16_Buf_2_Rot_180, Kdll_None }, 435 { RID_SetKernel , IDR_VP_Y410_444DScale16_Buf_3_Rot_180, Kdll_None }, 436 { RID_SetParserState , Parser_SampleLayer0Done , Kdll_None }, 437 438 // Rotate 270 dgrees 439 { RID_Op_NewEntry , RULE_DEFAULT , Kdll_None }, 440 { RID_IsParserState , Parser_SampleLayer0 , Kdll_None }, 441 { RID_IsSrc0Format , Format_Y410 , Kdll_None }, 442 { RID_IsSrc0Sampling , Sample_Scaling_034x , Kdll_None }, 443 { RID_IsSrc0Rotation , VPHAL_ROTATION_270 , Kdll_None }, 444 { RID_SetKernel , IDR_VP_Y410_444DScale16_Buf_0_Rot_270, Kdll_None }, 445 { RID_SetKernel , IDR_VP_Y410_444DScale16_Buf_1_Rot_270, Kdll_None }, 446 { RID_SetKernel , IDR_VP_Y410_444DScale16_Buf_2_Rot_270, Kdll_None }, 447 { RID_SetKernel , IDR_VP_Y410_444DScale16_Buf_3_Rot_270, Kdll_None }, 448 { RID_SetParserState , Parser_SampleLayer0Done , Kdll_None }, 449 450 // Mirror Horizontal 451 { RID_Op_NewEntry , RULE_DEFAULT , Kdll_None }, 452 { RID_IsParserState , Parser_SampleLayer0 , Kdll_None }, 453 { RID_IsSrc0Format , Format_Y410 , Kdll_None }, 454 { RID_IsSrc0Sampling , Sample_Scaling_034x , Kdll_None }, 455 { RID_IsSrc0Rotation , VPHAL_MIRROR_HORIZONTAL , Kdll_None }, 456 { RID_SetKernel , IDR_VP_Y410_444DScale16_Buf_0 , Kdll_None }, 457 { RID_SetKernel , IDR_VP_Call_Mirror_H_YUV , Kdll_None }, 458 { RID_SetKernel , IDR_VP_Y410_444DScale16_Buf_1 , Kdll_None }, 459 { RID_SetKernel , IDR_VP_Call_Mirror_H_YUV , Kdll_None }, 460 { RID_SetKernel , IDR_VP_Y410_444DScale16_Buf_2 , Kdll_None }, 461 { RID_SetKernel , IDR_VP_Call_Mirror_H_YUV , Kdll_None }, 462 { RID_SetKernel , IDR_VP_Y410_444DScale16_Buf_3 , Kdll_None }, 463 { RID_SetKernel , IDR_VP_Call_Mirror_H_YUV , Kdll_None }, 464 { RID_SetParserState , Parser_SampleLayer0Done , Kdll_None }, 465 466 // Mirror Vertical 467 { RID_Op_NewEntry , RULE_DEFAULT , Kdll_None }, 468 { RID_IsParserState , Parser_SampleLayer0 , Kdll_None }, 469 { RID_IsSrc0Format , Format_Y410 , Kdll_None }, 470 { RID_IsSrc0Sampling , Sample_Scaling_034x , Kdll_None }, 471 { RID_IsSrc0Rotation , VPHAL_MIRROR_VERTICAL , Kdll_None }, 472 { RID_SetKernel , IDR_VP_Y410_444DScale16_Buf_0_Rot_180, Kdll_None }, 473 { RID_SetKernel , IDR_VP_Call_Mirror_H_YUV , Kdll_None }, 474 { RID_SetKernel , IDR_VP_Y410_444DScale16_Buf_1_Rot_180, Kdll_None }, 475 { RID_SetKernel , IDR_VP_Call_Mirror_H_YUV , Kdll_None }, 476 { RID_SetKernel , IDR_VP_Y410_444DScale16_Buf_2_Rot_180, Kdll_None }, 477 { RID_SetKernel , IDR_VP_Call_Mirror_H_YUV , Kdll_None }, 478 { RID_SetKernel , IDR_VP_Y410_444DScale16_Buf_3_Rot_180, Kdll_None }, 479 { RID_SetKernel , IDR_VP_Call_Mirror_H_YUV , Kdll_None }, 480 { RID_SetParserState , Parser_SampleLayer0Done , Kdll_None }, 481 482 // Rotate 90 Mirror Vertical 483 { RID_Op_NewEntry , RULE_DEFAULT , Kdll_None }, 484 { RID_IsParserState , Parser_SampleLayer0 , Kdll_None }, 485 { RID_IsSrc0Format , Format_Y410 , Kdll_None }, 486 { RID_IsSrc0Sampling , Sample_Scaling_034x , Kdll_None }, 487 { RID_IsSrc0Rotation , VPHAL_ROTATE_90_MIRROR_VERTICAL , Kdll_None }, 488 { RID_SetKernel , IDR_VP_Y410_444DScale16_Buf_0_Rot_270, Kdll_None }, 489 { RID_SetKernel , IDR_VP_Call_Mirror_H_YUV , Kdll_None }, 490 { RID_SetKernel , IDR_VP_Y410_444DScale16_Buf_1_Rot_270, Kdll_None }, 491 { RID_SetKernel , IDR_VP_Call_Mirror_H_YUV , Kdll_None }, 492 { RID_SetKernel , IDR_VP_Y410_444DScale16_Buf_2_Rot_270, Kdll_None }, 493 { RID_SetKernel , IDR_VP_Call_Mirror_H_YUV , Kdll_None }, 494 { RID_SetKernel , IDR_VP_Y410_444DScale16_Buf_3_Rot_270, Kdll_None }, 495 { RID_SetKernel , IDR_VP_Call_Mirror_H_YUV , Kdll_None }, 496 { RID_SetParserState , Parser_SampleLayer0Done , Kdll_None }, 497 498 // Rotate 90 Mirror Horizontal 499 { RID_Op_NewEntry , RULE_DEFAULT , Kdll_None }, 500 { RID_IsParserState , Parser_SampleLayer0 , Kdll_None }, 501 { RID_IsSrc0Format , Format_Y410 , Kdll_None }, 502 { RID_IsSrc0Sampling , Sample_Scaling_034x , Kdll_None }, 503 { RID_IsSrc0Rotation , VPHAL_ROTATE_90_MIRROR_HORIZONTAL , Kdll_None }, 504 { RID_SetKernel , IDR_VP_Y410_444DScale16_Buf_0_Rot_90, Kdll_None }, 505 { RID_SetKernel , IDR_VP_Call_Mirror_H_YUV , Kdll_None }, 506 { RID_SetKernel , IDR_VP_Y410_444DScale16_Buf_1_Rot_90, Kdll_None }, 507 { RID_SetKernel , IDR_VP_Call_Mirror_H_YUV , Kdll_None }, 508 { RID_SetKernel , IDR_VP_Y410_444DScale16_Buf_2_Rot_90, Kdll_None }, 509 { RID_SetKernel , IDR_VP_Call_Mirror_H_YUV , Kdll_None }, 510 { RID_SetKernel , IDR_VP_Y410_444DScale16_Buf_3_Rot_90, Kdll_None }, 511 { RID_SetKernel , IDR_VP_Call_Mirror_H_YUV , Kdll_None }, 512 { RID_SetParserState , Parser_SampleLayer0Done , Kdll_None }, 513 514 // No Rotation 515 { RID_Op_NewEntry , RULE_DEFAULT , Kdll_None }, 516 { RID_IsParserState , Parser_SampleLayer0 , Kdll_None }, 517 { RID_IsSrc0Format , Format_Y410 , Kdll_None }, 518 { RID_IsSrc0Sampling , Sample_Scaling_034x , Kdll_None }, 519 { RID_SetKernel , IDR_VP_Y410_444DScale16_Buf_0 , Kdll_None }, 520 { RID_SetKernel , IDR_VP_Y410_444DScale16_Buf_1 , Kdll_None }, 521 { RID_SetKernel , IDR_VP_Y410_444DScale16_Buf_2 , Kdll_None }, 522 { RID_SetKernel , IDR_VP_Y410_444DScale16_Buf_3 , Kdll_None }, 523 { RID_SetParserState , Parser_SampleLayer0Done , Kdll_None }, 524 525 // Sample_Unorm progressive scaling 526 // Sample (RGB | AYUV | Packed YUV | YV12 | NV12 | 400P) -> Src0 527 528 // Rotate 90 degrees 529 { RID_Op_NewEntry , RULE_DEFAULT , Kdll_None }, 530 { RID_IsParserState , Parser_SampleLayer0 , Kdll_None }, 531 { RID_IsSrc0Format , Format_RGB , Kdll_Or }, 532 { RID_IsSrc0Format , Format_AYUV , Kdll_Or }, 533 { RID_IsSrc0Format , Format_PA , Kdll_Or }, 534 { RID_IsSrc0Format , Format_YV12_Planar , Kdll_Or }, 535 { RID_IsSrc0Format , Format_NV12 , Kdll_Or }, 536 { RID_IsSrc0Format , Format_400P , Kdll_None }, 537 { RID_IsSrc0Sampling , Sample_Scaling , Kdll_None }, 538 { RID_IsSrc0Rotation , VPHAL_ROTATION_90 , Kdll_None }, 539 { RID_SetKernel , IDR_VP_PA_444Scale16_Buf_0_Rot_90 , Kdll_None }, 540 { RID_SetKernel , IDR_VP_PA_444Scale16_Buf_1_Rot_90 , Kdll_None }, 541 { RID_SetKernel , IDR_VP_PA_444Scale16_Buf_2_Rot_90 , Kdll_None }, 542 { RID_SetKernel , IDR_VP_PA_444Scale16_Buf_3_Rot_90 , Kdll_None }, 543 { RID_SetParserState , Parser_SampleLayer0Done , Kdll_None }, 544 545 // Rotate 180 degrees 546 { RID_Op_NewEntry , RULE_DEFAULT , Kdll_None }, 547 { RID_IsParserState , Parser_SampleLayer0 , Kdll_None }, 548 { RID_IsSrc0Format , Format_RGB , Kdll_Or }, 549 { RID_IsSrc0Format , Format_AYUV , Kdll_Or }, 550 { RID_IsSrc0Format , Format_PA , Kdll_Or }, 551 { RID_IsSrc0Format , Format_YV12_Planar , Kdll_Or }, 552 { RID_IsSrc0Format , Format_NV12 , Kdll_Or }, 553 { RID_IsSrc0Format , Format_400P , Kdll_None }, 554 { RID_IsSrc0Sampling , Sample_Scaling , Kdll_None }, 555 { RID_IsSrc0Rotation , VPHAL_ROTATION_180 , Kdll_None }, 556 { RID_SetKernel , IDR_VP_PA_444Scale16_Buf_0_Rot_180 , Kdll_None }, 557 { RID_SetKernel , IDR_VP_PA_444Scale16_Buf_1_Rot_180 , Kdll_None }, 558 { RID_SetKernel , IDR_VP_PA_444Scale16_Buf_2_Rot_180 , Kdll_None }, 559 { RID_SetKernel , IDR_VP_PA_444Scale16_Buf_3_Rot_180 , Kdll_None }, 560 { RID_SetParserState , Parser_SampleLayer0Done , Kdll_None }, 561 562 // Rotate 270 degrees 563 { RID_Op_NewEntry , RULE_DEFAULT , Kdll_None }, 564 { RID_IsParserState , Parser_SampleLayer0 , Kdll_None }, 565 { RID_IsSrc0Format , Format_RGB , Kdll_Or }, 566 { RID_IsSrc0Format , Format_AYUV , Kdll_Or }, 567 { RID_IsSrc0Format , Format_PA , Kdll_Or }, 568 { RID_IsSrc0Format , Format_YV12_Planar , Kdll_Or }, 569 { RID_IsSrc0Format , Format_NV12 , Kdll_Or }, 570 { RID_IsSrc0Format , Format_400P , Kdll_None }, 571 { RID_IsSrc0Sampling , Sample_Scaling , Kdll_None }, 572 { RID_IsSrc0Rotation , VPHAL_ROTATION_270 , Kdll_None }, 573 { RID_SetKernel , IDR_VP_PA_444Scale16_Buf_0_Rot_270 , Kdll_None }, 574 { RID_SetKernel , IDR_VP_PA_444Scale16_Buf_1_Rot_270 , Kdll_None }, 575 { RID_SetKernel , IDR_VP_PA_444Scale16_Buf_2_Rot_270 , Kdll_None }, 576 { RID_SetKernel , IDR_VP_PA_444Scale16_Buf_3_Rot_270 , Kdll_None }, 577 { RID_SetParserState , Parser_SampleLayer0Done , Kdll_None }, 578 579 // Mirror Horizontal 580 { RID_Op_NewEntry , RULE_DEFAULT , Kdll_None }, 581 { RID_IsParserState , Parser_SampleLayer0 , Kdll_None }, 582 { RID_IsSrc0Format , Format_RGB , Kdll_Or }, 583 { RID_IsSrc0Format , Format_AYUV , Kdll_Or }, 584 { RID_IsSrc0Format , Format_PA , Kdll_Or }, 585 { RID_IsSrc0Format , Format_YV12_Planar , Kdll_Or }, 586 { RID_IsSrc0Format , Format_NV12 , Kdll_Or }, 587 { RID_IsSrc0Format , Format_400P , Kdll_None }, 588 { RID_IsSrc0Sampling , Sample_Scaling , Kdll_None }, 589 { RID_IsSrc0Rotation , VPHAL_MIRROR_HORIZONTAL , Kdll_None }, 590 { RID_SetKernel , IDR_VP_PA_444Scale16_Buf_0 , Kdll_None }, 591 { RID_SetKernel , IDR_VP_Call_Mirror_H_YUVA , Kdll_None }, 592 { RID_SetKernel , IDR_VP_PA_444Scale16_Buf_1 , Kdll_None }, 593 { RID_SetKernel , IDR_VP_Call_Mirror_H_YUVA , Kdll_None }, 594 { RID_SetKernel , IDR_VP_PA_444Scale16_Buf_2 , Kdll_None }, 595 { RID_SetKernel , IDR_VP_Call_Mirror_H_YUVA , Kdll_None }, 596 { RID_SetKernel , IDR_VP_PA_444Scale16_Buf_3 , Kdll_None }, 597 { RID_SetKernel , IDR_VP_Call_Mirror_H_YUVA , Kdll_None }, 598 { RID_SetParserState , Parser_SampleLayer0Done , Kdll_None }, 599 600 // Mirror Vertical 601 { RID_Op_NewEntry , RULE_DEFAULT , Kdll_None }, 602 { RID_IsParserState , Parser_SampleLayer0 , Kdll_None }, 603 { RID_IsSrc0Format , Format_RGB , Kdll_Or }, 604 { RID_IsSrc0Format , Format_AYUV , Kdll_Or }, 605 { RID_IsSrc0Format , Format_PA , Kdll_Or }, 606 { RID_IsSrc0Format , Format_YV12_Planar , Kdll_Or }, 607 { RID_IsSrc0Format , Format_NV12 , Kdll_Or }, 608 { RID_IsSrc0Format , Format_400P , Kdll_None }, 609 { RID_IsSrc0Sampling , Sample_Scaling , Kdll_None }, 610 { RID_IsSrc0Rotation , VPHAL_MIRROR_VERTICAL , Kdll_None }, 611 { RID_SetKernel , IDR_VP_PA_444Scale16_Buf_0_Rot_180 , Kdll_None }, 612 { RID_SetKernel , IDR_VP_Call_Mirror_H_YUVA , Kdll_None }, 613 { RID_SetKernel , IDR_VP_PA_444Scale16_Buf_1_Rot_180 , Kdll_None }, 614 { RID_SetKernel , IDR_VP_Call_Mirror_H_YUVA , Kdll_None }, 615 { RID_SetKernel , IDR_VP_PA_444Scale16_Buf_2_Rot_180 , Kdll_None }, 616 { RID_SetKernel , IDR_VP_Call_Mirror_H_YUVA , Kdll_None }, 617 { RID_SetKernel , IDR_VP_PA_444Scale16_Buf_3_Rot_180 , Kdll_None }, 618 { RID_SetKernel , IDR_VP_Call_Mirror_H_YUVA , Kdll_None }, 619 { RID_SetParserState , Parser_SampleLayer0Done , Kdll_None }, 620 621 // Rotate 90 Mirror Vertical 622 { RID_Op_NewEntry , RULE_DEFAULT , Kdll_None }, 623 { RID_IsParserState , Parser_SampleLayer0 , Kdll_None }, 624 { RID_IsSrc0Format , Format_RGB , Kdll_Or }, 625 { RID_IsSrc0Format , Format_AYUV , Kdll_Or }, 626 { RID_IsSrc0Format , Format_PA , Kdll_Or }, 627 { RID_IsSrc0Format , Format_YV12_Planar , Kdll_Or }, 628 { RID_IsSrc0Format , Format_NV12 , Kdll_Or }, 629 { RID_IsSrc0Format , Format_400P , Kdll_None }, 630 { RID_IsSrc0Sampling , Sample_Scaling , Kdll_None }, 631 { RID_IsSrc0Rotation , VPHAL_ROTATE_90_MIRROR_VERTICAL , Kdll_None }, 632 { RID_SetKernel , IDR_VP_PA_444Scale16_Buf_0_Rot_270 , Kdll_None }, 633 { RID_SetKernel , IDR_VP_Call_Mirror_H_YUVA , Kdll_None }, 634 { RID_SetKernel , IDR_VP_PA_444Scale16_Buf_1_Rot_270 , Kdll_None }, 635 { RID_SetKernel , IDR_VP_Call_Mirror_H_YUVA , Kdll_None }, 636 { RID_SetKernel , IDR_VP_PA_444Scale16_Buf_2_Rot_270 , Kdll_None }, 637 { RID_SetKernel , IDR_VP_Call_Mirror_H_YUVA , Kdll_None }, 638 { RID_SetKernel , IDR_VP_PA_444Scale16_Buf_3_Rot_270 , Kdll_None }, 639 { RID_SetKernel , IDR_VP_Call_Mirror_H_YUVA , Kdll_None }, 640 { RID_SetParserState , Parser_SampleLayer0Done , Kdll_None }, 641 642 // Rotate 90 Mirror Horizontal 643 { RID_Op_NewEntry , RULE_DEFAULT , Kdll_None }, 644 { RID_IsParserState , Parser_SampleLayer0 , Kdll_None }, 645 { RID_IsSrc0Format , Format_RGB , Kdll_Or }, 646 { RID_IsSrc0Format , Format_AYUV , Kdll_Or }, 647 { RID_IsSrc0Format , Format_PA , Kdll_Or }, 648 { RID_IsSrc0Format , Format_YV12_Planar , Kdll_Or }, 649 { RID_IsSrc0Format , Format_NV12 , Kdll_Or }, 650 { RID_IsSrc0Format , Format_400P , Kdll_None }, 651 { RID_IsSrc0Sampling , Sample_Scaling , Kdll_None }, 652 { RID_IsSrc0Rotation , VPHAL_ROTATE_90_MIRROR_HORIZONTAL , Kdll_None }, 653 { RID_SetKernel , IDR_VP_PA_444Scale16_Buf_0_Rot_90 , Kdll_None }, 654 { RID_SetKernel , IDR_VP_Call_Mirror_H_YUVA , Kdll_None }, 655 { RID_SetKernel , IDR_VP_PA_444Scale16_Buf_1_Rot_90 , Kdll_None }, 656 { RID_SetKernel , IDR_VP_Call_Mirror_H_YUVA , Kdll_None }, 657 { RID_SetKernel , IDR_VP_PA_444Scale16_Buf_2_Rot_90 , Kdll_None }, 658 { RID_SetKernel , IDR_VP_Call_Mirror_H_YUVA , Kdll_None }, 659 { RID_SetKernel , IDR_VP_PA_444Scale16_Buf_3_Rot_90 , Kdll_None }, 660 { RID_SetKernel , IDR_VP_Call_Mirror_H_YUVA , Kdll_None }, 661 { RID_SetParserState , Parser_SampleLayer0Done , Kdll_None }, 662 663 // No Rotation 664 { RID_Op_NewEntry , RULE_DEFAULT , Kdll_None }, 665 { RID_IsParserState , Parser_SampleLayer0 , Kdll_None }, 666 { RID_IsSrc0Format , Format_RGB , Kdll_Or }, 667 { RID_IsSrc0Format , Format_AYUV , Kdll_Or }, 668 { RID_IsSrc0Format , Format_PA , Kdll_Or }, 669 { RID_IsSrc0Format , Format_YV12_Planar , Kdll_Or }, 670 { RID_IsSrc0Format , Format_NV12 , Kdll_Or }, 671 { RID_IsSrc0Format , Format_400P , Kdll_Or }, 672 { RID_IsSrc0Format , Format_YV12_Planar , Kdll_None }, 673 { RID_IsSrc0Sampling , Sample_Scaling , Kdll_None }, 674 { RID_SetKernel , IDR_VP_PA_444Scale16_Buf_0 , Kdll_None }, 675 { RID_SetKernel , IDR_VP_PA_444Scale16_Buf_1 , Kdll_None }, 676 { RID_SetKernel , IDR_VP_PA_444Scale16_Buf_2 , Kdll_None }, 677 { RID_SetKernel , IDR_VP_PA_444Scale16_Buf_3 , Kdll_None }, 678 { RID_SetParserState , Parser_SampleLayer0Done , Kdll_None }, 679 680 // Sample NV12 (width or height is not a multiple of 4) -> Src0 681 682 // Rotate 90 degrees 683 { RID_Op_NewEntry , RULE_DEFAULT , Kdll_None }, 684 { RID_IsParserState , Parser_SampleLayer0 , Kdll_None }, 685 { RID_IsSrc0Format , Format_PL2 , Kdll_Or }, 686 { RID_IsSrc0Format , Format_PL2_UnAligned , Kdll_None }, 687 { RID_IsSrc0Sampling , Sample_Scaling , Kdll_None }, 688 { RID_IsSrc0Rotation , VPHAL_ROTATION_90 , Kdll_None }, 689 { RID_SetKernel , IDR_VP_PL2_444Scale16_Buf_0_Rot_90 , Kdll_None }, 690 { RID_SetKernel , IDR_VP_PL2_444Scale16_Buf_1_Rot_90 , Kdll_None }, 691 { RID_SetKernel , IDR_VP_PL2_444Scale16_Buf_2_Rot_90 , Kdll_None }, 692 { RID_SetKernel , IDR_VP_PL2_444Scale16_Buf_3_Rot_90 , Kdll_None }, 693 { RID_SetParserState , Parser_SampleLayer0Done , Kdll_None }, 694 695 // Rotate 180 degrees 696 { RID_Op_NewEntry , RULE_DEFAULT , Kdll_None }, 697 { RID_IsParserState , Parser_SampleLayer0 , Kdll_None }, 698 { RID_IsSrc0Format , Format_PL2 , Kdll_Or }, 699 { RID_IsSrc0Format , Format_PL2_UnAligned , Kdll_None }, 700 { RID_IsSrc0Sampling , Sample_Scaling , Kdll_None }, 701 { RID_IsSrc0Rotation , VPHAL_ROTATION_180 , Kdll_None }, 702 { RID_SetKernel , IDR_VP_PL2_444Scale16_Buf_0_Rot_180, Kdll_None }, 703 { RID_SetKernel , IDR_VP_PL2_444Scale16_Buf_1_Rot_180, Kdll_None }, 704 { RID_SetKernel , IDR_VP_PL2_444Scale16_Buf_2_Rot_180, Kdll_None }, 705 { RID_SetKernel , IDR_VP_PL2_444Scale16_Buf_3_Rot_180, Kdll_None }, 706 { RID_SetParserState , Parser_SampleLayer0Done , Kdll_None }, 707 708 // Rotate 270 degrees 709 { RID_Op_NewEntry , RULE_DEFAULT , Kdll_None }, 710 { RID_IsParserState , Parser_SampleLayer0 , Kdll_None }, 711 { RID_IsSrc0Format , Format_PL2 , Kdll_Or }, 712 { RID_IsSrc0Format , Format_PL2_UnAligned , Kdll_None }, 713 { RID_IsSrc0Sampling , Sample_Scaling , Kdll_None }, 714 { RID_IsSrc0Rotation , VPHAL_ROTATION_270 , Kdll_None }, 715 { RID_SetKernel , IDR_VP_PL2_444Scale16_Buf_0_Rot_270, Kdll_None }, 716 { RID_SetKernel , IDR_VP_PL2_444Scale16_Buf_1_Rot_270, Kdll_None }, 717 { RID_SetKernel , IDR_VP_PL2_444Scale16_Buf_2_Rot_270, Kdll_None }, 718 { RID_SetKernel , IDR_VP_PL2_444Scale16_Buf_3_Rot_270, Kdll_None }, 719 { RID_SetParserState , Parser_SampleLayer0Done , Kdll_None }, 720 721 // Mirror Horizontal 722 { RID_Op_NewEntry , RULE_DEFAULT , Kdll_None }, 723 { RID_IsParserState , Parser_SampleLayer0 , Kdll_None }, 724 { RID_IsSrc0Format , Format_PL2 , Kdll_Or }, 725 { RID_IsSrc0Format , Format_PL2_UnAligned , Kdll_None }, 726 { RID_IsSrc0Sampling , Sample_Scaling , Kdll_None }, 727 { RID_IsSrc0Rotation , VPHAL_MIRROR_HORIZONTAL , Kdll_None }, 728 { RID_SetKernel , IDR_VP_PL2_444Scale16_Buf_0 , Kdll_None }, 729 { RID_SetKernel , IDR_VP_Call_Mirror_H_YUV , Kdll_None }, 730 { RID_SetKernel , IDR_VP_PL2_444Scale16_Buf_1 , Kdll_None }, 731 { RID_SetKernel , IDR_VP_Call_Mirror_H_YUV , Kdll_None }, 732 { RID_SetKernel , IDR_VP_PL2_444Scale16_Buf_2 , Kdll_None }, 733 { RID_SetKernel , IDR_VP_Call_Mirror_H_YUV , Kdll_None }, 734 { RID_SetKernel , IDR_VP_PL2_444Scale16_Buf_3 , Kdll_None }, 735 { RID_SetKernel , IDR_VP_Call_Mirror_H_YUV , Kdll_None }, 736 { RID_SetParserState , Parser_SampleLayer0Done , Kdll_None }, 737 738 // Mirror Vertical 739 { RID_Op_NewEntry , RULE_DEFAULT , Kdll_None }, 740 { RID_IsParserState , Parser_SampleLayer0 , Kdll_None }, 741 { RID_IsSrc0Format , Format_PL2 , Kdll_Or }, 742 { RID_IsSrc0Format , Format_PL2_UnAligned , Kdll_None }, 743 { RID_IsSrc0Sampling , Sample_Scaling , Kdll_None }, 744 { RID_IsSrc0Rotation , VPHAL_MIRROR_VERTICAL , Kdll_None }, 745 { RID_SetKernel , IDR_VP_PL2_444Scale16_Buf_0_Rot_180, Kdll_None }, 746 { RID_SetKernel , IDR_VP_Call_Mirror_H_YUV , Kdll_None }, 747 { RID_SetKernel , IDR_VP_PL2_444Scale16_Buf_1_Rot_180, Kdll_None }, 748 { RID_SetKernel , IDR_VP_Call_Mirror_H_YUV , Kdll_None }, 749 { RID_SetKernel , IDR_VP_PL2_444Scale16_Buf_2_Rot_180, Kdll_None }, 750 { RID_SetKernel , IDR_VP_Call_Mirror_H_YUV , Kdll_None }, 751 { RID_SetKernel , IDR_VP_PL2_444Scale16_Buf_3_Rot_180, Kdll_None }, 752 { RID_SetKernel , IDR_VP_Call_Mirror_H_YUV , Kdll_None }, 753 { RID_SetParserState , Parser_SampleLayer0Done , Kdll_None }, 754 755 // Rotate 90 Mirror Vertical 756 { RID_Op_NewEntry , RULE_DEFAULT , Kdll_None }, 757 { RID_IsParserState , Parser_SampleLayer0 , Kdll_None }, 758 { RID_IsSrc0Format , Format_PL2 , Kdll_Or }, 759 { RID_IsSrc0Format , Format_PL2_UnAligned , Kdll_None }, 760 { RID_IsSrc0Sampling , Sample_Scaling , Kdll_None }, 761 { RID_IsSrc0Rotation , VPHAL_ROTATE_90_MIRROR_VERTICAL , Kdll_None }, 762 { RID_SetKernel , IDR_VP_PL2_444Scale16_Buf_0_Rot_270, Kdll_None }, 763 { RID_SetKernel , IDR_VP_Call_Mirror_H_YUV , Kdll_None }, 764 { RID_SetKernel , IDR_VP_PL2_444Scale16_Buf_1_Rot_270, Kdll_None }, 765 { RID_SetKernel , IDR_VP_Call_Mirror_H_YUV , Kdll_None }, 766 { RID_SetKernel , IDR_VP_PL2_444Scale16_Buf_2_Rot_270, Kdll_None }, 767 { RID_SetKernel , IDR_VP_Call_Mirror_H_YUV , Kdll_None }, 768 { RID_SetKernel , IDR_VP_PL2_444Scale16_Buf_3_Rot_270, Kdll_None }, 769 { RID_SetKernel , IDR_VP_Call_Mirror_H_YUV , Kdll_None }, 770 { RID_SetParserState , Parser_SampleLayer0Done , Kdll_None }, 771 772 // Rotate 90 Mirror Horizontal 773 { RID_Op_NewEntry , RULE_DEFAULT , Kdll_None }, 774 { RID_IsParserState , Parser_SampleLayer0 , Kdll_None }, 775 { RID_IsSrc0Format , Format_PL2 , Kdll_Or }, 776 { RID_IsSrc0Format , Format_PL2_UnAligned , Kdll_None }, 777 { RID_IsSrc0Sampling , Sample_Scaling , Kdll_None }, 778 { RID_IsSrc0Rotation , VPHAL_ROTATE_90_MIRROR_HORIZONTAL , Kdll_None }, 779 { RID_SetKernel , IDR_VP_PL2_444Scale16_Buf_0_Rot_90 , Kdll_None }, 780 { RID_SetKernel , IDR_VP_Call_Mirror_H_YUV , Kdll_None }, 781 { RID_SetKernel , IDR_VP_PL2_444Scale16_Buf_1_Rot_90 , Kdll_None }, 782 { RID_SetKernel , IDR_VP_Call_Mirror_H_YUV , Kdll_None }, 783 { RID_SetKernel , IDR_VP_PL2_444Scale16_Buf_2_Rot_90 , Kdll_None }, 784 { RID_SetKernel , IDR_VP_Call_Mirror_H_YUV , Kdll_None }, 785 { RID_SetKernel , IDR_VP_PL2_444Scale16_Buf_3_Rot_90 , Kdll_None }, 786 { RID_SetKernel , IDR_VP_Call_Mirror_H_YUV , Kdll_None }, 787 { RID_SetParserState , Parser_SampleLayer0Done , Kdll_None }, 788 789 // No Rotation 790 { RID_Op_NewEntry , RULE_DEFAULT , Kdll_None }, 791 { RID_IsParserState , Parser_SampleLayer0 , Kdll_None }, 792 { RID_IsSrc0Format , Format_PL2 , Kdll_Or }, 793 { RID_IsSrc0Format , Format_PL2_UnAligned , Kdll_None }, 794 { RID_IsSrc0Sampling , Sample_Scaling , Kdll_None }, 795 { RID_SetKernel , IDR_VP_PL2_444Scale16_Buf_0 , Kdll_None }, 796 { RID_SetKernel , IDR_VP_PL2_444Scale16_Buf_1 , Kdll_None }, 797 { RID_SetKernel , IDR_VP_PL2_444Scale16_Buf_2 , Kdll_None }, 798 { RID_SetKernel , IDR_VP_PL2_444Scale16_Buf_3 , Kdll_None }, 799 { RID_SetParserState , Parser_SampleLayer0Done , Kdll_None }, 800 801 // Sample (PL3 | PL3_RGB) -> Src0 802 803 // Rotate 90 degrees 804 { RID_Op_NewEntry , RULE_DEFAULT , Kdll_None }, 805 { RID_IsParserState , Parser_SampleLayer0 , Kdll_None }, 806 { RID_IsSrc0Format , Format_PL3 , Kdll_Or }, 807 { RID_IsSrc0Format , Format_PL3_RGB , Kdll_None }, 808 { RID_IsSrc0Sampling , Sample_Scaling , Kdll_None }, 809 { RID_IsSrc0Rotation , VPHAL_ROTATION_90 , Kdll_None }, 810 { RID_SetKernel , IDR_VP_PL3_444Scale16_Buf_0_Rot_90 , Kdll_None }, 811 { RID_SetKernel , IDR_VP_PL3_444Scale16_Buf_1_Rot_90 , Kdll_None }, 812 { RID_SetKernel , IDR_VP_PL3_444Scale16_Buf_2_Rot_90 , Kdll_None }, 813 { RID_SetKernel , IDR_VP_PL3_444Scale16_Buf_3_Rot_90 , Kdll_None }, 814 { RID_SetParserState , Parser_SampleLayer0Done , Kdll_None }, 815 816 // Rotate 180 degrees 817 { RID_Op_NewEntry , RULE_DEFAULT , Kdll_None }, 818 { RID_IsParserState , Parser_SampleLayer0 , Kdll_None }, 819 { RID_IsSrc0Format , Format_PL3 , Kdll_Or }, 820 { RID_IsSrc0Format , Format_PL3_RGB , Kdll_None }, 821 { RID_IsSrc0Sampling , Sample_Scaling , Kdll_None }, 822 { RID_IsSrc0Rotation , VPHAL_ROTATION_180 , Kdll_None }, 823 { RID_SetKernel , IDR_VP_PL3_444Scale16_Buf_0_Rot_180, Kdll_None }, 824 { RID_SetKernel , IDR_VP_PL3_444Scale16_Buf_1_Rot_180, Kdll_None }, 825 { RID_SetKernel , IDR_VP_PL3_444Scale16_Buf_2_Rot_180, Kdll_None }, 826 { RID_SetKernel , IDR_VP_PL3_444Scale16_Buf_3_Rot_180, Kdll_None }, 827 { RID_SetParserState , Parser_SampleLayer0Done , Kdll_None }, 828 829 // Rotate 270 degrees 830 { RID_Op_NewEntry , RULE_DEFAULT , Kdll_None }, 831 { RID_IsParserState , Parser_SampleLayer0 , Kdll_None }, 832 { RID_IsSrc0Format , Format_PL3 , Kdll_Or }, 833 { RID_IsSrc0Format , Format_PL3_RGB , Kdll_None }, 834 { RID_IsSrc0Sampling , Sample_Scaling , Kdll_None }, 835 { RID_IsSrc0Rotation , VPHAL_ROTATION_270 , Kdll_None }, 836 { RID_SetKernel , IDR_VP_PL3_444Scale16_Buf_0_Rot_270, Kdll_None }, 837 { RID_SetKernel , IDR_VP_PL3_444Scale16_Buf_1_Rot_270, Kdll_None }, 838 { RID_SetKernel , IDR_VP_PL3_444Scale16_Buf_2_Rot_270, Kdll_None }, 839 { RID_SetKernel , IDR_VP_PL3_444Scale16_Buf_3_Rot_270, Kdll_None }, 840 { RID_SetParserState , Parser_SampleLayer0Done , Kdll_None }, 841 842 // Mirror Horizontal 843 { RID_Op_NewEntry , RULE_DEFAULT , Kdll_None }, 844 { RID_IsParserState , Parser_SampleLayer0 , Kdll_None }, 845 { RID_IsSrc0Format , Format_PL3 , Kdll_Or }, 846 { RID_IsSrc0Format , Format_PL3_RGB , Kdll_None }, 847 { RID_IsSrc0Sampling , Sample_Scaling , Kdll_None }, 848 { RID_IsSrc0Rotation , VPHAL_MIRROR_HORIZONTAL , Kdll_None }, 849 { RID_SetKernel , IDR_VP_PL3_444Scale16_Buf_0 , Kdll_None }, 850 { RID_SetKernel , IDR_VP_Call_Mirror_H_YUV , Kdll_None }, 851 { RID_SetKernel , IDR_VP_PL3_444Scale16_Buf_1 , Kdll_None }, 852 { RID_SetKernel , IDR_VP_Call_Mirror_H_YUV , Kdll_None }, 853 { RID_SetKernel , IDR_VP_PL3_444Scale16_Buf_2 , Kdll_None }, 854 { RID_SetKernel , IDR_VP_Call_Mirror_H_YUV , Kdll_None }, 855 { RID_SetKernel , IDR_VP_PL3_444Scale16_Buf_3 , Kdll_None }, 856 { RID_SetKernel , IDR_VP_Call_Mirror_H_YUV , Kdll_None }, 857 { RID_SetParserState , Parser_SampleLayer0Done , Kdll_None }, 858 859 // Mirror Vertical 860 { RID_Op_NewEntry , RULE_DEFAULT , Kdll_None }, 861 { RID_IsParserState , Parser_SampleLayer0 , Kdll_None }, 862 { RID_IsSrc0Format , Format_PL3 , Kdll_Or }, 863 { RID_IsSrc0Format , Format_PL3_RGB , Kdll_None }, 864 { RID_IsSrc0Sampling , Sample_Scaling , Kdll_None }, 865 { RID_IsSrc0Rotation , VPHAL_MIRROR_VERTICAL , Kdll_None }, 866 { RID_SetKernel , IDR_VP_PL3_444Scale16_Buf_0_Rot_180, Kdll_None }, 867 { RID_SetKernel , IDR_VP_Call_Mirror_H_YUV , Kdll_None }, 868 { RID_SetKernel , IDR_VP_PL3_444Scale16_Buf_1_Rot_180, Kdll_None }, 869 { RID_SetKernel , IDR_VP_Call_Mirror_H_YUV , Kdll_None }, 870 { RID_SetKernel , IDR_VP_PL3_444Scale16_Buf_2_Rot_180, Kdll_None }, 871 { RID_SetKernel , IDR_VP_Call_Mirror_H_YUV , Kdll_None }, 872 { RID_SetKernel , IDR_VP_PL3_444Scale16_Buf_3_Rot_180, Kdll_None }, 873 { RID_SetKernel , IDR_VP_Call_Mirror_H_YUV , Kdll_None }, 874 { RID_SetParserState , Parser_SampleLayer0Done , Kdll_None }, 875 876 // Rotate 90 Mirror Vertical 877 { RID_Op_NewEntry , RULE_DEFAULT , Kdll_None }, 878 { RID_IsParserState , Parser_SampleLayer0 , Kdll_None }, 879 { RID_IsSrc0Format , Format_PL3 , Kdll_Or }, 880 { RID_IsSrc0Format , Format_PL3_RGB , Kdll_None }, 881 { RID_IsSrc0Sampling , Sample_Scaling , Kdll_None }, 882 { RID_IsSrc0Rotation , VPHAL_ROTATE_90_MIRROR_VERTICAL , Kdll_None }, 883 { RID_SetKernel , IDR_VP_PL3_444Scale16_Buf_0_Rot_270, Kdll_None }, 884 { RID_SetKernel , IDR_VP_Call_Mirror_H_YUV , Kdll_None }, 885 { RID_SetKernel , IDR_VP_PL3_444Scale16_Buf_1_Rot_270, Kdll_None }, 886 { RID_SetKernel , IDR_VP_Call_Mirror_H_YUV , Kdll_None }, 887 { RID_SetKernel , IDR_VP_PL3_444Scale16_Buf_2_Rot_270, Kdll_None }, 888 { RID_SetKernel , IDR_VP_Call_Mirror_H_YUV , Kdll_None }, 889 { RID_SetKernel , IDR_VP_PL3_444Scale16_Buf_3_Rot_270, Kdll_None }, 890 { RID_SetKernel , IDR_VP_Call_Mirror_H_YUV , Kdll_None }, 891 { RID_SetParserState , Parser_SampleLayer0Done , Kdll_None }, 892 893 // Rotate 90 Mirror Horizontal 894 { RID_Op_NewEntry , RULE_DEFAULT , Kdll_None }, 895 { RID_IsParserState , Parser_SampleLayer0 , Kdll_None }, 896 { RID_IsSrc0Format , Format_PL3 , Kdll_Or }, 897 { RID_IsSrc0Format , Format_PL3_RGB , Kdll_None }, 898 { RID_IsSrc0Sampling , Sample_Scaling , Kdll_None }, 899 { RID_IsSrc0Rotation , VPHAL_ROTATE_90_MIRROR_HORIZONTAL , Kdll_None }, 900 { RID_SetKernel , IDR_VP_PL3_444Scale16_Buf_0_Rot_90 , Kdll_None }, 901 { RID_SetKernel , IDR_VP_Call_Mirror_H_YUV , Kdll_None }, 902 { RID_SetKernel , IDR_VP_PL3_444Scale16_Buf_1_Rot_90 , Kdll_None }, 903 { RID_SetKernel , IDR_VP_Call_Mirror_H_YUV , Kdll_None }, 904 { RID_SetKernel , IDR_VP_PL3_444Scale16_Buf_2_Rot_90 , Kdll_None }, 905 { RID_SetKernel , IDR_VP_Call_Mirror_H_YUV , Kdll_None }, 906 { RID_SetKernel , IDR_VP_PL3_444Scale16_Buf_3_Rot_90 , Kdll_None }, 907 { RID_SetKernel , IDR_VP_Call_Mirror_H_YUV , Kdll_None }, 908 { RID_SetParserState , Parser_SampleLayer0Done , Kdll_None }, 909 910 // No Rotation 911 { RID_Op_NewEntry , RULE_DEFAULT , Kdll_None }, 912 { RID_IsParserState , Parser_SampleLayer0 , Kdll_None }, 913 { RID_IsSrc0Format , Format_PL3 , Kdll_Or }, 914 { RID_IsSrc0Format , Format_PL3_RGB , Kdll_None }, 915 { RID_IsSrc0Sampling , Sample_Scaling , Kdll_None }, 916 { RID_SetKernel , IDR_VP_PL3_444Scale16_Buf_0 , Kdll_None }, 917 { RID_SetKernel , IDR_VP_PL3_444Scale16_Buf_1 , Kdll_None }, 918 { RID_SetKernel , IDR_VP_PL3_444Scale16_Buf_2 , Kdll_None }, 919 { RID_SetKernel , IDR_VP_PL3_444Scale16_Buf_3 , Kdll_None }, 920 { RID_SetParserState , Parser_SampleLayer0Done , Kdll_None }, 921 922 // Sample progressive scaling 923 // Sample 0.34x RGB -> Src0 924 { RID_Op_NewEntry , RULE_DEFAULT , Kdll_None }, 925 { RID_IsParserState , Parser_SampleLayer0 , Kdll_None }, 926 { RID_IsSrc0Format , Format_RGB , Kdll_Or }, 927 { RID_IsSrc0Format , Format_AYUV , Kdll_Or }, 928 { RID_IsSrc0Format , Format_400P , Kdll_Or }, 929 { RID_IsSrc0Format , Format_PA , Kdll_Or }, 930 { RID_IsSrc0Format , Format_NV12 , Kdll_None }, 931 { RID_IsSrc0Sampling , Sample_Scaling_034x , Kdll_None }, 932 { RID_SetKernel , IDR_VP_PA_444DScale16_Buf_0 , Kdll_None }, 933 { RID_SetKernel , IDR_VP_PA_444DScale16_Buf_1 , Kdll_None }, 934 { RID_SetKernel , IDR_VP_PA_444DScale16_Buf_2 , Kdll_None }, 935 { RID_SetKernel , IDR_VP_PA_444DScale16_Buf_3 , Kdll_None }, 936 { RID_SetParserState , Parser_SampleLayer0Done , Kdll_None }, 937 938 // Sample 0.34x PL2(width or height is not a multiple of 4) -> Src0 939 { RID_Op_NewEntry , RULE_DEFAULT , Kdll_None }, 940 { RID_IsParserState , Parser_SampleLayer0 , Kdll_None }, 941 { RID_IsSrc0Format , Format_PL2 , Kdll_Or }, 942 { RID_IsSrc0Format , Format_PL2_UnAligned , Kdll_None }, 943 { RID_IsSrc0Sampling , Sample_Scaling_034x , Kdll_None }, 944 { RID_SetKernel , IDR_VP_PL2_444DScale16_Buf_0 , Kdll_None }, 945 { RID_SetKernel , IDR_VP_PL2_444DScale16_Buf_1 , Kdll_None }, 946 { RID_SetKernel , IDR_VP_PL2_444DScale16_Buf_2 , Kdll_None }, 947 { RID_SetKernel , IDR_VP_PL2_444DScale16_Buf_3 , Kdll_None }, 948 { RID_SetParserState , Parser_SampleLayer0Done , Kdll_None }, 949 950 // Sample 0.34x PL3 -> Src0 951 { RID_Op_NewEntry , RULE_DEFAULT , Kdll_None }, 952 { RID_IsParserState , Parser_SampleLayer0 , Kdll_None }, 953 { RID_IsSrc0Format , Format_PL3 , Kdll_Or }, 954 { RID_IsSrc0Format , Format_PL3_RGB , Kdll_None }, 955 { RID_IsSrc0Sampling , Sample_Scaling_034x , Kdll_None }, 956 { RID_SetKernel , IDR_VP_PL3_444DScale16_Buf_0 , Kdll_None }, 957 { RID_SetKernel , IDR_VP_PL3_444DScale16_Buf_1 , Kdll_None }, 958 { RID_SetKernel , IDR_VP_PL3_444DScale16_Buf_2 , Kdll_None }, 959 { RID_SetKernel , IDR_VP_PL3_444DScale16_Buf_3 , Kdll_None }, 960 { RID_SetParserState , Parser_SampleLayer0Done , Kdll_None }, 961 962 // Sample AVS 963 // Y410 -> Src0 964 // Rotate 90 degrees 965 { RID_Op_NewEntry , RULE_DEFAULT , Kdll_None }, 966 { RID_IsParserState , Parser_SampleLayer0 , Kdll_None }, 967 { RID_IsSrc0Format , Format_Y410 , Kdll_None }, 968 { RID_IsSrc0Sampling , Sample_Scaling_AVS , Kdll_None }, 969 { RID_IsSrc0Rotation , VPHAL_ROTATION_90 , Kdll_None }, 970 { RID_SetKernel , IDR_VP_Y410_444AVS16_Buf_0_Rot_90, Kdll_None }, 971 { RID_SetKernel , IDR_VP_Y410_444AVS16_Buf_1_Rot_90, Kdll_None }, 972 { RID_SetKernel , IDR_VP_Y410_444AVS16_Buf_2_Rot_90, Kdll_None }, 973 { RID_SetKernel , IDR_VP_Y410_444AVS16_Buf_3_Rot_90, Kdll_None }, 974 { RID_SetParserState , Parser_SampleLayer0Done , Kdll_None }, 975 976 // Rotate 180 degrees 977 { RID_Op_NewEntry , RULE_DEFAULT , Kdll_None }, 978 { RID_IsParserState , Parser_SampleLayer0 , Kdll_None }, 979 { RID_IsSrc0Format , Format_Y410 , Kdll_None }, 980 { RID_IsSrc0Sampling , Sample_Scaling_AVS , Kdll_None }, 981 { RID_IsSrc0Rotation , VPHAL_ROTATION_180 , Kdll_None }, 982 { RID_SetKernel , IDR_VP_Y410_444AVS16_Buf_0_Rot_180, Kdll_None }, 983 { RID_SetKernel , IDR_VP_Y410_444AVS16_Buf_1_Rot_180, Kdll_None }, 984 { RID_SetKernel , IDR_VP_Y410_444AVS16_Buf_2_Rot_180, Kdll_None }, 985 { RID_SetKernel , IDR_VP_Y410_444AVS16_Buf_3_Rot_180, Kdll_None }, 986 { RID_SetParserState , Parser_SampleLayer0Done , Kdll_None }, 987 988 // Rotate 270 degrees 989 { RID_Op_NewEntry , RULE_DEFAULT , Kdll_None }, 990 { RID_IsParserState , Parser_SampleLayer0 , Kdll_None }, 991 { RID_IsSrc0Format , Format_Y410 , Kdll_None }, 992 { RID_IsSrc0Sampling , Sample_Scaling_AVS , Kdll_None }, 993 { RID_IsSrc0Rotation , VPHAL_ROTATION_270 , Kdll_None }, 994 { RID_SetKernel , IDR_VP_Y410_444AVS16_Buf_0_Rot_270, Kdll_None }, 995 { RID_SetKernel , IDR_VP_Y410_444AVS16_Buf_1_Rot_270, Kdll_None }, 996 { RID_SetKernel , IDR_VP_Y410_444AVS16_Buf_2_Rot_270, Kdll_None }, 997 { RID_SetKernel , IDR_VP_Y410_444AVS16_Buf_3_Rot_270, Kdll_None }, 998 { RID_SetParserState , Parser_SampleLayer0Done , Kdll_None }, 999 1000 // Mirror Horizontal 1001 { RID_Op_NewEntry , RULE_DEFAULT , Kdll_None }, 1002 { RID_IsParserState , Parser_SampleLayer0 , Kdll_None }, 1003 { RID_IsSrc0Format , Format_Y410 , Kdll_None }, 1004 { RID_IsSrc0Sampling , Sample_Scaling_AVS , Kdll_None }, 1005 { RID_IsSrc0Rotation , VPHAL_MIRROR_HORIZONTAL , Kdll_None }, 1006 { RID_SetKernel , IDR_VP_Y410_444AVS16_Buf_0, Kdll_None }, 1007 { RID_SetKernel , IDR_VP_Call_Mirror_H_YUV , Kdll_None }, 1008 { RID_SetKernel , IDR_VP_Y410_444AVS16_Buf_1, Kdll_None }, 1009 { RID_SetKernel , IDR_VP_Call_Mirror_H_YUV , Kdll_None }, 1010 { RID_SetKernel , IDR_VP_Y410_444AVS16_Buf_2, Kdll_None }, 1011 { RID_SetKernel , IDR_VP_Call_Mirror_H_YUV , Kdll_None }, 1012 { RID_SetKernel , IDR_VP_Y410_444AVS16_Buf_3, Kdll_None }, 1013 { RID_SetKernel , IDR_VP_Call_Mirror_H_YUV , Kdll_None }, 1014 { RID_SetParserState , Parser_SampleLayer0Done , Kdll_None }, 1015 1016 // Mirror Vertical 1017 { RID_Op_NewEntry , RULE_DEFAULT , Kdll_None }, 1018 { RID_IsParserState , Parser_SampleLayer0 , Kdll_None }, 1019 { RID_IsSrc0Format , Format_Y410 , Kdll_None }, 1020 { RID_IsSrc0Sampling , Sample_Scaling_AVS , Kdll_None }, 1021 { RID_IsSrc0Rotation , VPHAL_MIRROR_VERTICAL , Kdll_None }, 1022 { RID_SetKernel , IDR_VP_Y410_444AVS16_Buf_0_Rot_180, Kdll_None }, 1023 { RID_SetKernel , IDR_VP_Call_Mirror_H_YUV , Kdll_None }, 1024 { RID_SetKernel , IDR_VP_Y410_444AVS16_Buf_1_Rot_180, Kdll_None }, 1025 { RID_SetKernel , IDR_VP_Call_Mirror_H_YUV , Kdll_None }, 1026 { RID_SetKernel , IDR_VP_Y410_444AVS16_Buf_2_Rot_180, Kdll_None }, 1027 { RID_SetKernel , IDR_VP_Call_Mirror_H_YUV , Kdll_None }, 1028 { RID_SetKernel , IDR_VP_Y410_444AVS16_Buf_3_Rot_180, Kdll_None }, 1029 { RID_SetKernel , IDR_VP_Call_Mirror_H_YUV , Kdll_None }, 1030 { RID_SetParserState , Parser_SampleLayer0Done , Kdll_None }, 1031 1032 // Rotate 90 Mirror Vertical 1033 { RID_Op_NewEntry , RULE_DEFAULT , Kdll_None }, 1034 { RID_IsParserState , Parser_SampleLayer0 , Kdll_None }, 1035 { RID_IsSrc0Format , Format_Y410 , Kdll_None }, 1036 { RID_IsSrc0Sampling , Sample_Scaling_AVS , Kdll_None }, 1037 { RID_IsSrc0Rotation , VPHAL_ROTATE_90_MIRROR_VERTICAL , Kdll_None }, 1038 { RID_SetKernel , IDR_VP_Y410_444AVS16_Buf_0_Rot_270, Kdll_None }, 1039 { RID_SetKernel , IDR_VP_Call_Mirror_H_YUV , Kdll_None }, 1040 { RID_SetKernel , IDR_VP_Y410_444AVS16_Buf_1_Rot_270, Kdll_None }, 1041 { RID_SetKernel , IDR_VP_Call_Mirror_H_YUV , Kdll_None }, 1042 { RID_SetKernel , IDR_VP_Y410_444AVS16_Buf_2_Rot_270, Kdll_None }, 1043 { RID_SetKernel , IDR_VP_Call_Mirror_H_YUV , Kdll_None }, 1044 { RID_SetKernel , IDR_VP_Y410_444AVS16_Buf_3_Rot_270, Kdll_None }, 1045 { RID_SetKernel , IDR_VP_Call_Mirror_H_YUV , Kdll_None }, 1046 { RID_SetParserState , Parser_SampleLayer0Done , Kdll_None }, 1047 1048 // Rotate 90 Mirror Horizontal 1049 { RID_Op_NewEntry , RULE_DEFAULT , Kdll_None }, 1050 { RID_IsParserState , Parser_SampleLayer0 , Kdll_None }, 1051 { RID_IsSrc0Format , Format_Y410 , Kdll_None }, 1052 { RID_IsSrc0Sampling , Sample_Scaling_AVS , Kdll_None }, 1053 { RID_IsSrc0Rotation , VPHAL_ROTATE_90_MIRROR_HORIZONTAL, Kdll_None }, 1054 { RID_SetKernel , IDR_VP_Y410_444AVS16_Buf_0_Rot_90, Kdll_None }, 1055 { RID_SetKernel , IDR_VP_Call_Mirror_H_YUV , Kdll_None }, 1056 { RID_SetKernel , IDR_VP_Y410_444AVS16_Buf_1_Rot_90, Kdll_None }, 1057 { RID_SetKernel , IDR_VP_Call_Mirror_H_YUV , Kdll_None }, 1058 { RID_SetKernel , IDR_VP_Y410_444AVS16_Buf_2_Rot_90, Kdll_None }, 1059 { RID_SetKernel , IDR_VP_Call_Mirror_H_YUV , Kdll_None }, 1060 { RID_SetKernel , IDR_VP_Y410_444AVS16_Buf_3_Rot_90, Kdll_None }, 1061 { RID_SetKernel , IDR_VP_Call_Mirror_H_YUV , Kdll_None }, 1062 { RID_SetParserState , Parser_SampleLayer0Done , Kdll_None }, 1063 1064 // No Rotation 1065 { RID_Op_NewEntry , RULE_DEFAULT , Kdll_None }, 1066 { RID_IsParserState , Parser_SampleLayer0 , Kdll_None }, 1067 { RID_IsSrc0Format , Format_Y410 , Kdll_None }, 1068 { RID_IsSrc0Sampling , Sample_Scaling_AVS , Kdll_None }, 1069 { RID_SetKernel , IDR_VP_Y410_444AVS16_Buf_0 , Kdll_None }, 1070 { RID_SetKernel , IDR_VP_Y410_444AVS16_Buf_1 , Kdll_None }, 1071 { RID_SetKernel , IDR_VP_Y410_444AVS16_Buf_2 , Kdll_None }, 1072 { RID_SetKernel , IDR_VP_Y410_444AVS16_Buf_3 , Kdll_None }, 1073 { RID_SetParserState , Parser_SampleLayer0Done , Kdll_None }, 1074 1075 // Sample_8x8 progressive scaling 1076 // AVS Sample (RGB | AYUV | Packed YUV | YV12 | NV12 | 400P) -> Src0 1077 1078 // Rotate 90 degrees 1079 { RID_Op_NewEntry , RULE_DEFAULT , Kdll_None }, 1080 { RID_IsParserState , Parser_SampleLayer0 , Kdll_None }, 1081 { RID_IsSrc0Format , Format_RGB , Kdll_Or }, 1082 { RID_IsSrc0Format , Format_AYUV , Kdll_Or }, 1083 { RID_IsSrc0Format , Format_PA , Kdll_Or }, 1084 { RID_IsSrc0Format , Format_YV12_Planar , Kdll_Or }, 1085 { RID_IsSrc0Format , Format_NV12 , Kdll_Or }, 1086 { RID_IsSrc0Format , Format_400P , Kdll_None }, 1087 { RID_IsSrc0Sampling , Sample_Scaling_AVS , Kdll_None }, 1088 { RID_IsSrc0Rotation , VPHAL_ROTATION_90 , Kdll_None }, 1089 { RID_SetKernel , IDR_VP_PA_444AVS16_Buf_0_Rot_90 , Kdll_None }, 1090 { RID_SetKernel , IDR_VP_PA_444AVS16_Buf_1_Rot_90 , Kdll_None }, 1091 { RID_SetKernel , IDR_VP_PA_444AVS16_Buf_2_Rot_90 , Kdll_None }, 1092 { RID_SetKernel , IDR_VP_PA_444AVS16_Buf_3_Rot_90 , Kdll_None }, 1093 { RID_SetParserState , Parser_SampleLayer0Done , Kdll_None }, 1094 1095 // Rotate 180 degrees 1096 { RID_Op_NewEntry , RULE_DEFAULT , Kdll_None }, 1097 { RID_IsParserState , Parser_SampleLayer0 , Kdll_None }, 1098 { RID_IsSrc0Format , Format_RGB , Kdll_Or }, 1099 { RID_IsSrc0Format , Format_AYUV , Kdll_Or }, 1100 { RID_IsSrc0Format , Format_PA , Kdll_Or }, 1101 { RID_IsSrc0Format , Format_YV12_Planar , Kdll_Or }, 1102 { RID_IsSrc0Format , Format_NV12 , Kdll_Or }, 1103 { RID_IsSrc0Format , Format_400P , Kdll_None }, 1104 { RID_IsSrc0Sampling , Sample_Scaling_AVS , Kdll_None }, 1105 { RID_IsSrc0Rotation , VPHAL_ROTATION_180 , Kdll_None }, 1106 { RID_SetKernel , IDR_VP_PA_444AVS16_Buf_0_Rot_180 , Kdll_None }, 1107 { RID_SetKernel , IDR_VP_PA_444AVS16_Buf_1_Rot_180 , Kdll_None }, 1108 { RID_SetKernel , IDR_VP_PA_444AVS16_Buf_2_Rot_180 , Kdll_None }, 1109 { RID_SetKernel , IDR_VP_PA_444AVS16_Buf_3_Rot_180 , Kdll_None }, 1110 { RID_SetParserState , Parser_SampleLayer0Done , Kdll_None }, 1111 1112 // Rotate 270 degrees 1113 { RID_Op_NewEntry , RULE_DEFAULT , Kdll_None }, 1114 { RID_IsParserState , Parser_SampleLayer0 , Kdll_None }, 1115 { RID_IsSrc0Format , Format_RGB , Kdll_Or }, 1116 { RID_IsSrc0Format , Format_AYUV , Kdll_Or }, 1117 { RID_IsSrc0Format , Format_PA , Kdll_Or }, 1118 { RID_IsSrc0Format , Format_YV12_Planar , Kdll_Or }, 1119 { RID_IsSrc0Format , Format_NV12 , Kdll_Or }, 1120 { RID_IsSrc0Format , Format_400P , Kdll_None }, 1121 { RID_IsSrc0Sampling , Sample_Scaling_AVS , Kdll_None }, 1122 { RID_IsSrc0Rotation , VPHAL_ROTATION_270 , Kdll_None }, 1123 { RID_SetKernel , IDR_VP_PA_444AVS16_Buf_0_Rot_270 , Kdll_None }, 1124 { RID_SetKernel , IDR_VP_PA_444AVS16_Buf_1_Rot_270 , Kdll_None }, 1125 { RID_SetKernel , IDR_VP_PA_444AVS16_Buf_2_Rot_270 , Kdll_None }, 1126 { RID_SetKernel , IDR_VP_PA_444AVS16_Buf_3_Rot_270 , Kdll_None }, 1127 { RID_SetParserState , Parser_SampleLayer0Done , Kdll_None }, 1128 1129 // Mirror Horizontal 1130 { RID_Op_NewEntry , RULE_DEFAULT , Kdll_None }, 1131 { RID_IsParserState , Parser_SampleLayer0 , Kdll_None }, 1132 { RID_IsSrc0Format , Format_RGB , Kdll_Or }, 1133 { RID_IsSrc0Format , Format_AYUV , Kdll_Or }, 1134 { RID_IsSrc0Format , Format_PA , Kdll_Or }, 1135 { RID_IsSrc0Format , Format_YV12_Planar , Kdll_Or }, 1136 { RID_IsSrc0Format , Format_NV12 , Kdll_Or }, 1137 { RID_IsSrc0Format , Format_400P , Kdll_None }, 1138 { RID_IsSrc0Sampling , Sample_Scaling_AVS , Kdll_None }, 1139 { RID_IsSrc0Rotation , VPHAL_MIRROR_HORIZONTAL , Kdll_None }, 1140 { RID_SetKernel , IDR_VP_PA_444AVS16_Buf_0 , Kdll_None }, 1141 { RID_SetKernel , IDR_VP_Call_Mirror_H_YUVA , Kdll_None }, 1142 { RID_SetKernel , IDR_VP_PA_444AVS16_Buf_1 , Kdll_None }, 1143 { RID_SetKernel , IDR_VP_Call_Mirror_H_YUVA , Kdll_None }, 1144 { RID_SetKernel , IDR_VP_PA_444AVS16_Buf_2 , Kdll_None }, 1145 { RID_SetKernel , IDR_VP_Call_Mirror_H_YUVA , Kdll_None }, 1146 { RID_SetKernel , IDR_VP_PA_444AVS16_Buf_3 , Kdll_None }, 1147 { RID_SetKernel , IDR_VP_Call_Mirror_H_YUVA , Kdll_None }, 1148 { RID_SetParserState , Parser_SampleLayer0Done , Kdll_None }, 1149 1150 // Mirror Vertical 1151 { RID_Op_NewEntry , RULE_DEFAULT , Kdll_None }, 1152 { RID_IsParserState , Parser_SampleLayer0 , Kdll_None }, 1153 { RID_IsSrc0Format , Format_RGB , Kdll_Or }, 1154 { RID_IsSrc0Format , Format_AYUV , Kdll_Or }, 1155 { RID_IsSrc0Format , Format_PA , Kdll_Or }, 1156 { RID_IsSrc0Format , Format_YV12_Planar , Kdll_Or }, 1157 { RID_IsSrc0Format , Format_NV12 , Kdll_Or }, 1158 { RID_IsSrc0Format , Format_400P , Kdll_None }, 1159 { RID_IsSrc0Sampling , Sample_Scaling_AVS , Kdll_None }, 1160 { RID_IsSrc0Rotation , VPHAL_MIRROR_VERTICAL , Kdll_None }, 1161 { RID_SetKernel , IDR_VP_PA_444AVS16_Buf_0_Rot_180 , Kdll_None }, 1162 { RID_SetKernel , IDR_VP_Call_Mirror_H_YUVA , Kdll_None }, 1163 { RID_SetKernel , IDR_VP_PA_444AVS16_Buf_1_Rot_180 , Kdll_None }, 1164 { RID_SetKernel , IDR_VP_Call_Mirror_H_YUVA , Kdll_None }, 1165 { RID_SetKernel , IDR_VP_PA_444AVS16_Buf_2_Rot_180 , Kdll_None }, 1166 { RID_SetKernel , IDR_VP_Call_Mirror_H_YUVA , Kdll_None }, 1167 { RID_SetKernel , IDR_VP_PA_444AVS16_Buf_3_Rot_180 , Kdll_None }, 1168 { RID_SetKernel , IDR_VP_Call_Mirror_H_YUVA , Kdll_None }, 1169 { RID_SetParserState , Parser_SampleLayer0Done , Kdll_None }, 1170 1171 // Rotate 90 Mirror Vertical 1172 { RID_Op_NewEntry , RULE_DEFAULT , Kdll_None }, 1173 { RID_IsParserState , Parser_SampleLayer0 , Kdll_None }, 1174 { RID_IsSrc0Format , Format_RGB , Kdll_Or }, 1175 { RID_IsSrc0Format , Format_AYUV , Kdll_Or }, 1176 { RID_IsSrc0Format , Format_PA , Kdll_Or }, 1177 { RID_IsSrc0Format , Format_YV12_Planar , Kdll_Or }, 1178 { RID_IsSrc0Format , Format_NV12 , Kdll_Or }, 1179 { RID_IsSrc0Format , Format_400P , Kdll_None }, 1180 { RID_IsSrc0Sampling , Sample_Scaling_AVS , Kdll_None }, 1181 { RID_IsSrc0Rotation , VPHAL_ROTATE_90_MIRROR_VERTICAL , Kdll_None }, 1182 { RID_SetKernel , IDR_VP_PA_444AVS16_Buf_0_Rot_270 , Kdll_None }, 1183 { RID_SetKernel , IDR_VP_Call_Mirror_H_YUVA , Kdll_None }, 1184 { RID_SetKernel , IDR_VP_PA_444AVS16_Buf_1_Rot_270 , Kdll_None }, 1185 { RID_SetKernel , IDR_VP_Call_Mirror_H_YUVA , Kdll_None }, 1186 { RID_SetKernel , IDR_VP_PA_444AVS16_Buf_2_Rot_270 , Kdll_None }, 1187 { RID_SetKernel , IDR_VP_Call_Mirror_H_YUVA , Kdll_None }, 1188 { RID_SetKernel , IDR_VP_PA_444AVS16_Buf_3_Rot_270 , Kdll_None }, 1189 { RID_SetKernel , IDR_VP_Call_Mirror_H_YUVA , Kdll_None }, 1190 { RID_SetParserState , Parser_SampleLayer0Done , Kdll_None }, 1191 1192 // Rotate 90 Mirror Vertical 1193 { RID_Op_NewEntry , RULE_DEFAULT , Kdll_None }, 1194 { RID_IsParserState , Parser_SampleLayer0 , Kdll_None }, 1195 { RID_IsSrc0Format , Format_RGB , Kdll_Or }, 1196 { RID_IsSrc0Format , Format_AYUV , Kdll_Or }, 1197 { RID_IsSrc0Format , Format_PA , Kdll_Or }, 1198 { RID_IsSrc0Format , Format_YV12_Planar , Kdll_Or }, 1199 { RID_IsSrc0Format , Format_NV12 , Kdll_Or }, 1200 { RID_IsSrc0Format , Format_400P , Kdll_None }, 1201 { RID_IsSrc0Sampling , Sample_Scaling_AVS , Kdll_None }, 1202 { RID_IsSrc0Rotation , VPHAL_ROTATE_90_MIRROR_HORIZONTAL , Kdll_None }, 1203 { RID_SetKernel , IDR_VP_PA_444AVS16_Buf_0_Rot_90 , Kdll_None }, 1204 { RID_SetKernel , IDR_VP_Call_Mirror_H_YUVA , Kdll_None }, 1205 { RID_SetKernel , IDR_VP_PA_444AVS16_Buf_1_Rot_90 , Kdll_None }, 1206 { RID_SetKernel , IDR_VP_Call_Mirror_H_YUVA , Kdll_None }, 1207 { RID_SetKernel , IDR_VP_PA_444AVS16_Buf_2_Rot_90 , Kdll_None }, 1208 { RID_SetKernel , IDR_VP_Call_Mirror_H_YUVA , Kdll_None }, 1209 { RID_SetKernel , IDR_VP_PA_444AVS16_Buf_3_Rot_90 , Kdll_None }, 1210 { RID_SetKernel , IDR_VP_Call_Mirror_H_YUVA , Kdll_None }, 1211 { RID_SetParserState , Parser_SampleLayer0Done , Kdll_None }, 1212 1213 // No Rotation 1214 { RID_Op_NewEntry , RULE_DEFAULT , Kdll_None }, 1215 { RID_IsParserState , Parser_SampleLayer0 , Kdll_None }, 1216 { RID_IsSrc0Format , Format_RGB , Kdll_Or }, 1217 { RID_IsSrc0Format , Format_AYUV , Kdll_Or }, 1218 { RID_IsSrc0Format , Format_PA , Kdll_Or }, 1219 { RID_IsSrc0Format , Format_YV12_Planar , Kdll_Or }, 1220 { RID_IsSrc0Format , Format_NV12 , Kdll_Or }, 1221 { RID_IsSrc0Format , Format_400P , Kdll_None }, 1222 { RID_IsSrc0Sampling , Sample_Scaling_AVS , Kdll_None }, 1223 { RID_SetKernel , IDR_VP_PA_444AVS16_Buf_0 , Kdll_None }, 1224 { RID_SetKernel , IDR_VP_PA_444AVS16_Buf_1 , Kdll_None }, 1225 { RID_SetKernel , IDR_VP_PA_444AVS16_Buf_2 , Kdll_None }, 1226 { RID_SetKernel , IDR_VP_PA_444AVS16_Buf_3 , Kdll_None }, 1227 { RID_SetParserState , Parser_SampleLayer0Done , Kdll_None }, 1228 1229 // AVS Sample PL2(width or height is not a multiple of 4) -> Src0 1230 1231 // Rotate 90 degrees 1232 { RID_Op_NewEntry , RULE_DEFAULT , Kdll_None }, 1233 { RID_IsParserState , Parser_SampleLayer0 , Kdll_None }, 1234 { RID_IsSrc0Format , Format_PL2 , Kdll_Or }, 1235 { RID_IsSrc0Format , Format_PL2_UnAligned , Kdll_None }, 1236 { RID_IsSrc0Sampling , Sample_Scaling_AVS , Kdll_None }, 1237 { RID_IsSrc0Rotation , VPHAL_ROTATION_90 , Kdll_None }, 1238 { RID_SetKernel , IDR_VP_PL2_444AVS16_Buf_0_Rot_90 , Kdll_None }, 1239 { RID_SetKernel , IDR_VP_PL2_444AVS16_Buf_1_Rot_90 , Kdll_None }, 1240 { RID_SetKernel , IDR_VP_PL2_444AVS16_Buf_2_Rot_90 , Kdll_None }, 1241 { RID_SetKernel , IDR_VP_PL2_444AVS16_Buf_3_Rot_90 , Kdll_None }, 1242 { RID_SetParserState , Parser_SampleLayer0Done , Kdll_None }, 1243 1244 // Rotate 180 degrees 1245 { RID_Op_NewEntry , RULE_DEFAULT , Kdll_None }, 1246 { RID_IsParserState , Parser_SampleLayer0 , Kdll_None }, 1247 { RID_IsSrc0Format , Format_PL2 , Kdll_Or }, 1248 { RID_IsSrc0Format , Format_PL2_UnAligned , Kdll_None }, 1249 { RID_IsSrc0Sampling , Sample_Scaling_AVS , Kdll_None }, 1250 { RID_IsSrc0Rotation , VPHAL_ROTATION_180 , Kdll_None }, 1251 { RID_SetKernel , IDR_VP_PL2_444AVS16_Buf_0_Rot_180 , Kdll_None }, 1252 { RID_SetKernel , IDR_VP_PL2_444AVS16_Buf_1_Rot_180 , Kdll_None }, 1253 { RID_SetKernel , IDR_VP_PL2_444AVS16_Buf_2_Rot_180 , Kdll_None }, 1254 { RID_SetKernel , IDR_VP_PL2_444AVS16_Buf_3_Rot_180 , Kdll_None }, 1255 { RID_SetParserState , Parser_SampleLayer0Done , Kdll_None }, 1256 1257 // Rotate 270 degrees 1258 { RID_Op_NewEntry , RULE_DEFAULT , Kdll_None }, 1259 { RID_IsParserState , Parser_SampleLayer0 , Kdll_None }, 1260 { RID_IsSrc0Format , Format_PL2 , Kdll_Or }, 1261 { RID_IsSrc0Format , Format_PL2_UnAligned , Kdll_None }, 1262 { RID_IsSrc0Sampling , Sample_Scaling_AVS , Kdll_None }, 1263 { RID_IsSrc0Rotation , VPHAL_ROTATION_270 , Kdll_None }, 1264 { RID_SetKernel , IDR_VP_PL2_444AVS16_Buf_0_Rot_270 , Kdll_None }, 1265 { RID_SetKernel , IDR_VP_PL2_444AVS16_Buf_1_Rot_270 , Kdll_None }, 1266 { RID_SetKernel , IDR_VP_PL2_444AVS16_Buf_2_Rot_270 , Kdll_None }, 1267 { RID_SetKernel , IDR_VP_PL2_444AVS16_Buf_3_Rot_270 , Kdll_None }, 1268 { RID_SetParserState , Parser_SampleLayer0Done , Kdll_None }, 1269 1270 // Mirror Horizontal 1271 { RID_Op_NewEntry , RULE_DEFAULT , Kdll_None }, 1272 { RID_IsParserState , Parser_SampleLayer0 , Kdll_None }, 1273 { RID_IsSrc0Format , Format_PL2 , Kdll_Or }, 1274 { RID_IsSrc0Format , Format_PL2_UnAligned , Kdll_None }, 1275 { RID_IsSrc0Sampling , Sample_Scaling_AVS , Kdll_None }, 1276 { RID_IsSrc0Rotation , VPHAL_MIRROR_HORIZONTAL , Kdll_None }, 1277 { RID_SetKernel , IDR_VP_PL2_444AVS16_Buf_0 , Kdll_None }, 1278 { RID_SetKernel , IDR_VP_Call_Mirror_H_YUV , Kdll_None }, 1279 { RID_SetKernel , IDR_VP_PL2_444AVS16_Buf_1 , Kdll_None }, 1280 { RID_SetKernel , IDR_VP_Call_Mirror_H_YUV , Kdll_None }, 1281 { RID_SetKernel , IDR_VP_PL2_444AVS16_Buf_2 , Kdll_None }, 1282 { RID_SetKernel , IDR_VP_Call_Mirror_H_YUV , Kdll_None }, 1283 { RID_SetKernel , IDR_VP_PL2_444AVS16_Buf_3 , Kdll_None }, 1284 { RID_SetKernel , IDR_VP_Call_Mirror_H_YUV , Kdll_None }, 1285 { RID_SetParserState , Parser_SampleLayer0Done , Kdll_None }, 1286 1287 // Mirror Vertical 1288 { RID_Op_NewEntry , RULE_DEFAULT , Kdll_None }, 1289 { RID_IsParserState , Parser_SampleLayer0 , Kdll_None }, 1290 { RID_IsSrc0Format , Format_PL2 , Kdll_Or }, 1291 { RID_IsSrc0Format , Format_PL2_UnAligned , Kdll_None }, 1292 { RID_IsSrc0Sampling , Sample_Scaling_AVS , Kdll_None }, 1293 { RID_IsSrc0Rotation , VPHAL_MIRROR_VERTICAL , Kdll_None }, 1294 { RID_SetKernel , IDR_VP_PL2_444AVS16_Buf_0_Rot_180 , Kdll_None }, 1295 { RID_SetKernel , IDR_VP_Call_Mirror_H_YUV , Kdll_None }, 1296 { RID_SetKernel , IDR_VP_PL2_444AVS16_Buf_1_Rot_180 , Kdll_None }, 1297 { RID_SetKernel , IDR_VP_Call_Mirror_H_YUV , Kdll_None }, 1298 { RID_SetKernel , IDR_VP_PL2_444AVS16_Buf_2_Rot_180 , Kdll_None }, 1299 { RID_SetKernel , IDR_VP_Call_Mirror_H_YUV , Kdll_None }, 1300 { RID_SetKernel , IDR_VP_PL2_444AVS16_Buf_3_Rot_180 , Kdll_None }, 1301 { RID_SetKernel , IDR_VP_Call_Mirror_H_YUV , Kdll_None }, 1302 { RID_SetParserState , Parser_SampleLayer0Done , Kdll_None }, 1303 1304 // Rotate 90 Mirror Vertical 1305 { RID_Op_NewEntry , RULE_DEFAULT , Kdll_None }, 1306 { RID_IsParserState , Parser_SampleLayer0 , Kdll_None }, 1307 { RID_IsSrc0Format , Format_PL2 , Kdll_Or }, 1308 { RID_IsSrc0Format , Format_PL2_UnAligned , Kdll_None }, 1309 { RID_IsSrc0Sampling , Sample_Scaling_AVS , Kdll_None }, 1310 { RID_IsSrc0Rotation , VPHAL_ROTATE_90_MIRROR_VERTICAL , Kdll_None }, 1311 { RID_SetKernel , IDR_VP_PL2_444AVS16_Buf_0_Rot_270 , Kdll_None }, 1312 { RID_SetKernel , IDR_VP_Call_Mirror_H_YUV , Kdll_None }, 1313 { RID_SetKernel , IDR_VP_PL2_444AVS16_Buf_1_Rot_270 , Kdll_None }, 1314 { RID_SetKernel , IDR_VP_Call_Mirror_H_YUV , Kdll_None }, 1315 { RID_SetKernel , IDR_VP_PL2_444AVS16_Buf_2_Rot_270 , Kdll_None }, 1316 { RID_SetKernel , IDR_VP_Call_Mirror_H_YUV , Kdll_None }, 1317 { RID_SetKernel , IDR_VP_PL2_444AVS16_Buf_3_Rot_270 , Kdll_None }, 1318 { RID_SetKernel , IDR_VP_Call_Mirror_H_YUV , Kdll_None }, 1319 { RID_SetParserState , Parser_SampleLayer0Done , Kdll_None }, 1320 1321 // Rotate 90 Mirror Horizontal 1322 { RID_Op_NewEntry , RULE_DEFAULT , Kdll_None }, 1323 { RID_IsParserState , Parser_SampleLayer0 , Kdll_None }, 1324 { RID_IsSrc0Format , Format_PL2 , Kdll_Or }, 1325 { RID_IsSrc0Format , Format_PL2_UnAligned , Kdll_None }, 1326 { RID_IsSrc0Sampling , Sample_Scaling_AVS , Kdll_None }, 1327 { RID_IsSrc0Rotation , VPHAL_ROTATE_90_MIRROR_HORIZONTAL , Kdll_None }, 1328 { RID_SetKernel , IDR_VP_PL2_444AVS16_Buf_0_Rot_90 , Kdll_None }, 1329 { RID_SetKernel , IDR_VP_Call_Mirror_H_YUV , Kdll_None }, 1330 { RID_SetKernel , IDR_VP_PL2_444AVS16_Buf_1_Rot_90 , Kdll_None }, 1331 { RID_SetKernel , IDR_VP_Call_Mirror_H_YUV , Kdll_None }, 1332 { RID_SetKernel , IDR_VP_PL2_444AVS16_Buf_2_Rot_90 , Kdll_None }, 1333 { RID_SetKernel , IDR_VP_Call_Mirror_H_YUV , Kdll_None }, 1334 { RID_SetKernel , IDR_VP_PL2_444AVS16_Buf_3_Rot_90 , Kdll_None }, 1335 { RID_SetKernel , IDR_VP_Call_Mirror_H_YUV , Kdll_None }, 1336 { RID_SetParserState , Parser_SampleLayer0Done , Kdll_None }, 1337 1338 // No Rotation 1339 { RID_Op_NewEntry , RULE_DEFAULT , Kdll_None }, 1340 { RID_IsParserState , Parser_SampleLayer0 , Kdll_None }, 1341 { RID_IsSrc0Format , Format_PL2 , Kdll_Or }, 1342 { RID_IsSrc0Format , Format_PL2_UnAligned , Kdll_None }, 1343 { RID_IsSrc0Sampling , Sample_Scaling_AVS , Kdll_None }, 1344 { RID_SetKernel , IDR_VP_PL2_444AVS16_Buf_0 , Kdll_None }, 1345 { RID_SetKernel , IDR_VP_PL2_444AVS16_Buf_1 , Kdll_None }, 1346 { RID_SetKernel , IDR_VP_PL2_444AVS16_Buf_2 , Kdll_None }, 1347 { RID_SetKernel , IDR_VP_PL2_444AVS16_Buf_3 , Kdll_None }, 1348 { RID_SetParserState , Parser_SampleLayer0Done , Kdll_None }, 1349 1350 // AVS Sample (PL3 | PL3_RGB) -> Src0 1351 1352 // Rotate 90 degrees 1353 { RID_Op_NewEntry , RULE_DEFAULT , Kdll_None }, 1354 { RID_IsParserState , Parser_SampleLayer0 , Kdll_None }, 1355 { RID_IsSrc0Format , Format_PL3 , Kdll_Or }, 1356 { RID_IsSrc0Format , Format_PL3_RGB , Kdll_None }, 1357 { RID_IsSrc0Sampling , Sample_Scaling_AVS , Kdll_None }, 1358 { RID_IsSrc0Rotation , VPHAL_ROTATION_90 , Kdll_None }, 1359 { RID_SetKernel , IDR_VP_PL3_444AVS16_Buf_0_Rot_90 , Kdll_None }, 1360 { RID_SetKernel , IDR_VP_PL3_444AVS16_Buf_1_Rot_90 , Kdll_None }, 1361 { RID_SetKernel , IDR_VP_PL3_444AVS16_Buf_2_Rot_90 , Kdll_None }, 1362 { RID_SetKernel , IDR_VP_PL3_444AVS16_Buf_3_Rot_90 , Kdll_None }, 1363 { RID_SetParserState , Parser_SampleLayer0Done , Kdll_None }, 1364 1365 // Rotate 180 degrees 1366 { RID_Op_NewEntry , RULE_DEFAULT , Kdll_None }, 1367 { RID_IsParserState , Parser_SampleLayer0 , Kdll_None }, 1368 { RID_IsSrc0Format , Format_PL3 , Kdll_Or }, 1369 { RID_IsSrc0Format , Format_PL3_RGB , Kdll_None }, 1370 { RID_IsSrc0Sampling , Sample_Scaling_AVS , Kdll_None }, 1371 { RID_IsSrc0Rotation , VPHAL_ROTATION_180 , Kdll_None }, 1372 { RID_SetKernel , IDR_VP_PL3_444AVS16_Buf_0_Rot_180 , Kdll_None }, 1373 { RID_SetKernel , IDR_VP_PL3_444AVS16_Buf_1_Rot_180 , Kdll_None }, 1374 { RID_SetKernel , IDR_VP_PL3_444AVS16_Buf_2_Rot_180 , Kdll_None }, 1375 { RID_SetKernel , IDR_VP_PL3_444AVS16_Buf_3_Rot_180 , Kdll_None }, 1376 { RID_SetParserState , Parser_SampleLayer0Done , Kdll_None }, 1377 1378 // Rotate 270 degrees 1379 { RID_Op_NewEntry , RULE_DEFAULT , Kdll_None }, 1380 { RID_IsParserState , Parser_SampleLayer0 , Kdll_None }, 1381 { RID_IsSrc0Format , Format_PL3 , Kdll_Or }, 1382 { RID_IsSrc0Format , Format_PL3_RGB , Kdll_None }, 1383 { RID_IsSrc0Sampling , Sample_Scaling_AVS , Kdll_None }, 1384 { RID_IsSrc0Rotation , VPHAL_ROTATION_270 , Kdll_None }, 1385 { RID_SetKernel , IDR_VP_PL3_444AVS16_Buf_0_Rot_270 , Kdll_None }, 1386 { RID_SetKernel , IDR_VP_PL3_444AVS16_Buf_1_Rot_270 , Kdll_None }, 1387 { RID_SetKernel , IDR_VP_PL3_444AVS16_Buf_2_Rot_270 , Kdll_None }, 1388 { RID_SetKernel , IDR_VP_PL3_444AVS16_Buf_3_Rot_270 , Kdll_None }, 1389 { RID_SetParserState , Parser_SampleLayer0Done , Kdll_None }, 1390 1391 // Mirror Horizontal 1392 { RID_Op_NewEntry , RULE_DEFAULT , Kdll_None }, 1393 { RID_IsParserState , Parser_SampleLayer0 , Kdll_None }, 1394 { RID_IsSrc0Format , Format_PL3 , Kdll_Or }, 1395 { RID_IsSrc0Format , Format_PL3_RGB , Kdll_None }, 1396 { RID_IsSrc0Sampling , Sample_Scaling_AVS , Kdll_None }, 1397 { RID_IsSrc0Rotation , VPHAL_MIRROR_HORIZONTAL , Kdll_None }, 1398 { RID_SetKernel , IDR_VP_PL3_444AVS16_Buf_0 , Kdll_None }, 1399 { RID_SetKernel , IDR_VP_Call_Mirror_H_YUV , Kdll_None }, 1400 { RID_SetKernel , IDR_VP_PL3_444AVS16_Buf_1 , Kdll_None }, 1401 { RID_SetKernel , IDR_VP_Call_Mirror_H_YUV , Kdll_None }, 1402 { RID_SetKernel , IDR_VP_PL3_444AVS16_Buf_2 , Kdll_None }, 1403 { RID_SetKernel , IDR_VP_Call_Mirror_H_YUV , Kdll_None }, 1404 { RID_SetKernel , IDR_VP_PL3_444AVS16_Buf_3 , Kdll_None }, 1405 { RID_SetKernel , IDR_VP_Call_Mirror_H_YUV , Kdll_None }, 1406 { RID_SetParserState , Parser_SampleLayer0Done , Kdll_None }, 1407 1408 // Mirror Vertical 1409 { RID_Op_NewEntry , RULE_DEFAULT , Kdll_None }, 1410 { RID_IsParserState , Parser_SampleLayer0 , Kdll_None }, 1411 { RID_IsSrc0Format , Format_PL3 , Kdll_Or }, 1412 { RID_IsSrc0Format , Format_PL3_RGB , Kdll_None }, 1413 { RID_IsSrc0Sampling , Sample_Scaling_AVS , Kdll_None }, 1414 { RID_IsSrc0Rotation , VPHAL_MIRROR_VERTICAL , Kdll_None }, 1415 { RID_SetKernel , IDR_VP_PL3_444AVS16_Buf_0_Rot_180 , Kdll_None }, 1416 { RID_SetKernel , IDR_VP_Call_Mirror_H_YUV , Kdll_None }, 1417 { RID_SetKernel , IDR_VP_PL3_444AVS16_Buf_1_Rot_180 , Kdll_None }, 1418 { RID_SetKernel , IDR_VP_Call_Mirror_H_YUV , Kdll_None }, 1419 { RID_SetKernel , IDR_VP_PL3_444AVS16_Buf_2_Rot_180 , Kdll_None }, 1420 { RID_SetKernel , IDR_VP_Call_Mirror_H_YUV , Kdll_None }, 1421 { RID_SetKernel , IDR_VP_PL3_444AVS16_Buf_3_Rot_180 , Kdll_None }, 1422 { RID_SetKernel , IDR_VP_Call_Mirror_H_YUV , Kdll_None }, 1423 { RID_SetParserState , Parser_SampleLayer0Done , Kdll_None }, 1424 1425 // Rotate 90 Mirror Vertical 1426 { RID_Op_NewEntry , RULE_DEFAULT , Kdll_None }, 1427 { RID_IsParserState , Parser_SampleLayer0 , Kdll_None }, 1428 { RID_IsSrc0Format , Format_PL3 , Kdll_Or }, 1429 { RID_IsSrc0Format , Format_PL3_RGB , Kdll_None }, 1430 { RID_IsSrc0Sampling , Sample_Scaling_AVS , Kdll_None }, 1431 { RID_IsSrc0Rotation , VPHAL_ROTATE_90_MIRROR_VERTICAL , Kdll_None }, 1432 { RID_SetKernel , IDR_VP_PL3_444AVS16_Buf_0_Rot_270 , Kdll_None }, 1433 { RID_SetKernel , IDR_VP_Call_Mirror_H_YUV , Kdll_None }, 1434 { RID_SetKernel , IDR_VP_PL3_444AVS16_Buf_1_Rot_270 , Kdll_None }, 1435 { RID_SetKernel , IDR_VP_Call_Mirror_H_YUV , Kdll_None }, 1436 { RID_SetKernel , IDR_VP_PL3_444AVS16_Buf_2_Rot_270 , Kdll_None }, 1437 { RID_SetKernel , IDR_VP_Call_Mirror_H_YUV , Kdll_None }, 1438 { RID_SetKernel , IDR_VP_PL3_444AVS16_Buf_3_Rot_270 , Kdll_None }, 1439 { RID_SetKernel , IDR_VP_Call_Mirror_H_YUV , Kdll_None }, 1440 { RID_SetParserState , Parser_SampleLayer0Done , Kdll_None }, 1441 1442 // Rotate 90 Mirror Horizontal 1443 { RID_Op_NewEntry , RULE_DEFAULT , Kdll_None }, 1444 { RID_IsParserState , Parser_SampleLayer0 , Kdll_None }, 1445 { RID_IsSrc0Format , Format_PL3 , Kdll_Or }, 1446 { RID_IsSrc0Format , Format_PL3_RGB , Kdll_None }, 1447 { RID_IsSrc0Sampling , Sample_Scaling_AVS , Kdll_None }, 1448 { RID_IsSrc0Rotation , VPHAL_ROTATE_90_MIRROR_HORIZONTAL , Kdll_None }, 1449 { RID_SetKernel , IDR_VP_PL3_444AVS16_Buf_0_Rot_90 , Kdll_None }, 1450 { RID_SetKernel , IDR_VP_Call_Mirror_H_YUV , Kdll_None }, 1451 { RID_SetKernel , IDR_VP_PL3_444AVS16_Buf_1_Rot_90 , Kdll_None }, 1452 { RID_SetKernel , IDR_VP_Call_Mirror_H_YUV , Kdll_None }, 1453 { RID_SetKernel , IDR_VP_PL3_444AVS16_Buf_2_Rot_90 , Kdll_None }, 1454 { RID_SetKernel , IDR_VP_Call_Mirror_H_YUV , Kdll_None }, 1455 { RID_SetKernel , IDR_VP_PL3_444AVS16_Buf_3_Rot_90 , Kdll_None }, 1456 { RID_SetKernel , IDR_VP_Call_Mirror_H_YUV , Kdll_None }, 1457 { RID_SetParserState , Parser_SampleLayer0Done , Kdll_None }, 1458 1459 // No Rotation 1460 { RID_Op_NewEntry , RULE_DEFAULT , Kdll_None }, 1461 { RID_IsParserState , Parser_SampleLayer0 , Kdll_None }, 1462 { RID_IsSrc0Format , Format_PL3 , Kdll_Or }, 1463 { RID_IsSrc0Format , Format_PL3_RGB , Kdll_None }, 1464 { RID_IsSrc0Sampling , Sample_Scaling_AVS , Kdll_None }, 1465 { RID_SetKernel , IDR_VP_PL3_444AVS16_Buf_0 , Kdll_None }, 1466 { RID_SetKernel , IDR_VP_PL3_444AVS16_Buf_1 , Kdll_None }, 1467 { RID_SetKernel , IDR_VP_PL3_444AVS16_Buf_2 , Kdll_None }, 1468 { RID_SetKernel , IDR_VP_PL3_444AVS16_Buf_3 , Kdll_None }, 1469 { RID_SetParserState , Parser_SampleLayer0Done , Kdll_None }, 1470 1471 // Sample_Unorm interlaced scaling 1472 // Interlaced Sample RGB -> Src0 1473 // jump to sampleLayer0SelectCSC to decide if CSC needed before Mix 1474 { RID_Op_NewEntry , RULE_DEFAULT , Kdll_None }, 1475 { RID_IsParserState , Parser_SampleLayer0 , Kdll_None }, 1476 { RID_IsSrc0Format , Format_RGB , Kdll_None }, 1477 { RID_IsSrc0Sampling , Sample_iScaling , Kdll_None }, 1478 { RID_SetKernel , IDR_VP_PA_444iScale16_Buf_0 , Kdll_None }, 1479 { RID_SetKernel , IDR_VP_PA_444iScale16_Buf_1 , Kdll_None }, 1480 { RID_SetKernel , IDR_VP_PA_444iScale16_Buf_2 , Kdll_None }, 1481 { RID_SetKernel , IDR_VP_PA_444iScale16_Buf_3 , Kdll_None }, 1482 { RID_SetParserState , Parser_SampleLayer0SelectCSC , Kdll_None }, 1483 1484 // Sample (AYUV | Packed YUV | NV12 | 400P) -> Src0 1485 { RID_Op_NewEntry , RULE_DEFAULT , Kdll_None }, 1486 { RID_IsParserState , Parser_SampleLayer0 , Kdll_None }, 1487 { RID_IsSrc0Format , Format_AYUV , Kdll_Or }, 1488 { RID_IsSrc0Format , Format_PA , Kdll_Or }, 1489 { RID_IsSrc0Format , Format_NV12 , Kdll_Or }, 1490 { RID_IsSrc0Format , Format_400P , Kdll_Or }, 1491 { RID_IsSrc0Format , Format_YV12_Planar , Kdll_None }, 1492 { RID_IsSrc0Sampling , Sample_iScaling , Kdll_None }, 1493 { RID_SetKernel , IDR_VP_PA_444iScale16_Buf_0 , Kdll_None }, 1494 { RID_SetKernel , IDR_VP_PA_444iScale16_Buf_1 , Kdll_None }, 1495 { RID_SetKernel , IDR_VP_PA_444iScale16_Buf_2 , Kdll_None }, 1496 { RID_SetKernel , IDR_VP_PA_444iScale16_Buf_3 , Kdll_None }, 1497 { RID_SetParserState , Parser_SampleLayer0Mix , Kdll_None }, 1498 1499 // Sample PL2(width or height is not a multiple of 4) -> Src0 1500 { RID_Op_NewEntry , RULE_DEFAULT , Kdll_None }, 1501 { RID_IsParserState , Parser_SampleLayer0 , Kdll_None }, 1502 { RID_IsSrc0Format , Format_PL2 , Kdll_Or }, 1503 { RID_IsSrc0Format , Format_PL2_UnAligned , Kdll_None }, 1504 { RID_IsSrc0Sampling , Sample_iScaling , Kdll_None }, 1505 { RID_SetKernel , IDR_VP_PL2_444iScale16_Buf_0 , Kdll_None }, 1506 { RID_SetKernel , IDR_VP_PL2_444iScale16_Buf_1 , Kdll_None }, 1507 { RID_SetKernel , IDR_VP_PL2_444iScale16_Buf_2 , Kdll_None }, 1508 { RID_SetKernel , IDR_VP_PL2_444iScale16_Buf_3 , Kdll_None }, 1509 { RID_SetParserState , Parser_SampleLayer0Mix , Kdll_None }, 1510 1511 // Sample PL3 -> Src0 1512 { RID_Op_NewEntry , RULE_DEFAULT , Kdll_None }, 1513 { RID_IsParserState , Parser_SampleLayer0 , Kdll_None }, 1514 { RID_IsSrc0Format , Format_PL3 , Kdll_None }, 1515 { RID_IsSrc0Sampling , Sample_iScaling , Kdll_None }, 1516 { RID_SetKernel , IDR_VP_PL3_444iScale16_Buf_0 , Kdll_None }, 1517 { RID_SetKernel , IDR_VP_PL3_444iScale16_Buf_1 , Kdll_None }, 1518 { RID_SetKernel , IDR_VP_PL3_444iScale16_Buf_2 , Kdll_None }, 1519 { RID_SetKernel , IDR_VP_PL3_444iScale16_Buf_3 , Kdll_None }, 1520 { RID_SetParserState , Parser_SampleLayer0Mix , Kdll_None }, 1521 1522 // Sample PL3_RGB -> Src0 1523 { RID_Op_NewEntry , RULE_DEFAULT , Kdll_None }, 1524 { RID_IsParserState , Parser_SampleLayer0 , Kdll_None }, 1525 { RID_IsSrc0Format , Format_PL3_RGB , Kdll_None }, 1526 { RID_IsSrc0Sampling , Sample_iScaling , Kdll_None }, 1527 { RID_SetKernel , IDR_VP_PL3_444iScale16_Buf_0 , Kdll_None }, 1528 { RID_SetKernel , IDR_VP_PL3_444iScale16_Buf_1 , Kdll_None }, 1529 { RID_SetKernel , IDR_VP_PL3_444iScale16_Buf_2 , Kdll_None }, 1530 { RID_SetKernel , IDR_VP_PL3_444iScale16_Buf_3 , Kdll_None }, 1531 { RID_SetParserState , Parser_SampleLayer0SelectCSC , Kdll_None }, 1532 1533 // Sample interlaced scaling 1534 // Sample 0.34x RGB -> Src0 1535 { RID_Op_NewEntry , RULE_DEFAULT , Kdll_None }, 1536 { RID_IsParserState , Parser_SampleLayer0 , Kdll_None }, 1537 { RID_IsSrc0Format , Format_RGB , Kdll_None }, 1538 { RID_IsSrc0Sampling , Sample_iScaling_034x , Kdll_None }, 1539 { RID_SetKernel , IDR_VP_PA_444iDScale16_Buf_0 , Kdll_None }, 1540 { RID_SetKernel , IDR_VP_PA_444iDScale16_Buf_1 , Kdll_None }, 1541 { RID_SetKernel , IDR_VP_PA_444iDScale16_Buf_2 , Kdll_None }, 1542 { RID_SetKernel , IDR_VP_PA_444iDScale16_Buf_3 , Kdll_None }, 1543 { RID_SetParserState , Parser_SampleLayer0SelectCSC , Kdll_None }, 1544 1545 // Sample 0.34x (AYUV | PA |400P | PL2 ) -> Src0 1546 { RID_Op_NewEntry , RULE_DEFAULT , Kdll_None }, 1547 { RID_IsParserState , Parser_SampleLayer0 , Kdll_None }, 1548 { RID_IsSrc0Format , Format_AYUV , Kdll_Or }, 1549 { RID_IsSrc0Format , Format_PA , Kdll_Or }, 1550 { RID_IsSrc0Format , Format_400P , Kdll_Or }, 1551 { RID_IsSrc0Format , Format_YV12_Planar , Kdll_Or }, 1552 { RID_IsSrc0Format , Format_NV12 , Kdll_None }, 1553 { RID_IsSrc0Sampling , Sample_iScaling_034x , Kdll_None }, 1554 { RID_SetKernel , IDR_VP_PA_444iDScale16_Buf_0 , Kdll_None }, 1555 { RID_SetKernel , IDR_VP_PA_444iDScale16_Buf_1 , Kdll_None }, 1556 { RID_SetKernel , IDR_VP_PA_444iDScale16_Buf_2 , Kdll_None }, 1557 { RID_SetKernel , IDR_VP_PA_444iDScale16_Buf_3 , Kdll_None }, 1558 { RID_SetParserState , Parser_SampleLayer0Mix , Kdll_None }, 1559 1560 // Sample 0.34x PL2(width or height is not a multiple of 4) -> Src0 1561 { RID_Op_NewEntry , RULE_DEFAULT , Kdll_None }, 1562 { RID_IsParserState , Parser_SampleLayer0 , Kdll_None }, 1563 { RID_IsSrc0Format , Format_PL2 , Kdll_Or }, 1564 { RID_IsSrc0Format , Format_PL2_UnAligned , Kdll_None }, 1565 { RID_IsSrc0Sampling , Sample_iScaling_034x , Kdll_None }, 1566 { RID_SetKernel , IDR_VP_PL2_444iDScale16_Buf_0 , Kdll_None }, 1567 { RID_SetKernel , IDR_VP_PL2_444iDScale16_Buf_1 , Kdll_None }, 1568 { RID_SetKernel , IDR_VP_PL2_444iDScale16_Buf_2 , Kdll_None }, 1569 { RID_SetKernel , IDR_VP_PL2_444iDScale16_Buf_3 , Kdll_None }, 1570 { RID_SetParserState , Parser_SampleLayer0Mix , Kdll_None }, 1571 1572 // Sample 0.34x PL3 -> Src0 1573 { RID_Op_NewEntry , RULE_DEFAULT , Kdll_None }, 1574 { RID_IsParserState , Parser_SampleLayer0 , Kdll_None }, 1575 { RID_IsSrc0Format , Format_PL3 , Kdll_None }, 1576 { RID_IsSrc0Sampling , Sample_iScaling_034x , Kdll_None }, 1577 { RID_SetKernel , IDR_VP_PL3_444iDScale16_Buf_0 , Kdll_None }, 1578 { RID_SetKernel , IDR_VP_PL3_444iDScale16_Buf_1 , Kdll_None }, 1579 { RID_SetKernel , IDR_VP_PL3_444iDScale16_Buf_2 , Kdll_None }, 1580 { RID_SetKernel , IDR_VP_PL3_444iDScale16_Buf_3 , Kdll_None }, 1581 { RID_SetParserState , Parser_SampleLayer0Mix , Kdll_None }, 1582 1583 // Sample 0.34x PL3_RGB -> Src0 1584 { RID_Op_NewEntry , RULE_DEFAULT , Kdll_None }, 1585 { RID_IsParserState , Parser_SampleLayer0 , Kdll_None }, 1586 { RID_IsSrc0Format , Format_PL3_RGB , Kdll_None }, 1587 { RID_IsSrc0Sampling , Sample_iScaling_034x , Kdll_None }, 1588 { RID_SetKernel , IDR_VP_PL3_444iDScale16_Buf_0 , Kdll_None }, 1589 { RID_SetKernel , IDR_VP_PL3_444iDScale16_Buf_1 , Kdll_None }, 1590 { RID_SetKernel , IDR_VP_PL3_444iDScale16_Buf_2 , Kdll_None }, 1591 { RID_SetKernel , IDR_VP_PL3_444iDScale16_Buf_3 , Kdll_None }, 1592 { RID_SetParserState , Parser_SampleLayer0SelectCSC , Kdll_None }, 1593 1594 // Sample AVS ( NV12 | PA | YV12 | YV12_Planar | RGB ) -> Src0 1595 { RID_Op_NewEntry , RULE_DEFAULT , Kdll_None }, 1596 { RID_IsParserState , Parser_SampleLayer0 , Kdll_None }, 1597 { RID_IsSrc0Format , Format_AYUV , Kdll_Or }, 1598 { RID_IsSrc0Format , Format_NV12 , Kdll_Or }, 1599 { RID_IsSrc0Format , Format_PA , Kdll_Or }, 1600 { RID_IsSrc0Format , Format_YV12 , Kdll_Or }, 1601 { RID_IsSrc0Format , Format_YV12_Planar , Kdll_Or }, 1602 { RID_IsSrc0Format , Format_RGB , Kdll_None }, 1603 { RID_IsSrc0Sampling , Sample_iScaling_AVS , Kdll_None }, 1604 { RID_SetKernel , IDR_VP_PA_444iAVS16_Buf_0 , Kdll_None }, 1605 { RID_SetKernel , IDR_VP_PA_444iAVS16_Buf_1 , Kdll_None }, 1606 { RID_SetKernel , IDR_VP_PA_444iAVS16_Buf_2 , Kdll_None }, 1607 { RID_SetKernel , IDR_VP_PA_444iAVS16_Buf_3 , Kdll_None }, 1608 { RID_SetParserState , Parser_SampleLayer0Mix , Kdll_None }, 1609 1610 // Sample AVS PL2 -> Src0 1611 // PL2_444iAVS is not supported, use PL2_444iScale kernel instead 1612 // May have quality difference than interlaced AVS scaling 1613 { RID_Op_NewEntry , RULE_DEFAULT , Kdll_None }, 1614 { RID_IsParserState , Parser_SampleLayer0 , Kdll_None }, 1615 { RID_IsSrc0Format , Format_PL2 , Kdll_Or }, 1616 { RID_IsSrc0Format , Format_PL2_UnAligned , Kdll_None }, 1617 { RID_IsSrc0Sampling , Sample_iScaling_AVS , Kdll_None }, 1618 { RID_SetKernel , IDR_VP_PL2_444iScale16_Buf_0 , Kdll_None }, 1619 { RID_SetKernel , IDR_VP_PL2_444iScale16_Buf_1 , Kdll_None }, 1620 { RID_SetKernel , IDR_VP_PL2_444iScale16_Buf_2 , Kdll_None }, 1621 { RID_SetKernel , IDR_VP_PL2_444iScale16_Buf_3 , Kdll_None }, 1622 { RID_SetParserState , Parser_SampleLayer0Mix , Kdll_None }, 1623 1624 // Sample P010 -> Src0 1625 // use Dscale kernel for P010 format regardless of sampling type 1626 // Rotate 90 degrees 1627 { RID_Op_NewEntry , RULE_DEFAULT , Kdll_None }, 1628 { RID_IsParserState , Parser_SampleLayer0 , Kdll_None }, 1629 { RID_IsSrc0Format , Format_P010 , Kdll_None }, 1630 { RID_IsSrc0Rotation , VPHAL_ROTATION_90 , Kdll_None }, 1631 { RID_SetKernel , IDR_VP_P010_444Dscale16_Buf_0_Rot_90, Kdll_None }, 1632 { RID_SetKernel , IDR_VP_P010_444Dscale16_Buf_1_Rot_90, Kdll_None }, 1633 { RID_SetKernel , IDR_VP_P010_444Dscale16_Buf_2_Rot_90, Kdll_None }, 1634 { RID_SetKernel , IDR_VP_P010_444Dscale16_Buf_3_Rot_90, Kdll_None }, 1635 { RID_SetParserState , Parser_SampleLayer0Done , Kdll_None }, 1636 1637 // Rotate 180 degrees 1638 { RID_Op_NewEntry , RULE_DEFAULT , Kdll_None }, 1639 { RID_IsParserState , Parser_SampleLayer0 , Kdll_None }, 1640 { RID_IsSrc0Format , Format_P010 , Kdll_None }, 1641 { RID_IsSrc0Rotation , VPHAL_ROTATION_180 , Kdll_None }, 1642 { RID_SetKernel , IDR_VP_P010_444Dscale16_Buf_0_Rot_180, Kdll_None }, 1643 { RID_SetKernel , IDR_VP_P010_444Dscale16_Buf_1_Rot_180, Kdll_None }, 1644 { RID_SetKernel , IDR_VP_P010_444Dscale16_Buf_2_Rot_180, Kdll_None }, 1645 { RID_SetKernel , IDR_VP_P010_444Dscale16_Buf_3_Rot_180, Kdll_None }, 1646 { RID_SetParserState , Parser_SampleLayer0Done , Kdll_None }, 1647 1648 // Rotate 270 degrees 1649 { RID_Op_NewEntry , RULE_DEFAULT , Kdll_None }, 1650 { RID_IsParserState , Parser_SampleLayer0 , Kdll_None }, 1651 { RID_IsSrc0Format , Format_P010 , Kdll_None }, 1652 { RID_IsSrc0Rotation , VPHAL_ROTATION_270 , Kdll_None }, 1653 { RID_SetKernel , IDR_VP_P010_444Dscale16_Buf_0_Rot_270, Kdll_None }, 1654 { RID_SetKernel , IDR_VP_P010_444Dscale16_Buf_1_Rot_270, Kdll_None }, 1655 { RID_SetKernel , IDR_VP_P010_444Dscale16_Buf_2_Rot_270, Kdll_None }, 1656 { RID_SetKernel , IDR_VP_P010_444Dscale16_Buf_3_Rot_270, Kdll_None }, 1657 { RID_SetParserState , Parser_SampleLayer0Done , Kdll_None }, 1658 1659 // Mirror Horizontal 1660 { RID_Op_NewEntry , RULE_DEFAULT , Kdll_None }, 1661 { RID_IsParserState , Parser_SampleLayer0 , Kdll_None }, 1662 { RID_IsSrc0Format , Format_P010 , Kdll_None }, 1663 { RID_IsSrc0Rotation , VPHAL_MIRROR_HORIZONTAL , Kdll_None }, 1664 { RID_SetKernel , IDR_VP_P010_444Dscale16_Buf_0, Kdll_None }, 1665 { RID_SetKernel , IDR_VP_Call_Mirror_H_YUV , Kdll_None }, 1666 { RID_SetKernel , IDR_VP_P010_444Dscale16_Buf_1, Kdll_None }, 1667 { RID_SetKernel , IDR_VP_Call_Mirror_H_YUV , Kdll_None }, 1668 { RID_SetKernel , IDR_VP_P010_444Dscale16_Buf_2, Kdll_None }, 1669 { RID_SetKernel , IDR_VP_Call_Mirror_H_YUV , Kdll_None }, 1670 { RID_SetKernel , IDR_VP_P010_444Dscale16_Buf_3, Kdll_None }, 1671 { RID_SetKernel , IDR_VP_Call_Mirror_H_YUV , Kdll_None }, 1672 { RID_SetParserState , Parser_SampleLayer0Done , Kdll_None }, 1673 1674 // Mirror Vertical 1675 { RID_Op_NewEntry , RULE_DEFAULT , Kdll_None }, 1676 { RID_IsParserState , Parser_SampleLayer0 , Kdll_None }, 1677 { RID_IsSrc0Format , Format_P010 , Kdll_None }, 1678 { RID_IsSrc0Rotation , VPHAL_MIRROR_VERTICAL , Kdll_None }, 1679 { RID_SetKernel , IDR_VP_P010_444Dscale16_Buf_0_Rot_180, Kdll_None }, 1680 { RID_SetKernel , IDR_VP_Call_Mirror_H_YUV , Kdll_None }, 1681 { RID_SetKernel , IDR_VP_P010_444Dscale16_Buf_1_Rot_180, Kdll_None }, 1682 { RID_SetKernel , IDR_VP_Call_Mirror_H_YUV , Kdll_None }, 1683 { RID_SetKernel , IDR_VP_P010_444Dscale16_Buf_2_Rot_180, Kdll_None }, 1684 { RID_SetKernel , IDR_VP_Call_Mirror_H_YUV , Kdll_None }, 1685 { RID_SetKernel , IDR_VP_P010_444Dscale16_Buf_3_Rot_180, Kdll_None }, 1686 { RID_SetKernel , IDR_VP_Call_Mirror_H_YUV , Kdll_None }, 1687 { RID_SetParserState , Parser_SampleLayer0Done , Kdll_None }, 1688 1689 // Rotate 90 Mirror Vertical 1690 { RID_Op_NewEntry , RULE_DEFAULT , Kdll_None }, 1691 { RID_IsParserState , Parser_SampleLayer0 , Kdll_None }, 1692 { RID_IsSrc0Format , Format_P010 , Kdll_None }, 1693 { RID_IsSrc0Rotation , VPHAL_ROTATE_90_MIRROR_VERTICAL , Kdll_None }, 1694 { RID_SetKernel , IDR_VP_P010_444Dscale16_Buf_0_Rot_270, Kdll_None }, 1695 { RID_SetKernel , IDR_VP_Call_Mirror_H_YUV , Kdll_None }, 1696 { RID_SetKernel , IDR_VP_P010_444Dscale16_Buf_1_Rot_270, Kdll_None }, 1697 { RID_SetKernel , IDR_VP_Call_Mirror_H_YUV , Kdll_None }, 1698 { RID_SetKernel , IDR_VP_P010_444Dscale16_Buf_2_Rot_270, Kdll_None }, 1699 { RID_SetKernel , IDR_VP_Call_Mirror_H_YUV , Kdll_None }, 1700 { RID_SetKernel , IDR_VP_P010_444Dscale16_Buf_3_Rot_270, Kdll_None }, 1701 { RID_SetKernel , IDR_VP_Call_Mirror_H_YUV , Kdll_None }, 1702 { RID_SetParserState , Parser_SampleLayer0Done , Kdll_None }, 1703 1704 // Rotate 90 Mirror Horizontal 1705 { RID_Op_NewEntry , RULE_DEFAULT , Kdll_None }, 1706 { RID_IsParserState , Parser_SampleLayer0 , Kdll_None }, 1707 { RID_IsSrc0Format , Format_P010 , Kdll_None }, 1708 { RID_IsSrc0Rotation , VPHAL_ROTATE_90_MIRROR_HORIZONTAL , Kdll_None }, 1709 { RID_SetKernel , IDR_VP_P010_444Dscale16_Buf_0_Rot_90, Kdll_None }, 1710 { RID_SetKernel , IDR_VP_Call_Mirror_H_YUV , Kdll_None }, 1711 { RID_SetKernel , IDR_VP_P010_444Dscale16_Buf_1_Rot_90, Kdll_None }, 1712 { RID_SetKernel , IDR_VP_Call_Mirror_H_YUV , Kdll_None }, 1713 { RID_SetKernel , IDR_VP_P010_444Dscale16_Buf_2_Rot_90, Kdll_None }, 1714 { RID_SetKernel , IDR_VP_Call_Mirror_H_YUV , Kdll_None }, 1715 { RID_SetKernel , IDR_VP_P010_444Dscale16_Buf_3_Rot_90, Kdll_None }, 1716 { RID_SetKernel , IDR_VP_Call_Mirror_H_YUV , Kdll_None }, 1717 { RID_SetParserState , Parser_SampleLayer0Done , Kdll_None }, 1718 1719 // No Rotation 1720 { RID_Op_NewEntry , RULE_DEFAULT , Kdll_None }, 1721 { RID_IsParserState , Parser_SampleLayer0 , Kdll_None }, 1722 { RID_IsSrc0Format , Format_P010 , Kdll_None }, 1723 { RID_SetKernel , IDR_VP_P010_444Dscale16_Buf_0, Kdll_None }, 1724 { RID_SetKernel , IDR_VP_P010_444Dscale16_Buf_1, Kdll_None }, 1725 { RID_SetKernel , IDR_VP_P010_444Dscale16_Buf_2, Kdll_None }, 1726 { RID_SetKernel , IDR_VP_P010_444Dscale16_Buf_3, Kdll_None }, 1727 { RID_SetParserState , Parser_SampleLayer0Done , Kdll_None }, 1728 1729 // Select CSC for layer 0 Mix only if Render Target format is NV12 1730 { RID_Op_NewEntry , RULE_DEFAULT , Kdll_None }, 1731 { RID_IsParserState , Parser_SampleLayer0SelectCSC , Kdll_None }, 1732 { RID_IsTargetFormat , Format_NV12 , Kdll_None }, 1733 { RID_SetNextLayer , 2 , Kdll_None }, // increase layer number to target layer 1734 { RID_SetCSCBeforeMix , true , Kdll_None }, 1735 { RID_SetSrc0Coeff , CoeffID_Source , Kdll_None }, 1736 { RID_SetParserState , Parser_SetupCSC0 , Kdll_None }, 1737 1738 // If Render Target is not NV12, simply call Intermix 1739 { RID_Op_NewEntry , RULE_DEFAULT , Kdll_None }, 1740 { RID_IsParserState , Parser_SampleLayer0SelectCSC , Kdll_None }, 1741 { RID_SetParserState , Parser_SampleLayer0Mix , Kdll_None }, 1742 1743 // Intermix the layer 0 1744 1745 // Interlaced scaling, intermix the top and bottom fields 1746 { RID_Op_NewEntry , RULE_DEFAULT , Kdll_None }, 1747 { RID_IsParserState , Parser_SampleLayer0Mix , Kdll_None }, 1748 { RID_IsTargetFormat , Format_NV12 , Kdll_None }, 1749 { RID_IsSrc0Sampling , Sample_iScaling , Kdll_Or }, 1750 { RID_IsSrc0Sampling , Sample_iScaling_AVS , Kdll_Or }, 1751 { RID_IsSrc0Sampling , Sample_iScaling_034x , Kdll_None }, 1752 { RID_SetKernel , IDR_VP_Interlace_420_16_Buf_0 , Kdll_None }, 1753 { RID_SetKernel , IDR_VP_Interlace_420_16_Buf_1 , Kdll_None }, 1754 { RID_SetKernel , IDR_VP_Interlace_420_16_Buf_2 , Kdll_None }, 1755 { RID_SetKernel , IDR_VP_Interlace_420_16_Buf_3 , Kdll_None }, 1756 { RID_SetParserState , Parser_SampleLayer0Done , Kdll_None }, 1757 1758 // Interlaced scaling, intermix the top and bottom fields 1759 { RID_Op_NewEntry , RULE_DEFAULT , Kdll_None }, 1760 { RID_IsParserState , Parser_SampleLayer0Mix , Kdll_None }, 1761 { RID_SetKernel , IDR_VP_Interlace_444_16_Buf_0 , Kdll_None }, 1762 { RID_SetKernel , IDR_VP_Interlace_444_16_Buf_1 , Kdll_None }, 1763 { RID_SetKernel , IDR_VP_Interlace_444_16_Buf_2 , Kdll_None }, 1764 { RID_SetKernel , IDR_VP_Interlace_444_16_Buf_3 , Kdll_None }, 1765 { RID_SetParserState , Parser_SampleLayer0Done , Kdll_None }, 1766 1767 // Sample Layer 0 Done 1768 1769 // Sample Layer 0 Done 1770 1771 // Src0 Sampling is complete -> Luma key + CSC 1772 { RID_Op_NewEntry , RULE_NO_OVERRIDE , Kdll_None }, 1773 { RID_IsParserState , Parser_SampleLayer0Done , Kdll_None }, 1774 { RID_IsSrc0LumaKey , LumaKey_True , Kdll_None }, 1775 { RID_IsSrc0Coeff , CoeffID_Any , Kdll_None }, 1776 { RID_SetKernel , IDR_VP_Compute_Lumakey_Buf0123 , Kdll_None }, 1777 { RID_SetSrc0LumaKey , LumaKey_False , Kdll_None }, 1778 { RID_SetSrc0Sampling , Sample_None , Kdll_None }, 1779 { RID_SetSrc0Format , Format_None , Kdll_None }, 1780 { RID_SetParserState , Parser_SetupCSC0 , Kdll_None }, 1781 1782 // Src0 Sampling is complete -> Luma key + Colorfill 1783 { RID_Op_NewEntry , RULE_NO_OVERRIDE , Kdll_None }, 1784 { RID_IsParserState , Parser_SampleLayer0Done , Kdll_None }, 1785 { RID_IsSrc0LumaKey , LumaKey_True , Kdll_None }, 1786 { RID_IsSrc0ColorFill , ColorFill_True , Kdll_None }, 1787 { RID_SetKernel , IDR_VP_Compute_Lumakey_Buf0123 , Kdll_None }, 1788 { RID_SetSrc0LumaKey , LumaKey_False , Kdll_None }, 1789 { RID_SetSrc0Sampling , Sample_None , Kdll_None }, 1790 { RID_SetSrc0Format , Format_None , Kdll_None }, 1791 { RID_SetParserState , Parser_Colorfill , Kdll_None }, 1792 1793 1794 // Src0 Sampling is complete -> CSC 1795 { RID_Op_NewEntry , RULE_NO_OVERRIDE , Kdll_None }, 1796 { RID_IsParserState , Parser_SampleLayer0Done , Kdll_None }, 1797 { RID_IsSrc0Coeff , CoeffID_Any , Kdll_None }, 1798 { RID_SetSrc0Sampling , Sample_None , Kdll_None }, 1799 { RID_SetSrc0Format , Format_None , Kdll_None }, 1800 { RID_SetParserState , Parser_SetupCSC0 , Kdll_None }, 1801 1802 // Src0 Sampling is complete -> Colorfill 1803 { RID_Op_NewEntry , RULE_NO_OVERRIDE , Kdll_None }, 1804 { RID_IsParserState , Parser_SampleLayer0Done , Kdll_None }, 1805 { RID_IsSrc0ColorFill , ColorFill_True , Kdll_None }, 1806 { RID_SetSrc0Sampling , Sample_None , Kdll_None }, 1807 { RID_SetSrc0Format , Format_None , Kdll_None }, 1808 { RID_SetParserState , Parser_Colorfill , Kdll_None }, 1809 1810 // Src0 Sampling is complete -> no CSC or Colorfill 1811 { RID_Op_NewEntry , RULE_NO_OVERRIDE , Kdll_None }, 1812 { RID_IsParserState , Parser_SampleLayer0Done , Kdll_None }, 1813 { RID_SetSrc0Sampling , Sample_None , Kdll_None }, 1814 { RID_SetSrc0Format , Format_None , Kdll_None }, 1815 { RID_SetParserState , Parser_SampleLayer1 , Kdll_None }, 1816 1817 // SrcBlend + colorfill 1818 { RID_Op_NewEntry , RULE_NO_OVERRIDE , Kdll_None }, 1819 { RID_IsParserState , Parser_Colorfill , Kdll_None }, 1820 { RID_IsSrc0Processing , Process_SBlend , Kdll_None }, 1821 { RID_SetKernel , IDR_VP_Colorfill_444Scale16_SrcBlend , Kdll_None }, 1822 { RID_SetSrc0Processing, Process_None , Kdll_None }, 1823 { RID_SetSrc0ColorFill , ColorFill_False , Kdll_None }, 1824 { RID_SetParserState , Parser_SampleLayer1 , Kdll_None }, 1825 1826 // ConstBlend + colorfill 1827 { RID_Op_NewEntry , RULE_NO_OVERRIDE , Kdll_None }, 1828 { RID_IsParserState , Parser_Colorfill , Kdll_None }, 1829 { RID_IsSrc0Processing , Process_CBlend , Kdll_None }, 1830 { RID_SetKernel , IDR_VP_Colorfill_444Scale16_ConstBlend , Kdll_None }, 1831 { RID_SetSrc0Processing, Process_None , Kdll_None }, 1832 { RID_SetSrc0ColorFill , ColorFill_False , Kdll_None }, 1833 { RID_SetParserState , Parser_SampleLayer1 , Kdll_None }, 1834 1835 // ConstSrcBlend + colorfill 1836 { RID_Op_NewEntry , RULE_NO_OVERRIDE , Kdll_None }, 1837 { RID_IsParserState , Parser_Colorfill , Kdll_None }, 1838 { RID_IsSrc0Processing , Process_CSBlend , Kdll_None }, 1839 { RID_SetKernel , IDR_VP_Colorfill_444Scale16_ConstSrcBlend , Kdll_None }, 1840 { RID_SetSrc0Processing, Process_None , Kdll_None }, 1841 { RID_SetSrc0ColorFill , ColorFill_False , Kdll_None }, 1842 { RID_SetParserState , Parser_SampleLayer1 , Kdll_None }, 1843 1844 // PartBlend + colorfill 1845 { RID_Op_NewEntry , RULE_NO_OVERRIDE , Kdll_None }, 1846 { RID_IsParserState , Parser_Colorfill , Kdll_None }, 1847 { RID_IsSrc0Processing , Process_PBlend , Kdll_None }, 1848 { RID_SetKernel , IDR_VP_Colorfill_444Scale16_PartBlend , Kdll_None }, 1849 { RID_SetSrc0Processing, Process_None , Kdll_None }, 1850 { RID_SetSrc0ColorFill , ColorFill_False , Kdll_None }, 1851 { RID_SetParserState , Parser_SampleLayer1 , Kdll_None }, 1852 1853 // no AVS -> colorfill 1854 { RID_Op_NewEntry , RULE_NO_OVERRIDE , Kdll_None }, 1855 { RID_IsParserState , Parser_Colorfill , Kdll_None }, 1856 { RID_SetKernel , IDR_VP_Colorfill_444Scale16 , Kdll_None }, 1857 { RID_SetSrc0ColorFill , ColorFill_False , Kdll_None }, 1858 { RID_SetParserState , Parser_SampleLayer1 , Kdll_None }, 1859 1860 // Sample Layer 1 1861 1862 // Sampling for layer0 is not complete, go back 1863 { RID_Op_NewEntry , RULE_NO_OVERRIDE , Kdll_None }, 1864 { RID_IsParserState , Parser_SampleLayer1 , Kdll_None }, 1865 { RID_IsSrc0Sampling , Sample_Any , Kdll_None }, 1866 { RID_SetParserState , Parser_SampleLayer0 , Kdll_None }, 1867 1868 // Sampling is complete for both layers, perform CSC 1869 { RID_Op_NewEntry , RULE_NO_OVERRIDE , Kdll_None }, 1870 { RID_IsParserState , Parser_SampleLayer1 , Kdll_None }, 1871 { RID_IsSrc0Sampling , Sample_None , Kdll_None }, 1872 { RID_IsSrc1Sampling , Sample_None , Kdll_None }, 1873 { RID_SetParserState , Parser_SetupCSC1 , Kdll_None }, 1874 1875 // Sample AVS 1876 // Y210 -> Src1 1877 // Rotate 90 degrees 1878 { RID_Op_NewEntry , RULE_DEFAULT , Kdll_None }, 1879 { RID_IsParserState , Parser_SampleLayer1 , Kdll_None }, 1880 { RID_IsSrc1Format , Format_Y210 , Kdll_None }, 1881 { RID_IsSrc1Sampling , Sample_Scaling_AVS , Kdll_None }, 1882 { RID_IsLayerRotation , VPHAL_ROTATION_90 , Kdll_None }, 1883 { RID_SetKernel , IDR_VP_Y210_444_AVS16_Y_Scale16_UV_Buf_4_Rot_90 , Kdll_None }, 1884 { RID_SetKernel , IDR_VP_Y210_444_AVS16_Y_Scale16_UV_Buf_5_Rot_90 , Kdll_None }, 1885 { RID_SetParserState , Parser_SetupCSC1 , Kdll_None }, 1886 1887 // Rotate 180 degrees 1888 { RID_Op_NewEntry , RULE_DEFAULT , Kdll_None }, 1889 { RID_IsParserState , Parser_SampleLayer1 , Kdll_None }, 1890 { RID_IsSrc1Format , Format_Y210 , Kdll_None }, 1891 { RID_IsSrc1Sampling , Sample_Scaling_AVS , Kdll_None }, 1892 { RID_IsLayerRotation , VPHAL_ROTATION_180 , Kdll_None }, 1893 { RID_SetKernel , IDR_VP_Y210_444_AVS16_Y_Scale16_UV_Buf_4_Rot_180 , Kdll_None }, 1894 { RID_SetKernel , IDR_VP_Y210_444_AVS16_Y_Scale16_UV_Buf_5_Rot_180 , Kdll_None }, 1895 { RID_SetParserState , Parser_SetupCSC1 , Kdll_None }, 1896 1897 // Rotate 270 degrees 1898 { RID_Op_NewEntry , RULE_DEFAULT , Kdll_None }, 1899 { RID_IsParserState , Parser_SampleLayer1 , Kdll_None }, 1900 { RID_IsSrc1Format , Format_Y210 , Kdll_None }, 1901 { RID_IsSrc1Sampling , Sample_Scaling_AVS , Kdll_None }, 1902 { RID_IsLayerRotation , VPHAL_ROTATION_270 , Kdll_None }, 1903 { RID_SetKernel , IDR_VP_Y210_444_AVS16_Y_Scale16_UV_Buf_4_Rot_270 , Kdll_None }, 1904 { RID_SetKernel , IDR_VP_Y210_444_AVS16_Y_Scale16_UV_Buf_5_Rot_270 , Kdll_None }, 1905 { RID_SetParserState , Parser_SetupCSC1 , Kdll_None }, 1906 1907 // Mirror Horizontal 1908 { RID_Op_NewEntry , RULE_DEFAULT , Kdll_None }, 1909 { RID_IsParserState , Parser_SampleLayer1 , Kdll_None }, 1910 { RID_IsSrc1Format , Format_Y210 , Kdll_None }, 1911 { RID_IsSrc1Sampling , Sample_Scaling_AVS , Kdll_None }, 1912 { RID_IsLayerRotation , VPHAL_MIRROR_HORIZONTAL , Kdll_None }, 1913 { RID_SetKernel , IDR_VP_Y210_444_AVS16_Y_Scale16_UV_Buf_4 , Kdll_None }, 1914 { RID_SetKernel , IDR_VP_Call_Mirror_H_YUV , Kdll_None }, 1915 { RID_SetKernel , IDR_VP_Y210_444_AVS16_Y_Scale16_UV_Buf_5 , Kdll_None }, 1916 { RID_SetKernel , IDR_VP_Call_Mirror_H_YUV , Kdll_None }, 1917 { RID_SetParserState , Parser_SetupCSC1 , Kdll_None }, 1918 1919 // Mirror Vertical 1920 { RID_Op_NewEntry , RULE_DEFAULT , Kdll_None }, 1921 { RID_IsParserState , Parser_SampleLayer1 , Kdll_None }, 1922 { RID_IsSrc1Format , Format_Y210 , Kdll_None }, 1923 { RID_IsSrc1Sampling , Sample_Scaling_AVS , Kdll_None }, 1924 { RID_IsLayerRotation , VPHAL_MIRROR_VERTICAL , Kdll_None }, 1925 { RID_SetKernel , IDR_VP_Y210_444_AVS16_Y_Scale16_UV_Buf_4_Rot_180 , Kdll_None }, 1926 { RID_SetKernel , IDR_VP_Call_Mirror_H_YUV , Kdll_None }, 1927 { RID_SetKernel , IDR_VP_Y210_444_AVS16_Y_Scale16_UV_Buf_5_Rot_180 , Kdll_None }, 1928 { RID_SetKernel , IDR_VP_Call_Mirror_H_YUV , Kdll_None }, 1929 { RID_SetParserState , Parser_SampleLayer0Done , Kdll_None }, 1930 1931 // Rotate 90 Mirror Vertical 1932 { RID_Op_NewEntry , RULE_DEFAULT , Kdll_None }, 1933 { RID_IsParserState , Parser_SampleLayer1 , Kdll_None }, 1934 { RID_IsSrc1Format , Format_Y210 , Kdll_None }, 1935 { RID_IsSrc1Sampling , Sample_Scaling_AVS , Kdll_None }, 1936 { RID_IsLayerRotation , VPHAL_ROTATE_90_MIRROR_VERTICAL , Kdll_None }, 1937 { RID_SetKernel , IDR_VP_Y210_444_AVS16_Y_Scale16_UV_Buf_4_Rot_270 , Kdll_None }, 1938 { RID_SetKernel , IDR_VP_Call_Mirror_H_YUV , Kdll_None }, 1939 { RID_SetKernel , IDR_VP_Y210_444_AVS16_Y_Scale16_UV_Buf_5_Rot_270 , Kdll_None }, 1940 { RID_SetKernel , IDR_VP_Call_Mirror_H_YUV , Kdll_None }, 1941 { RID_SetParserState , Parser_SetupCSC1 , Kdll_None }, 1942 1943 // Rotate 90 Mirror Horizontal 1944 { RID_Op_NewEntry , RULE_DEFAULT , Kdll_None }, 1945 { RID_IsParserState , Parser_SampleLayer1 , Kdll_None }, 1946 { RID_IsSrc1Format , Format_Y210 , Kdll_None }, 1947 { RID_IsSrc1Sampling , Sample_Scaling_AVS , Kdll_None }, 1948 { RID_IsLayerRotation , VPHAL_ROTATE_90_MIRROR_HORIZONTAL , Kdll_None }, 1949 { RID_SetKernel , IDR_VP_Y210_444_AVS16_Y_Scale16_UV_Buf_4_Rot_90 , Kdll_None }, 1950 { RID_SetKernel , IDR_VP_Call_Mirror_H_YUV , Kdll_None }, 1951 { RID_SetKernel , IDR_VP_Y210_444_AVS16_Y_Scale16_UV_Buf_5_Rot_90 , Kdll_None }, 1952 { RID_SetKernel , IDR_VP_Call_Mirror_H_YUV , Kdll_None }, 1953 { RID_SetParserState , Parser_SetupCSC1 , Kdll_None }, 1954 1955 // No Rotation 1956 { RID_Op_NewEntry , RULE_DEFAULT , Kdll_None }, 1957 { RID_IsParserState , Parser_SampleLayer1 , Kdll_None }, 1958 { RID_IsSrc1Format , Format_Y210 , Kdll_None }, 1959 { RID_IsSrc1Sampling , Sample_Scaling_AVS , Kdll_None }, 1960 { RID_SetKernel , IDR_VP_Y210_444_AVS16_Y_Scale16_UV_Buf_4 , Kdll_None }, 1961 { RID_SetKernel , IDR_VP_Y210_444_AVS16_Y_Scale16_UV_Buf_5 , Kdll_None }, 1962 { RID_SetParserState , Parser_SetupCSC1 , Kdll_None }, 1963 1964 // Sample Y210 -> Src1 1965 // Rotate 90 degrees 1966 { RID_Op_NewEntry , RULE_DEFAULT , Kdll_None }, 1967 { RID_IsParserState , Parser_SampleLayer1 , Kdll_None }, 1968 { RID_IsSrc1Format , Format_Y210 , Kdll_None }, 1969 { RID_IsSrc1Sampling , Sample_Scaling , Kdll_None }, 1970 { RID_IsLayerRotation , VPHAL_ROTATION_90 , Kdll_None }, 1971 { RID_SetKernel , IDR_VP_Y210_444Scale16_Buf_4_Rot_90 , Kdll_None }, 1972 { RID_SetKernel , IDR_VP_Y210_444Scale16_Buf_5_Rot_90 , Kdll_None }, 1973 { RID_SetParserState , Parser_SetupCSC1 , Kdll_None }, 1974 1975 // Rotate 180 degrees 1976 { RID_Op_NewEntry , RULE_DEFAULT , Kdll_None }, 1977 { RID_IsParserState , Parser_SampleLayer1 , Kdll_None }, 1978 { RID_IsSrc1Format , Format_Y210 , Kdll_None }, 1979 { RID_IsSrc1Sampling , Sample_Scaling , Kdll_None }, 1980 { RID_IsLayerRotation , VPHAL_ROTATION_180 , Kdll_None }, 1981 { RID_SetKernel , IDR_VP_Y210_444Scale16_Buf_4_Rot_180 , Kdll_None }, 1982 { RID_SetKernel , IDR_VP_Y210_444Scale16_Buf_5_Rot_180 , Kdll_None }, 1983 { RID_SetParserState , Parser_SetupCSC1 , Kdll_None }, 1984 1985 // Rotate 270 degrees 1986 { RID_Op_NewEntry , RULE_DEFAULT , Kdll_None }, 1987 { RID_IsParserState , Parser_SampleLayer1 , Kdll_None }, 1988 { RID_IsSrc1Format , Format_Y210 , Kdll_None }, 1989 { RID_IsSrc1Sampling , Sample_Scaling , Kdll_None }, 1990 { RID_IsLayerRotation , VPHAL_ROTATION_270 , Kdll_None }, 1991 { RID_SetKernel , IDR_VP_Y210_444Scale16_Buf_4_Rot_270 , Kdll_None }, 1992 { RID_SetKernel , IDR_VP_Y210_444Scale16_Buf_5_Rot_270 , Kdll_None }, 1993 { RID_SetParserState , Parser_SetupCSC1 , Kdll_None }, 1994 1995 // Mirror Horizontal 1996 { RID_Op_NewEntry , RULE_DEFAULT , Kdll_None }, 1997 { RID_IsParserState , Parser_SampleLayer1 , Kdll_None }, 1998 { RID_IsSrc1Format , Format_Y210 , Kdll_None }, 1999 { RID_IsSrc1Sampling , Sample_Scaling , Kdll_None }, 2000 { RID_IsLayerRotation , VPHAL_MIRROR_HORIZONTAL , Kdll_None }, 2001 { RID_SetKernel , IDR_VP_Y210_444Scale16_Buf_4 , Kdll_None }, 2002 { RID_SetKernel , IDR_VP_Call_Mirror_H_YUV , Kdll_None }, 2003 { RID_SetKernel , IDR_VP_Y210_444Scale16_Buf_5 , Kdll_None }, 2004 { RID_SetKernel , IDR_VP_Call_Mirror_H_YUV , Kdll_None }, 2005 { RID_SetParserState , Parser_SetupCSC1 , Kdll_None }, 2006 2007 // Mirror Vertical 2008 { RID_Op_NewEntry , RULE_DEFAULT , Kdll_None }, 2009 { RID_IsParserState , Parser_SampleLayer1 , Kdll_None }, 2010 { RID_IsSrc1Format , Format_Y210 , Kdll_None }, 2011 { RID_IsSrc1Sampling , Sample_Scaling , Kdll_None }, 2012 { RID_IsLayerRotation , VPHAL_MIRROR_VERTICAL , Kdll_None }, 2013 { RID_SetKernel , IDR_VP_Y210_444Scale16_Buf_4_Rot_180 , Kdll_None }, 2014 { RID_SetKernel , IDR_VP_Call_Mirror_H_YUV , Kdll_None }, 2015 { RID_SetKernel , IDR_VP_Y210_444Scale16_Buf_5_Rot_180 , Kdll_None }, 2016 { RID_SetKernel , IDR_VP_Call_Mirror_H_YUV , Kdll_None }, 2017 { RID_SetParserState , Parser_SetupCSC1 , Kdll_None }, 2018 2019 // Rotate 90 Mirror Vertical 2020 { RID_Op_NewEntry , RULE_DEFAULT , Kdll_None }, 2021 { RID_IsParserState , Parser_SampleLayer1 , Kdll_None }, 2022 { RID_IsSrc1Format , Format_Y210 , Kdll_None }, 2023 { RID_IsSrc1Sampling , Sample_Scaling , Kdll_None }, 2024 { RID_IsLayerRotation , VPHAL_ROTATE_90_MIRROR_VERTICAL , Kdll_None }, 2025 { RID_SetKernel , IDR_VP_Y210_444Scale16_Buf_4_Rot_270 , Kdll_None }, 2026 { RID_SetKernel , IDR_VP_Call_Mirror_H_YUV , Kdll_None }, 2027 { RID_SetKernel , IDR_VP_Y210_444Scale16_Buf_5_Rot_270 , Kdll_None }, 2028 { RID_SetKernel , IDR_VP_Call_Mirror_H_YUV , Kdll_None }, 2029 { RID_SetParserState , Parser_SetupCSC1 , Kdll_None }, 2030 2031 // Rotate 90 Mirror Horizontal 2032 { RID_Op_NewEntry , RULE_DEFAULT , Kdll_None }, 2033 { RID_IsParserState , Parser_SampleLayer1 , Kdll_None }, 2034 { RID_IsSrc1Format , Format_Y210 , Kdll_None }, 2035 { RID_IsSrc1Sampling , Sample_Scaling , Kdll_None }, 2036 { RID_IsLayerRotation , VPHAL_ROTATE_90_MIRROR_HORIZONTAL , Kdll_None }, 2037 { RID_SetKernel , IDR_VP_Y210_444Scale16_Buf_4_Rot_90 , Kdll_None }, 2038 { RID_SetKernel , IDR_VP_Call_Mirror_H_YUV , Kdll_None }, 2039 { RID_SetKernel , IDR_VP_Y210_444Scale16_Buf_5_Rot_90 , Kdll_None }, 2040 { RID_SetKernel , IDR_VP_Call_Mirror_H_YUV , Kdll_None }, 2041 { RID_SetParserState , Parser_SetupCSC1 , Kdll_None }, 2042 2043 // No Rotation 2044 { RID_Op_NewEntry , RULE_DEFAULT , Kdll_None }, 2045 { RID_IsParserState , Parser_SampleLayer1 , Kdll_None }, 2046 { RID_IsSrc1Format , Format_Y210 , Kdll_None }, 2047 { RID_IsSrc1Sampling , Sample_Scaling , Kdll_None }, 2048 { RID_SetKernel , IDR_VP_Y210_444Scale16_Buf_4 , Kdll_None }, 2049 { RID_SetKernel , IDR_VP_Y210_444Scale16_Buf_5 , Kdll_None }, 2050 { RID_SetParserState , Parser_SetupCSC1 , Kdll_None }, 2051 2052 // Sample (RGB | AYUV | Packed YUV | YV12 | NV12 | 400P) -> Src1 2053 2054 // Rotate 90 degrees 2055 { RID_Op_NewEntry , RULE_DEFAULT , Kdll_None }, 2056 { RID_IsParserState , Parser_SampleLayer1 , Kdll_None }, 2057 { RID_IsSrc1Format , Format_RGB , Kdll_Or }, 2058 { RID_IsSrc1Format , Format_AYUV , Kdll_Or }, 2059 { RID_IsSrc1Format , Format_PA , Kdll_Or }, 2060 { RID_IsSrc1Format , Format_YV12_Planar , Kdll_Or }, 2061 { RID_IsSrc1Format , Format_NV12 , Kdll_Or }, 2062 { RID_IsSrc1Format , Format_400P , Kdll_None }, 2063 { RID_IsSrc1Sampling , Sample_Scaling , Kdll_None }, 2064 { RID_IsLayerRotation , VPHAL_ROTATION_90 , Kdll_None }, 2065 { RID_SetKernel , IDR_VP_PA_444Scale16_Buf_4_Rot_90 , Kdll_None }, 2066 { RID_SetKernel , IDR_VP_PA_444Scale16_Buf_5_Rot_90 , Kdll_None }, 2067 { RID_SetParserState , Parser_SetupCSC1 , Kdll_None }, 2068 2069 // Rotate 180 degrees 2070 { RID_Op_NewEntry , RULE_DEFAULT , Kdll_None }, 2071 { RID_IsParserState , Parser_SampleLayer1 , Kdll_None }, 2072 { RID_IsSrc1Format , Format_RGB , Kdll_Or }, 2073 { RID_IsSrc1Format , Format_AYUV , Kdll_Or }, 2074 { RID_IsSrc1Format , Format_PA , Kdll_Or }, 2075 { RID_IsSrc1Format , Format_YV12_Planar , Kdll_Or }, 2076 { RID_IsSrc1Format , Format_NV12 , Kdll_Or }, 2077 { RID_IsSrc1Format , Format_400P , Kdll_None }, 2078 { RID_IsSrc1Sampling , Sample_Scaling , Kdll_None }, 2079 { RID_IsLayerRotation , VPHAL_ROTATION_180 , Kdll_None }, 2080 { RID_SetKernel , IDR_VP_PA_444Scale16_Buf_4_Rot_180 , Kdll_None }, 2081 { RID_SetKernel , IDR_VP_PA_444Scale16_Buf_5_Rot_180 , Kdll_None }, 2082 { RID_SetParserState , Parser_SetupCSC1 , Kdll_None }, 2083 2084 // Rotate 270 degrees 2085 { RID_Op_NewEntry , RULE_DEFAULT , Kdll_None }, 2086 { RID_IsParserState , Parser_SampleLayer1 , Kdll_None }, 2087 { RID_IsSrc1Format , Format_RGB , Kdll_Or }, 2088 { RID_IsSrc1Format , Format_AYUV , Kdll_Or }, 2089 { RID_IsSrc1Format , Format_PA , Kdll_Or }, 2090 { RID_IsSrc1Format , Format_YV12_Planar , Kdll_Or }, 2091 { RID_IsSrc1Format , Format_NV12 , Kdll_Or }, 2092 { RID_IsSrc1Format , Format_400P , Kdll_None }, 2093 { RID_IsSrc1Sampling , Sample_Scaling , Kdll_None }, 2094 { RID_IsLayerRotation , VPHAL_ROTATION_270 , Kdll_None }, 2095 { RID_SetKernel , IDR_VP_PA_444Scale16_Buf_4_Rot_270 , Kdll_None }, 2096 { RID_SetKernel , IDR_VP_PA_444Scale16_Buf_5_Rot_270 , Kdll_None }, 2097 { RID_SetParserState , Parser_SetupCSC1 , Kdll_None }, 2098 2099 // Mirror Horizontal 2100 { RID_Op_NewEntry , RULE_DEFAULT , Kdll_None }, 2101 { RID_IsParserState , Parser_SampleLayer1 , Kdll_None }, 2102 { RID_IsSrc1Format , Format_RGB , Kdll_Or }, 2103 { RID_IsSrc1Format , Format_AYUV , Kdll_Or }, 2104 { RID_IsSrc1Format , Format_PA , Kdll_Or }, 2105 { RID_IsSrc1Format , Format_YV12_Planar , Kdll_Or }, 2106 { RID_IsSrc1Format , Format_NV12 , Kdll_Or }, 2107 { RID_IsSrc1Format , Format_400P , Kdll_None }, 2108 { RID_IsSrc1Sampling , Sample_Scaling , Kdll_None }, 2109 { RID_IsLayerRotation , VPHAL_MIRROR_HORIZONTAL , Kdll_None }, 2110 { RID_SetKernel , IDR_VP_PA_444Scale16_Buf_4 , Kdll_None }, 2111 { RID_SetKernel , IDR_VP_Call_Mirror_H_YUVA , Kdll_None }, 2112 { RID_SetKernel , IDR_VP_PA_444Scale16_Buf_5 , Kdll_None }, 2113 { RID_SetKernel , IDR_VP_Call_Mirror_H_YUVA , Kdll_None }, 2114 { RID_SetParserState , Parser_SetupCSC1 , Kdll_None }, 2115 2116 // Mirror Vertical 2117 { RID_Op_NewEntry , RULE_DEFAULT , Kdll_None }, 2118 { RID_IsParserState , Parser_SampleLayer1 , Kdll_None }, 2119 { RID_IsSrc1Format , Format_RGB , Kdll_Or }, 2120 { RID_IsSrc1Format , Format_AYUV , Kdll_Or }, 2121 { RID_IsSrc1Format , Format_PA , Kdll_Or }, 2122 { RID_IsSrc1Format , Format_YV12_Planar , Kdll_Or }, 2123 { RID_IsSrc1Format , Format_NV12 , Kdll_Or }, 2124 { RID_IsSrc1Format , Format_400P , Kdll_None }, 2125 { RID_IsSrc1Sampling , Sample_Scaling , Kdll_None }, 2126 { RID_IsLayerRotation , VPHAL_MIRROR_VERTICAL , Kdll_None }, 2127 { RID_SetKernel , IDR_VP_PA_444Scale16_Buf_4_Rot_180 , Kdll_None }, 2128 { RID_SetKernel , IDR_VP_Call_Mirror_H_YUVA , Kdll_None }, 2129 { RID_SetKernel , IDR_VP_PA_444Scale16_Buf_5_Rot_180 , Kdll_None }, 2130 { RID_SetKernel , IDR_VP_Call_Mirror_H_YUVA , Kdll_None }, 2131 { RID_SetParserState , Parser_SetupCSC1 , Kdll_None }, 2132 2133 // Rotate 90 Mirror Vertical 2134 { RID_Op_NewEntry , RULE_DEFAULT , Kdll_None }, 2135 { RID_IsParserState , Parser_SampleLayer1 , Kdll_None }, 2136 { RID_IsSrc1Format , Format_RGB , Kdll_Or }, 2137 { RID_IsSrc1Format , Format_AYUV , Kdll_Or }, 2138 { RID_IsSrc1Format , Format_PA , Kdll_Or }, 2139 { RID_IsSrc1Format , Format_YV12_Planar , Kdll_Or }, 2140 { RID_IsSrc1Format , Format_NV12 , Kdll_Or }, 2141 { RID_IsSrc1Format , Format_400P , Kdll_None }, 2142 { RID_IsSrc1Sampling , Sample_Scaling , Kdll_None }, 2143 { RID_IsLayerRotation , VPHAL_ROTATE_90_MIRROR_VERTICAL , Kdll_None }, 2144 { RID_SetKernel , IDR_VP_PA_444Scale16_Buf_4_Rot_270 , Kdll_None }, 2145 { RID_SetKernel , IDR_VP_Call_Mirror_H_YUVA , Kdll_None }, 2146 { RID_SetKernel , IDR_VP_PA_444Scale16_Buf_5_Rot_270 , Kdll_None }, 2147 { RID_SetKernel , IDR_VP_Call_Mirror_H_YUVA , Kdll_None }, 2148 { RID_SetParserState , Parser_SetupCSC1 , Kdll_None }, 2149 2150 // Rotate 90 Mirror Horizontal 2151 { RID_Op_NewEntry , RULE_DEFAULT , Kdll_None }, 2152 { RID_IsParserState , Parser_SampleLayer1 , Kdll_None }, 2153 { RID_IsSrc1Format , Format_RGB , Kdll_Or }, 2154 { RID_IsSrc1Format , Format_AYUV , Kdll_Or }, 2155 { RID_IsSrc1Format , Format_PA , Kdll_Or }, 2156 { RID_IsSrc1Format , Format_YV12_Planar , Kdll_Or }, 2157 { RID_IsSrc1Format , Format_NV12 , Kdll_Or }, 2158 { RID_IsSrc1Format , Format_400P , Kdll_None }, 2159 { RID_IsSrc1Sampling , Sample_Scaling , Kdll_None }, 2160 { RID_IsLayerRotation , VPHAL_ROTATE_90_MIRROR_HORIZONTAL , Kdll_None }, 2161 { RID_SetKernel , IDR_VP_PA_444Scale16_Buf_4_Rot_90 , Kdll_None }, 2162 { RID_SetKernel , IDR_VP_Call_Mirror_H_YUVA , Kdll_None }, 2163 { RID_SetKernel , IDR_VP_PA_444Scale16_Buf_5_Rot_90 , Kdll_None }, 2164 { RID_SetKernel , IDR_VP_Call_Mirror_H_YUVA , Kdll_None }, 2165 { RID_SetParserState , Parser_SetupCSC1 , Kdll_None }, 2166 2167 // No Rotation 2168 { RID_Op_NewEntry , RULE_DEFAULT , Kdll_None }, 2169 { RID_IsParserState , Parser_SampleLayer1 , Kdll_None }, 2170 { RID_IsSrc1Format , Format_RGB , Kdll_Or }, 2171 { RID_IsSrc1Format , Format_AYUV , Kdll_Or }, 2172 { RID_IsSrc1Format , Format_PA , Kdll_Or }, 2173 { RID_IsSrc1Format , Format_YV12_Planar , Kdll_Or }, 2174 { RID_IsSrc1Format , Format_NV12 , Kdll_Or }, 2175 { RID_IsSrc1Format , Format_400P , Kdll_Or }, 2176 { RID_IsSrc1Format , Format_YV12_Planar , Kdll_None }, 2177 { RID_IsSrc1Sampling , Sample_Scaling , Kdll_None }, 2178 { RID_SetKernel , IDR_VP_PA_444Scale16_Buf_4 , Kdll_None }, 2179 { RID_SetKernel , IDR_VP_PA_444Scale16_Buf_5 , Kdll_None }, 2180 { RID_SetParserState , Parser_SetupCSC1 , Kdll_None }, 2181 2182 // Sample NV12(width or height is not a multiple of 4) -> Src1 2183 2184 // Rotate 90 degrees 2185 { RID_Op_NewEntry , RULE_DEFAULT , Kdll_None }, 2186 { RID_IsParserState , Parser_SampleLayer1 , Kdll_None }, 2187 { RID_IsSrc1Format , Format_PL2 , Kdll_Or }, 2188 { RID_IsSrc1Format , Format_PL2_UnAligned , Kdll_None }, 2189 { RID_IsSrc1Sampling , Sample_Scaling , Kdll_None }, 2190 { RID_IsLayerRotation , VPHAL_ROTATION_90 , Kdll_None }, 2191 { RID_SetKernel , IDR_VP_PL2_444Scale16_Buf_4_Rot_90 , Kdll_None }, 2192 { RID_SetKernel , IDR_VP_PL2_444Scale16_Buf_5_Rot_90 , Kdll_None }, 2193 { RID_SetParserState , Parser_SetupCSC1 , Kdll_None }, 2194 2195 // Rotate 180 degrees 2196 { RID_Op_NewEntry , RULE_DEFAULT , Kdll_None }, 2197 { RID_IsParserState , Parser_SampleLayer1 , Kdll_None }, 2198 { RID_IsSrc1Format , Format_PL2 , Kdll_Or }, 2199 { RID_IsSrc1Format , Format_PL2_UnAligned , Kdll_None }, 2200 { RID_IsSrc1Sampling , Sample_Scaling , Kdll_None }, 2201 { RID_IsLayerRotation , VPHAL_ROTATION_180 , Kdll_None }, 2202 { RID_SetKernel , IDR_VP_PL2_444Scale16_Buf_4_Rot_180, Kdll_None }, 2203 { RID_SetKernel , IDR_VP_PL2_444Scale16_Buf_5_Rot_180, Kdll_None }, 2204 { RID_SetParserState , Parser_SetupCSC1 , Kdll_None }, 2205 2206 // Rotate 270 degrees 2207 { RID_Op_NewEntry , RULE_DEFAULT , Kdll_None }, 2208 { RID_IsParserState , Parser_SampleLayer1 , Kdll_None }, 2209 { RID_IsSrc1Format , Format_PL2 , Kdll_Or }, 2210 { RID_IsSrc1Format , Format_PL2_UnAligned , Kdll_None }, 2211 { RID_IsSrc1Sampling , Sample_Scaling , Kdll_None }, 2212 { RID_IsLayerRotation , VPHAL_ROTATION_270 , Kdll_None }, 2213 { RID_SetKernel , IDR_VP_PL2_444Scale16_Buf_4_Rot_270, Kdll_None }, 2214 { RID_SetKernel , IDR_VP_PL2_444Scale16_Buf_5_Rot_270, Kdll_None }, 2215 { RID_SetParserState , Parser_SetupCSC1 , Kdll_None }, 2216 2217 // Mirror Horizontal 2218 { RID_Op_NewEntry , RULE_DEFAULT , Kdll_None }, 2219 { RID_IsParserState , Parser_SampleLayer1 , Kdll_None }, 2220 { RID_IsSrc1Format , Format_PL2 , Kdll_Or }, 2221 { RID_IsSrc1Format , Format_PL2_UnAligned , Kdll_None }, 2222 { RID_IsSrc1Sampling , Sample_Scaling , Kdll_None }, 2223 { RID_IsLayerRotation , VPHAL_MIRROR_HORIZONTAL , Kdll_None }, 2224 { RID_SetKernel , IDR_VP_PL2_444Scale16_Buf_4 , Kdll_None }, 2225 { RID_SetKernel , IDR_VP_Call_Mirror_H_YUV , Kdll_None }, 2226 { RID_SetKernel , IDR_VP_PL2_444Scale16_Buf_5 , Kdll_None }, 2227 { RID_SetKernel , IDR_VP_Call_Mirror_H_YUV , Kdll_None }, 2228 { RID_SetParserState , Parser_SetupCSC1 , Kdll_None }, 2229 2230 // Mirror Vertical 2231 { RID_Op_NewEntry , RULE_DEFAULT , Kdll_None }, 2232 { RID_IsParserState , Parser_SampleLayer1 , Kdll_None }, 2233 { RID_IsSrc1Format , Format_PL2 , Kdll_Or }, 2234 { RID_IsSrc1Format , Format_PL2_UnAligned , Kdll_None }, 2235 { RID_IsSrc1Sampling , Sample_Scaling , Kdll_None }, 2236 { RID_IsLayerRotation , VPHAL_MIRROR_VERTICAL , Kdll_None }, 2237 { RID_SetKernel , IDR_VP_PL2_444Scale16_Buf_4_Rot_180, Kdll_None }, 2238 { RID_SetKernel , IDR_VP_Call_Mirror_H_YUV , Kdll_None }, 2239 { RID_SetKernel , IDR_VP_PL2_444Scale16_Buf_5_Rot_180, Kdll_None }, 2240 { RID_SetKernel , IDR_VP_Call_Mirror_H_YUV , Kdll_None }, 2241 { RID_SetParserState , Parser_SetupCSC1 , Kdll_None }, 2242 2243 // Rotate 90 Mirror Vertical 2244 { RID_Op_NewEntry , RULE_DEFAULT , Kdll_None }, 2245 { RID_IsParserState , Parser_SampleLayer1 , Kdll_None }, 2246 { RID_IsSrc1Format , Format_PL2 , Kdll_Or }, 2247 { RID_IsSrc1Format , Format_PL2_UnAligned , Kdll_None }, 2248 { RID_IsSrc1Sampling , Sample_Scaling , Kdll_None }, 2249 { RID_IsLayerRotation , VPHAL_ROTATE_90_MIRROR_VERTICAL , Kdll_None }, 2250 { RID_SetKernel , IDR_VP_PL2_444Scale16_Buf_4_Rot_270, Kdll_None }, 2251 { RID_SetKernel , IDR_VP_Call_Mirror_H_YUV , Kdll_None }, 2252 { RID_SetKernel , IDR_VP_PL2_444Scale16_Buf_5_Rot_270, Kdll_None }, 2253 { RID_SetKernel , IDR_VP_Call_Mirror_H_YUV , Kdll_None }, 2254 { RID_SetParserState , Parser_SetupCSC1 , Kdll_None }, 2255 2256 // Rotate 90 Mirror Horizontal 2257 { RID_Op_NewEntry , RULE_DEFAULT , Kdll_None }, 2258 { RID_IsParserState , Parser_SampleLayer1 , Kdll_None }, 2259 { RID_IsSrc1Format , Format_PL2 , Kdll_Or }, 2260 { RID_IsSrc1Format , Format_PL2_UnAligned , Kdll_None }, 2261 { RID_IsSrc1Sampling , Sample_Scaling , Kdll_None }, 2262 { RID_IsLayerRotation , VPHAL_ROTATE_90_MIRROR_HORIZONTAL , Kdll_None }, 2263 { RID_SetKernel , IDR_VP_PL2_444Scale16_Buf_4_Rot_90 , Kdll_None }, 2264 { RID_SetKernel , IDR_VP_Call_Mirror_H_YUV , Kdll_None }, 2265 { RID_SetKernel , IDR_VP_PL2_444Scale16_Buf_5_Rot_90 , Kdll_None }, 2266 { RID_SetKernel , IDR_VP_Call_Mirror_H_YUV , Kdll_None }, 2267 { RID_SetParserState , Parser_SetupCSC1 , Kdll_None }, 2268 2269 // No Rotation 2270 { RID_Op_NewEntry , RULE_DEFAULT , Kdll_None }, 2271 { RID_IsParserState , Parser_SampleLayer1 , Kdll_None }, 2272 { RID_IsSrc1Format , Format_PL2 , Kdll_Or }, 2273 { RID_IsSrc1Format , Format_PL2_UnAligned , Kdll_None }, 2274 { RID_IsSrc1Sampling , Sample_Scaling , Kdll_None }, 2275 { RID_SetKernel , IDR_VP_PL2_444Scale16_Buf_4 , Kdll_None }, 2276 { RID_SetKernel , IDR_VP_PL2_444Scale16_Buf_5 , Kdll_None }, 2277 { RID_SetParserState , Parser_SetupCSC1 , Kdll_None }, 2278 2279 // Sample (PL3 | PL3_RGB) -> Src1 2280 2281 // Rotate 90 degrees 2282 { RID_Op_NewEntry , RULE_DEFAULT , Kdll_None }, 2283 { RID_IsParserState , Parser_SampleLayer1 , Kdll_None }, 2284 { RID_IsSrc1Format , Format_PL3 , Kdll_Or }, 2285 { RID_IsSrc1Format , Format_PL3_RGB , Kdll_None }, 2286 { RID_IsSrc1Sampling , Sample_Scaling , Kdll_None }, 2287 { RID_IsLayerRotation , VPHAL_ROTATION_90 , Kdll_None }, 2288 { RID_SetKernel , IDR_VP_PL3_444Scale16_Buf_4_Rot_90 , Kdll_None }, 2289 { RID_SetKernel , IDR_VP_PL3_444Scale16_Buf_5_Rot_90 , Kdll_None }, 2290 { RID_SetParserState , Parser_SetupCSC1 , Kdll_None }, 2291 2292 // Rotate 180 degrees 2293 { RID_Op_NewEntry , RULE_DEFAULT , Kdll_None }, 2294 { RID_IsParserState , Parser_SampleLayer1 , Kdll_None }, 2295 { RID_IsSrc1Format , Format_PL3 , Kdll_Or }, 2296 { RID_IsSrc1Format , Format_PL3_RGB , Kdll_None }, 2297 { RID_IsSrc1Sampling , Sample_Scaling , Kdll_None }, 2298 { RID_IsLayerRotation , VPHAL_ROTATION_180 , Kdll_None }, 2299 { RID_SetKernel , IDR_VP_PL3_444Scale16_Buf_4_Rot_180, Kdll_None }, 2300 { RID_SetKernel , IDR_VP_PL3_444Scale16_Buf_5_Rot_180, Kdll_None }, 2301 { RID_SetParserState , Parser_SetupCSC1 , Kdll_None }, 2302 2303 // Rotate 270 degrees 2304 { RID_Op_NewEntry , RULE_DEFAULT , Kdll_None }, 2305 { RID_IsParserState , Parser_SampleLayer1 , Kdll_None }, 2306 { RID_IsSrc1Format , Format_PL3 , Kdll_Or }, 2307 { RID_IsSrc1Format , Format_PL3_RGB , Kdll_None }, 2308 { RID_IsSrc1Sampling , Sample_Scaling , Kdll_None }, 2309 { RID_IsLayerRotation , VPHAL_ROTATION_270 , Kdll_None }, 2310 { RID_SetKernel , IDR_VP_PL3_444Scale16_Buf_4_Rot_270, Kdll_None }, 2311 { RID_SetKernel , IDR_VP_PL3_444Scale16_Buf_5_Rot_270, Kdll_None }, 2312 { RID_SetParserState , Parser_SetupCSC1 , Kdll_None }, 2313 2314 // Mirror Horizontal 2315 { RID_Op_NewEntry , RULE_DEFAULT , Kdll_None }, 2316 { RID_IsParserState , Parser_SampleLayer1 , Kdll_None }, 2317 { RID_IsSrc1Format , Format_PL3 , Kdll_Or }, 2318 { RID_IsSrc1Format , Format_PL3_RGB , Kdll_None }, 2319 { RID_IsSrc1Sampling , Sample_Scaling , Kdll_None }, 2320 { RID_IsLayerRotation , VPHAL_MIRROR_HORIZONTAL , Kdll_None }, 2321 { RID_SetKernel , IDR_VP_PL3_444Scale16_Buf_4 , Kdll_None }, 2322 { RID_SetKernel , IDR_VP_Call_Mirror_H_YUV , Kdll_None }, 2323 { RID_SetKernel , IDR_VP_PL3_444Scale16_Buf_5 , Kdll_None }, 2324 { RID_SetKernel , IDR_VP_Call_Mirror_H_YUV , Kdll_None }, 2325 { RID_SetParserState , Parser_SetupCSC1 , Kdll_None }, 2326 2327 // Mirror Vertical 2328 { RID_Op_NewEntry , RULE_DEFAULT , Kdll_None }, 2329 { RID_IsParserState , Parser_SampleLayer1 , Kdll_None }, 2330 { RID_IsSrc1Format , Format_PL3 , Kdll_Or }, 2331 { RID_IsSrc1Format , Format_PL3_RGB , Kdll_None }, 2332 { RID_IsSrc1Sampling , Sample_Scaling , Kdll_None }, 2333 { RID_IsLayerRotation , VPHAL_MIRROR_VERTICAL , Kdll_None }, 2334 { RID_SetKernel , IDR_VP_PL3_444Scale16_Buf_4_Rot_180, Kdll_None }, 2335 { RID_SetKernel , IDR_VP_Call_Mirror_H_YUV , Kdll_None }, 2336 { RID_SetKernel , IDR_VP_PL3_444Scale16_Buf_5_Rot_180, Kdll_None }, 2337 { RID_SetKernel , IDR_VP_Call_Mirror_H_YUV , Kdll_None }, 2338 { RID_SetParserState , Parser_SetupCSC1 , Kdll_None }, 2339 2340 // Rotate 90 Mirror Vertical 2341 { RID_Op_NewEntry , RULE_DEFAULT , Kdll_None }, 2342 { RID_IsParserState , Parser_SampleLayer1 , Kdll_None }, 2343 { RID_IsSrc1Format , Format_PL3 , Kdll_Or }, 2344 { RID_IsSrc1Format , Format_PL3_RGB , Kdll_None }, 2345 { RID_IsSrc1Sampling , Sample_Scaling , Kdll_None }, 2346 { RID_IsLayerRotation , VPHAL_ROTATE_90_MIRROR_VERTICAL , Kdll_None }, 2347 { RID_SetKernel , IDR_VP_PL3_444Scale16_Buf_4_Rot_270, Kdll_None }, 2348 { RID_SetKernel , IDR_VP_Call_Mirror_H_YUV , Kdll_None }, 2349 { RID_SetKernel , IDR_VP_PL3_444Scale16_Buf_5_Rot_270, Kdll_None }, 2350 { RID_SetKernel , IDR_VP_Call_Mirror_H_YUV , Kdll_None }, 2351 { RID_SetParserState , Parser_SetupCSC1 , Kdll_None }, 2352 2353 // Rotate 90 Mirror Horizonal 2354 { RID_Op_NewEntry , RULE_DEFAULT , Kdll_None }, 2355 { RID_IsParserState , Parser_SampleLayer1 , Kdll_None }, 2356 { RID_IsSrc1Format , Format_PL3 , Kdll_Or }, 2357 { RID_IsSrc1Format , Format_PL3_RGB , Kdll_None }, 2358 { RID_IsSrc1Sampling , Sample_Scaling , Kdll_None }, 2359 { RID_IsLayerRotation , VPHAL_ROTATE_90_MIRROR_HORIZONTAL , Kdll_None }, 2360 { RID_SetKernel , IDR_VP_PL3_444Scale16_Buf_4_Rot_90 , Kdll_None }, 2361 { RID_SetKernel , IDR_VP_Call_Mirror_H_YUV , Kdll_None }, 2362 { RID_SetKernel , IDR_VP_PL3_444Scale16_Buf_5_Rot_90 , Kdll_None }, 2363 { RID_SetKernel , IDR_VP_Call_Mirror_H_YUV , Kdll_None }, 2364 { RID_SetParserState , Parser_SetupCSC1 , Kdll_None }, 2365 2366 // No Rotation 2367 { RID_Op_NewEntry , RULE_DEFAULT , Kdll_None }, 2368 { RID_IsParserState , Parser_SampleLayer1 , Kdll_None }, 2369 { RID_IsSrc1Format , Format_PL3 , Kdll_Or }, 2370 { RID_IsSrc1Format , Format_PL3_RGB , Kdll_None }, 2371 { RID_IsSrc1Sampling , Sample_Scaling , Kdll_None }, 2372 { RID_SetKernel , IDR_VP_PL3_444Scale16_Buf_4 , Kdll_None }, 2373 { RID_SetKernel , IDR_VP_PL3_444Scale16_Buf_5 , Kdll_None }, 2374 { RID_SetParserState , Parser_SetupCSC1 , Kdll_None }, 2375 2376 // Sample AVS 2377 // Y410 -> Src1 2378 // Rotate 90 degrees 2379 { RID_Op_NewEntry , RULE_DEFAULT , Kdll_None }, 2380 { RID_IsParserState , Parser_SampleLayer1 , Kdll_None }, 2381 { RID_IsSrc1Format , Format_Y410 , Kdll_None }, 2382 { RID_IsSrc1Sampling , Sample_Scaling_AVS , Kdll_None }, 2383 { RID_IsLayerRotation , VPHAL_ROTATION_90 , Kdll_None }, 2384 { RID_SetKernel , IDR_VP_Y410_444AVS16_Buf_4_Rot_90, Kdll_None }, 2385 { RID_SetKernel , IDR_VP_Y410_444AVS16_Buf_5_Rot_90, Kdll_None }, 2386 { RID_SetParserState , Parser_SetupCSC1 , Kdll_None }, 2387 2388 // Rotate 180 degrees 2389 { RID_Op_NewEntry , RULE_DEFAULT , Kdll_None }, 2390 { RID_IsParserState , Parser_SampleLayer1 , Kdll_None }, 2391 { RID_IsSrc1Format , Format_Y410 , Kdll_None }, 2392 { RID_IsSrc1Sampling , Sample_Scaling_AVS , Kdll_None }, 2393 { RID_IsLayerRotation , VPHAL_ROTATION_180 , Kdll_None }, 2394 { RID_SetKernel , IDR_VP_Y410_444AVS16_Buf_4_Rot_180, Kdll_None }, 2395 { RID_SetKernel , IDR_VP_Y410_444AVS16_Buf_5_Rot_180, Kdll_None }, 2396 { RID_SetParserState , Parser_SetupCSC1 , Kdll_None }, 2397 2398 // Rotate 270 degrees 2399 { RID_Op_NewEntry , RULE_DEFAULT , Kdll_None }, 2400 { RID_IsParserState , Parser_SampleLayer1 , Kdll_None }, 2401 { RID_IsSrc1Format , Format_Y410 , Kdll_None }, 2402 { RID_IsSrc1Sampling , Sample_Scaling_AVS , Kdll_None }, 2403 { RID_IsLayerRotation , VPHAL_ROTATION_270 , Kdll_None }, 2404 { RID_SetKernel , IDR_VP_Y410_444AVS16_Buf_4_Rot_270, Kdll_None }, 2405 { RID_SetKernel , IDR_VP_Y410_444AVS16_Buf_5_Rot_270, Kdll_None }, 2406 { RID_SetParserState , Parser_SetupCSC1 , Kdll_None }, 2407 2408 // Mirror Horizontal 2409 { RID_Op_NewEntry , RULE_DEFAULT , Kdll_None }, 2410 { RID_IsParserState , Parser_SampleLayer1 , Kdll_None }, 2411 { RID_IsSrc1Format , Format_Y410 , Kdll_None }, 2412 { RID_IsSrc1Sampling , Sample_Scaling_AVS , Kdll_None }, 2413 { RID_IsLayerRotation , VPHAL_MIRROR_HORIZONTAL , Kdll_None }, 2414 { RID_SetKernel , IDR_VP_Y410_444AVS16_Buf_4 , Kdll_None }, 2415 { RID_SetKernel , IDR_VP_Call_Mirror_H_YUV , Kdll_None }, 2416 { RID_SetKernel , IDR_VP_Y410_444AVS16_Buf_5 , Kdll_None }, 2417 { RID_SetKernel , IDR_VP_Call_Mirror_H_YUV , Kdll_None }, 2418 { RID_SetParserState , Parser_SetupCSC1 , Kdll_None }, 2419 2420 // Mirror Vertical 2421 { RID_Op_NewEntry , RULE_DEFAULT , Kdll_None }, 2422 { RID_IsParserState , Parser_SampleLayer1 , Kdll_None }, 2423 { RID_IsSrc1Format , Format_Y410 , Kdll_None }, 2424 { RID_IsSrc1Sampling , Sample_Scaling_AVS , Kdll_None }, 2425 { RID_IsLayerRotation , VPHAL_MIRROR_VERTICAL , Kdll_None }, 2426 { RID_SetKernel , IDR_VP_Y410_444AVS16_Buf_4_Rot_180, Kdll_None }, 2427 { RID_SetKernel , IDR_VP_Call_Mirror_H_YUV , Kdll_None }, 2428 { RID_SetKernel , IDR_VP_Y410_444AVS16_Buf_5_Rot_180, Kdll_None }, 2429 { RID_SetKernel , IDR_VP_Call_Mirror_H_YUV , Kdll_None }, 2430 { RID_SetParserState , Parser_SampleLayer0Done , Kdll_None }, 2431 2432 // Rotate 90 Mirror Vertical 2433 { RID_Op_NewEntry , RULE_DEFAULT , Kdll_None }, 2434 { RID_IsParserState , Parser_SampleLayer1 , Kdll_None }, 2435 { RID_IsSrc1Format , Format_Y410 , Kdll_None }, 2436 { RID_IsSrc1Sampling , Sample_Scaling_AVS , Kdll_None }, 2437 { RID_IsLayerRotation , VPHAL_ROTATE_90_MIRROR_VERTICAL , Kdll_None }, 2438 { RID_SetKernel , IDR_VP_Y410_444AVS16_Buf_4_Rot_270, Kdll_None }, 2439 { RID_SetKernel , IDR_VP_Call_Mirror_H_YUV , Kdll_None }, 2440 { RID_SetKernel , IDR_VP_Y410_444AVS16_Buf_5_Rot_270, Kdll_None }, 2441 { RID_SetKernel , IDR_VP_Call_Mirror_H_YUV , Kdll_None }, 2442 { RID_SetParserState , Parser_SetupCSC1 , Kdll_None }, 2443 2444 // Rotate 90 Mirror Horizontal 2445 { RID_Op_NewEntry , RULE_DEFAULT , Kdll_None }, 2446 { RID_IsParserState , Parser_SampleLayer1 , Kdll_None }, 2447 { RID_IsSrc1Format , Format_Y410 , Kdll_None }, 2448 { RID_IsSrc1Sampling , Sample_Scaling_AVS , Kdll_None }, 2449 { RID_IsLayerRotation , VPHAL_ROTATE_90_MIRROR_HORIZONTAL, Kdll_None }, 2450 { RID_SetKernel , IDR_VP_Y410_444AVS16_Buf_4_Rot_90, Kdll_None }, 2451 { RID_SetKernel , IDR_VP_Call_Mirror_H_YUV , Kdll_None }, 2452 { RID_SetKernel , IDR_VP_Y410_444AVS16_Buf_5_Rot_90, Kdll_None }, 2453 { RID_SetKernel , IDR_VP_Call_Mirror_H_YUV , Kdll_None }, 2454 { RID_SetParserState , Parser_SetupCSC1 , Kdll_None }, 2455 2456 // No Rotation 2457 { RID_Op_NewEntry , RULE_DEFAULT , Kdll_None }, 2458 { RID_IsParserState , Parser_SampleLayer1 , Kdll_None }, 2459 { RID_IsSrc1Format , Format_Y410 , Kdll_None }, 2460 { RID_IsSrc1Sampling , Sample_Scaling_AVS , Kdll_None }, 2461 { RID_SetKernel , IDR_VP_Y410_444AVS16_Buf_4 , Kdll_None }, 2462 { RID_SetKernel , IDR_VP_Y410_444AVS16_Buf_5 , Kdll_None }, 2463 { RID_SetParserState , Parser_SetupCSC1 , Kdll_None }, 2464 2465 // Sample Y410 -> Src1 2466 // Rotate 90 degrees 2467 { RID_Op_NewEntry , RULE_DEFAULT , Kdll_None }, 2468 { RID_IsParserState , Parser_SampleLayer1 , Kdll_None }, 2469 { RID_IsSrc1Format , Format_Y410 , Kdll_None }, 2470 { RID_IsSrc1Sampling , Sample_Scaling_034x , Kdll_None }, 2471 { RID_IsLayerRotation , VPHAL_ROTATION_90 , Kdll_None }, 2472 { RID_SetKernel , IDR_VP_Y410_444DScale16_Buf_4_Rot_90, Kdll_None }, 2473 { RID_SetKernel , IDR_VP_Y410_444DScale16_Buf_5_Rot_90, Kdll_None }, 2474 { RID_SetParserState , Parser_SetupCSC1 , Kdll_None }, 2475 2476 // Rotate 180 degrees 2477 { RID_Op_NewEntry , RULE_DEFAULT , Kdll_None }, 2478 { RID_IsParserState , Parser_SampleLayer1 , Kdll_None }, 2479 { RID_IsSrc1Format , Format_Y410 , Kdll_None }, 2480 { RID_IsSrc1Sampling , Sample_Scaling_034x , Kdll_None }, 2481 { RID_IsLayerRotation , VPHAL_ROTATION_180 , Kdll_None }, 2482 { RID_SetKernel , IDR_VP_Y410_444DScale16_Buf_4_Rot_180, Kdll_None }, 2483 { RID_SetKernel , IDR_VP_Y410_444DScale16_Buf_5_Rot_180, Kdll_None }, 2484 { RID_SetParserState , Parser_SetupCSC1 , Kdll_None }, 2485 2486 // Rotate 270 dgrees 2487 { RID_Op_NewEntry , RULE_DEFAULT , Kdll_None }, 2488 { RID_IsParserState , Parser_SampleLayer1 , Kdll_None }, 2489 { RID_IsSrc1Format , Format_Y410 , Kdll_None }, 2490 { RID_IsSrc1Sampling , Sample_Scaling_034x , Kdll_None }, 2491 { RID_IsLayerRotation , VPHAL_ROTATION_270 , Kdll_None }, 2492 { RID_SetKernel , IDR_VP_Y410_444DScale16_Buf_4_Rot_270, Kdll_None }, 2493 { RID_SetKernel , IDR_VP_Y410_444DScale16_Buf_5_Rot_270, Kdll_None }, 2494 { RID_SetParserState , Parser_SetupCSC1 , Kdll_None }, 2495 2496 // Mirror Horizontal 2497 { RID_Op_NewEntry , RULE_DEFAULT , Kdll_None }, 2498 { RID_IsParserState , Parser_SampleLayer1 , Kdll_None }, 2499 { RID_IsSrc1Format , Format_Y410 , Kdll_None }, 2500 { RID_IsSrc1Sampling , Sample_Scaling_034x , Kdll_None }, 2501 { RID_IsLayerRotation , VPHAL_MIRROR_HORIZONTAL , Kdll_None }, 2502 { RID_SetKernel , IDR_VP_Y410_444DScale16_Buf_4 , Kdll_None }, 2503 { RID_SetKernel , IDR_VP_Call_Mirror_H_YUV , Kdll_None }, 2504 { RID_SetKernel , IDR_VP_Y410_444DScale16_Buf_5 , Kdll_None }, 2505 { RID_SetKernel , IDR_VP_Call_Mirror_H_YUV , Kdll_None }, 2506 { RID_SetParserState , Parser_SetupCSC1 , Kdll_None }, 2507 2508 // Mirror Vertical 2509 { RID_Op_NewEntry , RULE_DEFAULT , Kdll_None }, 2510 { RID_IsParserState , Parser_SampleLayer1 , Kdll_None }, 2511 { RID_IsSrc1Format , Format_Y410 , Kdll_None }, 2512 { RID_IsSrc1Sampling , Sample_Scaling_034x , Kdll_None }, 2513 { RID_IsLayerRotation , VPHAL_MIRROR_VERTICAL , Kdll_None }, 2514 { RID_SetKernel , IDR_VP_Y410_444DScale16_Buf_4_Rot_180, Kdll_None }, 2515 { RID_SetKernel , IDR_VP_Call_Mirror_H_YUV , Kdll_None }, 2516 { RID_SetKernel , IDR_VP_Y410_444DScale16_Buf_5_Rot_180, Kdll_None }, 2517 { RID_SetKernel , IDR_VP_Call_Mirror_H_YUV , Kdll_None }, 2518 { RID_SetParserState , Parser_SetupCSC1 , Kdll_None }, 2519 2520 // Rotate 90 Mirror Vertical 2521 { RID_Op_NewEntry , RULE_DEFAULT , Kdll_None }, 2522 { RID_IsParserState , Parser_SampleLayer1 , Kdll_None }, 2523 { RID_IsSrc1Format , Format_Y410 , Kdll_None }, 2524 { RID_IsSrc1Sampling , Sample_Scaling_034x , Kdll_None }, 2525 { RID_IsLayerRotation , VPHAL_ROTATE_90_MIRROR_VERTICAL , Kdll_None }, 2526 { RID_SetKernel , IDR_VP_Y410_444DScale16_Buf_4_Rot_270, Kdll_None }, 2527 { RID_SetKernel , IDR_VP_Call_Mirror_H_YUV , Kdll_None }, 2528 { RID_SetKernel , IDR_VP_Y410_444DScale16_Buf_5_Rot_270, Kdll_None }, 2529 { RID_SetKernel , IDR_VP_Call_Mirror_H_YUV , Kdll_None }, 2530 { RID_SetParserState , Parser_SetupCSC1 , Kdll_None }, 2531 2532 // Rotate 90 Mirror Horizontal 2533 { RID_Op_NewEntry , RULE_DEFAULT , Kdll_None }, 2534 { RID_IsParserState , Parser_SampleLayer1 , Kdll_None }, 2535 { RID_IsSrc1Format , Format_Y410 , Kdll_None }, 2536 { RID_IsSrc1Sampling , Sample_Scaling_034x , Kdll_None }, 2537 { RID_IsLayerRotation , VPHAL_ROTATE_90_MIRROR_HORIZONTAL , Kdll_None }, 2538 { RID_SetKernel , IDR_VP_Y410_444DScale16_Buf_4_Rot_90, Kdll_None }, 2539 { RID_SetKernel , IDR_VP_Call_Mirror_H_YUV , Kdll_None }, 2540 { RID_SetKernel , IDR_VP_Y410_444DScale16_Buf_5_Rot_90, Kdll_None }, 2541 { RID_SetKernel , IDR_VP_Call_Mirror_H_YUV , Kdll_None }, 2542 { RID_SetParserState , Parser_SetupCSC1 , Kdll_None }, 2543 2544 // No Rotation 2545 { RID_Op_NewEntry , RULE_DEFAULT , Kdll_None }, 2546 { RID_IsParserState , Parser_SampleLayer1 , Kdll_None }, 2547 { RID_IsSrc1Format , Format_Y410 , Kdll_None }, 2548 { RID_IsSrc1Sampling , Sample_Scaling_034x , Kdll_None }, 2549 { RID_SetKernel , IDR_VP_Y410_444DScale16_Buf_4 , Kdll_None }, 2550 { RID_SetKernel , IDR_VP_Y410_444DScale16_Buf_5 , Kdll_None }, 2551 { RID_SetParserState , Parser_SetupCSC1 , Kdll_None }, 2552 2553 // Sample 0.34x -> Src1 2554 { RID_Op_NewEntry , RULE_DEFAULT , Kdll_None }, 2555 { RID_IsParserState , Parser_SampleLayer1 , Kdll_None }, 2556 { RID_IsSrc1Format , Format_RGB , Kdll_Or }, 2557 { RID_IsSrc1Format , Format_AYUV , Kdll_Or }, 2558 { RID_IsSrc1Format , Format_400P , Kdll_Or }, 2559 { RID_IsSrc1Format , Format_PA , Kdll_Or }, 2560 { RID_IsSrc1Format , Format_NV12 , Kdll_None }, 2561 { RID_IsSrc1Sampling , Sample_Scaling_034x , Kdll_None }, 2562 { RID_SetKernel , IDR_VP_PA_444DScale16_Buf_4 , Kdll_None }, 2563 { RID_SetKernel , IDR_VP_PA_444DScale16_Buf_5 , Kdll_None }, 2564 { RID_SetParserState , Parser_SetupCSC1 , Kdll_None }, 2565 2566 // Sample 0.34x PL2(width or height is not a multiple of 4) -> Src1 2567 { RID_Op_NewEntry , RULE_DEFAULT , Kdll_None }, 2568 { RID_IsParserState , Parser_SampleLayer1 , Kdll_None }, 2569 { RID_IsSrc1Format , Format_PL2 , Kdll_Or }, 2570 { RID_IsSrc1Format , Format_PL2_UnAligned , Kdll_None }, 2571 { RID_IsSrc1Sampling , Sample_Scaling_034x , Kdll_None }, 2572 { RID_SetKernel , IDR_VP_PL2_444DScale16_Buf_4 , Kdll_None }, 2573 { RID_SetKernel , IDR_VP_PL2_444DScale16_Buf_5 , Kdll_None }, 2574 { RID_SetParserState , Parser_SetupCSC1 , Kdll_None }, 2575 2576 // Sample 0.34x PL3 -> Src1 2577 { RID_Op_NewEntry , RULE_DEFAULT , Kdll_None }, 2578 { RID_IsParserState , Parser_SampleLayer1 , Kdll_None }, 2579 { RID_IsSrc1Format , Format_PL3 , Kdll_Or }, 2580 { RID_IsSrc1Format , Format_PL3_RGB , Kdll_None }, 2581 { RID_IsSrc1Sampling , Sample_Scaling_034x , Kdll_None }, 2582 { RID_SetKernel , IDR_VP_PL3_444DScale16_Buf_4 , Kdll_None }, 2583 { RID_SetKernel , IDR_VP_PL3_444DScale16_Buf_5 , Kdll_None }, 2584 { RID_SetParserState , Parser_SetupCSC1 , Kdll_None }, 2585 2586 // AVS Sample (RGB | AYUV | Packed YUV | YV12 | NV12 | 400P) -> Src1 2587 2588 // Rotate 90 degrees 2589 { RID_Op_NewEntry , RULE_DEFAULT , Kdll_None }, 2590 { RID_IsParserState , Parser_SampleLayer1 , Kdll_None }, 2591 { RID_IsSrc1Format , Format_RGB , Kdll_Or }, 2592 { RID_IsSrc1Format , Format_AYUV , Kdll_Or }, 2593 { RID_IsSrc1Format , Format_PA , Kdll_Or }, 2594 { RID_IsSrc1Format , Format_YV12_Planar , Kdll_Or }, 2595 { RID_IsSrc1Format , Format_NV12 , Kdll_Or }, 2596 { RID_IsSrc1Format , Format_400P , Kdll_None }, 2597 { RID_IsSrc1Sampling , Sample_Scaling_AVS , Kdll_None }, 2598 { RID_IsLayerRotation , VPHAL_ROTATION_90 , Kdll_None }, 2599 { RID_SetKernel , IDR_VP_PA_444AVS16_Buf_4_Rot_90 , Kdll_None }, 2600 { RID_SetKernel , IDR_VP_PA_444AVS16_Buf_5_Rot_90 , Kdll_None }, 2601 { RID_SetParserState , Parser_SetupCSC1 , Kdll_None }, 2602 2603 // Rotate 180 degrees 2604 { RID_Op_NewEntry , RULE_DEFAULT , Kdll_None }, 2605 { RID_IsParserState , Parser_SampleLayer1 , Kdll_None }, 2606 { RID_IsSrc1Format , Format_RGB , Kdll_Or }, 2607 { RID_IsSrc1Format , Format_AYUV , Kdll_Or }, 2608 { RID_IsSrc1Format , Format_PA , Kdll_Or }, 2609 { RID_IsSrc1Format , Format_YV12_Planar , Kdll_Or }, 2610 { RID_IsSrc1Format , Format_NV12 , Kdll_Or }, 2611 { RID_IsSrc1Format , Format_400P , Kdll_None }, 2612 { RID_IsSrc1Sampling , Sample_Scaling_AVS , Kdll_None }, 2613 { RID_IsLayerRotation , VPHAL_ROTATION_180 , Kdll_None }, 2614 { RID_SetKernel , IDR_VP_PA_444AVS16_Buf_4_Rot_180 , Kdll_None }, 2615 { RID_SetKernel , IDR_VP_PA_444AVS16_Buf_5_Rot_180 , Kdll_None }, 2616 { RID_SetParserState , Parser_SetupCSC1 , Kdll_None }, 2617 2618 // Rotate 270 degrees 2619 { RID_Op_NewEntry , RULE_DEFAULT , Kdll_None }, 2620 { RID_IsParserState , Parser_SampleLayer1 , Kdll_None }, 2621 { RID_IsSrc1Format , Format_RGB , Kdll_Or }, 2622 { RID_IsSrc1Format , Format_AYUV , Kdll_Or }, 2623 { RID_IsSrc1Format , Format_PA , Kdll_Or }, 2624 { RID_IsSrc1Format , Format_YV12_Planar , Kdll_Or }, 2625 { RID_IsSrc1Format , Format_NV12 , Kdll_Or }, 2626 { RID_IsSrc1Format , Format_400P , Kdll_None }, 2627 { RID_IsSrc1Sampling , Sample_Scaling_AVS , Kdll_None }, 2628 { RID_IsLayerRotation , VPHAL_ROTATION_270 , Kdll_None }, 2629 { RID_SetKernel , IDR_VP_PA_444AVS16_Buf_4_Rot_270 , Kdll_None }, 2630 { RID_SetKernel , IDR_VP_PA_444AVS16_Buf_5_Rot_270 , Kdll_None }, 2631 { RID_SetParserState , Parser_SetupCSC1 , Kdll_None }, 2632 2633 // Mirror Horizontal 2634 { RID_Op_NewEntry , RULE_DEFAULT , Kdll_None }, 2635 { RID_IsParserState , Parser_SampleLayer1 , Kdll_None }, 2636 { RID_IsSrc1Format , Format_RGB , Kdll_Or }, 2637 { RID_IsSrc1Format , Format_AYUV , Kdll_Or }, 2638 { RID_IsSrc1Format , Format_PA , Kdll_Or }, 2639 { RID_IsSrc1Format , Format_YV12_Planar , Kdll_Or }, 2640 { RID_IsSrc1Format , Format_NV12 , Kdll_Or }, 2641 { RID_IsSrc1Format , Format_400P , Kdll_None }, 2642 { RID_IsSrc1Sampling , Sample_Scaling_AVS , Kdll_None }, 2643 { RID_IsLayerRotation , VPHAL_MIRROR_HORIZONTAL , Kdll_None }, 2644 { RID_SetKernel , IDR_VP_PA_444AVS16_Buf_4 , Kdll_None }, 2645 { RID_SetKernel , IDR_VP_Call_Mirror_H_YUVA , Kdll_None }, 2646 { RID_SetKernel , IDR_VP_PA_444AVS16_Buf_5 , Kdll_None }, 2647 { RID_SetKernel , IDR_VP_Call_Mirror_H_YUVA , Kdll_None }, 2648 { RID_SetParserState , Parser_SetupCSC1 , Kdll_None }, 2649 2650 // Mirror Vertical 2651 { RID_Op_NewEntry , RULE_DEFAULT , Kdll_None }, 2652 { RID_IsParserState , Parser_SampleLayer1 , Kdll_None }, 2653 { RID_IsSrc1Format , Format_RGB , Kdll_Or }, 2654 { RID_IsSrc1Format , Format_AYUV , Kdll_Or }, 2655 { RID_IsSrc1Format , Format_PA , Kdll_Or }, 2656 { RID_IsSrc1Format , Format_YV12_Planar , Kdll_Or }, 2657 { RID_IsSrc1Format , Format_NV12 , Kdll_Or }, 2658 { RID_IsSrc1Format , Format_400P , Kdll_None }, 2659 { RID_IsSrc1Sampling , Sample_Scaling_AVS , Kdll_None }, 2660 { RID_IsLayerRotation , VPHAL_MIRROR_VERTICAL , Kdll_None }, 2661 { RID_SetKernel , IDR_VP_PA_444AVS16_Buf_4_Rot_180 , Kdll_None }, 2662 { RID_SetKernel , IDR_VP_Call_Mirror_H_YUVA , Kdll_None }, 2663 { RID_SetKernel , IDR_VP_PA_444AVS16_Buf_5_Rot_180 , Kdll_None }, 2664 { RID_SetKernel , IDR_VP_Call_Mirror_H_YUVA , Kdll_None }, 2665 { RID_SetParserState , Parser_SetupCSC1 , Kdll_None }, 2666 2667 // Rotate 90 Mirror Vertical 2668 { RID_Op_NewEntry , RULE_DEFAULT , Kdll_None }, 2669 { RID_IsParserState , Parser_SampleLayer1 , Kdll_None }, 2670 { RID_IsSrc1Format , Format_RGB , Kdll_Or }, 2671 { RID_IsSrc1Format , Format_AYUV , Kdll_Or }, 2672 { RID_IsSrc1Format , Format_PA , Kdll_Or }, 2673 { RID_IsSrc1Format , Format_YV12_Planar , Kdll_Or }, 2674 { RID_IsSrc1Format , Format_NV12 , Kdll_Or }, 2675 { RID_IsSrc1Format , Format_400P , Kdll_None }, 2676 { RID_IsSrc1Sampling , Sample_Scaling_AVS , Kdll_None }, 2677 { RID_IsLayerRotation , VPHAL_ROTATE_90_MIRROR_VERTICAL , Kdll_None }, 2678 { RID_SetKernel , IDR_VP_PA_444AVS16_Buf_4_Rot_270 , Kdll_None }, 2679 { RID_SetKernel , IDR_VP_Call_Mirror_H_YUVA , Kdll_None }, 2680 { RID_SetKernel , IDR_VP_PA_444AVS16_Buf_5_Rot_270 , Kdll_None }, 2681 { RID_SetKernel , IDR_VP_Call_Mirror_H_YUVA , Kdll_None }, 2682 { RID_SetParserState , Parser_SetupCSC1 , Kdll_None }, 2683 2684 // Rotate 90 Mirror Horizontal 2685 { RID_Op_NewEntry , RULE_DEFAULT , Kdll_None }, 2686 { RID_IsParserState , Parser_SampleLayer1 , Kdll_None }, 2687 { RID_IsSrc1Format , Format_RGB , Kdll_Or }, 2688 { RID_IsSrc1Format , Format_AYUV , Kdll_Or }, 2689 { RID_IsSrc1Format , Format_PA , Kdll_Or }, 2690 { RID_IsSrc1Format , Format_YV12_Planar , Kdll_Or }, 2691 { RID_IsSrc1Format , Format_NV12 , Kdll_Or }, 2692 { RID_IsSrc1Format , Format_400P , Kdll_None }, 2693 { RID_IsSrc1Sampling , Sample_Scaling_AVS , Kdll_None }, 2694 { RID_IsLayerRotation , VPHAL_ROTATE_90_MIRROR_HORIZONTAL , Kdll_None }, 2695 { RID_SetKernel , IDR_VP_PA_444AVS16_Buf_4_Rot_90 , Kdll_None }, 2696 { RID_SetKernel , IDR_VP_Call_Mirror_H_YUVA , Kdll_None }, 2697 { RID_SetKernel , IDR_VP_PA_444AVS16_Buf_5_Rot_90 , Kdll_None }, 2698 { RID_SetKernel , IDR_VP_Call_Mirror_H_YUVA , Kdll_None }, 2699 { RID_SetParserState , Parser_SetupCSC1 , Kdll_None }, 2700 2701 // No Rotation 2702 { RID_Op_NewEntry , RULE_DEFAULT , Kdll_None }, 2703 { RID_IsParserState , Parser_SampleLayer1 , Kdll_None }, 2704 { RID_IsSrc1Format , Format_RGB , Kdll_Or }, 2705 { RID_IsSrc1Format , Format_AYUV , Kdll_Or }, 2706 { RID_IsSrc1Format , Format_PA , Kdll_Or }, 2707 { RID_IsSrc1Format , Format_YV12_Planar , Kdll_Or }, 2708 { RID_IsSrc1Format , Format_NV12 , Kdll_Or }, 2709 { RID_IsSrc1Format , Format_400P , Kdll_None }, 2710 { RID_IsSrc1Sampling , Sample_Scaling_AVS , Kdll_None }, 2711 { RID_SetKernel , IDR_VP_PA_444AVS16_Buf_4 , Kdll_None }, 2712 { RID_SetKernel , IDR_VP_PA_444AVS16_Buf_5 , Kdll_None }, 2713 { RID_SetParserState , Parser_SetupCSC1 , Kdll_None }, 2714 2715 // AVS Sample PL2(width or height is not a multiple of 4) -> Src1 2716 2717 // Rotate 90 degrees 2718 { RID_Op_NewEntry , RULE_DEFAULT , Kdll_None }, 2719 { RID_IsParserState , Parser_SampleLayer1 , Kdll_None }, 2720 { RID_IsSrc1Format , Format_PL2 , Kdll_Or }, 2721 { RID_IsSrc1Format , Format_PL2_UnAligned , Kdll_None }, 2722 { RID_IsSrc1Sampling , Sample_Scaling_AVS , Kdll_None }, 2723 { RID_IsLayerRotation , VPHAL_ROTATION_90 , Kdll_None }, 2724 { RID_SetKernel , IDR_VP_PL2_444AVS16_Buf_4_Rot_90 , Kdll_None }, 2725 { RID_SetKernel , IDR_VP_PL2_444AVS16_Buf_5_Rot_90 , Kdll_None }, 2726 { RID_SetParserState , Parser_SetupCSC1 , Kdll_None }, 2727 2728 // Rotate 180 degrees 2729 { RID_Op_NewEntry , RULE_DEFAULT , Kdll_None }, 2730 { RID_IsParserState , Parser_SampleLayer1 , Kdll_None }, 2731 { RID_IsSrc1Format , Format_PL2 , Kdll_Or }, 2732 { RID_IsSrc1Format , Format_PL2_UnAligned , Kdll_None }, 2733 { RID_IsSrc1Sampling , Sample_Scaling_AVS , Kdll_None }, 2734 { RID_IsLayerRotation , VPHAL_ROTATION_180 , Kdll_None }, 2735 { RID_SetKernel , IDR_VP_PL2_444AVS16_Buf_4_Rot_180 , Kdll_None }, 2736 { RID_SetKernel , IDR_VP_PL2_444AVS16_Buf_5_Rot_180 , Kdll_None }, 2737 { RID_SetParserState , Parser_SetupCSC1 , Kdll_None }, 2738 2739 // Rotate 270 degrees 2740 { RID_Op_NewEntry , RULE_DEFAULT , Kdll_None }, 2741 { RID_IsParserState , Parser_SampleLayer1 , Kdll_None }, 2742 { RID_IsSrc1Format , Format_PL2 , Kdll_Or }, 2743 { RID_IsSrc1Format , Format_PL2_UnAligned , Kdll_None }, 2744 { RID_IsSrc1Sampling , Sample_Scaling_AVS , Kdll_None }, 2745 { RID_IsLayerRotation , VPHAL_ROTATION_270 , Kdll_None }, 2746 { RID_SetKernel , IDR_VP_PL2_444AVS16_Buf_4_Rot_270 , Kdll_None }, 2747 { RID_SetKernel , IDR_VP_PL2_444AVS16_Buf_5_Rot_270 , Kdll_None }, 2748 { RID_SetParserState , Parser_SetupCSC1 , Kdll_None }, 2749 2750 // Mirror Horizontal 2751 { RID_Op_NewEntry , RULE_DEFAULT , Kdll_None }, 2752 { RID_IsParserState , Parser_SampleLayer1 , Kdll_None }, 2753 { RID_IsSrc1Format , Format_PL2 , Kdll_Or }, 2754 { RID_IsSrc1Format , Format_PL2_UnAligned , Kdll_None }, 2755 { RID_IsSrc1Sampling , Sample_Scaling_AVS , Kdll_None }, 2756 { RID_IsLayerRotation , VPHAL_MIRROR_HORIZONTAL , Kdll_None }, 2757 { RID_SetKernel , IDR_VP_PL2_444AVS16_Buf_4 , Kdll_None }, 2758 { RID_SetKernel , IDR_VP_Call_Mirror_H_YUV , Kdll_None }, 2759 { RID_SetKernel , IDR_VP_PL2_444AVS16_Buf_5 , Kdll_None }, 2760 { RID_SetKernel , IDR_VP_Call_Mirror_H_YUV , Kdll_None }, 2761 { RID_SetParserState , Parser_SetupCSC1 , Kdll_None }, 2762 2763 // Mirror Vertical 2764 { RID_Op_NewEntry , RULE_DEFAULT , Kdll_None }, 2765 { RID_IsParserState , Parser_SampleLayer1 , Kdll_None }, 2766 { RID_IsSrc1Format , Format_PL2 , Kdll_Or }, 2767 { RID_IsSrc1Format , Format_PL2_UnAligned , Kdll_None }, 2768 { RID_IsSrc1Sampling , Sample_Scaling_AVS , Kdll_None }, 2769 { RID_IsLayerRotation , VPHAL_MIRROR_VERTICAL , Kdll_None }, 2770 { RID_SetKernel , IDR_VP_PL2_444AVS16_Buf_4_Rot_180 , Kdll_None }, 2771 { RID_SetKernel , IDR_VP_Call_Mirror_H_YUV , Kdll_None }, 2772 { RID_SetKernel , IDR_VP_PL2_444AVS16_Buf_5_Rot_180 , Kdll_None }, 2773 { RID_SetKernel , IDR_VP_Call_Mirror_H_YUV , Kdll_None }, 2774 { RID_SetParserState , Parser_SetupCSC1 , Kdll_None }, 2775 2776 // Rotate 90 Mirror Vertical 2777 { RID_Op_NewEntry , RULE_DEFAULT , Kdll_None }, 2778 { RID_IsParserState , Parser_SampleLayer1 , Kdll_None }, 2779 { RID_IsSrc1Format , Format_PL2 , Kdll_Or }, 2780 { RID_IsSrc1Format , Format_PL2_UnAligned , Kdll_None }, 2781 { RID_IsSrc1Sampling , Sample_Scaling_AVS , Kdll_None }, 2782 { RID_IsLayerRotation , VPHAL_ROTATE_90_MIRROR_VERTICAL , Kdll_None }, 2783 { RID_SetKernel , IDR_VP_PL2_444AVS16_Buf_4_Rot_270 , Kdll_None }, 2784 { RID_SetKernel , IDR_VP_Call_Mirror_H_YUV , Kdll_None }, 2785 { RID_SetKernel , IDR_VP_PL2_444AVS16_Buf_5_Rot_270 , Kdll_None }, 2786 { RID_SetKernel , IDR_VP_Call_Mirror_H_YUV , Kdll_None }, 2787 { RID_SetParserState , Parser_SetupCSC1 , Kdll_None }, 2788 2789 // Rotate 90 Mirror Horizontal 2790 { RID_Op_NewEntry , RULE_DEFAULT , Kdll_None }, 2791 { RID_IsParserState , Parser_SampleLayer1 , Kdll_None }, 2792 { RID_IsSrc1Format , Format_PL2 , Kdll_Or }, 2793 { RID_IsSrc1Format , Format_PL2_UnAligned , Kdll_None }, 2794 { RID_IsSrc1Sampling , Sample_Scaling_AVS , Kdll_None }, 2795 { RID_IsLayerRotation , VPHAL_ROTATE_90_MIRROR_HORIZONTAL , Kdll_None }, 2796 { RID_SetKernel , IDR_VP_PL2_444AVS16_Buf_4_Rot_90 , Kdll_None }, 2797 { RID_SetKernel , IDR_VP_Call_Mirror_H_YUV , Kdll_None }, 2798 { RID_SetKernel , IDR_VP_PL2_444AVS16_Buf_5_Rot_90 , Kdll_None }, 2799 { RID_SetKernel , IDR_VP_Call_Mirror_H_YUV , Kdll_None }, 2800 { RID_SetParserState , Parser_SetupCSC1 , Kdll_None }, 2801 2802 // No Rotation 2803 { RID_Op_NewEntry , RULE_DEFAULT , Kdll_None }, 2804 { RID_IsParserState , Parser_SampleLayer1 , Kdll_None }, 2805 { RID_IsSrc1Format , Format_PL2 , Kdll_Or }, 2806 { RID_IsSrc1Format , Format_PL2_UnAligned , Kdll_None }, 2807 { RID_IsSrc1Sampling , Sample_Scaling_AVS , Kdll_None }, 2808 { RID_SetKernel , IDR_VP_PL2_444AVS16_Buf_4 , Kdll_None }, 2809 { RID_SetKernel , IDR_VP_PL2_444AVS16_Buf_5 , Kdll_None }, 2810 { RID_SetParserState , Parser_SetupCSC1 , Kdll_None }, 2811 2812 // AVS Sample (PL3 | PL3_RGB) -> Src1 2813 2814 // Rotate 90 degrees 2815 { RID_Op_NewEntry , RULE_DEFAULT , Kdll_None }, 2816 { RID_IsParserState , Parser_SampleLayer1 , Kdll_None }, 2817 { RID_IsSrc1Format , Format_PL3 , Kdll_Or }, 2818 { RID_IsSrc1Format , Format_PL3_RGB , Kdll_None }, 2819 { RID_IsSrc1Sampling , Sample_Scaling_AVS , Kdll_None }, 2820 { RID_IsLayerRotation , VPHAL_ROTATION_90 , Kdll_None }, 2821 { RID_SetKernel , IDR_VP_PL3_444AVS16_Buf_4_Rot_90 , Kdll_None }, 2822 { RID_SetKernel , IDR_VP_PL3_444AVS16_Buf_5_Rot_90 , Kdll_None }, 2823 { RID_SetParserState , Parser_SetupCSC1 , Kdll_None }, 2824 2825 // Rotate 180 degrees 2826 { RID_Op_NewEntry , RULE_DEFAULT , Kdll_None }, 2827 { RID_IsParserState , Parser_SampleLayer1 , Kdll_None }, 2828 { RID_IsSrc1Format , Format_PL3 , Kdll_Or }, 2829 { RID_IsSrc1Format , Format_PL3_RGB , Kdll_None }, 2830 { RID_IsSrc1Sampling , Sample_Scaling_AVS , Kdll_None }, 2831 { RID_IsLayerRotation , VPHAL_ROTATION_180 , Kdll_None }, 2832 { RID_SetKernel , IDR_VP_PL3_444AVS16_Buf_4_Rot_180 , Kdll_None }, 2833 { RID_SetKernel , IDR_VP_PL3_444AVS16_Buf_5_Rot_180 , Kdll_None }, 2834 { RID_SetParserState , Parser_SetupCSC1 , Kdll_None }, 2835 2836 // Rotate 270 degrees 2837 { RID_Op_NewEntry , RULE_DEFAULT , Kdll_None }, 2838 { RID_IsParserState , Parser_SampleLayer1 , Kdll_None }, 2839 { RID_IsSrc1Format , Format_PL3 , Kdll_Or }, 2840 { RID_IsSrc1Format , Format_PL3_RGB , Kdll_None }, 2841 { RID_IsSrc1Sampling , Sample_Scaling_AVS , Kdll_None }, 2842 { RID_IsLayerRotation , VPHAL_ROTATION_270 , Kdll_None }, 2843 { RID_SetKernel , IDR_VP_PL3_444AVS16_Buf_4_Rot_270 , Kdll_None }, 2844 { RID_SetKernel , IDR_VP_PL3_444AVS16_Buf_5_Rot_270 , Kdll_None }, 2845 { RID_SetParserState , Parser_SetupCSC1 , Kdll_None }, 2846 2847 // Mirror Horizontal 2848 { RID_Op_NewEntry , RULE_DEFAULT , Kdll_None }, 2849 { RID_IsParserState , Parser_SampleLayer1 , Kdll_None }, 2850 { RID_IsSrc1Format , Format_PL3 , Kdll_Or }, 2851 { RID_IsSrc1Format , Format_PL3_RGB , Kdll_None }, 2852 { RID_IsSrc1Sampling , Sample_Scaling_AVS , Kdll_None }, 2853 { RID_IsLayerRotation , VPHAL_MIRROR_HORIZONTAL , Kdll_None }, 2854 { RID_SetKernel , IDR_VP_PL3_444AVS16_Buf_4 , Kdll_None }, 2855 { RID_SetKernel , IDR_VP_Call_Mirror_H_YUV , Kdll_None }, 2856 { RID_SetKernel , IDR_VP_PL3_444AVS16_Buf_5 , Kdll_None }, 2857 { RID_SetKernel , IDR_VP_Call_Mirror_H_YUV , Kdll_None }, 2858 { RID_SetParserState , Parser_SetupCSC1 , Kdll_None }, 2859 2860 // Mirror Vertical 2861 { RID_Op_NewEntry , RULE_DEFAULT , Kdll_None }, 2862 { RID_IsParserState , Parser_SampleLayer1 , Kdll_None }, 2863 { RID_IsSrc1Format , Format_PL3 , Kdll_Or }, 2864 { RID_IsSrc1Format , Format_PL3_RGB , Kdll_None }, 2865 { RID_IsSrc1Sampling , Sample_Scaling_AVS , Kdll_None }, 2866 { RID_IsLayerRotation , VPHAL_MIRROR_VERTICAL , Kdll_None }, 2867 { RID_SetKernel , IDR_VP_PL3_444AVS16_Buf_4_Rot_180 , Kdll_None }, 2868 { RID_SetKernel , IDR_VP_Call_Mirror_H_YUV , Kdll_None }, 2869 { RID_SetKernel , IDR_VP_PL3_444AVS16_Buf_5_Rot_180 , Kdll_None }, 2870 { RID_SetKernel , IDR_VP_Call_Mirror_H_YUV , Kdll_None }, 2871 { RID_SetParserState , Parser_SetupCSC1 , Kdll_None }, 2872 2873 // Rotate 90 Mirror Vertical 2874 { RID_Op_NewEntry , RULE_DEFAULT , Kdll_None }, 2875 { RID_IsParserState , Parser_SampleLayer1 , Kdll_None }, 2876 { RID_IsSrc1Format , Format_PL3 , Kdll_Or }, 2877 { RID_IsSrc1Format , Format_PL3_RGB , Kdll_None }, 2878 { RID_IsSrc1Sampling , Sample_Scaling_AVS , Kdll_None }, 2879 { RID_IsLayerRotation , VPHAL_ROTATE_90_MIRROR_VERTICAL , Kdll_None }, 2880 { RID_SetKernel , IDR_VP_PL3_444AVS16_Buf_4_Rot_270 , Kdll_None }, 2881 { RID_SetKernel , IDR_VP_Call_Mirror_H_YUV , Kdll_None }, 2882 { RID_SetKernel , IDR_VP_PL3_444AVS16_Buf_5_Rot_270 , Kdll_None }, 2883 { RID_SetKernel , IDR_VP_Call_Mirror_H_YUV , Kdll_None }, 2884 { RID_SetParserState , Parser_SetupCSC1 , Kdll_None }, 2885 2886 // Rotate 90 Mirror Horizontal 2887 { RID_Op_NewEntry , RULE_DEFAULT , Kdll_None }, 2888 { RID_IsParserState , Parser_SampleLayer1 , Kdll_None }, 2889 { RID_IsSrc1Format , Format_PL3 , Kdll_Or }, 2890 { RID_IsSrc1Format , Format_PL3_RGB , Kdll_None }, 2891 { RID_IsSrc1Sampling , Sample_Scaling_AVS , Kdll_None }, 2892 { RID_IsLayerRotation , VPHAL_ROTATE_90_MIRROR_HORIZONTAL , Kdll_None }, 2893 { RID_SetKernel , IDR_VP_PL3_444AVS16_Buf_4_Rot_90 , Kdll_None }, 2894 { RID_SetKernel , IDR_VP_Call_Mirror_H_YUV , Kdll_None }, 2895 { RID_SetKernel , IDR_VP_PL3_444AVS16_Buf_5_Rot_90 , Kdll_None }, 2896 { RID_SetKernel , IDR_VP_Call_Mirror_H_YUV , Kdll_None }, 2897 { RID_SetParserState , Parser_SetupCSC1 , Kdll_None }, 2898 2899 // No Rotation 2900 { RID_Op_NewEntry , RULE_DEFAULT , Kdll_None }, 2901 { RID_IsParserState , Parser_SampleLayer1 , Kdll_None }, 2902 { RID_IsSrc1Format , Format_PL3 , Kdll_Or }, 2903 { RID_IsSrc1Format , Format_PL3_RGB , Kdll_None }, 2904 { RID_IsSrc1Sampling , Sample_Scaling_AVS , Kdll_None }, 2905 { RID_SetKernel , IDR_VP_PL3_444AVS16_Buf_4 , Kdll_None }, 2906 { RID_SetKernel , IDR_VP_PL3_444AVS16_Buf_5 , Kdll_None }, 2907 { RID_SetParserState , Parser_SetupCSC1 , Kdll_None }, 2908 2909 // Setup CSC coefficients for layer 0 2910 2911 // CSC not present for Render Target 2912 { RID_Op_NewEntry , RULE_NO_OVERRIDE , Kdll_None }, 2913 { RID_IsParserState , Parser_SetupCSC0 , Kdll_None }, 2914 { RID_IsLayerID , Layer_RenderTarget , Kdll_None }, 2915 { RID_IsSrc0Coeff , CoeffID_None , Kdll_None }, 2916 { RID_SetParserState , Parser_WriteOutput , Kdll_None }, 2917 2918 // Coeff 0 (CSC+PA), Set Curbe CSC Coefficients 2919 { RID_Op_NewEntry , RULE_NO_OVERRIDE , Kdll_None }, 2920 { RID_IsParserState , Parser_SetupCSC0 , Kdll_None }, 2921 { RID_IsSrc0Coeff , CoeffID_0 , Kdll_None }, 2922 { RID_IsSetCoeffMode , SetCSCCoeffMethod_Curbe , Kdll_None }, 2923 { RID_SetKernel , IDR_VP_Set_CURBE_CSC_Coeff , Kdll_None }, 2924 { RID_SetParserState , Parser_ExecuteCSC0 , Kdll_None }, 2925 2926 // Coeff 0 (CSC+PA), Set Patch CSC Coefficients 2927 { RID_Op_NewEntry , RULE_NO_OVERRIDE , Kdll_None }, 2928 { RID_IsParserState , Parser_SetupCSC0 , Kdll_None }, 2929 { RID_IsSrc0Coeff , CoeffID_0 , Kdll_None }, 2930 { RID_IsSetCoeffMode , SetCSCCoeffMethod_Patch , Kdll_None }, 2931 { RID_SetKernel , IDR_VP_Set_Patched_CSC_Coeff , Kdll_None }, 2932 { RID_SetPatchData , PatchKind_CSC_Coeff_Src0 , Kdll_None }, // Patch data source is CSC coeff for Src0 2933 { RID_SetPatch , 6 , Kdll_None }, // 6 patches : Count (8), Src (8), Dest (16) 2934 { (Kdll_RuleID) 0x000c , 0x0400 , Kdll_None }, // 04 00 000c 2935 { (Kdll_RuleID) 0x001c , 0x0404 , Kdll_None }, // 04 04 001c 2936 { (Kdll_RuleID) 0x002c , 0x0408 , Kdll_None }, // 04 08 002c 2937 { (Kdll_RuleID) 0x003c , 0x040C , Kdll_None }, // 04 0C 003c 2938 { (Kdll_RuleID) 0x004c , 0x0410 , Kdll_None }, // 04 10 004c 2939 { (Kdll_RuleID) 0x005c , 0x0414 , Kdll_None }, // 04 14 005c 2940 { RID_SetParserState , Parser_ExecuteCSC0 , Kdll_None }, 2941 2942 // Other Matrices ( cannot include PA) 2943 { RID_Op_NewEntry , RULE_NO_OVERRIDE , Kdll_None }, 2944 { RID_IsParserState , Parser_SetupCSC0 , Kdll_None }, 2945 { RID_IsSrc0Coeff , CoeffID_Any , Kdll_None }, 2946 { RID_SetKernel , IDR_VP_Set_Patched_CSC_Coeff , Kdll_None }, 2947 { RID_SetPatchData , PatchKind_CSC_Coeff_Src0 , Kdll_None }, // Patch data source is CSC coeff for Src0 2948 { RID_SetPatch , 6 , Kdll_None }, // 6 patches : Count (8), Src (8), Dest (16) 2949 { (Kdll_RuleID) 0x000c , 0x0400 , Kdll_None }, // 04 00 000c 2950 { (Kdll_RuleID) 0x001c , 0x0404 , Kdll_None }, // 04 04 001c 2951 { (Kdll_RuleID) 0x002c , 0x0408 , Kdll_None }, // 04 08 002c 2952 { (Kdll_RuleID) 0x003c , 0x040C , Kdll_None }, // 04 0C 003c 2953 { (Kdll_RuleID) 0x004c , 0x0410 , Kdll_None }, // 04 10 004c 2954 { (Kdll_RuleID) 0x005c , 0x0414 , Kdll_None }, // 04 14 005c 2955 { RID_SetParserState , Parser_ExecuteCSC0 , Kdll_None }, 2956 2957 // Setup CSC coefficients for layer 1 2958 2959 // No color space conversion for any layer 2960 { RID_Op_NewEntry , RULE_NO_OVERRIDE , Kdll_None }, 2961 { RID_IsParserState , Parser_SetupCSC1 , Kdll_None }, 2962 { RID_IsSrc0Coeff , CoeffID_None , Kdll_None }, 2963 { RID_IsSrc1Coeff , CoeffID_None , Kdll_None }, 2964 { RID_SetParserState , Parser_Lumakey , Kdll_None }, 2965 2966 // Quadrant 2,3 - CSC coefficients already set 2967 { RID_Op_NewEntry , RULE_NO_OVERRIDE , Kdll_None }, 2968 { RID_IsParserState , Parser_SetupCSC1 , Kdll_None }, 2969 { RID_IsQuadrant , 2 , Kdll_None }, 2970 { RID_SetParserState , Parser_Lumakey , Kdll_None }, 2971 2972 // Coeff 0 (CSC+PA), Set Curbe CSC Coefficients 2973 { RID_Op_NewEntry , RULE_NO_OVERRIDE , Kdll_None }, 2974 { RID_IsParserState , Parser_SetupCSC1 , Kdll_None }, 2975 { RID_IsSrc1Coeff , CoeffID_0 , Kdll_None }, 2976 { RID_IsSetCoeffMode , SetCSCCoeffMethod_Curbe , Kdll_None }, 2977 { RID_SetKernel , IDR_VP_Set_CURBE_CSC_Coeff , Kdll_None }, 2978 { RID_SetParserState , Parser_Lumakey , Kdll_None }, 2979 2980 // Coeff 0 (CSC+PA), Set Patch CSC Coefficients 2981 { RID_Op_NewEntry , RULE_NO_OVERRIDE , Kdll_None }, 2982 { RID_IsParserState , Parser_SetupCSC1 , Kdll_None }, 2983 { RID_IsSrc0Coeff , CoeffID_0 , Kdll_None }, 2984 { RID_IsSetCoeffMode , SetCSCCoeffMethod_Patch , Kdll_None }, 2985 { RID_SetKernel , IDR_VP_Set_Patched_CSC_Coeff , Kdll_None }, 2986 { RID_SetPatchData , PatchKind_CSC_Coeff_Src1 , Kdll_None }, // Patch data source is CSC coeff for Src0 2987 { RID_SetPatch , 6 , Kdll_None }, // 6 patches : Count (8), Src (8), Dest (16) 2988 { (Kdll_RuleID) 0x000c , 0x0400 , Kdll_None }, // 04 00 000c 2989 { (Kdll_RuleID) 0x001c , 0x0404 , Kdll_None }, // 04 04 001c 2990 { (Kdll_RuleID) 0x002c , 0x0408 , Kdll_None }, // 04 08 002c 2991 { (Kdll_RuleID) 0x003c , 0x040C , Kdll_None }, // 04 0C 003c 2992 { (Kdll_RuleID) 0x004c , 0x0410 , Kdll_None }, // 04 10 004c 2993 { (Kdll_RuleID) 0x005c , 0x0414 , Kdll_None }, // 04 14 005c 2994 { RID_SetParserState , Parser_Lumakey , Kdll_None }, 2995 2996 // Other Matrices (cannot include PA) 2997 { RID_Op_NewEntry , RULE_NO_OVERRIDE , Kdll_None }, 2998 { RID_IsParserState , Parser_SetupCSC1 , Kdll_None }, 2999 { RID_IsSrc1Coeff , CoeffID_Any , Kdll_None }, 3000 { RID_SetKernel , IDR_VP_Set_Patched_CSC_Coeff , Kdll_None }, 3001 { RID_SetPatchData , PatchKind_CSC_Coeff_Src1 , Kdll_None }, // Patch data source is CSC coeff for Src1 3002 { RID_SetPatch , 6 , Kdll_None }, // 6 patches : Count (8), Src (8), Dest (16) 3003 { (Kdll_RuleID) 0x000c , 0x0400 , Kdll_None }, // 04 00 000c 3004 { (Kdll_RuleID) 0x001c , 0x0404 , Kdll_None }, // 04 04 001c 3005 { (Kdll_RuleID) 0x002c , 0x0408 , Kdll_None }, // 04 08 002c 3006 { (Kdll_RuleID) 0x003c , 0x040C , Kdll_None }, // 04 0C 003c 3007 { (Kdll_RuleID) 0x004c , 0x0410 , Kdll_None }, // 04 10 004c 3008 { (Kdll_RuleID) 0x005c , 0x0414 , Kdll_None }, // 04 14 005c 3009 { RID_SetParserState , Parser_Lumakey , Kdll_None }, 3010 3011 // Lumakey 3012 // lumakey and CSC not needed for current layer. 3013 { RID_Op_NewEntry , RULE_NO_OVERRIDE , Kdll_None }, 3014 { RID_IsParserState , Parser_Lumakey , Kdll_None }, 3015 { RID_IsSrc1Coeff , CoeffID_None , Kdll_None }, 3016 { RID_IsSrc1LumaKey , LumaKey_False , Kdll_None }, 3017 { RID_SetParserState , Parser_ProcessLayer , Kdll_None }, 3018 3019 // lumakey not needed, CSC needed 3020 { RID_Op_NewEntry , RULE_NO_OVERRIDE , Kdll_None }, 3021 { RID_IsParserState , Parser_Lumakey , Kdll_None }, 3022 { RID_IsSrc1LumaKey , LumaKey_False , Kdll_None }, 3023 { RID_IsSrc1Coeff , CoeffID_Any , Kdll_None }, 3024 { RID_SetParserState , Parser_ExecuteCSC1 , Kdll_None }, 3025 3026 // lumakey and CSC - both needed 3027 { RID_Op_NewEntry , RULE_NO_OVERRIDE , Kdll_None }, 3028 { RID_IsParserState , Parser_Lumakey , Kdll_None }, 3029 { RID_IsQuadrant , 0 , Kdll_None }, 3030 { RID_IsSrc1LumaKey , LumaKey_True , Kdll_None }, 3031 { RID_IsSrc1Coeff , CoeffID_Any , Kdll_None }, 3032 { RID_SetKernel , IDR_VP_Set_Buf0_Buf4 , Kdll_None }, 3033 { RID_SetKernel , IDR_VP_Compute_Lumakey , Kdll_None }, 3034 { RID_SetKernel , IDR_VP_Set_Buf1_Buf5 , Kdll_None }, 3035 { RID_SetKernel , IDR_VP_Compute_Lumakey , Kdll_None }, 3036 { RID_SetParserState , Parser_ExecuteCSC1 , Kdll_None }, 3037 3038 { RID_Op_NewEntry , RULE_NO_OVERRIDE , Kdll_None }, 3039 { RID_IsParserState , Parser_Lumakey , Kdll_None }, 3040 { RID_IsQuadrant , 2 , Kdll_None }, 3041 { RID_IsSrc1LumaKey , LumaKey_True , Kdll_None }, 3042 { RID_IsSrc1Coeff , CoeffID_Any , Kdll_None }, 3043 { RID_SetKernel , IDR_VP_Set_Buf2_Buf4 , Kdll_None }, 3044 { RID_SetKernel , IDR_VP_Compute_Lumakey , Kdll_None }, 3045 { RID_SetKernel , IDR_VP_Set_Buf3_Buf5 , Kdll_None }, 3046 { RID_SetKernel , IDR_VP_Compute_Lumakey , Kdll_None }, 3047 { RID_SetParserState , Parser_ExecuteCSC1 , Kdll_None }, 3048 3049 // Lumakey needed, CSC not needed 3050 { RID_Op_NewEntry , RULE_NO_OVERRIDE , Kdll_None }, 3051 { RID_IsParserState , Parser_Lumakey , Kdll_None }, 3052 { RID_IsQuadrant , 0 , Kdll_None }, 3053 { RID_IsSrc1LumaKey , LumaKey_True , Kdll_None }, 3054 { RID_IsSrc1Coeff , CoeffID_None , Kdll_None }, 3055 { RID_SetKernel , IDR_VP_Set_Buf0_Buf4 , Kdll_None }, 3056 { RID_SetKernel , IDR_VP_Compute_Lumakey , Kdll_None }, 3057 { RID_SetKernel , IDR_VP_Set_Buf1_Buf5 , Kdll_None }, 3058 { RID_SetKernel , IDR_VP_Compute_Lumakey , Kdll_None }, 3059 { RID_SetParserState , Parser_ProcessLayer , Kdll_None }, 3060 3061 { RID_Op_NewEntry , RULE_NO_OVERRIDE , Kdll_None }, 3062 { RID_IsParserState , Parser_Lumakey , Kdll_None }, 3063 { RID_IsQuadrant , 2 , Kdll_None }, 3064 { RID_IsSrc1LumaKey , LumaKey_True , Kdll_None }, 3065 { RID_IsSrc1Coeff , CoeffID_None , Kdll_None }, 3066 { RID_SetKernel , IDR_VP_Set_Buf2_Buf4 , Kdll_None }, 3067 { RID_SetKernel , IDR_VP_Compute_Lumakey , Kdll_None }, 3068 { RID_SetKernel , IDR_VP_Set_Buf3_Buf5 , Kdll_None }, 3069 { RID_SetKernel , IDR_VP_Compute_Lumakey , Kdll_None }, 3070 { RID_SetParserState , Parser_ProcessLayer , Kdll_None }, 3071 3072 // Perform CSC operation for layer 0 3073 // Src0 -> any to RGB, if Src0 is pre-multiplied content use CSC_Premultiplied 3074 { RID_Op_NewEntry , RULE_DEFAULT , Kdll_None }, 3075 { RID_IsParserState , Parser_ExecuteCSC0 , Kdll_None }, 3076 { RID_IsSrc0Processing , Process_PBlend , Kdll_None }, 3077 { RID_SetKernel , IDR_VP_Set_CSC_Src_Buf0 , Kdll_None }, 3078 { RID_SetKernel , IDR_VP_Call_CSC_Premultiplied , Kdll_None }, 3079 { RID_SetKernel , IDR_VP_Set_CSC_Src_Buf1 , Kdll_None }, 3080 { RID_SetKernel , IDR_VP_Call_CSC_Premultiplied , Kdll_None }, 3081 { RID_SetKernel , IDR_VP_Set_CSC_Src_Buf2 , Kdll_None }, 3082 { RID_SetKernel , IDR_VP_Call_CSC_Premultiplied , Kdll_None }, 3083 { RID_SetKernel , IDR_VP_Set_CSC_Src_Buf3 , Kdll_None }, 3084 { RID_SetKernel , IDR_VP_Call_CSC_Premultiplied , Kdll_None }, 3085 { RID_SetParserState , Parser_ExecuteCSC0Done , Kdll_None }, 3086 3087 { RID_Op_NewEntry , RULE_DEFAULT , Kdll_None }, 3088 { RID_IsParserState , Parser_ExecuteCSC0 , Kdll_None }, 3089 { RID_SetKernel , IDR_VP_Set_CSC_Src_Buf0 , Kdll_None }, 3090 { RID_SetKernel , IDR_VP_Call_CSC , Kdll_None }, 3091 { RID_SetKernel , IDR_VP_Set_CSC_Src_Buf1 , Kdll_None }, 3092 { RID_SetKernel , IDR_VP_Call_CSC , Kdll_None }, 3093 { RID_SetKernel , IDR_VP_Set_CSC_Src_Buf2 , Kdll_None }, 3094 { RID_SetKernel , IDR_VP_Call_CSC , Kdll_None }, 3095 { RID_SetKernel , IDR_VP_Set_CSC_Src_Buf3 , Kdll_None }, 3096 { RID_SetKernel , IDR_VP_Call_CSC , Kdll_None }, 3097 { RID_SetParserState , Parser_ExecuteCSC0Done , Kdll_None }, 3098 3099 // CSC0 is complete 3100 3101 // Check whether go back to intermix layer 0 3102 // Please not change the order of these two rules 3103 { RID_Op_NewEntry , RULE_NO_OVERRIDE , Kdll_None }, 3104 { RID_IsParserState , Parser_ExecuteCSC0Done , Kdll_None }, 3105 { RID_IsSrc0Sampling , Sample_iScaling , Kdll_None }, 3106 { RID_SetSrc0Coeff , CoeffID_None , Kdll_None }, 3107 { RID_SetNextLayer , -2 , Kdll_None }, // jump back to main layer 3108 { RID_SetParserState , Parser_SampleLayer0Mix , Kdll_None }, 3109 3110 { RID_Op_NewEntry , RULE_NO_OVERRIDE , Kdll_None }, 3111 { RID_IsParserState , Parser_ExecuteCSC0Done , Kdll_None }, 3112 { RID_IsSrc0ColorFill , ColorFill_True , Kdll_None }, 3113 { RID_SetSrc0Coeff , CoeffID_None , Kdll_None }, 3114 { RID_SetParserState , Parser_Colorfill , Kdll_None }, 3115 3116 { RID_Op_NewEntry , RULE_NO_OVERRIDE , Kdll_None }, 3117 { RID_IsParserState , Parser_ExecuteCSC0Done , Kdll_None }, 3118 { RID_SetSrc0Coeff , CoeffID_None , Kdll_None }, 3119 { RID_SetParserState , Parser_SampleLayer1 , Kdll_None }, 3120 3121 3122 // Perform CSC operation for layer 1 3123 3124 // Src1 -> YUV to RGB, if Src1 is pre-multiplied content use CSC_Premultiplied 3125 { RID_Op_NewEntry , RULE_DEFAULT , Kdll_None }, 3126 { RID_IsParserState , Parser_ExecuteCSC1 , Kdll_None }, 3127 { RID_IsSrc1Processing , Process_PBlend , Kdll_None }, 3128 { RID_SetKernel , IDR_VP_Set_CSC_Src_Buf4 , Kdll_None }, 3129 { RID_SetKernel , IDR_VP_Call_CSC_Premultiplied , Kdll_None }, 3130 { RID_SetKernel , IDR_VP_Set_CSC_Src_Buf5 , Kdll_None }, 3131 { RID_SetKernel , IDR_VP_Call_CSC_Premultiplied , Kdll_None }, 3132 { RID_SetParserState , Parser_ExecuteCSC1Done , Kdll_None }, 3133 3134 // Src1 -> YUV to RGB 3135 { RID_Op_NewEntry , RULE_DEFAULT , Kdll_None }, 3136 { RID_IsParserState , Parser_ExecuteCSC1 , Kdll_None }, 3137 { RID_SetKernel , IDR_VP_Set_CSC_Src_Buf4 , Kdll_None }, 3138 { RID_SetKernel , IDR_VP_Call_CSC , Kdll_None }, 3139 { RID_SetKernel , IDR_VP_Set_CSC_Src_Buf5 , Kdll_None }, 3140 { RID_SetKernel , IDR_VP_Call_CSC , Kdll_None }, 3141 { RID_SetParserState , Parser_ExecuteCSC1Done , Kdll_None }, 3142 3143 // Layer 1 CSC is complete - prepare operation 3144 // Quadrants 0,1 CSC complete 3145 { RID_Op_NewEntry , RULE_NO_OVERRIDE , Kdll_None }, 3146 { RID_IsParserState , Parser_ExecuteCSC1Done , Kdll_None }, 3147 { RID_IsQuadrant , 0 , Kdll_None }, 3148 { RID_SetParserState , Parser_ProcessLayer , Kdll_None }, 3149 3150 // Quadrants 2,3 CSC complete 3151 { RID_Op_NewEntry , RULE_NO_OVERRIDE , Kdll_None }, 3152 { RID_IsParserState , Parser_ExecuteCSC1Done , Kdll_None }, 3153 { RID_IsQuadrant , 2 , Kdll_None }, 3154 { RID_SetSrc1Coeff , CoeffID_None , Kdll_None }, 3155 { RID_SetParserState , Parser_ProcessLayer , Kdll_None }, 3156 3157 // Process layer 3158 3159 // Render target layer -> write output and finish 3160 { RID_Op_NewEntry , RULE_NO_OVERRIDE , Kdll_None }, 3161 { RID_IsParserState , Parser_ProcessLayer , Kdll_None }, 3162 { RID_IsLayerID , Layer_RenderTarget , Kdll_None }, 3163 { RID_SetParserState , Parser_WriteOutput , Kdll_None }, 3164 3165 // Single layer -> skip processing - prepare CSC for Render Target 3166 { RID_Op_NewEntry , RULE_NO_OVERRIDE , Kdll_None }, 3167 { RID_IsParserState , Parser_ProcessLayer , Kdll_None }, 3168 { RID_IsSrc1Processing , Process_None , Kdll_None }, 3169 { RID_SetParserState , Parser_ProcessLayerDone , Kdll_None }, 3170 3171 // Compositing quadrants 0,1 3172 { RID_Op_NewEntry , RULE_DEFAULT , Kdll_None }, 3173 { RID_IsParserState , Parser_ProcessLayer , Kdll_None }, 3174 { RID_IsQuadrant , 0 , Kdll_None }, 3175 { RID_IsSrc1Processing , Process_Composite , Kdll_None }, 3176 { RID_SetKernel , IDR_VP_Set_Buf0_Buf4 , Kdll_None }, 3177 { RID_SetKernel , IDR_VP_Call_Composite , Kdll_None }, 3178 { RID_SetKernel , IDR_VP_Set_Buf1_Buf5 , Kdll_None }, 3179 { RID_SetKernel , IDR_VP_Call_Composite , Kdll_None }, 3180 { RID_SetParserState , Parser_ProcessLayerDone , Kdll_None }, 3181 3182 { RID_Op_NewEntry , RULE_DEFAULT , Kdll_None }, 3183 { RID_IsParserState , Parser_ProcessLayer , Kdll_None }, 3184 { RID_IsQuadrant , 0 , Kdll_None }, 3185 { RID_IsSrc1Processing , Process_XORComposite , Kdll_None }, 3186 { RID_SetKernel , IDR_VP_Set_Buf0_Buf4 , Kdll_None }, 3187 { RID_SetKernel , IDR_VP_Call_XOR_Mono_Composite , Kdll_None }, 3188 { RID_SetKernel , IDR_VP_Set_Buf1_Buf5 , Kdll_None }, 3189 { RID_SetKernel , IDR_VP_Call_XOR_Mono_Composite , Kdll_None }, 3190 { RID_SetParserState , Parser_ProcessLayerDone , Kdll_None }, 3191 3192 // Compositing quadrants 2,3 3193 { RID_Op_NewEntry , RULE_DEFAULT , Kdll_None }, 3194 { RID_IsParserState , Parser_ProcessLayer , Kdll_None }, 3195 { RID_IsQuadrant , 2 , Kdll_None }, 3196 { RID_IsSrc1Processing , Process_Composite , Kdll_None }, 3197 { RID_SetKernel , IDR_VP_Set_Buf2_Buf4 , Kdll_None }, 3198 { RID_SetKernel , IDR_VP_Call_Composite , Kdll_None }, 3199 { RID_SetKernel , IDR_VP_Set_Buf3_Buf5 , Kdll_None }, 3200 { RID_SetKernel , IDR_VP_Call_Composite , Kdll_None }, 3201 { RID_SetParserState , Parser_ProcessLayerDone , Kdll_None }, 3202 3203 { RID_Op_NewEntry , RULE_DEFAULT , Kdll_None }, 3204 { RID_IsParserState , Parser_ProcessLayer , Kdll_None }, 3205 { RID_IsQuadrant , 2 , Kdll_None }, 3206 { RID_IsSrc1Processing , Process_XORComposite , Kdll_None }, 3207 { RID_SetKernel , IDR_VP_Set_Buf2_Buf4 , Kdll_None }, 3208 { RID_SetKernel , IDR_VP_Call_XOR_Mono_Composite , Kdll_None }, 3209 { RID_SetKernel , IDR_VP_Set_Buf3_Buf5 , Kdll_None }, 3210 { RID_SetKernel , IDR_VP_Call_XOR_Mono_Composite , Kdll_None }, 3211 { RID_SetParserState , Parser_ProcessLayerDone , Kdll_None }, 3212 3213 // Constant Blending quadrants 0,1 3214 { RID_Op_NewEntry , RULE_DEFAULT , Kdll_None }, 3215 { RID_IsParserState , Parser_ProcessLayer , Kdll_None }, 3216 { RID_IsQuadrant , 0 , Kdll_None }, 3217 { RID_IsSrc1Processing , Process_CBlend , Kdll_None }, 3218 { RID_SetKernel , IDR_VP_Set_Buf0_Buf4 , Kdll_None }, 3219 { RID_SetKernel , IDR_VP_Call_ConstBlend , Kdll_None }, 3220 { RID_SetKernel , IDR_VP_Set_Buf1_Buf5 , Kdll_None }, 3221 { RID_SetKernel , IDR_VP_Call_ConstBlend , Kdll_None }, 3222 { RID_SetParserState , Parser_ProcessLayerDone , Kdll_None }, 3223 3224 // Constant Blending quadrants 2,3 3225 { RID_Op_NewEntry , RULE_DEFAULT , Kdll_None }, 3226 { RID_IsParserState , Parser_ProcessLayer , Kdll_None }, 3227 { RID_IsQuadrant , 2 , Kdll_None }, 3228 { RID_IsSrc1Processing , Process_CBlend , Kdll_None }, 3229 { RID_SetKernel , IDR_VP_Set_Buf2_Buf4 , Kdll_None }, 3230 { RID_SetKernel , IDR_VP_Call_ConstBlend , Kdll_None }, 3231 { RID_SetKernel , IDR_VP_Set_Buf3_Buf5 , Kdll_None }, 3232 { RID_SetKernel , IDR_VP_Call_ConstBlend , Kdll_None }, 3233 { RID_SetParserState , Parser_ProcessLayerDone , Kdll_None }, 3234 3235 // Source Blending quadrants 0,1 3236 { RID_Op_NewEntry , RULE_DEFAULT , Kdll_None }, 3237 { RID_IsParserState , Parser_ProcessLayer , Kdll_None }, 3238 { RID_IsQuadrant , 0 , Kdll_None }, 3239 { RID_IsSrc1Processing , Process_SBlend , Kdll_None }, 3240 { RID_SetKernel , IDR_VP_Set_Buf0_Buf4 , Kdll_None }, 3241 { RID_SetKernel , IDR_VP_Call_SrcBlend , Kdll_None }, 3242 { RID_SetKernel , IDR_VP_Set_Buf1_Buf5 , Kdll_None }, 3243 { RID_SetKernel , IDR_VP_Call_SrcBlend , Kdll_None }, 3244 { RID_SetParserState , Parser_ProcessLayerDone , Kdll_None }, 3245 3246 // Source Blending quadrants 2,3 3247 { RID_Op_NewEntry , RULE_DEFAULT , Kdll_None }, 3248 { RID_IsParserState , Parser_ProcessLayer , Kdll_None }, 3249 { RID_IsQuadrant , 2 , Kdll_None }, 3250 { RID_IsSrc1Processing , Process_SBlend , Kdll_None }, 3251 { RID_SetKernel , IDR_VP_Set_Buf2_Buf4 , Kdll_None }, 3252 { RID_SetKernel , IDR_VP_Call_SrcBlend , Kdll_None }, 3253 { RID_SetKernel , IDR_VP_Set_Buf3_Buf5 , Kdll_None }, 3254 { RID_SetKernel , IDR_VP_Call_SrcBlend , Kdll_None }, 3255 { RID_SetParserState , Parser_ProcessLayerDone , Kdll_None }, 3256 3257 // Source Blending (4-bits alpha) quadrants 0,1 3258 { RID_Op_NewEntry , RULE_DEFAULT , Kdll_None }, 3259 { RID_IsParserState , Parser_ProcessLayer , Kdll_None }, 3260 { RID_IsQuadrant , 0 , Kdll_None }, 3261 { RID_IsSrc1Processing , Process_SBlend_4bits , Kdll_None }, 3262 { RID_SetKernel , IDR_VP_Set_Buf0_Buf4 , Kdll_None }, 3263 { RID_SetKernel , IDR_VP_Call_SrcBlend_4bits , Kdll_None }, 3264 { RID_SetKernel , IDR_VP_Set_Buf1_Buf5 , Kdll_None }, 3265 { RID_SetKernel , IDR_VP_Call_SrcBlend_4bits , Kdll_None }, 3266 { RID_SetParserState , Parser_ProcessLayerDone , Kdll_None }, 3267 3268 // Source Blending (4-bits alpha) quadrants 2,3 3269 { RID_Op_NewEntry , RULE_DEFAULT , Kdll_None }, 3270 { RID_IsParserState , Parser_ProcessLayer , Kdll_None }, 3271 { RID_IsQuadrant , 2 , Kdll_None }, 3272 { RID_IsSrc1Processing , Process_SBlend_4bits , Kdll_None }, 3273 { RID_SetKernel , IDR_VP_Set_Buf2_Buf4 , Kdll_None }, 3274 { RID_SetKernel , IDR_VP_Call_SrcBlend_4bits , Kdll_None }, 3275 { RID_SetKernel , IDR_VP_Set_Buf3_Buf5 , Kdll_None }, 3276 { RID_SetKernel , IDR_VP_Call_SrcBlend_4bits , Kdll_None }, 3277 { RID_SetParserState , Parser_ProcessLayerDone , Kdll_None }, 3278 3279 // Partial Blending quadrants 0,1 3280 { RID_Op_NewEntry , RULE_DEFAULT , Kdll_None }, 3281 { RID_IsParserState , Parser_ProcessLayer , Kdll_None }, 3282 { RID_IsQuadrant , 0 , Kdll_None }, 3283 { RID_IsSrc1Processing , Process_PBlend , Kdll_None }, 3284 { RID_SetKernel , IDR_VP_Set_Buf0_Buf4 , Kdll_None }, 3285 { RID_SetKernel , IDR_VP_Call_PartBlend , Kdll_None }, 3286 { RID_SetKernel , IDR_VP_Set_Buf1_Buf5 , Kdll_None }, 3287 { RID_SetKernel , IDR_VP_Call_PartBlend , Kdll_None }, 3288 { RID_SetParserState , Parser_ProcessLayerDone , Kdll_None }, 3289 3290 // Partial Blending quadrants 2,3 3291 { RID_Op_NewEntry , RULE_DEFAULT , Kdll_None }, 3292 { RID_IsParserState , Parser_ProcessLayer , Kdll_None }, 3293 { RID_IsQuadrant , 2 , Kdll_None }, 3294 { RID_IsSrc1Processing , Process_PBlend , Kdll_None }, 3295 { RID_SetKernel , IDR_VP_Set_Buf2_Buf4 , Kdll_None }, 3296 { RID_SetKernel , IDR_VP_Call_PartBlend , Kdll_None }, 3297 { RID_SetKernel , IDR_VP_Set_Buf3_Buf5 , Kdll_None }, 3298 { RID_SetKernel , IDR_VP_Call_PartBlend , Kdll_None }, 3299 { RID_SetParserState , Parser_ProcessLayerDone , Kdll_None }, 3300 3301 // Constant multitply Sources Blending quadrants 0,1 3302 { RID_Op_NewEntry , RULE_DEFAULT , Kdll_None }, 3303 { RID_IsParserState , Parser_ProcessLayer , Kdll_None }, 3304 { RID_IsQuadrant , 0 , Kdll_None }, 3305 { RID_IsSrc1Processing , Process_CSBlend , Kdll_None }, 3306 { RID_SetKernel , IDR_VP_Set_Buf0_Buf4 , Kdll_None }, 3307 { RID_SetKernel , IDR_VP_Call_ConstSrcBlend , Kdll_None }, 3308 { RID_SetKernel , IDR_VP_Set_Buf1_Buf5 , Kdll_None }, 3309 { RID_SetKernel , IDR_VP_Call_ConstSrcBlend , Kdll_None }, 3310 { RID_SetParserState , Parser_ProcessLayerDone , Kdll_None }, 3311 3312 // Constant multiply Sources Blending quadrants 2,3 3313 { RID_Op_NewEntry , RULE_DEFAULT , Kdll_None }, 3314 { RID_IsParserState , Parser_ProcessLayer , Kdll_None }, 3315 { RID_IsQuadrant , 2 , Kdll_None }, 3316 { RID_IsSrc1Processing , Process_CSBlend , Kdll_None }, 3317 { RID_SetKernel , IDR_VP_Set_Buf2_Buf4 , Kdll_None }, 3318 { RID_SetKernel , IDR_VP_Call_ConstSrcBlend , Kdll_None }, 3319 { RID_SetKernel , IDR_VP_Set_Buf3_Buf5 , Kdll_None }, 3320 { RID_SetKernel , IDR_VP_Call_ConstSrcBlend , Kdll_None }, 3321 { RID_SetParserState , Parser_ProcessLayerDone , Kdll_None }, 3322 3323 // Constant multitply Partial Blending quadrants 0,1 3324 { RID_Op_NewEntry , RULE_DEFAULT , Kdll_None }, 3325 { RID_IsParserState , Parser_ProcessLayer , Kdll_None }, 3326 { RID_IsQuadrant , 0 , Kdll_None }, 3327 { RID_IsSrc1Processing , Process_CPBlend , Kdll_None }, 3328 { RID_SetKernel , IDR_VP_Set_Buf0_Buf4 , Kdll_None }, 3329 { RID_SetKernel , IDR_VP_Call_AlphaSrcBlendG , Kdll_None }, 3330 { RID_SetKernel , IDR_VP_Set_Buf1_Buf5 , Kdll_None }, 3331 { RID_SetKernel , IDR_VP_Call_AlphaSrcBlendG , Kdll_None }, 3332 { RID_SetParserState , Parser_ProcessLayerDone , Kdll_None }, 3333 3334 // Constant multiply Partial Blending quadrants 2,3 3335 { RID_Op_NewEntry , RULE_DEFAULT , Kdll_None }, 3336 { RID_IsParserState , Parser_ProcessLayer , Kdll_None }, 3337 { RID_IsQuadrant , 2 , Kdll_None }, 3338 { RID_IsSrc1Processing , Process_CPBlend , Kdll_None }, 3339 { RID_SetKernel , IDR_VP_Set_Buf2_Buf4 , Kdll_None }, 3340 { RID_SetKernel , IDR_VP_Call_AlphaSrcBlendG , Kdll_None }, 3341 { RID_SetKernel , IDR_VP_Set_Buf3_Buf5 , Kdll_None }, 3342 { RID_SetKernel , IDR_VP_Call_AlphaSrcBlendG , Kdll_None }, 3343 { RID_SetParserState , Parser_ProcessLayerDone , Kdll_None }, 3344 3345 // Layer processing is complete 3346 3347 // nothing to process - next layer 3348 { RID_Op_NewEntry , RULE_NO_OVERRIDE , Kdll_None }, 3349 { RID_IsParserState , Parser_ProcessLayerDone , Kdll_None }, 3350 { RID_IsSrc1Processing , Process_None , Kdll_None }, 3351 { RID_SetNextLayer , 0 , Kdll_None }, 3352 { RID_SetQuadrant , 0 , Kdll_None }, 3353 { RID_SetParserState , Parser_SetupLayer1 , Kdll_None }, 3354 3355 // Quadrants 0,1 are complete - sample/process quadrants 2,3 3356 { RID_Op_NewEntry , RULE_NO_OVERRIDE , Kdll_None }, 3357 { RID_IsParserState , Parser_ProcessLayerDone , Kdll_None }, 3358 { RID_IsQuadrant , 0 , Kdll_None }, 3359 { RID_SetKernel , IDR_VP_Set_Sec_Half_Buf45 , Kdll_None }, 3360 { RID_SetQuadrant , 2 , Kdll_None }, 3361 { RID_SetParserState , Parser_SampleLayer1 , Kdll_None }, 3362 3363 // All quadrants are processed - start next layer 3364 { RID_Op_NewEntry , RULE_NO_OVERRIDE , Kdll_None }, 3365 { RID_IsParserState , Parser_ProcessLayerDone , Kdll_None }, 3366 { RID_IsQuadrant , 2 , Kdll_None }, 3367 { RID_SetSrc1Sampling , Sample_None , Kdll_None }, 3368 { RID_SetSrc1Format , Format_None , Kdll_None }, 3369 { RID_SetSrc1Processing, Process_None , Kdll_None }, 3370 { RID_SetNextLayer , 0 , Kdll_None }, 3371 { RID_SetQuadrant , 0 , Kdll_None }, 3372 { RID_SetParserState , Parser_SetupLayer1 , Kdll_None }, 3373 3374 // Write 3375 3376 // Colorfill only write rulesets has to be before regular rulesets. 3377 // No support for AYUV output in colorfill only cases. 3378 3379 // Write ARGB with 64B save kernel 3380 { RID_Op_NewEntry , RULE_DEFAULT , Kdll_None }, 3381 { RID_IsParserState , Parser_WriteOutput , Kdll_None }, 3382 { RID_IsLayerID , Layer_RenderTarget , Kdll_None }, 3383 { RID_IsLayerFormat , Format_A8B8G8R8 , Kdll_Or }, 3384 { RID_IsLayerFormat , Format_A8R8G8B8 , Kdll_None }, 3385 { RID_Is64BSaveEnabled , true , Kdll_None }, 3386 { RID_IsLayerNumber , 0 , Kdll_None }, 3387 { RID_IsSrc0ColorFill , ColorFill_True , Kdll_None }, 3388 { RID_SetKernel , IDR_VP_Set_Scale_Buf_0123_Colorfill, Kdll_None }, 3389 { RID_SetKernel , IDR_VP_Colorfill_444Scale16 , Kdll_None }, 3390 { RID_SetKernel , IDR_VP_Save_444Scale16_RGB_64Byte , Kdll_None }, 3391 { RID_SetKernel , IDR_VP_EOT , Kdll_None }, 3392 { RID_SetSrc0ColorFill , ColorFill_False , Kdll_None }, 3393 { RID_SetParserState , Parser_End , Kdll_None }, 3394 3395 // Write ARGB with legacy save kernel 3396 { RID_Op_NewEntry , RULE_DEFAULT , Kdll_None }, 3397 { RID_IsParserState , Parser_WriteOutput , Kdll_None }, 3398 { RID_IsLayerID , Layer_RenderTarget , Kdll_None }, 3399 { RID_IsLayerFormat , Format_A8B8G8R8 , Kdll_Or }, 3400 { RID_IsLayerFormat , Format_A8R8G8B8 , Kdll_None }, 3401 { RID_IsLayerNumber , 0 , Kdll_None }, 3402 { RID_IsSrc0ColorFill , ColorFill_True , Kdll_None }, 3403 { RID_SetKernel , IDR_VP_Set_Scale_Buf_0123_Colorfill, Kdll_None }, 3404 { RID_SetKernel , IDR_VP_Colorfill_444Scale16 , Kdll_None }, 3405 { RID_SetKernel , IDR_VP_Save_444Scale16_RGB , Kdll_None }, 3406 { RID_SetKernel , IDR_VP_EOT , Kdll_None }, 3407 { RID_SetSrc0ColorFill , ColorFill_False , Kdll_None }, 3408 { RID_SetParserState , Parser_End , Kdll_None }, 3409 3410 // Write RGB with 64B save kernel 3411 { RID_Op_NewEntry , RULE_DEFAULT , Kdll_None }, 3412 { RID_IsParserState , Parser_WriteOutput , Kdll_None }, 3413 { RID_IsLayerID , Layer_RenderTarget , Kdll_None }, 3414 { RID_IsLayerFormat , Format_X8B8G8R8 , Kdll_Or }, 3415 { RID_IsLayerFormat , Format_X8R8G8B8 , Kdll_None }, 3416 { RID_Is64BSaveEnabled , true , Kdll_None }, 3417 { RID_IsLayerNumber , 0 , Kdll_None }, 3418 { RID_IsSrc0ColorFill , ColorFill_True , Kdll_None }, 3419 { RID_SetKernel , IDR_VP_Set_Scale_Buf_0123_Colorfill, Kdll_None }, 3420 { RID_SetKernel , IDR_VP_Colorfill_444Scale16 , Kdll_None }, 3421 { RID_SetKernel , IDR_VP_Save_444Scale16_RGB_64Byte , Kdll_None }, 3422 { RID_SetKernel , IDR_VP_EOT , Kdll_None }, 3423 { RID_SetSrc0ColorFill , ColorFill_False , Kdll_None }, 3424 { RID_SetParserState , Parser_End , Kdll_None }, 3425 3426 // Write RGB with legacy save kernel 3427 { RID_Op_NewEntry , RULE_DEFAULT , Kdll_None }, 3428 { RID_IsParserState , Parser_WriteOutput , Kdll_None }, 3429 { RID_IsLayerID , Layer_RenderTarget , Kdll_None }, 3430 { RID_IsLayerFormat , Format_X8B8G8R8 , Kdll_Or }, 3431 { RID_IsLayerFormat , Format_X8R8G8B8 , Kdll_None }, 3432 { RID_IsLayerNumber , 0 , Kdll_None }, 3433 { RID_IsSrc0ColorFill , ColorFill_True , Kdll_None }, 3434 { RID_SetKernel , IDR_VP_Set_Scale_Buf_0123_Colorfill, Kdll_None }, 3435 { RID_SetKernel , IDR_VP_Colorfill_444Scale16 , Kdll_None }, 3436 { RID_SetKernel , IDR_VP_Save_444Scale16_RGB , Kdll_None }, 3437 { RID_SetKernel , IDR_VP_EOT , Kdll_None }, 3438 { RID_SetSrc0ColorFill , ColorFill_False , Kdll_None }, 3439 { RID_SetParserState , Parser_End , Kdll_None }, 3440 3441 // Write RGB16: input is RGB565 and output is RGB565 3442 { RID_Op_NewEntry , RULE_DEFAULT , Kdll_None }, 3443 { RID_IsParserState , Parser_WriteOutput , Kdll_None }, 3444 { RID_IsLayerID , Layer_RenderTarget , Kdll_None }, 3445 { RID_IsLayerFormat , Format_R5G6B5 , Kdll_None }, 3446 { RID_IsLayerNumber , 0 , Kdll_None }, 3447 { RID_IsSrc0ColorFill , ColorFill_True , Kdll_None }, 3448 { RID_IsDitherNeeded , false , Kdll_None }, 3449 { RID_SetKernel , IDR_VP_Set_Scale_Buf_0123_Colorfill, Kdll_None }, 3450 { RID_SetKernel , IDR_VP_Colorfill_444Scale16 , Kdll_None }, 3451 { RID_SetKernel , IDR_VP_Save_444Scale16_RGB16 , Kdll_None }, 3452 { RID_SetKernel , IDR_VP_EOT , Kdll_None }, 3453 { RID_SetSrc0ColorFill , ColorFill_False , Kdll_None }, 3454 { RID_SetParserState , Parser_End , Kdll_None }, 3455 3456 // Write RGB16: input is not RGB565 and output is RGB565, dithering is needed 3457 { RID_Op_NewEntry , RULE_DEFAULT , Kdll_None }, 3458 { RID_IsParserState , Parser_WriteOutput , Kdll_None }, 3459 { RID_IsLayerID , Layer_RenderTarget , Kdll_None }, 3460 { RID_IsLayerFormat , Format_R5G6B5 , Kdll_None }, 3461 { RID_IsLayerNumber , 0 , Kdll_None }, 3462 { RID_IsSrc0ColorFill , ColorFill_True , Kdll_None }, 3463 { RID_IsDitherNeeded , true , Kdll_None }, 3464 { RID_SetKernel , IDR_VP_Set_Scale_Buf_0123_Colorfill, Kdll_None }, 3465 { RID_SetKernel , IDR_VP_Colorfill_444Scale16 , Kdll_None }, 3466 { RID_SetKernel , IDR_VP_Save_444Scale16_Dither_RGB16, Kdll_None }, 3467 { RID_SetKernel , IDR_VP_EOT , Kdll_None }, 3468 { RID_SetSrc0ColorFill , ColorFill_False , Kdll_None }, 3469 { RID_SetParserState , Parser_End , Kdll_None }, 3470 3471 // Write (R10G10B10A2 | B10G10R10A2) - With ColorFill. Note: R10G10B10A2 | B10G10R10A2 should be in front of Format_RGB32 3472 { RID_Op_NewEntry , RULE_DEFAULT , Kdll_None }, 3473 { RID_IsParserState , Parser_WriteOutput , Kdll_None }, 3474 { RID_IsLayerID , Layer_RenderTarget , Kdll_None }, 3475 { RID_IsLayerFormat , Format_R10G10B10A2 , Kdll_Or }, 3476 { RID_IsLayerFormat , Format_B10G10R10A2 , Kdll_None }, 3477 { RID_IsLayerNumber , 0 , Kdll_None }, 3478 { RID_IsSrc0ColorFill , ColorFill_True , Kdll_None }, 3479 { RID_SetKernel , IDR_VP_Set_Scale_Buf_0123_Colorfill, Kdll_None }, 3480 { RID_SetKernel , IDR_VP_Colorfill_444Scale16 , Kdll_None }, 3481 { RID_SetKernel , IDR_VP_Save_444Scale16_R10G10B10 , Kdll_None }, 3482 { RID_SetSrc0ColorFill , ColorFill_False , Kdll_None }, 3483 { RID_SetKernel , IDR_VP_EOT , Kdll_None }, 3484 { RID_SetParserState , Parser_End , Kdll_None }, 3485 3486 // Write AYUV with legacy save kernel 3487 { RID_Op_NewEntry , RULE_DEFAULT , Kdll_None }, 3488 { RID_IsParserState , Parser_WriteOutput , Kdll_None }, 3489 { RID_IsLayerID , Layer_RenderTarget , Kdll_None }, 3490 { RID_IsLayerFormat , Format_AYUV , Kdll_None }, 3491 { RID_IsLayerNumber , 0 , Kdll_None }, 3492 { RID_IsSrc0ColorFill , ColorFill_True , Kdll_None }, 3493 { RID_SetKernel , IDR_VP_Set_Scale_Buf_0123_Colorfill , Kdll_None }, 3494 { RID_SetKernel , IDR_VP_Colorfill_444Scale16 , Kdll_None }, 3495 { RID_SetKernel , IDR_VP_Save_444Scale16_VUYA , Kdll_None }, 3496 { RID_SetKernel , IDR_VP_EOT , Kdll_None }, 3497 { RID_SetSrc0ColorFill , ColorFill_False , Kdll_None }, 3498 { RID_SetParserState , Parser_End , Kdll_None }, 3499 3500 // Write (YUY2 | YUYV | YVYU | UYVY | VYUY) 3501 { RID_Op_NewEntry , RULE_DEFAULT , Kdll_None }, 3502 { RID_IsParserState , Parser_WriteOutput , Kdll_None }, 3503 { RID_IsLayerID , Layer_RenderTarget , Kdll_None }, 3504 { RID_IsLayerFormat , Format_YUY2 , Kdll_Or }, 3505 { RID_IsLayerFormat , Format_YUYV , Kdll_Or }, 3506 { RID_IsLayerFormat , Format_YVYU , Kdll_Or }, 3507 { RID_IsLayerFormat , Format_UYVY , Kdll_Or }, 3508 { RID_IsLayerFormat , Format_VYUY , Kdll_None }, 3509 { RID_IsLayerNumber , 0 , Kdll_None }, 3510 { RID_IsSrc0ColorFill , ColorFill_True , Kdll_None }, 3511 { RID_SetKernel , IDR_VP_Set_Scale_Buf_0123_Colorfill , Kdll_None }, 3512 { RID_SetKernel , IDR_VP_Colorfill_444Scale16 , Kdll_None }, 3513 { RID_SetKernel , IDR_VP_Set_Dest_Surf_Indexes_Primary, Kdll_None }, 3514 { RID_SetKernel , IDR_VP_Save_444Scale16_PA , Kdll_None }, 3515 { RID_SetKernel , IDR_VP_EOT , Kdll_None }, 3516 { RID_SetSrc0ColorFill , ColorFill_False , Kdll_None }, 3517 { RID_SetParserState , Parser_End , Kdll_None }, 3518 3519 // Write NV12 3520 { RID_Op_NewEntry , RULE_DEFAULT , Kdll_None }, 3521 { RID_IsParserState , Parser_WriteOutput , Kdll_None }, 3522 { RID_IsLayerID , Layer_RenderTarget , Kdll_None }, 3523 { RID_IsLayerFormat , Format_NV12 , Kdll_None }, 3524 { RID_IsLayerNumber , 0 , Kdll_None }, 3525 { RID_IsSrc0ColorFill , ColorFill_True , Kdll_None }, 3526 { RID_SetKernel , IDR_VP_Set_Scale_Buf_0123_Colorfill , Kdll_None }, 3527 { RID_SetKernel , IDR_VP_Colorfill_444Scale16 , Kdll_None }, 3528 { RID_SetKernel , IDR_VP_Set_Dest_Surf_Indexes_Primary, Kdll_None }, 3529 { RID_SetKernel , IDR_VP_Save_444Scale16_NV12 , Kdll_None }, 3530 { RID_SetKernel , IDR_VP_EOT , Kdll_None }, 3531 { RID_SetSrc0ColorFill , ColorFill_False , Kdll_None }, 3532 { RID_SetParserState , Parser_End , Kdll_None }, 3533 3534 // Write NV21 3535 { RID_Op_NewEntry , RULE_DEFAULT , Kdll_None }, 3536 { RID_IsParserState , Parser_WriteOutput , Kdll_None }, 3537 { RID_IsLayerID , Layer_RenderTarget , Kdll_None }, 3538 { RID_IsLayerFormat , Format_NV21 , Kdll_None }, 3539 { RID_IsLayerNumber , 0 , Kdll_None }, 3540 { RID_IsSrc0ColorFill , ColorFill_True , Kdll_None }, 3541 { RID_SetKernel , IDR_VP_Set_Scale_Buf_0123_Colorfill , Kdll_None }, 3542 { RID_SetKernel , IDR_VP_Colorfill_444Scale16 , Kdll_None }, 3543 { RID_SetKernel , IDR_VP_Set_Dest_Surf_Indexes_Primary, Kdll_None }, 3544 { RID_SetKernel , IDR_VP_Save_444Scale16_NV21 , Kdll_None }, 3545 { RID_SetKernel , IDR_VP_EOT , Kdll_None }, 3546 { RID_SetSrc0ColorFill , ColorFill_False , Kdll_None }, 3547 { RID_SetParserState , Parser_End , Kdll_None }, 3548 3549 // Write PL3 3550 { RID_Op_NewEntry , RULE_DEFAULT , Kdll_None }, 3551 { RID_IsParserState , Parser_WriteOutput , Kdll_None }, 3552 { RID_IsLayerID , Layer_RenderTarget , Kdll_None }, 3553 { RID_IsLayerFormat , Format_PL3 , Kdll_None }, 3554 { RID_IsLayerNumber , 0 , Kdll_None }, 3555 { RID_IsSrc0ColorFill , ColorFill_True , Kdll_None }, 3556 { RID_SetKernel , IDR_VP_Set_Scale_Buf_0123_Colorfill, Kdll_None }, 3557 { RID_SetKernel , IDR_VP_Colorfill_444Scale16 , Kdll_None }, 3558 { RID_SetKernel , IDR_VP_Save_444Scale16_PL3 , Kdll_None }, 3559 { RID_SetKernel , IDR_VP_EOT , Kdll_None }, 3560 { RID_SetSrc0ColorFill , ColorFill_False , Kdll_None }, 3561 { RID_SetParserState , Parser_End , Kdll_None }, 3562 3563 // Write (ARGB | ABGR) - Normal Save with 64B save kernel, 3564 // Sample_8x8 not used or already shuffled 3565 // Save_ARGB can write out ABGR as well, based on CURBE settings. 3566 { RID_Op_NewEntry , RULE_DEFAULT , Kdll_None }, 3567 { RID_IsParserState , Parser_WriteOutput , Kdll_None }, 3568 { RID_IsLayerID , Layer_RenderTarget , Kdll_None }, 3569 { RID_IsLayerFormat , Format_A8R8G8B8 , Kdll_Or }, 3570 { RID_IsLayerFormat , Format_A8B8G8R8 , Kdll_None }, 3571 { RID_IsConstOutAlpha , false , Kdll_None }, 3572 { RID_Is64BSaveEnabled , true , Kdll_None }, 3573 { RID_SetKernel , IDR_VP_Save_444Scale16_ARGB_64Byte , Kdll_None }, 3574 { RID_SetKernel , IDR_VP_EOT , Kdll_None }, 3575 { RID_SetParserState , Parser_End , Kdll_None }, 3576 3577 { RID_Op_NewEntry , RULE_DEFAULT , Kdll_None }, 3578 { RID_IsParserState , Parser_WriteOutput , Kdll_None }, 3579 { RID_IsLayerID , Layer_RenderTarget , Kdll_None }, 3580 { RID_IsLayerFormat , Format_A8R8G8B8 , Kdll_Or }, 3581 { RID_IsLayerFormat , Format_A8B8G8R8 , Kdll_None }, 3582 { RID_Is64BSaveEnabled , true , Kdll_None }, 3583 { RID_IsConstOutAlpha , true , Kdll_None }, 3584 { RID_SetKernel , IDR_VP_Save_444Scale16_RGB_64Byte , Kdll_None }, 3585 { RID_SetKernel , IDR_VP_EOT , Kdll_None }, 3586 { RID_SetParserState , Parser_End , Kdll_None }, 3587 3588 // Write (ARGB | ABGR) - Normal Save with legacy save kernel, 3589 // Sample_8x8 not used or already shuffled 3590 // Save_ARGB can write out ABGR as well, based on CURBE settings. 3591 { RID_Op_NewEntry , RULE_DEFAULT , Kdll_None }, 3592 { RID_IsParserState , Parser_WriteOutput , Kdll_None }, 3593 { RID_IsLayerID , Layer_RenderTarget , Kdll_None }, 3594 { RID_IsLayerFormat , Format_A8R8G8B8 , Kdll_Or }, 3595 { RID_IsLayerFormat , Format_A8B8G8R8 , Kdll_None }, 3596 { RID_IsConstOutAlpha , false , Kdll_None }, 3597 { RID_SetKernel , IDR_VP_Save_444Scale16_ARGB , Kdll_None }, 3598 { RID_SetKernel , IDR_VP_EOT , Kdll_None }, 3599 { RID_SetParserState , Parser_End , Kdll_None }, 3600 3601 { RID_Op_NewEntry , RULE_DEFAULT , Kdll_None }, 3602 { RID_IsParserState , Parser_WriteOutput , Kdll_None }, 3603 { RID_IsLayerID , Layer_RenderTarget , Kdll_None }, 3604 { RID_IsLayerFormat , Format_A8R8G8B8 , Kdll_Or }, 3605 { RID_IsLayerFormat , Format_A8B8G8R8 , Kdll_None }, 3606 { RID_IsConstOutAlpha , true , Kdll_None }, 3607 { RID_SetKernel , IDR_VP_Save_444Scale16_RGB , Kdll_None }, 3608 { RID_SetKernel , IDR_VP_EOT , Kdll_None }, 3609 { RID_SetParserState , Parser_End , Kdll_None }, 3610 3611 // Write (RGB | BGR) - Normal Save with 64B save kernel, 3612 // Sample_8x8 not used or already shuffled 3613 // Save_RGB can write out BGR as well, based on CURBE settings. 3614 { RID_Op_NewEntry , RULE_DEFAULT , Kdll_None }, 3615 { RID_IsParserState , Parser_WriteOutput , Kdll_None }, 3616 { RID_IsLayerID , Layer_RenderTarget , Kdll_None }, 3617 { RID_IsLayerFormat , Format_X8R8G8B8 , Kdll_Or }, 3618 { RID_IsLayerFormat , Format_X8B8G8R8 , Kdll_None }, 3619 { RID_Is64BSaveEnabled , true , Kdll_None }, 3620 { RID_SetKernel , IDR_VP_Save_444Scale16_RGB_64Byte , Kdll_None }, 3621 { RID_SetKernel , IDR_VP_EOT , Kdll_None }, 3622 { RID_SetParserState , Parser_End , Kdll_None }, 3623 3624 // Write (RGB | BGR) - Normal Save with legacy save kernel, 3625 // Sample_8x8 not used or already shuffled 3626 // Save_RGB can write out BGR as well, based on CURBE settings. 3627 { RID_Op_NewEntry , RULE_DEFAULT , Kdll_None }, 3628 { RID_IsParserState , Parser_WriteOutput , Kdll_None }, 3629 { RID_IsLayerID , Layer_RenderTarget , Kdll_None }, 3630 { RID_IsLayerFormat , Format_X8R8G8B8 , Kdll_Or }, 3631 { RID_IsLayerFormat , Format_X8B8G8R8 , Kdll_None }, 3632 { RID_SetKernel , IDR_VP_Save_444Scale16_RGB , Kdll_None }, 3633 { RID_SetKernel , IDR_VP_EOT , Kdll_None }, 3634 { RID_SetParserState , Parser_End , Kdll_None }, 3635 3636 // Write RGB16 - Normal Save, Sample_8x8 not used or already shuffled 3637 { RID_Op_NewEntry , RULE_DEFAULT , Kdll_None }, 3638 { RID_IsParserState , Parser_WriteOutput , Kdll_None }, 3639 { RID_IsLayerID , Layer_RenderTarget , Kdll_None }, 3640 { RID_IsLayerFormat , Format_R5G6B5 , Kdll_None }, 3641 { RID_IsDitherNeeded , false , Kdll_None }, 3642 { RID_SetKernel , IDR_VP_Save_444Scale16_RGB16 , Kdll_None }, 3643 { RID_SetKernel , IDR_VP_EOT , Kdll_None }, 3644 { RID_SetParserState , Parser_End , Kdll_None }, 3645 3646 // Write RGB16 - Normal Save, Sample_8x8 not used or already shuffled 3647 { RID_Op_NewEntry , RULE_DEFAULT , Kdll_None }, 3648 { RID_IsParserState , Parser_WriteOutput , Kdll_None }, 3649 { RID_IsLayerID , Layer_RenderTarget , Kdll_None }, 3650 { RID_IsLayerFormat , Format_R5G6B5 , Kdll_None }, 3651 { RID_IsDitherNeeded , true , Kdll_None }, 3652 { RID_SetKernel , IDR_VP_Save_444Scale16_Dither_RGB16, Kdll_None }, 3653 { RID_SetKernel , IDR_VP_EOT , Kdll_None }, 3654 { RID_SetParserState , Parser_End , Kdll_None }, 3655 3656 // Write (R10G10B10A2 | B10G10R10A2) - Normal Save 3657 // Sample_8x8 not used or already shuffled 3658 { RID_Op_NewEntry , RULE_DEFAULT , Kdll_None }, 3659 { RID_IsParserState , Parser_WriteOutput , Kdll_None }, 3660 { RID_IsLayerID , Layer_RenderTarget , Kdll_None }, 3661 { RID_IsLayerFormat , Format_R10G10B10A2 , Kdll_Or }, 3662 { RID_IsLayerFormat , Format_B10G10R10A2 , Kdll_None }, 3663 { RID_IsConstOutAlpha , false , Kdll_None }, 3664 { RID_SetKernel , IDR_VP_Save_444Scale16_R10G10B10A2 , Kdll_None }, 3665 { RID_SetKernel , IDR_VP_EOT , Kdll_None }, 3666 { RID_SetParserState , Parser_End , Kdll_None }, 3667 3668 { RID_Op_NewEntry , RULE_DEFAULT , Kdll_None }, 3669 { RID_IsParserState , Parser_WriteOutput , Kdll_None }, 3670 { RID_IsLayerID , Layer_RenderTarget , Kdll_None }, 3671 { RID_IsLayerFormat , Format_R10G10B10A2 , Kdll_Or }, 3672 { RID_IsLayerFormat , Format_B10G10R10A2 , Kdll_None }, 3673 { RID_IsConstOutAlpha , true , Kdll_None }, 3674 { RID_SetKernel , IDR_VP_Save_444Scale16_R10G10B10 , Kdll_None }, 3675 { RID_SetKernel , IDR_VP_EOT , Kdll_None }, 3676 { RID_SetParserState , Parser_End , Kdll_None }, 3677 3678 // Write AYUV - Normal Save, Sample_8x8 not used or already shuffled 3679 { RID_Op_NewEntry , RULE_DEFAULT , Kdll_None }, 3680 { RID_IsParserState , Parser_WriteOutput , Kdll_None }, 3681 { RID_IsLayerID , Layer_RenderTarget , Kdll_None }, 3682 { RID_IsLayerFormat , Format_AYUV , Kdll_None }, 3683 { RID_IsConstOutAlpha , false , Kdll_None }, 3684 { RID_SetKernel , IDR_VP_Save_444Scale16_SrcVUYA , Kdll_None }, 3685 { RID_SetKernel , IDR_VP_EOT , Kdll_None }, 3686 { RID_SetParserState , Parser_End , Kdll_None }, 3687 3688 { RID_Op_NewEntry , RULE_DEFAULT , Kdll_None }, 3689 { RID_IsParserState , Parser_WriteOutput , Kdll_None }, 3690 { RID_IsLayerID , Layer_RenderTarget , Kdll_None }, 3691 { RID_IsLayerFormat , Format_AYUV , Kdll_None }, 3692 { RID_IsConstOutAlpha , true , Kdll_None }, 3693 { RID_SetKernel , IDR_VP_Save_444Scale16_VUYA , Kdll_None }, 3694 { RID_SetKernel , IDR_VP_EOT , Kdll_None }, 3695 { RID_SetParserState , Parser_End , Kdll_None }, 3696 3697 // Write (YUY2 | YUYV | YVYU | UYVY | VYUY) - Normal Save, Sample_8x8 not used or already shuffled 3698 { RID_Op_NewEntry , RULE_DEFAULT , Kdll_None }, 3699 { RID_IsParserState , Parser_WriteOutput , Kdll_None }, 3700 { RID_IsLayerID , Layer_RenderTarget , Kdll_None }, 3701 { RID_IsLayerFormat , Format_YUY2 , Kdll_Or }, 3702 { RID_IsLayerFormat , Format_YUYV , Kdll_Or }, 3703 { RID_IsLayerFormat , Format_YVYU , Kdll_Or }, 3704 { RID_IsLayerFormat , Format_UYVY , Kdll_Or }, 3705 { RID_IsLayerFormat , Format_VYUY , Kdll_None }, 3706 { RID_SetKernel , IDR_VP_Set_Dest_Surf_Indexes_Primary, Kdll_None }, 3707 { RID_SetKernel , IDR_VP_Save_444Scale16_PA , Kdll_None }, 3708 { RID_SetKernel , IDR_VP_EOT , Kdll_None }, 3709 { RID_SetParserState , Parser_End , Kdll_None }, 3710 3711 // Write NV12 - Normal Save, Sample_8x8 not used or already shuffled 3712 { RID_Op_NewEntry , RULE_DEFAULT , Kdll_None }, 3713 { RID_IsParserState , Parser_WriteOutput , Kdll_None }, 3714 { RID_IsLayerID , Layer_RenderTarget , Kdll_None }, 3715 { RID_IsLayerFormat , Format_NV12 , Kdll_None }, 3716 { RID_SetKernel , IDR_VP_Set_Dest_Surf_Indexes_Primary, Kdll_None }, 3717 { RID_SetKernel , IDR_VP_Save_444Scale16_NV12 , Kdll_None }, 3718 { RID_SetKernel , IDR_VP_EOT , Kdll_None }, 3719 { RID_SetParserState , Parser_End , Kdll_None }, 3720 3721 // Write NV21 - Normal Save, Sample_8x8 not used or already shuffled 3722 { RID_Op_NewEntry , RULE_DEFAULT , Kdll_None }, 3723 { RID_IsParserState , Parser_WriteOutput , Kdll_None }, 3724 { RID_IsLayerID , Layer_RenderTarget , Kdll_None }, 3725 { RID_IsLayerFormat , Format_NV21 , Kdll_None }, 3726 { RID_SetKernel , IDR_VP_Set_Dest_Surf_Indexes_Primary, Kdll_None }, 3727 { RID_SetKernel , IDR_VP_Save_444Scale16_NV21 , Kdll_None }, 3728 { RID_SetKernel , IDR_VP_EOT , Kdll_None }, 3729 { RID_SetParserState , Parser_End , Kdll_None }, 3730 3731 // Write PL3 - Normal Save, Sample_8x8 not used or already shuffled 3732 { RID_Op_NewEntry , RULE_DEFAULT , Kdll_None }, 3733 { RID_IsParserState , Parser_WriteOutput , Kdll_None }, 3734 { RID_IsLayerID , Layer_RenderTarget , Kdll_None }, 3735 { RID_IsLayerFormat , Format_PL3 , Kdll_None }, 3736 { RID_SetKernel , IDR_VP_Save_444Scale16_PL3 , Kdll_None }, 3737 { RID_SetKernel , IDR_VP_EOT , Kdll_None }, 3738 { RID_SetParserState , Parser_End , Kdll_None }, 3739 3740 // Write P010 - Color fill, Sample_8x8 not used or already shuffled 3741 { RID_Op_NewEntry , RULE_DEFAULT , Kdll_None }, 3742 { RID_IsParserState , Parser_WriteOutput , Kdll_None }, 3743 { RID_IsLayerID , Layer_RenderTarget , Kdll_None }, 3744 { RID_IsLayerFormat , Format_P010 , Kdll_None }, 3745 { RID_IsLayerNumber , 0 , Kdll_None }, 3746 { RID_IsSrc0ColorFill , ColorFill_True , Kdll_None }, 3747 { RID_SetKernel , IDR_VP_Set_Scale_Buf_0123_Colorfill , Kdll_None }, 3748 { RID_SetKernel , IDR_VP_Colorfill_444Scale16 , Kdll_None }, 3749 { RID_SetKernel , IDR_VP_Set_Dest_Surf_Indexes_Primary, Kdll_None }, 3750 { RID_SetKernel , IDR_VP_Save_444Scale16_P010 , Kdll_None }, 3751 { RID_SetKernel , IDR_VP_EOT , Kdll_None }, 3752 { RID_SetSrc0ColorFill , ColorFill_False , Kdll_None }, 3753 { RID_SetParserState , Parser_End , Kdll_None }, 3754 3755 // Write P010 - Normal Save, Sample_8x8 not used or already shuffled 3756 { RID_Op_NewEntry , RULE_DEFAULT , Kdll_None }, 3757 { RID_IsParserState , Parser_WriteOutput , Kdll_None }, 3758 { RID_IsLayerID , Layer_RenderTarget , Kdll_None }, 3759 { RID_IsLayerFormat , Format_P010 , Kdll_None }, 3760 { RID_SetKernel , IDR_VP_Set_Dest_Surf_Indexes_Primary, Kdll_None }, 3761 { RID_SetKernel , IDR_VP_Save_444Scale16_P010 , Kdll_None }, 3762 { RID_SetKernel , IDR_VP_EOT , Kdll_None }, 3763 { RID_SetParserState , Parser_End , Kdll_None }, 3764 3765 // Write P016 - Color fill, Sample_8x8 not used or already shuffled 3766 { RID_Op_NewEntry , RULE_DEFAULT , Kdll_None }, 3767 { RID_IsParserState , Parser_WriteOutput , Kdll_None }, 3768 { RID_IsLayerID , Layer_RenderTarget , Kdll_None }, 3769 { RID_IsLayerFormat , Format_P016 , Kdll_None }, 3770 { RID_IsLayerNumber , 0 , Kdll_None }, 3771 { RID_IsSrc0ColorFill , ColorFill_True , Kdll_None }, 3772 { RID_SetKernel , IDR_VP_Set_Scale_Buf_0123_Colorfill , Kdll_None }, 3773 { RID_SetKernel , IDR_VP_Colorfill_444Scale16 , Kdll_None }, 3774 { RID_SetKernel , IDR_VP_Set_Dest_Surf_Indexes_Primary, Kdll_None }, 3775 { RID_SetKernel , IDR_VP_Save_444Scale16_P016 , Kdll_None }, 3776 { RID_SetKernel , IDR_VP_EOT , Kdll_None }, 3777 { RID_SetSrc0ColorFill , ColorFill_False , Kdll_None }, 3778 { RID_SetParserState , Parser_End , Kdll_None }, 3779 3780 // Write P016 - Normal Save, Sample_8x8 not used or already shuffled 3781 { RID_Op_NewEntry , RULE_DEFAULT , Kdll_None }, 3782 { RID_IsParserState , Parser_WriteOutput , Kdll_None }, 3783 { RID_IsLayerID , Layer_RenderTarget , Kdll_None }, 3784 { RID_IsLayerFormat , Format_P016 , Kdll_None }, 3785 { RID_SetKernel , IDR_VP_Set_Dest_Surf_Indexes_Primary, Kdll_None }, 3786 { RID_SetKernel , IDR_VP_Save_444Scale16_P016 , Kdll_None }, 3787 { RID_SetKernel , IDR_VP_EOT , Kdll_None }, 3788 { RID_SetParserState , Parser_End , Kdll_None }, 3789 3790 3791 // Write Y410 - Color fill, Sample_8x8 not used or already shuffled 3792 { RID_Op_NewEntry , RULE_DEFAULT , Kdll_None }, 3793 { RID_IsParserState , Parser_WriteOutput , Kdll_None }, 3794 { RID_IsLayerID , Layer_RenderTarget , Kdll_None }, 3795 { RID_IsLayerFormat , Format_Y410 , Kdll_None }, 3796 { RID_IsLayerNumber , 0 , Kdll_None }, 3797 { RID_IsSrc0ColorFill , ColorFill_True , Kdll_None }, 3798 { RID_SetKernel , IDR_VP_Set_Scale_Buf_0123_Colorfill , Kdll_None }, 3799 { RID_SetKernel , IDR_VP_Colorfill_444Scale16 , Kdll_None }, 3800 { RID_SetKernel , IDR_VP_Set_Dest_Surf_Indexes_Primary, Kdll_None }, 3801 { RID_SetKernel , IDR_VP_Save_444Scale16_Y410 , Kdll_None }, 3802 { RID_SetKernel , IDR_VP_EOT , Kdll_None }, 3803 { RID_SetSrc0ColorFill , ColorFill_False , Kdll_None }, 3804 { RID_SetParserState , Parser_End , Kdll_None }, 3805 3806 // Write Y410 - Normal Save, Sample_8x8 not used or already shuffled 3807 { RID_Op_NewEntry , RULE_DEFAULT , Kdll_None }, 3808 { RID_IsParserState , Parser_WriteOutput , Kdll_None }, 3809 { RID_IsLayerID , Layer_RenderTarget , Kdll_None }, 3810 { RID_IsLayerFormat , Format_Y410 , Kdll_None }, 3811 { RID_SetKernel , IDR_VP_Set_Dest_Surf_Indexes_Primary, Kdll_None }, 3812 { RID_SetKernel , IDR_VP_Save_444Scale16_Y410 , Kdll_None }, 3813 { RID_SetKernel , IDR_VP_EOT , Kdll_None }, 3814 { RID_SetParserState , Parser_End , Kdll_None }, 3815 3816 // Write Y210 - Color fill, Sample_8x8 not used or already shuffled 3817 { RID_Op_NewEntry , RULE_DEFAULT , Kdll_None }, 3818 { RID_IsParserState , Parser_WriteOutput , Kdll_None }, 3819 { RID_IsLayerID , Layer_RenderTarget , Kdll_None }, 3820 { RID_IsLayerFormat , Format_Y210 , Kdll_None }, 3821 { RID_IsLayerNumber , 0 , Kdll_None }, 3822 { RID_IsSrc0ColorFill , ColorFill_True , Kdll_None }, 3823 { RID_SetKernel , IDR_VP_Set_Scale_Buf_0123_Colorfill , Kdll_None }, 3824 { RID_SetKernel , IDR_VP_Colorfill_444Scale16 , Kdll_None }, 3825 { RID_SetKernel , IDR_VP_Set_Dest_Surf_Indexes_Primary, Kdll_None }, 3826 { RID_SetKernel , IDR_VP_Save_444Scale16_Y210 , Kdll_None }, 3827 { RID_SetKernel , IDR_VP_EOT , Kdll_None }, 3828 { RID_SetSrc0ColorFill , ColorFill_False , Kdll_None }, 3829 { RID_SetParserState , Parser_End , Kdll_None }, 3830 3831 // Write Y210 - Normal Save, Sample_8x8 not used or already shuffled 3832 { RID_Op_NewEntry , RULE_DEFAULT , Kdll_None }, 3833 { RID_IsParserState , Parser_WriteOutput , Kdll_None }, 3834 { RID_IsLayerID , Layer_RenderTarget , Kdll_None }, 3835 { RID_IsLayerFormat , Format_Y210 , Kdll_None }, 3836 { RID_SetKernel , IDR_VP_Set_Dest_Surf_Indexes_Primary, Kdll_None }, 3837 { RID_SetKernel , IDR_VP_Save_444Scale16_Y210 , Kdll_None }, 3838 { RID_SetKernel , IDR_VP_EOT , Kdll_None }, 3839 { RID_SetParserState , Parser_End , Kdll_None }, 3840 3841 // Last entry 3842 3843 { RID_Op_EOF , 0 , Kdll_None } 3844 }; 3845