1 /*
2 * Copyright (c) 2011-2022, Intel Corporation
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice shall be included
12 * in all copies or substantial portions of the Software.
13 *
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
15 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20 * OTHER DEALINGS IN THE SOFTWARE.
21 */
22 //!
23 //! \file vphal_render_vebox_g12_base.cpp
24 //! \brief Interface and structure specific for GEN12 Vebox
25 //! \details Interface and structure specific for GEN12 Vebox
26 //!
27 #include "vphal.h"
28 #include "vphal_debug.h"
29 #include "vphal_render_vebox_g12_base.h"
30 #include "vphal_render_sfc_g12_base.h"
31 #include "vphal_render_vebox_util_base.h"
32 #include "vpkrnheader.h"
33 #include "mhw_vebox_g12_X.h"
34 #if defined(ENABLE_KERNELS) && !defined(_FULL_OPEN_SOURCE)
35 #include "igvpkrn_isa_g12_tgllp.h"
36 #endif
37 #include "vphal_render_hdr_3dlut_g12.h"
38 #include "vp_hal_ddi_utils.h"
39
40 const char g_KernelDNDI_Str_g12[KERNEL_VEBOX_BASE_MAX][MAX_PATH] =
41 {
42 DBG_TEXT("Reserved"),
43 DBG_TEXT("UpdateDNState"),
44 };
45
46 // Kernel Params ---------------------------------------------------------------
47 const RENDERHAL_KERNEL_PARAM g_Vebox_KernelParam_g12[KERNEL_VEBOX_BASE_MAX] =
48 {
49 ///* GRF_Count
50 // | BT_Count
51 // | | Sampler_Count
52 // | | | Thread_Count
53 // | | | | GRF_Start_Register
54 // | | | | | CURBE_Length
55 // | | | | | | block_width
56 // | | | | | | | block_height
57 // | | | | | | | | blocks_x
58 // | | | | | | | | | blocks_y
59 // | | | | | | | | | |*/
60 { 0, 0 , 0, VPHAL_USE_MEDIA_THREADS_MAX, 0, 0, 0, 0, 0, 0 }, // RESERVED
61 { 4, 34, 0, VPHAL_USE_MEDIA_THREADS_MAX, 0, 2, 64, 8, 1, 1 }, // UPDATEDNSTATE
62 };
63
64 const uint32_t dwDenoiseASDThreshold[NOISEFACTOR_MAX + 1] = {
65 512, 514, 516, 518, 520, 522, 524, 526, 528, 530, 532, 534, 536, 538, 540, 542,
66 544, 546, 548, 550, 552, 554, 556, 558, 560, 562, 564, 566, 568, 570, 572, 574,
67 576, 578, 580, 582, 584, 586, 588, 590, 592, 594, 596, 598, 600, 602, 604, 606,
68 608, 610, 612, 614, 616, 618, 620, 622, 624, 626, 628, 630, 632, 634, 636, 638,
69 640 };
70
71 const uint32_t dwDenoiseHistoryDelta[NOISEFACTOR_MAX + 1] = {
72 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4,
73 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5,
74 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6,
75 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7,
76 8 };
77
78 const uint32_t dwDenoiseMaximumHistory[NOISEFACTOR_MAX + 1] = {
79 144, 145, 146, 147, 148, 149, 150, 151, 152, 153, 154, 155, 156, 157, 158, 159,
80 160, 161, 162, 163, 164, 165, 166, 167, 168, 169, 170, 171, 172, 173, 174, 175,
81 176, 177, 178, 179, 180, 181, 182, 183, 184, 185, 186, 187, 188, 189, 190, 191,
82 192, 193, 194, 195, 196, 197, 198, 199, 200, 201, 202, 203, 204, 205, 206, 207,
83 208 };
84
85 const uint32_t dwDenoiseSTADThreshold[NOISEFACTOR_MAX + 1] = {
86 2048, 2052, 2056, 2060, 2064, 2068, 2072, 2076, 2080, 2084, 2088, 2092, 2096, 2100, 2104, 2108,
87 2112, 2116, 2120, 2124, 2128, 2132, 2136, 2140, 2144, 2148, 2152, 2156, 2160, 2164, 2168, 2172,
88 2176, 2180, 2184, 2188, 2192, 2196, 2200, 2204, 2208, 2212, 2216, 2220, 2224, 2228, 2232, 2236,
89 2240, 2244, 2248, 2252, 2256, 2260, 2264, 2268, 2272, 2276, 2280, 2284, 2288, 2292, 2296, 2300,
90 2304 };
91
92 const uint32_t dwDenoiseSCMThreshold[NOISEFACTOR_MAX + 1] = {
93 512, 514, 516, 518, 520, 522, 524, 526, 528, 530, 532, 534, 536, 538, 540, 542,
94 544, 546, 548, 550, 552, 554, 556, 558, 560, 562, 564, 566, 568, 570, 572, 574,
95 576, 578, 580, 582, 584, 586, 588, 590, 592, 594, 596, 598, 600, 602, 604, 606,
96 608, 610, 612, 614, 616, 618, 620, 622, 624, 626, 628, 630, 632, 634, 636, 638,
97 640 };
98
99 const uint32_t dwDenoiseMPThreshold[NOISEFACTOR_MAX + 1] = {
100 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
101 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
102 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1,
103 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1,
104 2 };
105
106 const uint32_t dwLTDThreshold[NOISEFACTOR_MAX + 1] = {
107 64, 65, 66, 67, 68, 69, 70, 71, 72, 73, 74, 75, 76, 77, 78, 79,
108 80, 81, 82, 83, 84, 85, 86, 87, 88, 89, 90, 91, 92, 93, 94, 95,
109 96, 97, 98, 99, 100, 101, 102, 103, 104, 105, 106, 107, 108, 109, 110, 111,
110 112, 113, 114, 115, 116, 117, 118, 119, 120, 121, 122, 123, 124, 125, 126, 127,
111 128 };
112
113 const uint32_t dwTDThreshold[NOISEFACTOR_MAX + 1] = {
114 128, 129, 130, 131, 132, 133, 134, 135, 136, 137, 138, 139, 140, 141, 142, 143,
115 144, 145, 146, 147, 148, 149, 150, 151, 152, 153, 154, 155, 156, 157, 158, 159,
116 160, 161, 162, 163, 164, 165, 166, 167, 168, 169, 170, 171, 172, 173, 174, 175,
117 176, 177, 178, 179, 180, 181, 182, 183, 184, 185, 186, 187, 188, 189, 190, 191,
118 192 };
119
120 const uint32_t dwGoodNeighborThreshold[NOISEFACTOR_MAX + 1] = {
121 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
122 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
123 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
124 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
125 0 };
126
127 const uint32_t dwPixRangeThreshold0[NOISEFACTOR_MAX + 1] = {
128 32, 37, 42, 47, 52, 57, 62, 67, 72, 77, 82, 87, 92, 97, 102, 107,
129 112, 117, 122, 127, 132, 137, 142, 147, 152, 157, 162, 167, 172, 177, 182, 187,
130 192, 198, 204, 210, 216, 222, 228, 234, 240, 246, 252, 258, 264, 270, 276, 282,
131 288, 294, 300, 306, 312, 318, 324, 330, 336, 342, 348, 354, 360, 366, 372, 378,
132 384 };
133
134 const uint32_t dwPixRangeThreshold1[NOISEFACTOR_MAX + 1] = {
135 64, 70, 76, 82, 88, 94, 100, 106, 112, 118, 124, 130, 136, 142, 148, 154,
136 160, 166, 172, 178, 184, 190, 196, 202, 208, 214, 220, 226, 232, 238, 244, 250,
137 256, 266, 276, 286, 296, 306, 316, 326, 336, 346, 356, 366, 376, 386, 396, 406,
138 416, 426, 436, 446, 456, 466, 476, 486, 496, 506, 516, 526, 536, 546, 556, 566,
139 576 };
140
141 const uint32_t dwPixRangeThreshold2[NOISEFACTOR_MAX + 1] = {
142 128, 140, 152, 164, 176, 188, 200, 212, 224, 236, 248, 260, 272, 284, 296, 308,
143 320, 332, 344, 356, 368, 380, 392, 404, 416, 428, 440, 452, 464, 476, 488, 500,
144 512, 524, 536, 548, 560, 572, 584, 596, 608, 620, 632, 644, 656, 668, 680, 692,
145 704, 716, 728, 740, 752, 764, 776, 788, 800, 812, 824, 836, 848, 860, 872, 884,
146 896 };
147
148 const uint32_t dwPixRangeThreshold3[NOISEFACTOR_MAX + 1] = {
149 128, 144, 160, 176, 192, 208, 224, 240, 256, 272, 288, 304, 320, 336, 352, 368,
150 384, 400, 416, 432, 448, 464, 480, 496, 512, 528, 544, 560, 576, 592, 608, 624,
151 640, 660, 680, 700, 720, 740, 760, 780, 800, 820, 840, 860, 880, 900, 920, 940,
152 960, 980, 1000, 1020, 1040, 1060, 1080, 1100, 1120, 1140, 1160, 1180, 1200, 1220, 1240, 1260,
153 1280 };
154
155 const uint32_t dwPixRangeThreshold4[NOISEFACTOR_MAX + 1] = {
156 128, 152, 176, 200, 224, 248, 272, 296, 320, 344, 368, 392, 416, 440, 464, 488,
157 512, 536, 560, 584, 608, 632, 656, 680, 704, 728, 752, 776, 800, 824, 848, 872,
158 896, 928, 960, 992, 1024, 1056, 1088, 1120, 1152, 1184, 1216, 1248, 1280, 1312, 1344, 1376,
159 1408, 1440, 1472, 1504, 1536, 1568, 1600, 1632, 1664, 1696, 1728, 1760, 1792, 1824, 1856, 1888,
160 1920 };
161
162 const uint32_t dwPixRangeThreshold5[NOISEFACTOR_MAX + 1] = {
163 128, 164, 200, 236, 272, 308, 344, 380, 416, 452, 488, 524, 560, 596, 632, 668,
164 704, 740, 776, 812, 848, 884, 920, 956, 992, 1028, 1064, 1100, 1136, 1172, 1208, 1244,
165 1280, 1320, 1360, 1400, 1440, 1480, 1520, 1560, 1600, 1640, 1680, 1720, 1760, 1800, 1840, 1880,
166 1920, 1960, 2000, 2040, 2080, 2120, 2160, 2200, 2240, 2280, 2320, 2360, 2400, 2440, 2480, 2520,
167 2560 };
168
169 const uint32_t dwPixRangeWeight0[NOISEFACTOR_MAX + 1] = {
170 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16,
171 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16,
172 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16,
173 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16,
174 16 };
175
176 const uint32_t dwPixRangeWeight1[NOISEFACTOR_MAX + 1] = {
177 9, 9, 9, 9, 9, 9, 9, 10, 10, 10, 10, 10, 10, 11, 11, 11,
178 11, 11, 11, 11, 12, 12, 12, 12, 12, 12, 13, 13, 13, 13, 13, 13,
179 14, 14, 14, 14, 14, 14, 14, 14, 14, 14, 14, 14, 14, 14, 14, 14,
180 14, 14, 14, 14, 14, 14, 14, 14, 14, 14, 14, 14, 14, 14, 14, 14,
181 15 };
182
183 const uint32_t dwPixRangeWeight2[NOISEFACTOR_MAX + 1] = {
184 2, 2, 2, 2, 3, 3, 3, 3, 4, 4, 4, 4, 5, 5, 5, 5,
185 6, 6, 6, 6, 7, 7, 7, 7, 8, 8, 8, 8, 9, 9, 9, 9,
186 10, 10, 10, 10, 10, 10, 10, 10, 10, 10, 10, 11, 11, 11, 11, 11,
187 11, 11, 11, 11, 11, 11, 12, 12, 12, 12, 12, 12, 12, 12, 12, 12,
188 13 };
189
190 const uint32_t dwPixRangeWeight3[NOISEFACTOR_MAX + 1] = {
191 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 2, 2, 2,
192 2, 2, 2, 2, 3, 3, 3, 3, 3, 3, 4, 4, 4, 4, 4, 4,
193 5, 5, 5, 5, 5, 5, 5, 6, 6, 6, 6, 6, 6, 7, 7, 7,
194 7, 7, 7, 7, 8, 8, 8, 8, 8, 8, 9, 9, 9, 9, 9, 9,
195 10 };
196
197 const uint32_t dwPixRangeWeight4[NOISEFACTOR_MAX + 1] = {
198 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
199 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1,
200 2, 2, 2, 2, 2, 2, 2, 3, 3, 3, 3, 3, 3, 4, 4, 4,
201 4, 4, 4, 4, 5, 5, 5, 5, 5, 5, 6, 6, 6, 6, 6, 6,
202 7 };
203
204 const uint32_t dwPixRangeWeight5[NOISEFACTOR_MAX + 1] = {
205 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
206 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
207 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 2, 2, 2, 2, 2,
208 2, 2, 2, 2, 2, 2, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3,
209 4 };
210
211 const uint32_t dwLTDThresholdUV[NOISEFACTOR_MAX + 1] = {
212 64, 65, 66, 67, 68, 69, 70, 71, 72, 73, 74, 75, 76,
213 77, 78, 79, 80, 81, 82, 83, 84, 85, 86, 87, 88, 89,
214 90, 91, 92, 93, 94, 95, 96, 97, 98, 99, 100, 101, 102,
215 103, 104, 105, 106, 107, 108, 109, 110, 111, 112, 113, 114, 115,
216 116, 117, 118, 119, 120, 121, 122, 123, 124, 125, 126, 127, 128 };
217
218 const uint32_t dwTDThresholdUV[NOISEFACTOR_MAX + 1] = {
219 160, 161, 162, 163, 164, 165, 166, 167, 168, 169, 170, 171, 172,
220 173, 174, 175, 176, 177, 178, 179, 180, 181, 182, 183, 184, 185,
221 186, 187, 188, 189, 190, 191, 192, 193, 194, 195, 196, 197, 198,
222 199, 200, 201, 202, 203, 204, 205, 206, 207, 208, 209, 210, 211,
223 212, 213, 214, 215, 216, 217, 218, 219, 220, 221, 222, 223, 224 };
224
225 const uint32_t dwSTADThresholdUV[NOISEFACTOR_MAX + 1] = {
226 2048, 2052, 2056, 2060, 2064, 2068, 2072, 2076, 2080, 2084, 2088, 2092, 2096,
227 2100, 2104, 2108, 2112, 2116, 2120, 2124, 2128, 2132, 2136, 2140, 2144, 2148,
228 2152, 2156, 2160, 2164, 2168, 2172, 2176, 2180, 2184, 2188, 2192, 2196, 2200,
229 2204, 2208, 2212, 2216, 2220, 2224, 2228, 2232, 2236, 2240, 2244, 2248, 2252,
230 2256, 2260, 2264, 2268, 2272, 2276, 2280, 2284, 2288, 2292, 2296, 2300, 2304};
231
232 //!
233 //! \brief Vebox format support check
234 //! \details Checks to see if Vebox operation is supported with source surface format
235 //! \param [in] pSrcSurface
236 //! Pointer to input surface of Vebox
237 //! \return bool
238 //! return true if input surface format is supported, otherwise false
239 //!
IsFormatSupported(PVPHAL_SURFACE pSrcSurface)240 bool VPHAL_VEBOX_STATE_G12_BASE::IsFormatSupported(
241 PVPHAL_SURFACE pSrcSurface)
242 {
243 bool bRet = false;
244 VPHAL_RENDER_CHK_NULL_NO_STATUS(pSrcSurface);
245
246 // Check if Sample Format is supported
247 // Vebox only support P016 format, P010 format can be supported by faking it as P016
248 if (pSrcSurface->Format != Format_NV12 &&
249 pSrcSurface->Format != Format_AYUV &&
250 pSrcSurface->Format != Format_P010 &&
251 pSrcSurface->Format != Format_P016 &&
252 pSrcSurface->Format != Format_P210 &&
253 pSrcSurface->Format != Format_P216 &&
254 pSrcSurface->Format != Format_Y8 &&
255 pSrcSurface->Format != Format_Y16U &&
256 pSrcSurface->Format != Format_Y16S &&
257 !IS_PA_FORMAT(pSrcSurface->Format))
258 {
259 VPHAL_RENDER_NORMALMESSAGE("Unsupported Source Format '0x%08x' for VEBOX.", pSrcSurface->Format);
260 goto finish;
261 }
262
263 bRet = true;
264
265 finish:
266 return bRet;
267 }
268
269 //!
270 //! \brief Vebox format support check
271 //! \details Checks to see if RT format is supported when Vebox output pipe is selected
272 //! \param [in] pSrcSurface
273 //! Pointer to Render source surface of VPP BLT
274 //! \param [in] pRTSurface
275 //! Pointer to Render target surface of VPP BLT
276 //! \return bool
277 //! return true if render target surface format is supported, otherwise false
278 //!
IsRTFormatSupported(PVPHAL_SURFACE pSrcSurface,PVPHAL_SURFACE pRTSurface)279 bool VPHAL_VEBOX_STATE_G12_BASE::IsRTFormatSupported(
280 PVPHAL_SURFACE pSrcSurface,
281 PVPHAL_SURFACE pRTSurface)
282 {
283 bool bRet = false;
284
285 if ((nullptr == pSrcSurface) || (nullptr == pRTSurface))
286 {
287 VPHAL_RENDER_ASSERTMESSAGE(" invalid surface");
288 return false;
289 }
290
291 // Check if RT Format is supported by Vebox
292 if (IS_PA_FORMAT(pRTSurface->Format) ||
293 pRTSurface->Format == Format_NV12 ||
294 pRTSurface->Format == Format_AYUV ||
295 pRTSurface->Format == Format_P010 ||
296 pRTSurface->Format == Format_P016 ||
297 pRTSurface->Format == Format_P210 ||
298 pRTSurface->Format == Format_P216 ||
299 pRTSurface->Format == Format_Y8 ||
300 pRTSurface->Format == Format_Y16U ||
301 pRTSurface->Format == Format_Y16S)
302 {
303 // Supported Vebox Render Target format. Vebox Pipe Output can be selected.
304 bRet = true;
305 }
306
307 if ((pSrcSurface->ColorSpace == CSpace_BT2020) &&
308 ((pSrcSurface->Format == Format_P010) ||
309 (pSrcSurface->Format == Format_P016)) &&
310 // YuvChannelSwap is no longer supported from GEN10+, so we only accept 32-bits no swapped format.
311 (IS_RGB32_FORMAT(pRTSurface->Format) && IS_RGB_NO_SWAP(pRTSurface->Format)))
312 {
313 bRet = true;
314 }
315
316 return bRet;
317 }
318
319 //!
320 //! \brief Vebox format support check for DN
321 //! \details Check if the input surface format is supported for DN
322 //! \param [in] pSrcSurface
323 //! Pointer to input surface of Vebox
324 //! \return bool
325 //! return true if input surface format is supported, otherwise false
326 //!
IsDnFormatSupported(PVPHAL_SURFACE pSrcSurface)327 bool VPHAL_VEBOX_STATE_G12_BASE::IsDnFormatSupported(
328 PVPHAL_SURFACE pSrcSurface)
329 {
330 if (nullptr == pSrcSurface)
331 {
332 VPHAL_RENDER_ASSERTMESSAGE(" invalid surface");
333 return false;
334 }
335 if ((pSrcSurface->Format != Format_YUYV) &&
336 (pSrcSurface->Format != Format_VYUY) &&
337 (pSrcSurface->Format != Format_YVYU) &&
338 (pSrcSurface->Format != Format_UYVY) &&
339 (pSrcSurface->Format != Format_YUY2) &&
340 (pSrcSurface->Format != Format_Y8) &&
341 (pSrcSurface->Format != Format_NV12) &&
342 (pSrcSurface->Format != Format_AYUV) &&
343 (pSrcSurface->Format != Format_Y216) &&
344 (pSrcSurface->Format != Format_Y210) &&
345 (pSrcSurface->Format != Format_Y416) &&
346 (pSrcSurface->Format != Format_Y410) &&
347 (pSrcSurface->Format != Format_P216) &&
348 (pSrcSurface->Format != Format_P010) &&
349 (pSrcSurface->Format != Format_P016) &&
350 (pSrcSurface->Format != Format_A8B8G8R8) &&
351 (pSrcSurface->Format != Format_A16B16G16R16))
352 {
353 VPHAL_RENDER_NORMALMESSAGE("Unsupported Format '0x%08x' for VEBOX DN.", pSrcSurface->Format);
354 return false;
355 }
356
357 return true;
358 }
359
360 //!
361 //! \brief Check if surface format is supported by DI
362 //! \details Check if surface format is supported by DI
363 //! \param [in] pSrc
364 //! Pointer to input surface of Vebox
365 //! \return bool
366 //! Return true if surface format is supported, otherwise return false
367 //!
IsDiFormatSupported(PVPHAL_SURFACE pSrc)368 bool VPHAL_VEBOX_STATE_G12_BASE::IsDiFormatSupported(
369 PVPHAL_SURFACE pSrc)
370 {
371 bool bRet = false;
372
373 VPHAL_RENDER_CHK_NULL_NO_STATUS(pSrc);
374
375 if (pSrc->Format != Format_AYUV &&
376 pSrc->Format != Format_Y416 &&
377 pSrc->Format != Format_Y410 &&
378 pSrc->Format != Format_A8B8G8R8 &&
379 pSrc->Format != Format_A8R8G8B8 &&
380 pSrc->Format != Format_B10G10R10A2 &&
381 pSrc->Format != Format_R10G10B10A2 &&
382 pSrc->Format != Format_A16B16G16R16 &&
383 pSrc->Format != Format_A16R16G16B16)
384 {
385 bRet = true;
386 }
387 else
388 {
389 bRet = false;
390 }
391
392 finish:
393 return bRet;
394 }
395
396 //!
397 //! \brief IsFormatMMCSupported
398 //! \details Check if the format of vebox output surface is supported by MMC
399 //! \param [in] format
400 //! \return bool true if suported, otherwise not supported
401 //!
IsFormatMMCSupported(MOS_FORMAT format)402 bool VPHAL_VEBOX_STATE_G12_BASE::IsFormatMMCSupported(
403 MOS_FORMAT format)
404 {
405 bool bRet = false;
406
407 if ((format != Format_YUY2) &&
408 (format != Format_Y210) &&
409 (format != Format_Y410) &&
410 (format != Format_Y216) &&
411 (format != Format_Y416) &&
412 (format != Format_P010) &&
413 (format != Format_P016) &&
414 (format != Format_AYUV) &&
415 (format != Format_NV21) &&
416 (format != Format_NV12) &&
417 (format != Format_UYVY) &&
418 (format != Format_YUYV) &&
419 (format != Format_R10G10B10A2) &&
420 (format != Format_B10G10R10A2) &&
421 (format != Format_A8B8G8R8) &&
422 (format != Format_X8B8G8R8) &&
423 (format != Format_A8R8G8B8) &&
424 (format != Format_X8R8G8B8) &&
425 (format != Format_A16B16G16R16F) &&
426 (format != Format_A16R16G16B16F))
427 {
428 VPHAL_RENDER_NORMALMESSAGE("Unsupported Format '0x%08x' for VEBOX MMC ouput.", format);
429 goto finish;
430 }
431
432 bRet = true;
433
434 finish:
435 return bRet;
436 }
437
GetFFDISurfParams(VPHAL_CSPACE & ColorSpace,VPHAL_SAMPLE_TYPE & SampleType)438 MOS_STATUS VPHAL_VEBOX_STATE_G12_BASE::GetFFDISurfParams(
439 VPHAL_CSPACE &ColorSpace,
440 VPHAL_SAMPLE_TYPE &SampleType)
441 {
442 PVPHAL_VEBOX_RENDER_DATA pRenderData = GetLastExecRenderData();
443
444 VPHAL_RENDER_CHK_NULL_RETURN(pRenderData);
445 if (IS_VPHAL_OUTPUT_PIPE_SFC(pRenderData))
446 {
447 ColorSpace = m_sfcPipeState->GetInputColorSpace();
448 }
449 else
450 {
451 ColorSpace = m_currentSurface->ColorSpace;
452 }
453
454 // When IECP is enabled and Bob or interlaced scaling is selected for interlaced input,
455 // output surface's SampleType should be same to input's. Bob is being
456 // done in Composition part
457 if ((pRenderData->bIECP &&
458 (m_currentSurface->pDeinterlaceParams &&
459 m_currentSurface->pDeinterlaceParams->DIMode == DI_MODE_BOB)) ||
460 m_currentSurface->bInterlacedScaling)
461 {
462 SampleType = m_currentSurface->SampleType;
463 }
464 else
465 {
466 SampleType = SAMPLE_PROGRESSIVE;
467 }
468
469 return MOS_STATUS_SUCCESS;
470 }
471
472 //!
473 //! \brief Get Output surface params needed when allocate surfaces
474 //! \details Get Output surface params needed when allocate surfaces
475 //! \param [out] Format
476 //! Format of output surface
477 //! \param [out] TileType
478 //! Tile type of output surface
479 //! \return MOS_STATUS
480 //! Return MOS_STATUS_SUCCESS if success, otherwise failed
481 //!
GetOutputSurfParams(MOS_FORMAT & Format,MOS_TILE_TYPE & TileType)482 MOS_STATUS VPHAL_VEBOX_STATE_G12_BASE::GetOutputSurfParams(
483 MOS_FORMAT &Format,
484 MOS_TILE_TYPE &TileType)
485 {
486 PVPHAL_VEBOX_RENDER_DATA pRenderData = GetLastExecRenderData();
487 VPHAL_RENDER_CHK_NULL_RETURN(pRenderData);
488
489 if (pRenderData->bDeinterlace)
490 {
491 //set vebox output as NV12 if render target is non_YUY2 for saving bandwidth.
492 if (pRenderData->pRenderTarget->Format == Format_YUY2)
493 {
494 Format = Format_YUY2;
495 }
496 else
497 {
498 Format = Format_NV12;
499 }
500 TileType = MOS_TILE_Y;
501 }
502 else
503 {
504 Format = IS_VPHAL_OUTPUT_PIPE_SFC(pRenderData) ?
505 m_sfcPipeState->GetInputFormat() :
506 m_currentSurface->Format;
507 TileType = m_currentSurface->TileType;
508 }
509
510 return MOS_STATUS_SUCCESS;
511 }
512
513 //!
514 //! \brief Check for DN only case
515 //! \details Check for DN only case
516 //! \return bool
517 //! Return true if DN only case, otherwise not
518 //!
IsDNOnly()519 bool VPHAL_VEBOX_STATE_G12_BASE::IsDNOnly()
520 {
521 PVPHAL_VEBOX_RENDER_DATA pRenderData = GetLastExecRenderData();
522 VPHAL_RENDER_CHK_NULL_NO_STATUS(pRenderData);
523
524 return pRenderData->bDenoise &&
525 (!pRenderData->bDeinterlace) &&
526 (!IsQueryVarianceEnabled()) &&
527 (!IsIECPEnabled());
528 finish:
529 return false;
530 }
531
IsFFDISurfNeeded()532 bool VPHAL_VEBOX_STATE_G12_BASE::IsFFDISurfNeeded()
533 {
534 PVPHAL_VEBOX_RENDER_DATA pRenderData = GetLastExecRenderData();
535 VPHAL_RENDER_CHK_NULL_NO_STATUS(pRenderData);
536
537
538 if (pRenderData->bDeinterlace ||
539 IsQueryVarianceEnabled() ||
540 pRenderData->bIECP ||
541 (pRenderData->bDenoise && IS_VPHAL_OUTPUT_PIPE_SFC(pRenderData))) // DN + SFC needs IECP implicitly and outputs to DI surface
542 {
543 return true;
544 }
545 else
546 {
547 return false;
548 }
549 finish:
550 return false;
551 }
552
IsFFDNSurfNeeded()553 bool VPHAL_VEBOX_STATE_G12_BASE::IsFFDNSurfNeeded()
554 {
555 PVPHAL_VEBOX_RENDER_DATA pRenderData = GetLastExecRenderData();
556 VPHAL_RENDER_CHK_NULL_NO_STATUS(pRenderData);
557 return pRenderData->bDenoise ? true : false;
558 finish:
559 return false;
560 }
561
IsSTMMSurfNeeded()562 bool VPHAL_VEBOX_STATE_G12_BASE::IsSTMMSurfNeeded()
563 {
564 PVPHAL_VEBOX_RENDER_DATA pRenderData = GetLastExecRenderData();
565 VPHAL_RENDER_CHK_NULL_NO_STATUS(pRenderData);
566 return (pRenderData->bDenoise || pRenderData->bDeinterlace);
567 finish:
568 return false;
569 }
570
571 //!
572 //! \brief Vebox allocate resources
573 //! \details Allocate resources that will be used in Vebox
574 //! \return MOS_STATUS
575 //! Return MOS_STATUS_SUCCESS if successful, otherwise failed
576 //!
AllocateResources()577 MOS_STATUS VPHAL_VEBOX_STATE_G12_BASE::AllocateResources()
578 {
579 MOS_STATUS eStatus;
580 PMOS_INTERFACE pOsInterface;
581 PRENDERHAL_INTERFACE pRenderHal;
582 MOS_FORMAT format;
583 MOS_TILE_TYPE TileType;
584 uint32_t dwWidth;
585 uint32_t dwHeight;
586 uint32_t dwSize;
587 int32_t i;
588 bool bAllocated;
589 bool bDIEnable;
590 bool bSurfCompressible;
591 bool bFFDNSurfCompressible;
592 bool bFFDISurfCompressible;
593 MOS_RESOURCE_MMC_MODE FFDISurfCompressionMode;
594 MOS_RESOURCE_MMC_MODE SurfCompressionMode;
595 MOS_RESOURCE_MMC_MODE FFDNSurfCompressionMode;
596 MHW_VEBOX_SURFACE_PARAMS MhwVeboxSurfaceParam;
597 PMHW_VEBOX_INTERFACE pVeboxInterface;
598 PVPHAL_VEBOX_STATE_G12_BASE pVeboxState = this;
599 PVPHAL_VEBOX_RENDER_DATA pRenderData = GetLastExecRenderData();
600 uint8_t InitValue;
601 Mos_MemPool memTypeSurfVideoMem = MOS_MEMPOOL_VIDEOMEMORY;
602 MOS_TILE_MODE_GMM tileModeByForce = MOS_TILE_UNSET_GMM;
603
604 bAllocated = false;
605 bSurfCompressible = false;
606 bFFDNSurfCompressible = false;
607 bFFDISurfCompressible = false;
608 FFDISurfCompressionMode = MOS_MMC_DISABLED;
609 SurfCompressionMode = MOS_MMC_DISABLED;
610 FFDNSurfCompressionMode = MOS_MMC_DISABLED;
611 pOsInterface = pVeboxState->m_pOsInterface;
612 pRenderHal = pVeboxState->m_pRenderHal;
613 pVeboxInterface = pVeboxState->m_pVeboxInterface;
614 InitValue = 0;
615 // change the init value when null hw is enabled
616 VPHAL_RENDER_CHK_NULL(pOsInterface);
617 VPHAL_RENDER_CHK_NULL(pRenderData);
618
619 if (pOsInterface->bNullHwIsEnabled)
620 {
621 InitValue = 0x80;
622 }
623
624 if (MEDIA_IS_SKU(pVeboxState->m_pSkuTable, FtrLimitedLMemBar))
625 {
626 memTypeSurfVideoMem = MOS_MEMPOOL_DEVICEMEMORY;
627 }
628
629 GetOutputSurfParams(format, TileType);
630
631 // In DN only case, input, output and previous De-noised
632 // surfaces all should have precisely the same memory compression status.
633 // Either all these surfaces should be compressed together
634 // or none of them compressed at all.This is HW limitation.
635 if (IsDNOnly())
636 {
637 bSurfCompressible = pVeboxState->m_currentSurface->bCompressible;
638 SurfCompressionMode = pVeboxState->m_currentSurface->CompressionMode;
639 }
640 // Only Tiled Y surfaces support MMC
641 else if (pVeboxState->bEnableMMC &&
642 (TileType == MOS_TILE_Y) &&
643 IsFormatMMCSupported(format))
644 {
645 bSurfCompressible = true;
646 SurfCompressionMode = MOS_MMC_MC;
647 }
648
649 // Allocate FFDI/IECP surfaces----------------------------------------------
650 if (IsFFDISurfNeeded())
651 {
652 VPHAL_CSPACE ColorSpace;
653 VPHAL_SAMPLE_TYPE SampleType;
654
655 VPHAL_RENDER_CHK_STATUS(GetFFDISurfParams(ColorSpace, SampleType));
656
657 if (SampleType != SAMPLE_PROGRESSIVE)
658 {
659 bFFDISurfCompressible = false;
660 FFDISurfCompressionMode = MOS_MMC_DISABLED;
661 }
662 else
663 {
664 bFFDISurfCompressible = bSurfCompressible;
665 FFDISurfCompressionMode = SurfCompressionMode;
666 }
667
668 for (i = 0; i < pVeboxState->iNumFFDISurfaces; i++)
669 {
670 VPHAL_RENDER_CHK_STATUS(VpHal_ReAllocateSurface(
671 pOsInterface,
672 pVeboxState->FFDISurfaces[i],
673 "VeboxFFDISurface_g12",
674 format,
675 MOS_GFXRES_2D,
676 TileType,
677 pVeboxState->m_currentSurface->dwWidth,
678 pVeboxState->m_currentSurface->dwHeight,
679 bFFDISurfCompressible,
680 FFDISurfCompressionMode,
681 &bAllocated,
682 MOS_HW_RESOURCE_DEF_MAX,
683 MOS_TILE_UNSET_GMM,
684 memTypeSurfVideoMem,
685 VPP_INTER_RESOURCE_NOTLOCKABLE));
686
687 pVeboxState->FFDISurfaces[i]->SampleType = SampleType;
688
689 // Copy rect sizes so that if input surface state needs to adjust,
690 // output surface can be adjustted also.
691 pVeboxState->FFDISurfaces[i]->rcSrc = pVeboxState->m_currentSurface->rcSrc;
692 pVeboxState->FFDISurfaces[i]->rcDst = pVeboxState->m_currentSurface->rcDst;
693 // Copy max src rect
694 pVeboxState->FFDISurfaces[i]->rcMaxSrc = pVeboxState->m_currentSurface->rcMaxSrc;
695
696 // Copy Rotation, it's used in setting SFC state
697 pVeboxState->FFDISurfaces[i]->Rotation = pVeboxState->m_currentSurface->Rotation;
698
699 pVeboxState->FFDISurfaces[i]->ColorSpace = ColorSpace;
700
701 // Copy ScalingMode, it's used in setting SFC state
702 pVeboxState->FFDISurfaces[i]->ScalingMode = pVeboxState->m_currentSurface->ScalingMode;
703
704 if (bAllocated)
705 {
706 // Report Compress Status
707 m_reporting->GetFeatures().ffdiCompressible = bSurfCompressible;
708 m_reporting->GetFeatures().ffdiCompressMode = (uint8_t)(SurfCompressionMode);
709 }
710 }
711 }
712 else
713 {
714 // Free FFDI surfaces
715 for (i = 0; i < pVeboxState->iNumFFDISurfaces; i++)
716 {
717 if (pVeboxState->FFDISurfaces[i])
718 {
719 pOsInterface->pfnFreeResource(
720 pOsInterface,
721 &pVeboxState->FFDISurfaces[i]->OsResource);
722 }
723 }
724 }
725
726 // When DI switch to DNDI, the first FFDN surface pitch doesn't match with
727 // the input surface pitch and cause the flicker issue
728 // Or for 2 clip playback in WMP, the first one is HW decoding, the second one is SW decoding,
729 // when the second clip playback starting without media pipeline recreation,
730 // the internal FFDNSurfaces are compressed, but VP input surface is uncompressed.
731 if ((pVeboxState->bDIEnabled && !pVeboxState->bDNEnabled && pRenderData->bDenoise) ||
732 ((pVeboxState->m_currentSurface->bIsCompressed == false) && ((bSurfCompressible == true) || (pVeboxState->FFDNSurfaces[0]->bIsCompressed == true))))
733 {
734 bFFDNSurfCompressible = pVeboxState->m_currentSurface->bCompressible;
735 FFDNSurfCompressionMode = pVeboxState->m_currentSurface->CompressionMode;
736 }
737 else
738 {
739 bFFDNSurfCompressible = bSurfCompressible;
740 FFDNSurfCompressionMode = SurfCompressionMode;
741 }
742
743 tileModeByForce = MOS_TILE_UNSET_GMM;
744 //DN output surface must be tile64 only when input format is bayer
745 if (!MEDIA_IS_SKU(pVeboxState->m_pSkuTable, FtrTileY) &&
746 IS_BAYER_FORMAT(pVeboxState->m_currentSurface->Format))
747 {
748 VPHAL_RENDER_NORMALMESSAGE("tilemode: media support tile encoding 1");
749 tileModeByForce = MOS_TILE_64_GMM;
750 }
751 // Allocate FFDN surfaces---------------------------------------------------
752 if (IsFFDNSurfNeeded())
753 {
754 for (i = 0; i < VPHAL_NUM_FFDN_SURFACES; i++)
755 {
756 VPHAL_RENDER_CHK_STATUS(VpHal_ReAllocateSurface(
757 pOsInterface,
758 pVeboxState->FFDNSurfaces[i],
759 "VeboxFFDNSurface_g12",
760 pVeboxState->m_currentSurface->Format,
761 MOS_GFXRES_2D,
762 pVeboxState->m_currentSurface->TileType,
763 pVeboxState->m_currentSurface->dwWidth,
764 pVeboxState->m_currentSurface->dwHeight,
765 bFFDNSurfCompressible,
766 FFDNSurfCompressionMode,
767 &bAllocated,
768 MOS_HW_RESOURCE_DEF_MAX,
769 tileModeByForce,
770 memTypeSurfVideoMem,
771 VPP_INTER_RESOURCE_NOTLOCKABLE));
772
773 // if allocated, pVeboxState->PreviousSurface is not valid for DN reference.
774 if (bAllocated)
775 {
776 // If DI is enabled, try to use app's reference if provided
777 if (pRenderData->bRefValid &&
778 pRenderData->bDeinterlace &&
779 (pVeboxState->m_currentSurface->pBwdRef != nullptr) &&
780 (pVeboxState->FFDNSurfaces[i]->dwPitch == pVeboxState->m_currentSurface->pBwdRef->dwPitch))
781 {
782 CopySurfaceValue(pVeboxState->m_previousSurface, pVeboxState->m_currentSurface->pBwdRef);
783 }
784 else
785 {
786 pRenderData->bRefValid = false;
787 }
788 }
789
790 // DN's output format should be same to input
791 pVeboxState->FFDNSurfaces[i]->SampleType = pVeboxState->m_currentSurface->SampleType;
792
793 // Copy rect sizes so that if input surface state needs to adjust,
794 // output surface can be adjustted also.
795 pVeboxState->FFDNSurfaces[i]->rcSrc = pVeboxState->m_currentSurface->rcSrc;
796 pVeboxState->FFDNSurfaces[i]->rcDst = pVeboxState->m_currentSurface->rcDst;
797 // Copy max src rect
798 pVeboxState->FFDNSurfaces[i]->rcMaxSrc = pVeboxState->m_currentSurface->rcMaxSrc;
799
800 // Set Colorspace of FFDN
801 pVeboxState->FFDNSurfaces[i]->ColorSpace = pVeboxState->m_currentSurface->ColorSpace;
802
803 // Copy FrameID and parameters, as DN output will be used as next blt's current
804 pVeboxState->FFDNSurfaces[i]->FrameID = pVeboxState->m_currentSurface->FrameID;
805 pVeboxState->FFDNSurfaces[i]->pDenoiseParams = pVeboxState->m_currentSurface->pDenoiseParams;
806 // Copy ScalingMode, it's used in setting SFC state
807 pVeboxState->FFDNSurfaces[i]->ScalingMode = pVeboxState->m_currentSurface->ScalingMode;
808
809 if (bAllocated)
810 {
811 // Report Compress Status
812 m_reporting->GetFeatures().ffdnCompressible = bFFDNSurfCompressible;
813 m_reporting->GetFeatures().ffdnCompressMode = (uint8_t)(FFDNSurfCompressionMode);
814 }
815 }
816 }
817 else
818 {
819 // Free FFDN surfaces
820 for (i = 0; i < VPHAL_NUM_FFDN_SURFACES; i++)
821 {
822 if (pVeboxState->FFDNSurfaces[i])
823 {
824 pOsInterface->pfnFreeResource(
825 pOsInterface,
826 &pVeboxState->FFDNSurfaces[i]->OsResource);
827 }
828 }
829 }
830
831 // Adjust the rcMaxSrc of pRenderTarget when Vebox output is enabled
832 if (IS_VPHAL_OUTPUT_PIPE_VEBOX(pRenderData))
833 {
834 pRenderData->pRenderTarget->rcMaxSrc = pVeboxState->m_currentSurface->rcMaxSrc;
835 }
836
837 tileModeByForce = MOS_TILE_UNSET_GMM;
838 if (!MEDIA_IS_SKU(pVeboxState->m_pSkuTable, FtrTileY))
839 {
840 VPHAL_RENDER_NORMALMESSAGE("tilemode: media support tile encoding 1");
841 tileModeByForce = MOS_TILE_64_GMM;
842 }
843 // Allocate STMM (Spatial-Temporal Motion Measure) Surfaces------------------
844 if (IsSTMMSurfNeeded())
845 {
846 bSurfCompressible = false;
847 SurfCompressionMode = MOS_MMC_DISABLED;
848
849 for (i = 0; i < VPHAL_NUM_STMM_SURFACES; i++)
850 {
851 VPHAL_RENDER_CHK_STATUS(VpHal_ReAllocateSurface(
852 pOsInterface,
853 &pVeboxState->STMMSurfaces[i],
854 "VeboxSTMMSurface_g12",
855 Format_STMM,
856 MOS_GFXRES_2D,
857 MOS_TILE_Y,
858 pVeboxState->m_currentSurface->dwWidth,
859 pVeboxState->m_currentSurface->dwHeight,
860 bSurfCompressible,
861 SurfCompressionMode,
862 &bAllocated,
863 MOS_HW_RESOURCE_DEF_MAX,
864 tileModeByForce));
865
866 if (bAllocated)
867 {
868 VPHAL_RENDER_CHK_STATUS(VeboxInitSTMMHistory(i));
869
870 // Report Compress Status
871 m_reporting->GetFeatures().stmmCompressible = bSurfCompressible;
872 m_reporting->GetFeatures().stmmCompressMode = (uint8_t)(SurfCompressionMode);
873 }
874 }
875 }
876 else
877 {
878 // Free DI history buffers (STMM = Spatial-temporal motion measure)
879 for (i = 0; i < VPHAL_NUM_STMM_SURFACES; i++)
880 {
881 pOsInterface->pfnFreeResource(
882 pOsInterface,
883 &pVeboxState->STMMSurfaces[i].OsResource);
884 }
885 }
886
887 // Allocate BT2020 CSC temp surface----------------------------------------------
888 if (pRenderData->b2PassesCSC)
889 {
890 VPHAL_RENDER_CHK_STATUS(VpHal_ReAllocateSurface(
891 pOsInterface,
892 &pVeboxState->m_BT2020CSCTempSurface,
893 "VeboxBT2020CSCTempSurface_g12",
894 Format_A8B8G8R8,
895 MOS_GFXRES_2D,
896 MOS_TILE_Y,
897 pVeboxState->m_currentSurface->dwWidth,
898 pVeboxState->m_currentSurface->dwHeight,
899 false,
900 MOS_MMC_DISABLED,
901 &bAllocated));
902
903 // Copy rect sizes so that if input surface state needs to adjust,
904 // output surface can be adjustted also.
905 pVeboxState->m_BT2020CSCTempSurface.rcSrc = pVeboxState->m_currentSurface->rcSrc;
906 pVeboxState->m_BT2020CSCTempSurface.rcDst = pVeboxState->m_currentSurface->rcDst;
907 // Copy max src rect
908 pVeboxState->m_BT2020CSCTempSurface.rcMaxSrc = pVeboxState->m_currentSurface->rcMaxSrc;
909
910 // Copy Rotation, it's used in setting SFC state
911 pVeboxState->m_BT2020CSCTempSurface.Rotation = pVeboxState->m_currentSurface->Rotation;
912 pVeboxState->m_BT2020CSCTempSurface.SampleType = pVeboxState->m_currentSurface->SampleType;
913 pVeboxState->m_BT2020CSCTempSurface.ColorSpace = CSpace_sRGB;
914 // Copy ScalingMode, it's used in setting SFC state
915 pVeboxState->m_BT2020CSCTempSurface.ScalingMode = pVeboxState->m_currentSurface->ScalingMode;
916 }
917
918 // Allocate Statistics State Surface----------------------------------------
919 // Width to be a aligned on 64 bytes and height is 1/4 the height
920 // Per frame information written twice per frame for 2 slices
921 // Surface to be a rectangle aligned with dwWidth to get proper dwSize
922 bDIEnable = pRenderData->bDeinterlace || IsQueryVarianceEnabled();
923
924 VPHAL_RENDER_CHK_STATUS(VpHal_InitVeboxSurfaceParams(pVeboxState->m_currentSurface, &MhwVeboxSurfaceParam));
925 VPHAL_RENDER_CHK_STATUS(pVeboxInterface->VeboxAdjustBoundary(
926 &MhwVeboxSurfaceParam,
927 &dwWidth,
928 &dwHeight,
929 bDIEnable));
930
931 dwWidth = MOS_ALIGN_CEIL(dwWidth, 64);
932 dwHeight = MOS_ROUNDUP_DIVIDE(dwHeight, 4) + MOS_ROUNDUP_DIVIDE(VPHAL_VEBOX_STATISTICS_SIZE_G12 * sizeof(uint32_t), dwWidth);
933 dwSize = dwWidth * dwHeight;
934
935 VPHAL_RENDER_CHK_STATUS(VpHal_ReAllocateSurface(
936 pOsInterface,
937 &pVeboxState->VeboxStatisticsSurface,
938 "VeboxStatisticsSurface_g12",
939 Format_Buffer,
940 MOS_GFXRES_BUFFER,
941 MOS_TILE_LINEAR,
942 dwSize,
943 1,
944 false,
945 MOS_MMC_DISABLED,
946 &bAllocated));
947
948 if (bAllocated)
949 {
950 // initialize Statistics Surface
951 VPHAL_RENDER_CHK_STATUS(pOsInterface->pfnFillResource(
952 pOsInterface,
953 &(pVeboxState->VeboxStatisticsSurface.OsResource),
954 dwSize,
955 InitValue));
956
957 pVeboxState->dwVeboxPerBlockStatisticsWidth = dwWidth;
958 pVeboxState->dwVeboxPerBlockStatisticsHeight = dwHeight - MOS_ROUNDUP_DIVIDE(VPHAL_VEBOX_STATISTICS_SIZE_G12 * sizeof(uint32_t), dwWidth);
959 }
960
961 // Allocate Rgb Histogram surface----------------------------------------------
962 // Size of RGB histograms, 1 set for each slice. For single slice, other set will be 0
963 dwSize = VPHAL_VEBOX_RGB_HISTOGRAM_SIZE_G12;
964 dwSize += VPHAL_VEBOX_RGB_ACE_HISTOGRAM_SIZE_RESERVED_G12;
965 // Size of ACE histograms, 1 set for each slice. For single slice, other set will be 0
966 dwSize += VPHAL_VEBOX_ACE_HISTOGRAM_SIZE_PER_FRAME_PER_SLICE * // Ace histogram size per slice
967 VPHAL_NUM_FRAME_PREVIOUS_CURRENT * // Ace for Prev + Curr
968 VPHAL_VEBOX_HISTOGRAM_SLICES_COUNT; // Total number of slices
969
970 VPHAL_RENDER_CHK_STATUS(VpHal_ReAllocateSurface(
971 pOsInterface,
972 &pVeboxState->VeboxRGBHistogram,
973 "VeboxRgbHistogram_g12",
974 Format_Buffer,
975 MOS_GFXRES_BUFFER,
976 MOS_TILE_LINEAR,
977 dwSize,
978 1,
979 false,
980 MOS_MMC_DISABLED,
981 &bAllocated));
982
983 if (bAllocated && pOsInterface->bNullHwIsEnabled)
984 {
985 // Initialize VeboxRGBHistogram Surface
986 VPHAL_RENDER_CHK_STATUS(pOsInterface->pfnFillResource(
987 pOsInterface,
988 &(pVeboxState->VeboxRGBHistogram.OsResource),
989 dwSize,
990 InitValue));
991 }
992
993 #if VEBOX_AUTO_DENOISE_SUPPORTED
994 // Allocate Temp Surface for Vebox Update kernels----------------------------------------
995 // the surface size is one Page
996 dwSize = MHW_PAGE_SIZE;
997
998 VPHAL_RENDER_CHK_STATUS(VpHal_ReAllocateSurface(
999 pOsInterface,
1000 &pVeboxState->VeboxTempSurface,
1001 "VeboxTempSurface_g12",
1002 Format_Buffer,
1003 MOS_GFXRES_BUFFER,
1004 MOS_TILE_LINEAR,
1005 dwSize,
1006 1,
1007 false,
1008 MOS_MMC_DISABLED,
1009 &bAllocated));
1010
1011 if (bAllocated)
1012 {
1013 // initialize Statistics Surface
1014 VPHAL_RENDER_CHK_STATUS(pOsInterface->pfnFillResource(
1015 pOsInterface,
1016 &(pVeboxState->VeboxTempSurface.OsResource),
1017 dwSize,
1018 0));
1019 }
1020
1021 // Allocate Spatial Attributes Configuration Surface for DN kernel GEN11-----------
1022 dwSize = MHW_PAGE_SIZE;
1023
1024 VPHAL_RENDER_CHK_STATUS(VpHal_ReAllocateSurface(
1025 pOsInterface,
1026 &pVeboxState->VeboxSpatialAttributesConfigurationSurface,
1027 "VeboxSpatialAttributesConfigurationSurface_g12",
1028 Format_RAW,
1029 MOS_GFXRES_BUFFER,
1030 MOS_TILE_LINEAR,
1031 dwSize,
1032 1,
1033 false,
1034 MOS_MMC_DISABLED,
1035 &bAllocated));
1036
1037 if (bAllocated)
1038 {
1039 // initialize Spatial Attributes Configuration Surface
1040 VPHAL_RENDER_CHK_STATUS(VeboxInitSpatialAttributesConfiguration());
1041 }
1042 #endif
1043
1044 if (pRenderData->bHdr3DLut)
1045 {
1046 if (pVeboxState->m_currentSurface->p3DLutParams)
1047 {
1048 pVeboxState->Vebox3DLookUpTables = *(pVeboxState->m_currentSurface->p3DLutParams->pExt3DLutSurface);
1049 }
1050 else
1051 {
1052 // Allocate 3DLut Table Surface
1053 const uint32_t dwSegSize = 65;
1054 const uint32_t dwMulSize = 128;
1055 uint32_t dwSizeInBytes = dwSegSize * dwSegSize * dwMulSize * 8;
1056 VPHAL_RENDER_CHK_STATUS(VpHal_ReAllocateSurface(
1057 pOsInterface,
1058 &pVeboxState->Vebox3DLookUpTables,
1059 "Vebox3DLutTableSurface_g12",
1060 Format_Buffer,
1061 MOS_GFXRES_BUFFER,
1062 MOS_TILE_LINEAR,
1063 dwSizeInBytes,
1064 1,
1065 false,
1066 MOS_MMC_DISABLED,
1067 &bAllocated));
1068
1069 if (nullptr == m_hdr3DLutGenerator)
1070 {
1071 #if defined(ENABLE_KERNELS) && !defined(_FULL_OPEN_SOURCE)
1072 PRENDERHAL_INTERFACE pRenderHal = pVeboxState->m_pRenderHal;
1073 m_hdr3DLutGenerator = MOS_New(Hdr3DLutGeneratorG12, pRenderHal, m_hdr3DLutKernelBinary, m_hdr3DLutKernelBinarySize);
1074 if (!m_hdr3DLutGenerator->IsObjectVaild())
1075 {
1076 eStatus = MOS_STATUS_NULL_POINTER;
1077 MOS_Delete(m_hdr3DLutGenerator);
1078 VPHAL_RENDER_ASSERTMESSAGE("Failed to creat Hdr3DLutGeneratorG12");
1079 }
1080 #endif
1081 }
1082 }
1083 }
1084
1085 finish:
1086 if (eStatus != MOS_STATUS_SUCCESS)
1087 {
1088 pVeboxState->FreeResources();
1089 }
1090
1091 return eStatus;
1092 }
1093
1094 //!
1095 //! \brief Vebox free resources
1096 //! \details Free resources that are used in Vebox
1097 //! \return void
1098 //!
FreeResources()1099 void VPHAL_VEBOX_STATE_G12_BASE::FreeResources()
1100 {
1101 PVPHAL_VEBOX_STATE_G12_BASE pVeboxState = this;
1102 PMOS_INTERFACE pOsInterface = pVeboxState->m_pOsInterface;
1103 VPHAL_RENDER_CHK_NULL_NO_STATUS(pOsInterface);
1104
1105 // Free 3DLook Up table surface which is allocated in VEBOX
1106 // If it is the external surface, the external needs to call free explicitly
1107 // e.g. pVeboxState->m_currentSurface->p3DLutParams->pExt3DLutSurface
1108 // is allocated by App, passed to driver for VEBOX access, this surface should
1109 // be freed by App instead of driver.
1110 if ((pVeboxState->m_currentSurface) &&
1111 (pVeboxState->m_currentSurface->p3DLutParams == NULL))
1112 {
1113 pOsInterface->pfnFreeResource(
1114 pOsInterface,
1115 &pVeboxState->Vebox3DLookUpTables.OsResource);
1116 }
1117
1118 // Free FFDI surfaces
1119 for (int i = 0; i < pVeboxState->iNumFFDISurfaces; i++)
1120 {
1121 if (pVeboxState->FFDISurfaces[i])
1122 {
1123 pOsInterface->pfnFreeResource(
1124 pOsInterface,
1125 &pVeboxState->FFDISurfaces[i]->OsResource);
1126 }
1127 }
1128
1129 // Free FFDN surfaces
1130 for (int i = 0; i < VPHAL_NUM_FFDN_SURFACES; i++)
1131 {
1132 if (pVeboxState->FFDNSurfaces[i])
1133 {
1134 pOsInterface->pfnFreeResource(
1135 pOsInterface,
1136 &pVeboxState->FFDNSurfaces[i]->OsResource);
1137 }
1138 }
1139
1140 // Free DI history buffers (STMM = Spatial-temporal motion measure)
1141 for (int i = 0; i < VPHAL_NUM_STMM_SURFACES; i++)
1142 {
1143 pOsInterface->pfnFreeResource(
1144 pOsInterface,
1145 &pVeboxState->STMMSurfaces[i].OsResource);
1146 }
1147
1148 // Free Statistics data surface for VEBOX
1149 pOsInterface->pfnFreeResource(
1150 pOsInterface,
1151 &pVeboxState->VeboxStatisticsSurface.OsResource);
1152
1153 // Free Rgb Histogram surface for VEBOX
1154 pOsInterface->pfnFreeResource(
1155 pOsInterface,
1156 &pVeboxState->VeboxRGBHistogram.OsResource);
1157
1158 // Free BT2020 CSC temp surface for VEBOX used by BT2020 CSC
1159 pOsInterface->pfnFreeResource(
1160 pOsInterface,
1161 &pVeboxState->m_BT2020CSCTempSurface.OsResource);
1162
1163 #if VEBOX_AUTO_DENOISE_SUPPORTED
1164 // Free Spatial Attributes Configuration Surface for DN kernel
1165 pOsInterface->pfnFreeResource(
1166 pOsInterface,
1167 &pVeboxState->VeboxSpatialAttributesConfigurationSurface.OsResource);
1168
1169 // Free Temp Surface for VEBOX
1170 pOsInterface->pfnFreeResource(
1171 pOsInterface,
1172 &pVeboxState->VeboxTempSurface.OsResource);
1173 #endif
1174
1175 // Free SFC resources
1176 if (MEDIA_IS_SKU(pVeboxState->m_pSkuTable, FtrSFCPipe) &&
1177 m_sfcPipeState)
1178 {
1179 m_sfcPipeState->FreeResources();
1180 }
1181
1182 MOS_Delete(m_hdr3DLutGenerator);
1183
1184 finish:
1185 return;
1186 }
1187
1188 //!
1189 //! \brief IsMMCEnabledForCurrOutputSurf
1190 //! \details Check if MMC can be enabled for current output surface.
1191 //! \return bool true if suported, otherwise not supported
1192 //!
IsMMCEnabledForCurrOutputSurf()1193 bool VPHAL_VEBOX_STATE_G12_BASE::IsMMCEnabledForCurrOutputSurf()
1194 {
1195 PVPHAL_VEBOX_RENDER_DATA pRenderData = GetLastExecRenderData();
1196 VPHAL_RENDER_CHK_NULL_NO_STATUS(pRenderData);
1197 VPHAL_RENDER_CHK_NULL_NO_STATUS(pRenderData->pRenderTarget);
1198
1199 return bEnableMMC &&
1200 IsFormatMMCSupported(pRenderData->pRenderTarget->Format) &&
1201 (pRenderData->pRenderTarget->CompressionMode != MOS_MMC_DISABLED);
1202
1203 finish:
1204 return false;
1205 }
1206
1207 //!
1208 //! \brief Setup Vebox_DI_IECP Command params for VEBOX final output surface on G9
1209 //! \details Setup Vebox_DI_IECP Command params for VEBOX final output surface on G9
1210 //! \param [in] bDiScdEnable
1211 //! Is DI/Variances report enabled
1212 //! \param [in,out] pVeboxDiIecpCmdParams
1213 //! Pointer to VEBOX_DI_IECP command parameters
1214 //! \return MOS_STATUS
1215 //! Return MOS_STATUS_SUCCESS if successful
1216 //! MOS_STATUS_UNIMPLEMENTED, if condition not implemented,
1217 //! otherwise failed
1218 //!
SetupDiIecpStateForOutputSurf(bool bDiScdEnable,PMHW_VEBOX_DI_IECP_CMD_PARAMS pVeboxDiIecpCmdParams)1219 MOS_STATUS VPHAL_VEBOX_STATE_G12_BASE::SetupDiIecpStateForOutputSurf(
1220 bool bDiScdEnable,
1221 PMHW_VEBOX_DI_IECP_CMD_PARAMS pVeboxDiIecpCmdParams)
1222 {
1223 PVPHAL_SURFACE pSurface;
1224 PMOS_INTERFACE pOsInterface;
1225 PRENDERHAL_INTERFACE pRenderHal;
1226 PMHW_VEBOX_INTERFACE pVeboxInterface;
1227 MHW_VEBOX_SURFACE_CNTL_PARAMS VeboxSurfCntlParams;
1228 PVPHAL_VEBOX_STATE_G12_BASE pVeboxState = this;
1229 PVPHAL_VEBOX_RENDER_DATA pRenderData = GetLastExecRenderData();
1230 MOS_STATUS eStatus = MOS_STATUS_SUCCESS;
1231
1232 pOsInterface = pVeboxState->m_pOsInterface;
1233 pRenderHal = pVeboxState->m_pRenderHal;
1234 pVeboxInterface = pVeboxState->m_pVeboxInterface;
1235
1236 VPHAL_RENDER_CHK_NULL(pRenderData);
1237 // VEBOX final output surface
1238 if (IS_VPHAL_OUTPUT_PIPE_VEBOX(pRenderData))
1239 {
1240 VPHAL_RENDER_CHK_STATUS(pOsInterface->pfnRegisterResource(
1241 pOsInterface,
1242 &pRenderData->pRenderTarget->OsResource,
1243 true,
1244 true));
1245
1246 pVeboxDiIecpCmdParams->pOsResCurrOutput = &pRenderData->pRenderTarget->OsResource;
1247 pVeboxDiIecpCmdParams->dwCurrOutputSurfOffset = pRenderData->pRenderTarget->dwOffset;
1248 pVeboxDiIecpCmdParams->CurrOutputSurfCtrl.Value = pVeboxState->DnDiSurfMemObjCtl.CurrentOutputSurfMemObjCtl;
1249
1250 if (IsMMCEnabledForCurrOutputSurf())
1251 {
1252 // Update control bits for Current Output Surf
1253 pSurface = pRenderData->pRenderTarget;
1254 MOS_ZeroMemory(&VeboxSurfCntlParams, sizeof(VeboxSurfCntlParams));
1255 VeboxSurfCntlParams.bIsCompressed = pSurface->bIsCompressed;
1256 VeboxSurfCntlParams.CompressionMode = pSurface->CompressionMode;
1257
1258 if (pSurface->OsResource.bUncompressedWriteNeeded)
1259 {
1260 VPHAL_RENDER_NORMALMESSAGE("Vebox uncompressed write needed as previous write need clear ");
1261 VeboxSurfCntlParams.CompressionMode = MOS_MMC_RC;
1262 }
1263
1264 VPHAL_RENDER_CHK_STATUS(pVeboxInterface->AddVeboxSurfaceControlBits(
1265 &VeboxSurfCntlParams,
1266 (uint32_t *)&(pVeboxDiIecpCmdParams->CurrOutputSurfCtrl.Value)));
1267 }
1268 }
1269 else if (bDiScdEnable)
1270 {
1271 VPHAL_RENDER_CHK_STATUS(pOsInterface->pfnRegisterResource(
1272 pOsInterface,
1273 &pVeboxState->FFDISurfaces[pRenderData->iFrame1]->OsResource,
1274 true,
1275 true));
1276
1277 pVeboxDiIecpCmdParams->pOsResCurrOutput = &pVeboxState->FFDISurfaces[pRenderData->iFrame1]->OsResource;
1278 pVeboxDiIecpCmdParams->CurrOutputSurfCtrl.Value = pVeboxState->DnDiSurfMemObjCtl.CurrentOutputSurfMemObjCtl;
1279
1280 // Update control bits for Current Output Surf
1281 if (bEnableMMC)
1282 {
1283 pSurface = pVeboxState->FFDISurfaces[pRenderData->iFrame1];
1284 MOS_ZeroMemory(&VeboxSurfCntlParams, sizeof(VeboxSurfCntlParams));
1285 VeboxSurfCntlParams.bIsCompressed = pSurface->bIsCompressed;
1286 VeboxSurfCntlParams.CompressionMode = pSurface->CompressionMode;
1287 VPHAL_RENDER_CHK_STATUS(pVeboxInterface->AddVeboxSurfaceControlBits(
1288 &VeboxSurfCntlParams,
1289 (uint32_t *)&(pVeboxDiIecpCmdParams->CurrOutputSurfCtrl.Value)));
1290 }
1291
1292 VPHAL_RENDER_CHK_STATUS(pOsInterface->pfnRegisterResource(
1293 pOsInterface,
1294 &pVeboxState->FFDISurfaces[pRenderData->iFrame0]->OsResource,
1295 true,
1296 true));
1297
1298 pVeboxDiIecpCmdParams->pOsResPrevOutput = &pVeboxState->FFDISurfaces[pRenderData->iFrame0]->OsResource;
1299 pVeboxDiIecpCmdParams->PrevOutputSurfCtrl.Value = pVeboxState->DnDiSurfMemObjCtl.CurrentOutputSurfMemObjCtl;
1300
1301 // Update control bits for PrevOutput surface
1302 if (bEnableMMC)
1303 {
1304 pSurface = pVeboxState->FFDISurfaces[pRenderData->iFrame0];
1305 MOS_ZeroMemory(&VeboxSurfCntlParams, sizeof(VeboxSurfCntlParams));
1306 VeboxSurfCntlParams.bIsCompressed = pSurface->bIsCompressed;
1307 VeboxSurfCntlParams.CompressionMode = pSurface->CompressionMode;
1308 VPHAL_RENDER_CHK_STATUS(pVeboxInterface->AddVeboxSurfaceControlBits(
1309 &VeboxSurfCntlParams,
1310 (uint32_t *)&(pVeboxDiIecpCmdParams->PrevOutputSurfCtrl.Value)));
1311 }
1312 }
1313 else if (IsIECPEnabled()) // IECP output surface without DI
1314 {
1315 VPHAL_RENDER_CHK_STATUS(pOsInterface->pfnRegisterResource(
1316 pOsInterface,
1317 &pVeboxState->FFDISurfaces[pRenderData->iCurDNOut]->OsResource,
1318 true,
1319 true));
1320
1321 pVeboxDiIecpCmdParams->pOsResCurrOutput = &pVeboxState->FFDISurfaces[pRenderData->iCurDNOut]->OsResource;
1322 pVeboxDiIecpCmdParams->CurrOutputSurfCtrl.Value = pVeboxState->DnDiSurfMemObjCtl.CurrentOutputSurfMemObjCtl;
1323
1324 // Update control bits for CurrOutputSurf surface
1325 if (bEnableMMC)
1326 {
1327 pSurface = pVeboxState->FFDISurfaces[pRenderData->iCurDNOut];
1328 MOS_ZeroMemory(&VeboxSurfCntlParams, sizeof(VeboxSurfCntlParams));
1329 VeboxSurfCntlParams.bIsCompressed = pSurface->bIsCompressed;
1330 VeboxSurfCntlParams.CompressionMode = pSurface->CompressionMode;
1331 VPHAL_RENDER_CHK_STATUS(pVeboxInterface->AddVeboxSurfaceControlBits(
1332 &VeboxSurfCntlParams,
1333 (uint32_t *)&(pVeboxDiIecpCmdParams->CurrOutputSurfCtrl.Value)));
1334 }
1335 }
1336 #if (_DEBUG || _RELEASE_INTERNAL)
1337 pRenderHal->oldCacheSettingForTargetSurface = (uint8_t)((pVeboxDiIecpCmdParams->CurrOutputSurfCtrl.Value >> 1) & 0x0000003f);
1338 #endif
1339
1340 finish:
1341 return eStatus;
1342 }
1343
1344 //!
1345 //! \brief Setup Vebox_DI_IECP Command params for GEN11
1346 //! \details Setup Vebox_DI_IECP Command params for GEN11
1347 //! \param [in] bDiScdEnable
1348 //! Is DI/Variances report enabled
1349 //! \param [in,out] pVeboxDiIecpCmdParams
1350 //! Pointer to VEBOX_DI_IECP command parameters
1351 //! \return MOS_STATUS
1352 //! Return MOS_STATUS_SUCCESS if successful, otherwise failed
1353 //!
SetupDiIecpState(bool bDiScdEnable,PMHW_VEBOX_DI_IECP_CMD_PARAMS pVeboxDiIecpCmdParams)1354 MOS_STATUS VPHAL_VEBOX_STATE_G12_BASE::SetupDiIecpState(
1355 bool bDiScdEnable,
1356 PMHW_VEBOX_DI_IECP_CMD_PARAMS pVeboxDiIecpCmdParams)
1357 {
1358 PMOS_INTERFACE pOsInterface;
1359 PRENDERHAL_INTERFACE pRenderHal;
1360 uint32_t dwWidth;
1361 uint32_t dwHeight;
1362 bool bDIEnable;
1363 MOS_STATUS eStatus;
1364 MHW_VEBOX_SURFACE_PARAMS MhwVeboxSurfaceParam;
1365 PMHW_VEBOX_INTERFACE pVeboxInterface;
1366 MHW_VEBOX_SURFACE_CNTL_PARAMS VeboxSurfCntlParams;
1367 PVPHAL_SURFACE pSurface;
1368 PVPHAL_VEBOX_STATE_G12_BASE pVeboxState = this;
1369 PVPHAL_VEBOX_RENDER_DATA pRenderData = GetLastExecRenderData();
1370
1371 VPHAL_RENDER_CHK_NULL(pVeboxDiIecpCmdParams);
1372 VPHAL_RENDER_CHK_NULL(pVeboxState);
1373 VPHAL_RENDER_CHK_NULL(pRenderData);
1374
1375 pOsInterface = pVeboxState->m_pOsInterface;
1376 pRenderHal = pVeboxState->m_pRenderHal;
1377 pVeboxInterface = pVeboxState->m_pVeboxInterface;
1378 MOS_ZeroMemory(pVeboxDiIecpCmdParams, sizeof(*pVeboxDiIecpCmdParams));
1379
1380 VPHAL_RENDER_CHK_NULL(pOsInterface);
1381 VPHAL_RENDER_CHK_NULL(pRenderHal);
1382 VPHAL_RENDER_CHK_NULL(pVeboxInterface);
1383
1384 // Align dwEndingX with surface state
1385 bDIEnable = pRenderData->bDeinterlace || IsQueryVarianceEnabled();
1386
1387 VPHAL_RENDER_CHK_STATUS(VpHal_InitVeboxSurfaceParams(pVeboxState->m_currentSurface, &MhwVeboxSurfaceParam));
1388 VPHAL_RENDER_CHK_STATUS(pVeboxInterface->VeboxAdjustBoundary(
1389 &MhwVeboxSurfaceParam,
1390 &dwWidth,
1391 &dwHeight,
1392 bDIEnable));
1393
1394 pVeboxDiIecpCmdParams->dwStartingX = 0;
1395 pVeboxDiIecpCmdParams->dwEndingX = dwWidth - 1;
1396
1397 // Input Surface
1398 VPHAL_RENDER_CHK_STATUS(pOsInterface->pfnRegisterResource(
1399 pOsInterface,
1400 &pVeboxState->m_currentSurface->OsResource,
1401 false,
1402 true));
1403
1404 pVeboxDiIecpCmdParams->pOsResCurrInput = &pVeboxState->m_currentSurface->OsResource;
1405 pVeboxDiIecpCmdParams->dwCurrInputSurfOffset = pVeboxState->m_currentSurface->dwOffset;
1406 pVeboxDiIecpCmdParams->CurrInputSurfCtrl.Value = pVeboxState->DnDiSurfMemObjCtl.CurrentInputSurfMemObjCtl;
1407
1408 // Update control bits for current surface
1409 if (bEnableMMC)
1410 {
1411 pSurface = pVeboxState->m_currentSurface;
1412 MOS_ZeroMemory(&VeboxSurfCntlParams, sizeof(VeboxSurfCntlParams));
1413 VeboxSurfCntlParams.bIsCompressed = pSurface->bIsCompressed;
1414 VeboxSurfCntlParams.CompressionMode = pSurface->CompressionMode;
1415 VPHAL_RENDER_CHK_STATUS(pVeboxInterface->AddVeboxSurfaceControlBits(
1416 &VeboxSurfCntlParams,
1417 (uint32_t *)&(pVeboxDiIecpCmdParams->CurrInputSurfCtrl.Value)));
1418 }
1419
1420 // Reference surface
1421 if (pRenderData->bRefValid)
1422 {
1423 VPHAL_RENDER_CHK_STATUS(pOsInterface->pfnRegisterResource(
1424 pOsInterface,
1425 &pVeboxState->m_previousSurface->OsResource,
1426 false,
1427 true));
1428
1429 pVeboxDiIecpCmdParams->pOsResPrevInput = &pVeboxState->m_previousSurface->OsResource;
1430 pVeboxDiIecpCmdParams->dwPrevInputSurfOffset = pVeboxState->m_previousSurface->dwOffset;
1431 pVeboxDiIecpCmdParams->PrevInputSurfCtrl.Value = pVeboxState->DnDiSurfMemObjCtl.PreviousInputSurfMemObjCtl;
1432
1433 // Update control bits for PreviousSurface surface
1434 if (bEnableMMC)
1435 {
1436 pSurface = pVeboxState->m_previousSurface;
1437 MOS_ZeroMemory(&VeboxSurfCntlParams, sizeof(VeboxSurfCntlParams));
1438 VeboxSurfCntlParams.bIsCompressed = pSurface->bIsCompressed;
1439 VeboxSurfCntlParams.CompressionMode = pSurface->CompressionMode;
1440 VPHAL_RENDER_CHK_STATUS(pVeboxInterface->AddVeboxSurfaceControlBits(
1441 &VeboxSurfCntlParams,
1442 (uint32_t *)&(pVeboxDiIecpCmdParams->PrevInputSurfCtrl.Value)));
1443 }
1444 }
1445
1446 // VEBOX final output surface
1447 VPHAL_RENDER_CHK_STATUS(SetupDiIecpStateForOutputSurf(bDiScdEnable, pVeboxDiIecpCmdParams));
1448
1449 // DN intermediate output surface
1450 if (IsFFDNSurfNeeded())
1451 {
1452 VPHAL_RENDER_CHK_STATUS(pOsInterface->pfnRegisterResource(
1453 pOsInterface,
1454 &pVeboxState->FFDNSurfaces[pRenderData->iCurDNOut]->OsResource,
1455 true,
1456 true));
1457
1458 pVeboxDiIecpCmdParams->pOsResDenoisedCurrOutput = &pVeboxState->FFDNSurfaces[pRenderData->iCurDNOut]->OsResource;
1459 pVeboxDiIecpCmdParams->DenoisedCurrOutputSurfCtrl.Value = pVeboxState->DnDiSurfMemObjCtl.DnOutSurfMemObjCtl;
1460
1461 // Update control bits for DenoisedCurrOutputSurf surface
1462 if (bEnableMMC)
1463 {
1464 pSurface = pVeboxState->FFDNSurfaces[pRenderData->iCurDNOut];
1465 MOS_ZeroMemory(&VeboxSurfCntlParams, sizeof(VeboxSurfCntlParams));
1466 VeboxSurfCntlParams.bIsCompressed = pSurface->bIsCompressed;
1467 VeboxSurfCntlParams.CompressionMode = pSurface->CompressionMode;
1468 VPHAL_RENDER_CHK_STATUS(pVeboxInterface->AddVeboxSurfaceControlBits(
1469 &VeboxSurfCntlParams,
1470 (uint32_t *)&(pVeboxDiIecpCmdParams->DenoisedCurrOutputSurfCtrl.Value)));
1471 }
1472
1473 // For DN + SFC scenario, allocate FFDISurfaces also
1474 // since this usage needs IECP implicitly
1475 // For DN + DI + SFC, DI have registered FFDISurfaces, So don't register again
1476 if (IS_VPHAL_OUTPUT_PIPE_SFC(pRenderData) && !bDiScdEnable)
1477 {
1478 VPHAL_RENDER_CHK_STATUS(pOsInterface->pfnRegisterResource(
1479 pOsInterface,
1480 &pVeboxState->FFDISurfaces[pRenderData->iCurDNOut]->OsResource,
1481 true,
1482 true));
1483
1484 pVeboxDiIecpCmdParams->pOsResCurrOutput = &pVeboxState->FFDISurfaces[pRenderData->iCurDNOut]->OsResource;
1485 pVeboxDiIecpCmdParams->CurrOutputSurfCtrl.Value = pVeboxState->DnDiSurfMemObjCtl.CurrentOutputSurfMemObjCtl;
1486
1487 // Update control bits for CurrOutputSurf surface
1488 if (bEnableMMC)
1489 {
1490 pSurface = pVeboxState->FFDISurfaces[pRenderData->iCurDNOut];
1491 MOS_ZeroMemory(&VeboxSurfCntlParams, sizeof(VeboxSurfCntlParams));
1492 VeboxSurfCntlParams.bIsCompressed = pSurface->bIsCompressed;
1493 VeboxSurfCntlParams.CompressionMode = pSurface->CompressionMode;
1494 VPHAL_RENDER_CHK_STATUS(pVeboxInterface->AddVeboxSurfaceControlBits(
1495 &VeboxSurfCntlParams,
1496 (uint32_t *)&(pVeboxDiIecpCmdParams->CurrOutputSurfCtrl.Value)));
1497 }
1498 }
1499 }
1500
1501 // STMM surface
1502 if (bDiScdEnable || IsSTMMSurfNeeded())
1503 {
1504 // STMM in
1505 VPHAL_RENDER_CHK_STATUS(pOsInterface->pfnRegisterResource(
1506 pOsInterface,
1507 &pVeboxState->STMMSurfaces[pRenderData->iCurHistIn].OsResource,
1508 false,
1509 true));
1510
1511 pVeboxDiIecpCmdParams->pOsResStmmInput = &pVeboxState->STMMSurfaces[pRenderData->iCurHistIn].OsResource;
1512 pVeboxDiIecpCmdParams->StmmInputSurfCtrl.Value = pVeboxState->DnDiSurfMemObjCtl.STMMInputSurfMemObjCtl;
1513
1514 // Update control bits for stmm input surface
1515 if (bEnableMMC)
1516 {
1517 pSurface = &(pVeboxState->STMMSurfaces[pRenderData->iCurHistIn]);
1518 MOS_ZeroMemory(&VeboxSurfCntlParams, sizeof(VeboxSurfCntlParams));
1519 VeboxSurfCntlParams.bIsCompressed = pSurface->bIsCompressed;
1520 VeboxSurfCntlParams.CompressionMode = pSurface->CompressionMode;
1521 VPHAL_RENDER_CHK_STATUS(pVeboxInterface->AddVeboxSurfaceControlBits(
1522 &VeboxSurfCntlParams,
1523 (uint32_t *)&(pVeboxDiIecpCmdParams->StmmInputSurfCtrl.Value)));
1524 }
1525
1526 // STMM out
1527 VPHAL_RENDER_CHK_STATUS(pOsInterface->pfnRegisterResource(
1528 pOsInterface,
1529 &pVeboxState->STMMSurfaces[pRenderData->iCurHistOut].OsResource,
1530 true,
1531 true));
1532
1533 pVeboxDiIecpCmdParams->pOsResStmmOutput = &pVeboxState->STMMSurfaces[pRenderData->iCurHistOut].OsResource;
1534 pVeboxDiIecpCmdParams->StmmOutputSurfCtrl.Value = pVeboxState->DnDiSurfMemObjCtl.STMMOutputSurfMemObjCtl;
1535
1536 // Update control bits for stmm output surface
1537 if (bEnableMMC)
1538 {
1539 pSurface = &(pVeboxState->STMMSurfaces[pRenderData->iCurHistOut]);
1540 MOS_ZeroMemory(&VeboxSurfCntlParams, sizeof(VeboxSurfCntlParams));
1541 VeboxSurfCntlParams.bIsCompressed = pSurface->bIsCompressed;
1542 VeboxSurfCntlParams.CompressionMode = pSurface->CompressionMode;
1543 VPHAL_RENDER_CHK_STATUS(pVeboxInterface->AddVeboxSurfaceControlBits(
1544 &VeboxSurfCntlParams,
1545 (uint32_t *)&(pVeboxDiIecpCmdParams->StmmOutputSurfCtrl.Value)));
1546 }
1547 }
1548
1549 // Statistics data: GNE, FMD
1550 VPHAL_RENDER_CHK_STATUS(pOsInterface->pfnRegisterResource(
1551 pOsInterface,
1552 &pVeboxState->VeboxStatisticsSurface.OsResource,
1553 true,
1554 true));
1555
1556 pVeboxDiIecpCmdParams->pOsResStatisticsOutput = &pVeboxState->VeboxStatisticsSurface.OsResource;
1557 pVeboxDiIecpCmdParams->StatisticsOutputSurfCtrl.Value = pVeboxState->DnDiSurfMemObjCtl.StatisticsOutputSurfMemObjCtl;
1558
1559 if (!Mos_ResourceIsNull(&pVeboxState->VeboxRGBHistogram.OsResource))
1560 {
1561 VPHAL_RENDER_CHK_STATUS(pOsInterface->pfnRegisterResource(
1562 pOsInterface,
1563 &pVeboxState->VeboxRGBHistogram.OsResource,
1564 true,
1565 true));
1566
1567 pVeboxDiIecpCmdParams->pOsResLaceOrAceOrRgbHistogram = &pVeboxState->VeboxRGBHistogram.OsResource;
1568 pVeboxDiIecpCmdParams->LaceOrAceOrRgbHistogramSurfCtrl.Value =
1569 pVeboxState->DnDiSurfMemObjCtl.LaceOrAceOrRgbHistogramSurfCtrl;
1570 }
1571
1572 finish:
1573 return eStatus;
1574 }
1575
1576 //!
1577 //! \brief Vebox query statistics surface layout
1578 //! \details Get Specific Layout Info like GNE Offset, size of per frame info inside
1579 //! Vebox Statistics Surface for CNL
1580 //!
1581 //! | Layout of Statistics surface when DI enabled and DN either On or Off on CNL\n
1582 //! | --------------------------------------------------------------\n
1583 //! | | 16 bytes for x=0, Y=0 | 16 bytes for x=16, Y=0 | ...\n
1584 //! | |-------------------------------------------------------------\n
1585 //! | | 16 bytes for x=0, Y=4 | ...\n
1586 //! | |------------------------------\n
1587 //! | | ...\n
1588 //! | |------------------------------\n
1589 //! | | 16 bytes for x=0, Y=height-4| ...\n
1590 //! | |-----------------------------------------------Pitch--------------\n
1591 //! | | 17 DW Reserved | 2 DW STD0 | 2 DW GCC0 | 11 DW Reserved |\n
1592 //! | |------------------------------------------------------------------\n
1593 //! | | 11 DW FMD0 | 6 DW GNE0 | 2 DW STD0 | 2 DW GCC0 | 11 DW Reserved |\n
1594 //! | |------------------------------------------------------------------\n
1595 //! | | 17 DW Reserved | 2 DW STD1 | 2 DW GCC1 | 11 DW Reserved |\n
1596 //! | |------------------------------------------------------------------\n
1597 //! | | 11 DW FMD1 | 6 DW GNE1 | 2 DW STD1 | 2 DW GCC1 | 11 DW Reserved |\n
1598 //! | -------------------------------------------------------------------\n
1599 //! |\n
1600 //! | Layout of Statistics surface when DN enabled and DI disabled\n
1601 //! | --------------------------------------------------------------\n
1602 //! | | 16 bytes for x=0, Y=0 | 16 bytes for x=16, Y=0 | ...\n
1603 //! | |-------------------------------------------------------------\n
1604 //! | | 16 bytes for x=0, Y=4 | ...\n
1605 //! | |------------------------------\n
1606 //! | | ...\n
1607 //! | |------------------------------\n
1608 //! | | 16 bytes for x=0, Y=height-4| ...\n
1609 //! | |-----------------------------------------------Pitch--------------\n
1610 //! | | 11 DW FMD0 | 6 DW GNE0 | 2 DW STD0 | 2 DW GCC0 | 11 DW Reserved |\n
1611 //! | |------------------------------------------------------------------\n
1612 //! | | 11 DW FMD1 | 6 DW GNE1 | 2 DW STD1 | 2 DW GCC1 | 11 DW Reserved |\n
1613 //! | -------------------------------------------------------------------\n
1614 //! |\n
1615 //! | Layout of Statistics surface when both DN and DI are disabled\n
1616 //! | ------------------------------------------------Pitch--------------\n
1617 //! | | 17 DW White Balence0 | 2 DW STD0 | 2 DW GCC0 | 11 DW Reserved |\n
1618 //! | |------------------------------------------------------------------\n
1619 //! | | 17 DW White Balence1 | 2 DW STD1 | 2 DW GCC1 | 11 DW Reserved |\n
1620 //! | -------------------------------------------------------------------\n
1621 //! \param [in] QueryType
1622 //! Query type
1623 //! \param [out] pQuery
1624 //! return layout type
1625 //! \return MOS_STATUS
1626 //! Return MOS_STATUS_SUCCESS if successful, otherwise failed
1627 //!
VeboxQueryStatLayout(VEBOX_STAT_QUERY_TYPE QueryType,uint32_t * pQuery)1628 MOS_STATUS VPHAL_VEBOX_STATE_G12_BASE::VeboxQueryStatLayout(
1629 VEBOX_STAT_QUERY_TYPE QueryType,
1630 uint32_t* pQuery)
1631 {
1632 MOS_STATUS eStatus = MOS_STATUS_SUCCESS;
1633
1634 VPHAL_RENDER_ASSERT(pQuery);
1635
1636 switch (QueryType)
1637 {
1638 case VEBOX_STAT_QUERY_GNE_OFFEST:
1639 *pQuery = VPHAL_VEBOX_STATISTICS_SURFACE_GNE_OFFSET_G12;
1640 break;
1641
1642 case VEBOX_STAT_QUERY_PER_FRAME_SIZE:
1643 *pQuery = VPHAL_VEBOX_STATISTICS_PER_FRAME_SIZE_G12;
1644 break;
1645
1646 case VEBOX_STAT_QUERY_FMD_OFFEST:
1647 *pQuery = VPHAL_VEBOX_STATISTICS_SURFACE_FMD_OFFSET_G12;
1648 break;
1649
1650 case VEBOX_STAT_QUERY_STD_OFFEST:
1651 *pQuery = VPHAL_VEBOX_STATISTICS_SURFACE_STD_OFFSET_G12;
1652 break;
1653
1654 default:
1655 VPHAL_RENDER_ASSERTMESSAGE("Vebox Statistics Layout Query, type ('%d') is not implemented.", QueryType);
1656 eStatus = MOS_STATUS_UNKNOWN;
1657 break;
1658 }
1659
1660 return eStatus;
1661 }
1662
1663 //!
1664 //! \brief Vebox get Luma default value
1665 //! \details Initialize luma denoise paramters w/ default values.
1666 //! \param [out] pLumaParams
1667 //! Pointer to Luma DN parameter
1668 //! \return void
1669 //!
GetLumaDefaultValue(PVPHAL_SAMPLER_STATE_DNDI_PARAM pLumaParams)1670 void VPHAL_VEBOX_STATE_G12_BASE::GetLumaDefaultValue(
1671 PVPHAL_SAMPLER_STATE_DNDI_PARAM pLumaParams)
1672 {
1673 VPHAL_RENDER_ASSERT(pLumaParams);
1674
1675 pLumaParams->dwDenoiseASDThreshold = NOISE_ABSSUMTEMPORALDIFF_THRESHOLD_DEFAULT_G12;
1676 pLumaParams->dwDenoiseHistoryDelta = NOISE_HISTORY_DELTA_DEFAULT;
1677 pLumaParams->dwDenoiseMaximumHistory = NOISE_HISTORY_MAX_DEFAULT_G12;
1678 pLumaParams->dwDenoiseSTADThreshold = NOISE_SUMABSTEMPORALDIFF_THRESHOLD_DEFAULT_G12;
1679 pLumaParams->dwDenoiseSCMThreshold = NOISE_SPATIALCOMPLEXITYMATRIX_THRESHOLD_DEFAULT_G12;
1680 pLumaParams->dwDenoiseMPThreshold = NOISE_NUMMOTIONPIXELS_THRESHOLD_DEFAULT_G12;
1681 pLumaParams->dwLTDThreshold = NOISE_LOWTEMPORALPIXELDIFF_THRESHOLD_DEFAULT_G12;
1682 pLumaParams->dwTDThreshold = NOISE_TEMPORALPIXELDIFF_THRESHOLD_DEFAULT_G12;
1683 }
1684
SetDNParams(PVPHAL_SURFACE pSrcSurface,PVPHAL_SAMPLER_STATE_DNDI_PARAM pLumaParams,PVPHAL_DNUV_PARAMS pChromaParams)1685 MOS_STATUS VPHAL_VEBOX_STATE_G12_BASE::SetDNParams(
1686 PVPHAL_SURFACE pSrcSurface,
1687 PVPHAL_SAMPLER_STATE_DNDI_PARAM pLumaParams,
1688 PVPHAL_DNUV_PARAMS pChromaParams)
1689 {
1690 MOS_STATUS eStatus;
1691 PVPHAL_DENOISE_PARAMS pDNParams;
1692 uint32_t dwDenoiseFactor;
1693 PVPHAL_VEBOX_RENDER_DATA pRenderData = GetLastExecRenderData();
1694
1695 VPHAL_RENDER_CHK_NULL_RETURN(pRenderData);
1696 VPHAL_RENDER_ASSERT(pSrcSurface);
1697 VPHAL_RENDER_ASSERT(pLumaParams);
1698 VPHAL_RENDER_ASSERT(pChromaParams);
1699 VPHAL_RENDER_ASSERT(pRenderData);
1700
1701 eStatus = MOS_STATUS_SUCCESS;
1702 pDNParams = pSrcSurface->pDenoiseParams;
1703
1704 // Set Luma DN params
1705 if (pRenderData->bDenoise)
1706 {
1707 // Setup Denoise Params
1708 GetLumaDefaultValue(pLumaParams);
1709
1710 // Initialize pixel range threshold array
1711 pRenderData->VeboxDNDIParams.dwPixRangeThreshold[0] = NOISE_BLF_RANGE_THRESHOLD_S0_DEFAULT;
1712 pRenderData->VeboxDNDIParams.dwPixRangeThreshold[1] = NOISE_BLF_RANGE_THRESHOLD_S1_DEFAULT;
1713 pRenderData->VeboxDNDIParams.dwPixRangeThreshold[2] = NOISE_BLF_RANGE_THRESHOLD_S2_DEFAULT;
1714 pRenderData->VeboxDNDIParams.dwPixRangeThreshold[3] = NOISE_BLF_RANGE_THRESHOLD_S3_DEFAULT;
1715 pRenderData->VeboxDNDIParams.dwPixRangeThreshold[4] = NOISE_BLF_RANGE_THRESHOLD_S4_DEFAULT;
1716 pRenderData->VeboxDNDIParams.dwPixRangeThreshold[5] = NOISE_BLF_RANGE_THRESHOLD_S5_DEFAULT;
1717
1718 // Initialize pixel range weight array
1719 pRenderData->VeboxDNDIParams.dwPixRangeWeight[0] = NOISE_BLF_RANGE_WGTS0_DEFAULT;
1720 pRenderData->VeboxDNDIParams.dwPixRangeWeight[1] = NOISE_BLF_RANGE_WGTS1_DEFAULT;
1721 pRenderData->VeboxDNDIParams.dwPixRangeWeight[2] = NOISE_BLF_RANGE_WGTS2_DEFAULT;
1722 pRenderData->VeboxDNDIParams.dwPixRangeWeight[3] = NOISE_BLF_RANGE_WGTS3_DEFAULT;
1723 pRenderData->VeboxDNDIParams.dwPixRangeWeight[4] = NOISE_BLF_RANGE_WGTS4_DEFAULT;
1724 pRenderData->VeboxDNDIParams.dwPixRangeWeight[5] = NOISE_BLF_RANGE_WGTS5_DEFAULT;
1725
1726 // User specified Denoise strength case (no auto DN detect)
1727 if (!pDNParams->bAutoDetect)
1728 {
1729 dwDenoiseFactor = (uint32_t)pDNParams->fDenoiseFactor;
1730
1731 if (dwDenoiseFactor > NOISEFACTOR_MAX)
1732 {
1733 dwDenoiseFactor = NOISEFACTOR_MAX;
1734 }
1735
1736 pLumaParams->dwDenoiseHistoryDelta = dwDenoiseHistoryDelta[dwDenoiseFactor];
1737 pLumaParams->dwDenoiseMaximumHistory = dwDenoiseMaximumHistory[dwDenoiseFactor];
1738 pLumaParams->dwDenoiseASDThreshold = dwDenoiseASDThreshold[dwDenoiseFactor];
1739 pLumaParams->dwDenoiseSCMThreshold = dwDenoiseSCMThreshold[dwDenoiseFactor];
1740 pLumaParams->dwDenoiseMPThreshold = dwDenoiseMPThreshold[dwDenoiseFactor];
1741 pLumaParams->dwLTDThreshold = dwLTDThreshold[dwDenoiseFactor];
1742 pLumaParams->dwTDThreshold = dwTDThreshold[dwDenoiseFactor];
1743 pLumaParams->dwDenoiseSTADThreshold = dwDenoiseSTADThreshold[dwDenoiseFactor];
1744
1745 pRenderData->VeboxDNDIParams.dwPixRangeThreshold[0] = dwPixRangeThreshold0[dwDenoiseFactor];
1746 pRenderData->VeboxDNDIParams.dwPixRangeThreshold[1] = dwPixRangeThreshold1[dwDenoiseFactor];
1747 pRenderData->VeboxDNDIParams.dwPixRangeThreshold[2] = dwPixRangeThreshold2[dwDenoiseFactor];
1748 pRenderData->VeboxDNDIParams.dwPixRangeThreshold[3] = dwPixRangeThreshold3[dwDenoiseFactor];
1749 pRenderData->VeboxDNDIParams.dwPixRangeThreshold[4] = dwPixRangeThreshold4[dwDenoiseFactor];
1750 pRenderData->VeboxDNDIParams.dwPixRangeThreshold[5] = dwPixRangeThreshold5[dwDenoiseFactor];
1751
1752 pRenderData->VeboxDNDIParams.dwPixRangeWeight[0] = dwPixRangeWeight0[dwDenoiseFactor];
1753 pRenderData->VeboxDNDIParams.dwPixRangeWeight[1] = dwPixRangeWeight1[dwDenoiseFactor];
1754 pRenderData->VeboxDNDIParams.dwPixRangeWeight[2] = dwPixRangeWeight2[dwDenoiseFactor];
1755 pRenderData->VeboxDNDIParams.dwPixRangeWeight[3] = dwPixRangeWeight3[dwDenoiseFactor];
1756 pRenderData->VeboxDNDIParams.dwPixRangeWeight[4] = dwPixRangeWeight4[dwDenoiseFactor];
1757 pRenderData->VeboxDNDIParams.dwPixRangeWeight[5] = dwPixRangeWeight5[dwDenoiseFactor];
1758 }
1759 }
1760
1761 // Set Chroma DN params
1762 if (pRenderData->bChromaDenoise)
1763 {
1764 // Setup Denoise Params
1765 pChromaParams->dwHistoryDeltaUV = NOISE_HISTORY_DELTA_DEFAULT;
1766 pChromaParams->dwHistoryMaxUV = NOISE_HISTORY_MAX_DEFAULT;
1767
1768 // Denoise Slider case (no auto DN detect)
1769 if (!pDNParams->bAutoDetect)
1770 {
1771 dwDenoiseFactor = (uint32_t)pDNParams->fDenoiseFactor;
1772
1773 if (dwDenoiseFactor > NOISEFACTOR_MAX)
1774 {
1775 dwDenoiseFactor = NOISEFACTOR_MAX;
1776 }
1777
1778 pChromaParams->dwLTDThresholdU =
1779 pChromaParams->dwLTDThresholdV = dwLTDThresholdUV[dwDenoiseFactor];
1780
1781 pChromaParams->dwTDThresholdU =
1782 pChromaParams->dwTDThresholdV = dwTDThresholdUV[dwDenoiseFactor];
1783
1784 pChromaParams->dwSTADThresholdU =
1785 pChromaParams->dwSTADThresholdV = dwSTADThresholdUV[dwDenoiseFactor];
1786 }
1787 }
1788
1789 return eStatus;
1790 }
1791
SetDIParams(PVPHAL_SURFACE pSrcSurface)1792 MOS_STATUS VPHAL_VEBOX_STATE_G12_BASE::SetDIParams(
1793 PVPHAL_SURFACE pSrcSurface)
1794 {
1795 PVPHAL_VEBOX_RENDER_DATA pRenderData = GetLastExecRenderData();
1796 VPHAL_RENDER_CHK_NULL_RETURN(pRenderData);
1797
1798 // Set DI params
1799 if (pRenderData->bDeinterlace)
1800 {
1801 pRenderData->VeboxDNDIParams.dwLumaTDMWeight = VPHAL_VEBOX_DI_LUMA_TDM_WEIGHT_NATUAL;
1802 pRenderData->VeboxDNDIParams.dwChromaTDMWeight = VPHAL_VEBOX_DI_CHROMA_TDM_WEIGHT_NATUAL;
1803 pRenderData->VeboxDNDIParams.dwSHCMDelta = VPHAL_VEBOX_DI_SHCM_DELTA_NATUAL;
1804 pRenderData->VeboxDNDIParams.dwSHCMThreshold = VPHAL_VEBOX_DI_SHCM_THRESHOLD_NATUAL;
1805 pRenderData->VeboxDNDIParams.dwSVCMDelta = VPHAL_VEBOX_DI_SVCM_DELTA_NATUAL;
1806 pRenderData->VeboxDNDIParams.dwSVCMThreshold = VPHAL_VEBOX_DI_SVCM_THRESHOLD_NATUAL;
1807 pRenderData->VeboxDNDIParams.bFasterConvergence = false;
1808 pRenderData->VeboxDNDIParams.bTDMLumaSmallerWindow = false;
1809 pRenderData->VeboxDNDIParams.bTDMChromaSmallerWindow = false;
1810 pRenderData->VeboxDNDIParams.dwLumaTDMCoringThreshold = VPHAL_VEBOX_DI_LUMA_TDM_CORING_THRESHOLD_NATUAL;
1811 pRenderData->VeboxDNDIParams.dwChromaTDMCoringThreshold = VPHAL_VEBOX_DI_CHROMA_TDM_CORING_THRESHOLD_NATUAL;
1812 pRenderData->VeboxDNDIParams.bBypassDeflickerFilter = true;
1813 pRenderData->VeboxDNDIParams.bUseSyntheticContentMedian = false;
1814 pRenderData->VeboxDNDIParams.bLocalCheck = true;
1815 pRenderData->VeboxDNDIParams.bSyntheticContentCheck = false;
1816 pRenderData->VeboxDNDIParams.dwDirectionCheckThreshold = VPHAL_VEBOX_DI_DIRECTION_CHECK_THRESHOLD_NATUAL;
1817 pRenderData->VeboxDNDIParams.dwTearingLowThreshold = VPHAL_VEBOX_DI_TEARING_LOW_THRESHOLD_NATUAL;
1818 pRenderData->VeboxDNDIParams.dwTearingHighThreshold = VPHAL_VEBOX_DI_TEARING_HIGH_THRESHOLD_NATUAL;
1819 pRenderData->VeboxDNDIParams.dwDiffCheckSlackThreshold = VPHAL_VEBOX_DI_DIFF_CHECK_SLACK_THRESHOLD_NATUAL;
1820 pRenderData->VeboxDNDIParams.dwSADWT0 = VPHAL_VEBOX_DI_SAD_WT0_NATUAL;
1821 pRenderData->VeboxDNDIParams.dwSADWT1 = VPHAL_VEBOX_DI_SAD_WT1_NATUAL;
1822 pRenderData->VeboxDNDIParams.dwSADWT2 = VPHAL_VEBOX_DI_SAD_WT2_NATUAL;
1823 pRenderData->VeboxDNDIParams.dwSADWT3 = VPHAL_VEBOX_DI_SAD_WT3_NATUAL;
1824 pRenderData->VeboxDNDIParams.dwSADWT4 = VPHAL_VEBOX_DI_SAD_WT4_NATUAL;
1825 pRenderData->VeboxDNDIParams.dwSADWT6 = VPHAL_VEBOX_DI_SAD_WT6_NATUAL;
1826 if (pSrcSurface && pSrcSurface->pDeinterlaceParams)
1827 {
1828 pRenderData->VeboxDNDIParams.bSCDEnable = pSrcSurface->pDeinterlaceParams->bSCDEnable;
1829 }
1830 else
1831 {
1832 pRenderData->VeboxDNDIParams.bSCDEnable = false;
1833 }
1834
1835 VPHAL_RENDER_CHK_NULL_RETURN(pSrcSurface);
1836 if (MEDIA_IS_HDCONTENT(pSrcSurface->dwWidth, pSrcSurface->dwHeight))
1837 {
1838 pRenderData->VeboxDNDIParams.dwLPFWtLUT0 = VPHAL_VEBOX_DI_LPFWTLUT0_HD_NATUAL;
1839 pRenderData->VeboxDNDIParams.dwLPFWtLUT1 = VPHAL_VEBOX_DI_LPFWTLUT1_HD_NATUAL;
1840 pRenderData->VeboxDNDIParams.dwLPFWtLUT2 = VPHAL_VEBOX_DI_LPFWTLUT2_HD_NATUAL;
1841 pRenderData->VeboxDNDIParams.dwLPFWtLUT3 = VPHAL_VEBOX_DI_LPFWTLUT3_HD_NATUAL;
1842 pRenderData->VeboxDNDIParams.dwLPFWtLUT4 = VPHAL_VEBOX_DI_LPFWTLUT4_HD_NATUAL;
1843 pRenderData->VeboxDNDIParams.dwLPFWtLUT5 = VPHAL_VEBOX_DI_LPFWTLUT5_HD_NATUAL;
1844 pRenderData->VeboxDNDIParams.dwLPFWtLUT6 = VPHAL_VEBOX_DI_LPFWTLUT6_HD_NATUAL;
1845 pRenderData->VeboxDNDIParams.dwLPFWtLUT7 = VPHAL_VEBOX_DI_LPFWTLUT7_HD_NATUAL;
1846 }
1847 else
1848 {
1849 pRenderData->VeboxDNDIParams.dwLPFWtLUT0 = VPHAL_VEBOX_DI_LPFWTLUT0_SD_NATUAL;
1850 pRenderData->VeboxDNDIParams.dwLPFWtLUT1 = VPHAL_VEBOX_DI_LPFWTLUT1_SD_NATUAL;
1851 pRenderData->VeboxDNDIParams.dwLPFWtLUT2 = VPHAL_VEBOX_DI_LPFWTLUT2_SD_NATUAL;
1852 pRenderData->VeboxDNDIParams.dwLPFWtLUT3 = VPHAL_VEBOX_DI_LPFWTLUT3_SD_NATUAL;
1853 pRenderData->VeboxDNDIParams.dwLPFWtLUT4 = VPHAL_VEBOX_DI_LPFWTLUT4_SD_NATUAL;
1854 pRenderData->VeboxDNDIParams.dwLPFWtLUT5 = VPHAL_VEBOX_DI_LPFWTLUT5_SD_NATUAL;
1855 pRenderData->VeboxDNDIParams.dwLPFWtLUT6 = VPHAL_VEBOX_DI_LPFWTLUT6_SD_NATUAL;
1856 pRenderData->VeboxDNDIParams.dwLPFWtLUT7 = VPHAL_VEBOX_DI_LPFWTLUT7_SD_NATUAL;
1857 }
1858 }
1859
1860 return MOS_STATUS_SUCCESS;
1861 }
1862
SetDNDIParams(PVPHAL_SURFACE pSrcSurface,PVPHAL_SAMPLER_STATE_DNDI_PARAM pLumaParams,PVPHAL_DNUV_PARAMS pChromaParams)1863 MOS_STATUS VPHAL_VEBOX_STATE_G12_BASE::SetDNDIParams(
1864 PVPHAL_SURFACE pSrcSurface,
1865 PVPHAL_SAMPLER_STATE_DNDI_PARAM pLumaParams,
1866 PVPHAL_DNUV_PARAMS pChromaParams)
1867 {
1868 MOS_STATUS status;
1869
1870 VPHAL_RENDER_ASSERT(pSrcSurface);
1871 VPHAL_RENDER_ASSERT(pLumaParams);
1872 VPHAL_RENDER_ASSERT(pChromaParams);
1873
1874 status = MOS_STATUS_SUCCESS;
1875
1876 status = SetDNParams(pSrcSurface, pLumaParams, pChromaParams);
1877
1878 MOS_STATUS status2 = SetDIParams(pSrcSurface);
1879
1880 if (MOS_SUCCEEDED(status))
1881 {
1882 status = status2;
1883 }
1884
1885 return status;
1886 }
1887
1888 //!
1889 //! \brief Get output surface of Vebox
1890 //! \details Get output surface of Vebox in current operation
1891 //! \param [in] bDiVarianceEnable
1892 //! Is DI/Variances report enabled
1893 //! \return PVPHAL_SURFACE
1894 //! Corresponding output surface pointer
1895 //!
GetSurfOutput(bool bDiVarianceEnable)1896 PVPHAL_SURFACE VPHAL_VEBOX_STATE_G12_BASE::GetSurfOutput(
1897 bool bDiVarianceEnable)
1898 {
1899 PVPHAL_SURFACE pSurface = nullptr;
1900 PVPHAL_VEBOX_STATE_G12_BASE pVeboxState = this;
1901 PVPHAL_VEBOX_RENDER_DATA pRenderData = GetLastExecRenderData();
1902
1903 if (!pRenderData)
1904 {
1905 VPHAL_RENDER_ASSERTMESSAGE("pRenderData is null");
1906 return nullptr;
1907 }
1908
1909 if (IS_VPHAL_OUTPUT_PIPE_VEBOX(pRenderData)) // Vebox output pipe
1910 {
1911 pSurface = pRenderData->pRenderTarget;
1912 }
1913 else if (bDiVarianceEnable) // DNDI, DI, DI + IECP
1914 {
1915 pSurface = pVeboxState->FFDISurfaces[pRenderData->iFrame0];
1916 }
1917 else if (IsIECPEnabled()) // DN + IECP or IECP only
1918 {
1919 pSurface = pVeboxState->FFDISurfaces[pRenderData->iCurDNOut];
1920 }
1921 else if (pRenderData->bDenoise) // DN only
1922 {
1923 pSurface = pVeboxState->FFDNSurfaces[pRenderData->iCurDNOut];
1924 }
1925 else if (IS_VPHAL_OUTPUT_PIPE_SFC(pRenderData)) // Write to SFC
1926 {
1927 // Vebox o/p should not be written to memory
1928 pSurface = nullptr;
1929 }
1930 else
1931 {
1932 VPHAL_RENDER_ASSERTMESSAGE("Unable to determine Vebox Output Surface.");
1933 }
1934
1935 return pSurface;
1936 }
1937
1938 //!
1939 //! \brief Setup surface states for Vebox
1940 //! \details Setup surface states for use in the current Vebox Operation
1941 //! \param [in] bDiVarianceEnable
1942 //! Is DI/Variances report enabled
1943 //! \param [in,out] pVeboxSurfaceStateCmdParams
1944 //! Pointer to VEBOX_SURFACE_STATE command parameters
1945 //! \return void
1946 //!
SetupSurfaceStates(bool bDiVarianceEnable,PVPHAL_VEBOX_SURFACE_STATE_CMD_PARAMS pVeboxSurfaceStateCmdParams)1947 void VPHAL_VEBOX_STATE_G12_BASE::SetupSurfaceStates(
1948 bool bDiVarianceEnable,
1949 PVPHAL_VEBOX_SURFACE_STATE_CMD_PARAMS pVeboxSurfaceStateCmdParams)
1950 {
1951 PVPHAL_VEBOX_STATE_G12_BASE pVeboxState = this;
1952 PVPHAL_VEBOX_RENDER_DATA pRenderData = GetLastExecRenderData();
1953
1954 VPHAL_RENDER_CHK_NULL_NO_STATUS_RETURN(pRenderData);
1955 MOS_ZeroMemory(pVeboxSurfaceStateCmdParams, sizeof(VPHAL_VEBOX_SURFACE_STATE_CMD_PARAMS));
1956
1957 pVeboxSurfaceStateCmdParams->pSurfInput = pVeboxState->m_currentSurface;
1958 pVeboxSurfaceStateCmdParams->pSurfOutput = pVeboxState->GetSurfOutput(bDiVarianceEnable);
1959 pVeboxSurfaceStateCmdParams->pSurfSTMM = &pVeboxState->STMMSurfaces[pRenderData->iCurHistIn];
1960 pVeboxSurfaceStateCmdParams->pSurfDNOutput = pVeboxState->FFDNSurfaces[pRenderData->iCurDNOut];
1961 pVeboxSurfaceStateCmdParams->bDIEnable = bDiVarianceEnable;
1962 pVeboxSurfaceStateCmdParams->b3DlutEnable = pRenderData->bHdr3DLut;
1963
1964 }
1965
UseKernelResource()1966 bool VPHAL_VEBOX_STATE_G12_BASE::UseKernelResource()
1967 {
1968 return false; // can always use driver resource in clear memory
1969 }
1970
1971 //!
1972 //! \brief Setup Chroma Sampling for Vebox
1973 //! \details Setup Chroma Sampling for use in the current Vebox Operation
1974 //! \param pChromaSampling
1975 //! [in] Pointer to chroma sampling params of Vebox
1976 //! \return void
1977 //!
SetupChromaSampling(PMHW_VEBOX_CHROMA_SAMPLING pChromaSampling)1978 void VPHAL_VEBOX_STATE_G12_BASE::SetupChromaSampling(
1979 PMHW_VEBOX_CHROMA_SAMPLING pChromaSampling)
1980 {
1981 VPHAL_COLORPACK srcColorPack = VPHAL_COLORPACK_420;
1982 VPHAL_COLORPACK dstColorPack = VPHAL_COLORPACK_420;
1983 PVPHAL_SURFACE pSrcSurface = nullptr;
1984 PVPHAL_SURFACE pRenderTarget = nullptr;
1985 bool bDIEnabled = false;
1986 bool bNeedUpSampling = false;
1987 bool bNeedDownSampling = false;
1988 PVPHAL_VEBOX_STATE_G12_BASE pVeboxState = this;
1989 PVPHAL_VEBOX_RENDER_DATA pRenderData = GetLastExecRenderData();
1990
1991 VPHAL_RENDER_CHK_NULL_NO_STATUS(pVeboxState);
1992 VPHAL_RENDER_CHK_NULL_NO_STATUS(pRenderData);
1993 VPHAL_RENDER_CHK_NULL_NO_STATUS(pChromaSampling);
1994
1995 // Initialize VEBOX chroma sitting to bypass
1996 pChromaSampling->BypassChromaUpsampling = 1;
1997 pChromaSampling->ChromaUpsamplingCoSitedHorizontalOffset = 0;
1998 pChromaSampling->ChromaUpsamplingCoSitedVerticalOffset = 0;
1999 pChromaSampling->BypassChromaDownsampling = 1;
2000 pChromaSampling->ChromaDownsamplingCoSitedHorizontalOffset = 0;
2001 pChromaSampling->ChromaDownsamplingCoSitedVerticalOffset = 0;
2002
2003 // IECP need 444 input, so we use VEBOX CUS to do upsampling.
2004 bNeedUpSampling = pRenderData->bIECP;
2005 // Only VEBOX output, we use VEO to do downsampling.
2006 // Else, we use SFC/FC path to do downscaling.
2007 // if VEBOX intermediate buffer format is non_YUY2 on DI case, enable downsampling as center-left
2008 if (pRenderData->bDeinterlace && (pRenderData->pRenderTarget->Format != Format_YUY2))
2009 {
2010 bNeedDownSampling = true;
2011 }
2012 else
2013 {
2014 bNeedDownSampling = IS_VPHAL_OUTPUT_PIPE_VEBOX(pRenderData);
2015 }
2016
2017 // Source
2018 pSrcSurface = pVeboxState->m_currentSurface;
2019 // Currently, if no input, we also don't set chroma sitting on render target.
2020 VPHAL_RENDER_CHK_NULL_NO_STATUS(pSrcSurface);
2021 // Source Chroma sitting default
2022 if (pSrcSurface->ChromaSiting == MHW_CHROMA_SITING_NONE)
2023 {
2024 pSrcSurface->ChromaSiting = (CHROMA_SITING_HORZ_LEFT | CHROMA_SITING_VERT_CENTER);
2025 }
2026 srcColorPack = VpHalDDIUtils::GetSurfaceColorPack(pSrcSurface->Format);
2027 switch (srcColorPack)
2028 {
2029 // For 422 format, vertical should be always 0.
2030 case VPHAL_COLORPACK_422:
2031 pSrcSurface->ChromaSiting = (pSrcSurface->ChromaSiting & 0x7) | CHROMA_SITING_VERT_TOP;
2032 break;
2033 // For 444 format, we always default to left & top because Luma and Chroma is co-sited.
2034 case VPHAL_COLORPACK_444:
2035 pSrcSurface->ChromaSiting = CHROMA_SITING_HORZ_LEFT | CHROMA_SITING_VERT_TOP;
2036 break;
2037 default:
2038 break;
2039 }
2040
2041 // Handle source chroma sitting
2042 if (bNeedUpSampling)
2043 {
2044 bDIEnabled = pRenderData->bDeinterlace;
2045 // Type 0
2046 if ((pSrcSurface->ChromaSiting & MHW_CHROMA_SITING_HORZ_LEFT) &&
2047 (pSrcSurface->ChromaSiting & MHW_CHROMA_SITING_VERT_CENTER))
2048 {
2049 if (srcColorPack == VPHAL_COLORPACK_420)
2050 {
2051 pChromaSampling->BypassChromaUpsampling = 0;
2052 if (bDIEnabled)
2053 {
2054 pChromaSampling->ChromaUpsamplingCoSitedHorizontalOffset = VPHAL_VEBOX_CHROMA_UPSAMPLING_420_WITH_DI_TYPE0_HORZ_OFFSET;
2055 pChromaSampling->ChromaUpsamplingCoSitedVerticalOffset = VPHAL_VEBOX_CHROMA_UPSAMPLING_420_WITH_DI_TYPE0_VERT_OFFSET;
2056 }
2057 else
2058 {
2059 pChromaSampling->ChromaUpsamplingCoSitedHorizontalOffset = VPHAL_VEBOX_CHROMA_UPSAMPLING_420_WITHOUT_DI_TYPE0_HORZ_OFFSET;
2060 pChromaSampling->ChromaUpsamplingCoSitedVerticalOffset = VPHAL_VEBOX_CHROMA_UPSAMPLING_420_WITHOUT_DI_TYPE0_VERT_OFFSET;
2061 }
2062 }
2063 }
2064 // Type 1
2065 else if ((pSrcSurface->ChromaSiting & MHW_CHROMA_SITING_HORZ_CENTER) &&
2066 (pSrcSurface->ChromaSiting & MHW_CHROMA_SITING_VERT_CENTER))
2067 {
2068 if (srcColorPack == VPHAL_COLORPACK_420)
2069 {
2070 pChromaSampling->BypassChromaUpsampling = 0;
2071 if (bDIEnabled)
2072 {
2073 pChromaSampling->ChromaUpsamplingCoSitedHorizontalOffset = VPHAL_VEBOX_CHROMA_UPSAMPLING_420_WITH_DI_TYPE1_HORZ_OFFSET;
2074 pChromaSampling->ChromaUpsamplingCoSitedVerticalOffset = VPHAL_VEBOX_CHROMA_UPSAMPLING_420_WITH_DI_TYPE1_VERT_OFFSET;
2075 }
2076 else
2077 {
2078 pChromaSampling->ChromaUpsamplingCoSitedHorizontalOffset = VPHAL_VEBOX_CHROMA_UPSAMPLING_420_WITHOUT_DI_TYPE1_HORZ_OFFSET;
2079 pChromaSampling->ChromaUpsamplingCoSitedVerticalOffset = VPHAL_VEBOX_CHROMA_UPSAMPLING_420_WITHOUT_DI_TYPE1_VERT_OFFSET;
2080 }
2081 }
2082 }
2083 // Type 2
2084 else if ((pSrcSurface->ChromaSiting & MHW_CHROMA_SITING_HORZ_LEFT) &&
2085 (pSrcSurface->ChromaSiting & MHW_CHROMA_SITING_VERT_TOP))
2086 {
2087 if (srcColorPack == VPHAL_COLORPACK_420)
2088 {
2089 pChromaSampling->BypassChromaUpsampling = 0;
2090 if (bDIEnabled)
2091 {
2092 pChromaSampling->ChromaUpsamplingCoSitedHorizontalOffset = VPHAL_VEBOX_CHROMA_UPSAMPLING_420_WITH_DI_TYPE2_HORZ_OFFSET;
2093 pChromaSampling->ChromaUpsamplingCoSitedVerticalOffset = VPHAL_VEBOX_CHROMA_UPSAMPLING_420_WITH_DI_TYPE2_VERT_OFFSET;
2094 }
2095 else
2096 {
2097 pChromaSampling->ChromaUpsamplingCoSitedHorizontalOffset = VPHAL_VEBOX_CHROMA_UPSAMPLING_420_WITHOUT_DI_TYPE2_HORZ_OFFSET;
2098 pChromaSampling->ChromaUpsamplingCoSitedVerticalOffset = VPHAL_VEBOX_CHROMA_UPSAMPLING_420_WITHOUT_DI_TYPE2_VERT_OFFSET;
2099 }
2100 }
2101 else if (srcColorPack == VPHAL_COLORPACK_422)
2102 {
2103 pChromaSampling->BypassChromaUpsampling = 0;
2104 pChromaSampling->ChromaUpsamplingCoSitedHorizontalOffset = VPHAL_VEBOX_CHROMA_UPSAMPLING_422_TYPE2_HORZ_OFFSET;
2105 pChromaSampling->ChromaUpsamplingCoSitedVerticalOffset = VPHAL_VEBOX_CHROMA_UPSAMPLING_422_TYPE2_VERT_OFFSET;
2106 }
2107 }
2108 // Type 3
2109 else if ((pSrcSurface->ChromaSiting & MHW_CHROMA_SITING_HORZ_CENTER) &&
2110 (pSrcSurface->ChromaSiting & MHW_CHROMA_SITING_VERT_TOP))
2111 {
2112 if (srcColorPack == VPHAL_COLORPACK_420)
2113 {
2114 pChromaSampling->BypassChromaUpsampling = 0;
2115 if (bDIEnabled)
2116 {
2117 pChromaSampling->ChromaUpsamplingCoSitedHorizontalOffset = VPHAL_VEBOX_CHROMA_UPSAMPLING_420_WITH_DI_TYPE3_HORZ_OFFSET;
2118 pChromaSampling->ChromaUpsamplingCoSitedVerticalOffset = VPHAL_VEBOX_CHROMA_UPSAMPLING_420_WITH_DI_TYPE3_VERT_OFFSET;
2119 }
2120 else
2121 {
2122 pChromaSampling->ChromaUpsamplingCoSitedHorizontalOffset = VPHAL_VEBOX_CHROMA_UPSAMPLING_420_WITHOUT_DI_TYPE3_HORZ_OFFSET;
2123 pChromaSampling->ChromaUpsamplingCoSitedVerticalOffset = VPHAL_VEBOX_CHROMA_UPSAMPLING_420_WITHOUT_DI_TYPE3_VERT_OFFSET;
2124 }
2125 }
2126 else if (srcColorPack == VPHAL_COLORPACK_422)
2127 {
2128 pChromaSampling->BypassChromaUpsampling = 0;
2129 pChromaSampling->ChromaUpsamplingCoSitedHorizontalOffset = VPHAL_VEBOX_CHROMA_UPSAMPLING_422_TYPE3_HORZ_OFFSET;
2130 pChromaSampling->ChromaUpsamplingCoSitedVerticalOffset = VPHAL_VEBOX_CHROMA_UPSAMPLING_422_TYPE3_VERT_OFFSET;
2131 }
2132 }
2133 // Type 4
2134 else if ((pSrcSurface->ChromaSiting & MHW_CHROMA_SITING_HORZ_LEFT) &&
2135 (pSrcSurface->ChromaSiting & MHW_CHROMA_SITING_VERT_BOTTOM))
2136 {
2137 if (srcColorPack == VPHAL_COLORPACK_420)
2138 {
2139 pChromaSampling->BypassChromaUpsampling = 0;
2140 if (bDIEnabled)
2141 {
2142 pChromaSampling->ChromaUpsamplingCoSitedHorizontalOffset = VPHAL_VEBOX_CHROMA_UPSAMPLING_420_WITH_DI_TYPE4_HORZ_OFFSET;
2143 pChromaSampling->ChromaUpsamplingCoSitedVerticalOffset = VPHAL_VEBOX_CHROMA_UPSAMPLING_420_WITH_DI_TYPE4_VERT_OFFSET;
2144 }
2145 else
2146 {
2147 pChromaSampling->ChromaUpsamplingCoSitedHorizontalOffset = VPHAL_VEBOX_CHROMA_UPSAMPLING_420_WITHOUT_DI_TYPE4_HORZ_OFFSET;
2148 pChromaSampling->ChromaUpsamplingCoSitedVerticalOffset = VPHAL_VEBOX_CHROMA_UPSAMPLING_420_WITHOUT_DI_TYPE4_VERT_OFFSET;
2149 }
2150 }
2151 }
2152 // Type 5
2153 else if ((pSrcSurface->ChromaSiting & MHW_CHROMA_SITING_HORZ_CENTER) &&
2154 (pSrcSurface->ChromaSiting & MHW_CHROMA_SITING_VERT_BOTTOM))
2155 {
2156 if (srcColorPack == VPHAL_COLORPACK_420)
2157 {
2158 pChromaSampling->BypassChromaUpsampling = 0;
2159 if (bDIEnabled)
2160 {
2161 pChromaSampling->ChromaUpsamplingCoSitedHorizontalOffset = VPHAL_VEBOX_CHROMA_UPSAMPLING_420_WITH_DI_TYPE5_HORZ_OFFSET;
2162 pChromaSampling->ChromaUpsamplingCoSitedVerticalOffset = VPHAL_VEBOX_CHROMA_UPSAMPLING_420_WITH_DI_TYPE5_VERT_OFFSET;
2163 }
2164 else
2165 {
2166 pChromaSampling->ChromaUpsamplingCoSitedHorizontalOffset = VPHAL_VEBOX_CHROMA_UPSAMPLING_420_WITHOUT_DI_TYPE5_HORZ_OFFSET;
2167 pChromaSampling->ChromaUpsamplingCoSitedVerticalOffset = VPHAL_VEBOX_CHROMA_UPSAMPLING_420_WITHOUT_DI_TYPE5_VERT_OFFSET;
2168 }
2169 }
2170 }
2171 }
2172
2173 // Render Target
2174 pRenderTarget = pRenderData->pRenderTarget;
2175 VPHAL_RENDER_CHK_NULL_NO_STATUS(pRenderTarget);
2176 if (pRenderTarget->ChromaSiting == MHW_CHROMA_SITING_NONE)
2177 {
2178 pRenderTarget->ChromaSiting = (CHROMA_SITING_HORZ_LEFT | CHROMA_SITING_VERT_CENTER);
2179 }
2180 dstColorPack = VpHalDDIUtils::GetSurfaceColorPack(pRenderTarget->Format);
2181 switch (dstColorPack)
2182 {
2183 case VPHAL_COLORPACK_422:
2184 // For 422 format, vertical should be always 0.
2185 pRenderTarget->ChromaSiting = (pRenderTarget->ChromaSiting & 0x7) | CHROMA_SITING_VERT_TOP;
2186 break;
2187 case VPHAL_COLORPACK_444:
2188 // For 444 format, we always default to left & top because Luma and Chroma is co-sited.
2189 pRenderTarget->ChromaSiting = CHROMA_SITING_HORZ_LEFT | CHROMA_SITING_VERT_TOP;
2190 break;
2191 default:
2192 break;
2193 }
2194
2195 // Handle render target chroma sitting
2196 if (bNeedDownSampling)
2197 {
2198 // Type 0
2199 if ((pRenderTarget->ChromaSiting & MHW_CHROMA_SITING_HORZ_LEFT) &&
2200 (pRenderTarget->ChromaSiting & MHW_CHROMA_SITING_VERT_CENTER))
2201 {
2202 if (dstColorPack == VPHAL_COLORPACK_420)
2203 {
2204 pChromaSampling->BypassChromaDownsampling = 0;
2205 pChromaSampling->ChromaDownsamplingCoSitedHorizontalOffset = VPHAL_VEBOX_CHROMA_DOWNSAMPLING_420_TYPE0_HORZ_OFFSET;
2206 pChromaSampling->ChromaDownsamplingCoSitedVerticalOffset = VPHAL_VEBOX_CHROMA_DOWNSAMPLING_420_TYPE0_VERT_OFFSET;
2207 }
2208 }
2209 // Type 1
2210 else if ((pRenderTarget->ChromaSiting & MHW_CHROMA_SITING_HORZ_CENTER) &&
2211 (pRenderTarget->ChromaSiting & MHW_CHROMA_SITING_VERT_CENTER))
2212 {
2213 if (dstColorPack == VPHAL_COLORPACK_420)
2214 {
2215 pChromaSampling->BypassChromaDownsampling = 0;
2216 pChromaSampling->ChromaDownsamplingCoSitedHorizontalOffset = VPHAL_VEBOX_CHROMA_DOWNSAMPLING_420_TYPE1_HORZ_OFFSET;
2217 pChromaSampling->ChromaDownsamplingCoSitedVerticalOffset = VPHAL_VEBOX_CHROMA_DOWNSAMPLING_420_TYPE1_VERT_OFFSET;
2218 }
2219 }
2220 // Type 2
2221 else if ((pRenderTarget->ChromaSiting & MHW_CHROMA_SITING_HORZ_LEFT) &&
2222 (pRenderTarget->ChromaSiting & MHW_CHROMA_SITING_VERT_TOP))
2223 {
2224 if (dstColorPack == VPHAL_COLORPACK_420)
2225 {
2226 pChromaSampling->BypassChromaDownsampling = 0;
2227 pChromaSampling->ChromaDownsamplingCoSitedHorizontalOffset = VPHAL_VEBOX_CHROMA_DOWNSAMPLING_420_TYPE2_HORZ_OFFSET;
2228 pChromaSampling->ChromaDownsamplingCoSitedVerticalOffset = VPHAL_VEBOX_CHROMA_DOWNSAMPLING_420_TYPE2_VERT_OFFSET;
2229 }
2230 else if (dstColorPack == VPHAL_COLORPACK_422)
2231 {
2232 pChromaSampling->BypassChromaDownsampling = 0;
2233 pChromaSampling->ChromaDownsamplingCoSitedHorizontalOffset = VPHAL_VEBOX_CHROMA_DOWNSAMPLING_422_TYPE2_HORZ_OFFSET;
2234 pChromaSampling->ChromaDownsamplingCoSitedVerticalOffset = VPHAL_VEBOX_CHROMA_DOWNSAMPLING_422_TYPE2_VERT_OFFSET;
2235 }
2236 }
2237 // Type 3
2238 else if ((pRenderTarget->ChromaSiting & MHW_CHROMA_SITING_HORZ_CENTER) &&
2239 (pRenderTarget->ChromaSiting & MHW_CHROMA_SITING_VERT_TOP))
2240 {
2241 if (dstColorPack == VPHAL_COLORPACK_420)
2242 {
2243 pChromaSampling->BypassChromaDownsampling = 0;
2244 pChromaSampling->ChromaDownsamplingCoSitedHorizontalOffset = VPHAL_VEBOX_CHROMA_DOWNSAMPLING_420_TYPE3_HORZ_OFFSET;
2245 pChromaSampling->ChromaDownsamplingCoSitedVerticalOffset = VPHAL_VEBOX_CHROMA_DOWNSAMPLING_420_TYPE3_VERT_OFFSET;
2246 }
2247 else if (dstColorPack == VPHAL_COLORPACK_422)
2248 {
2249 pChromaSampling->BypassChromaDownsampling = 0;
2250 pChromaSampling->ChromaDownsamplingCoSitedHorizontalOffset = VPHAL_VEBOX_CHROMA_DOWNSAMPLING_422_TYPE3_HORZ_OFFSET;
2251 pChromaSampling->ChromaDownsamplingCoSitedVerticalOffset = VPHAL_VEBOX_CHROMA_DOWNSAMPLING_422_TYPE3_VERT_OFFSET;
2252 }
2253 }
2254 // Type 4
2255 else if ((pRenderTarget->ChromaSiting & MHW_CHROMA_SITING_HORZ_LEFT) &&
2256 (pRenderTarget->ChromaSiting & MHW_CHROMA_SITING_VERT_BOTTOM))
2257 {
2258 if (dstColorPack == VPHAL_COLORPACK_420)
2259 {
2260 pChromaSampling->BypassChromaDownsampling = 0;
2261 pChromaSampling->ChromaDownsamplingCoSitedHorizontalOffset = VPHAL_VEBOX_CHROMA_DOWNSAMPLING_420_TYPE4_HORZ_OFFSET;
2262 pChromaSampling->ChromaDownsamplingCoSitedVerticalOffset = VPHAL_VEBOX_CHROMA_DOWNSAMPLING_420_TYPE4_VERT_OFFSET;
2263 }
2264 }
2265 // Type 5
2266 else if ((pRenderTarget->ChromaSiting & MHW_CHROMA_SITING_HORZ_CENTER) &&
2267 (pRenderTarget->ChromaSiting & MHW_CHROMA_SITING_VERT_BOTTOM))
2268 {
2269 if (dstColorPack == VPHAL_COLORPACK_420)
2270 {
2271 pChromaSampling->BypassChromaDownsampling = 0;
2272 pChromaSampling->ChromaDownsamplingCoSitedHorizontalOffset = VPHAL_VEBOX_CHROMA_DOWNSAMPLING_420_TYPE5_HORZ_OFFSET;
2273 pChromaSampling->ChromaDownsamplingCoSitedVerticalOffset = VPHAL_VEBOX_CHROMA_DOWNSAMPLING_420_TYPE5_VERT_OFFSET;
2274 }
2275 }
2276 }
2277
2278 finish:
2279 return;
2280 }
2281
2282 //!
2283 //! \brief Setup Vebox_State Command parameter
2284 //! \param [in] bDiVarianceEnable
2285 //! Is DI/Variances report enabled
2286 //! \param [in,out] pVeboxStateCmdParams
2287 //! Pointer to VEBOX_STATE command parameters
2288 //! \return MOS_STATUS
2289 //! Return MOS_STATUS_SUCCESS if successful, otherwise failed
2290 //!
SetupVeboxState(bool bDiVarianceEnable,PMHW_VEBOX_STATE_CMD_PARAMS pVeboxStateCmdParams)2291 MOS_STATUS VPHAL_VEBOX_STATE_G12_BASE::SetupVeboxState(
2292 bool bDiVarianceEnable,
2293 PMHW_VEBOX_STATE_CMD_PARAMS pVeboxStateCmdParams)
2294 {
2295 PMHW_VEBOX_MODE pVeboxMode = nullptr;
2296 PMOS_INTERFACE pOsInterface = nullptr;
2297 PMHW_VEBOX_3D_LUT pLUT3D = nullptr;
2298 uint8_t* p3DLutData = nullptr;
2299 uint32_t dw3DLutDataSize = 0;
2300 MOS_STATUS eStatus = MOS_STATUS_SUCCESS;
2301 PVPHAL_VEBOX_STATE_G12_BASE pVeboxState = this;
2302 PVPHAL_VEBOX_RENDER_DATA pRenderData = GetLastExecRenderData();
2303
2304 VPHAL_RENDER_CHK_NULL(pVeboxStateCmdParams);
2305 VPHAL_RENDER_CHK_NULL(pVeboxState);
2306 VPHAL_RENDER_CHK_NULL(pRenderData);
2307
2308 pVeboxMode = &pVeboxStateCmdParams->VeboxMode;
2309 pOsInterface = pVeboxState->m_pOsInterface;
2310
2311 VPHAL_RENDER_CHK_NULL(pVeboxMode);
2312 VPHAL_RENDER_CHK_NULL(pOsInterface);
2313
2314 pLUT3D = &pVeboxStateCmdParams->LUT3D;
2315
2316 MOS_ZeroMemory(pVeboxStateCmdParams, sizeof(*pVeboxStateCmdParams));
2317
2318 if (IS_VPHAL_OUTPUT_PIPE_SFC(pRenderData) ||
2319 IS_VPHAL_OUTPUT_PIPE_VEBOX(pRenderData))
2320 {
2321 // On CNL, GlobalIECP must be enabled when the output pipe is Vebox or SFC
2322 pVeboxMode->GlobalIECPEnable = true;
2323 }
2324 else
2325 {
2326 pVeboxMode->GlobalIECPEnable = IsIECPEnabled();
2327 }
2328
2329 pVeboxMode->DIEnable = bDiVarianceEnable;
2330 pVeboxMode->SFCParallelWriteEnable = IS_VPHAL_OUTPUT_PIPE_SFC(pRenderData) && (pRenderData->bDenoise || bDiVarianceEnable);
2331 pVeboxMode->DNEnable = pRenderData->bDenoise;
2332 pVeboxMode->DNDIFirstFrame = (!pRenderData->bRefValid && (pVeboxMode->DNEnable || pVeboxMode->DIEnable));
2333 pVeboxMode->DIOutputFrames = SetDIOutputFrame(pRenderData, pVeboxState, pVeboxMode);
2334 pVeboxMode->DisableEncoderStatistics = true;
2335
2336 if((pVeboxMode->DIEnable == false) &&
2337 (pVeboxMode->DNEnable != false) &&
2338 ((pVeboxState->bDisableTemporalDenoiseFilter) ||
2339 (IS_RGB_CSPACE(pVeboxState->m_currentSurface->ColorSpace))))
2340 {
2341 pVeboxMode->DisableTemporalDenoiseFilter = true;
2342 // GlobalIECP or Demosaic must be enabled even if IECP not used
2343 pVeboxMode->GlobalIECPEnable = true;
2344 }
2345 else
2346 {
2347 pVeboxMode->DisableTemporalDenoiseFilter = false;
2348 }
2349
2350 pVeboxStateCmdParams->bUseVeboxHeapKernelResource = UseKernelResource();
2351
2352 SetupChromaSampling(&pVeboxStateCmdParams->ChromaSampling);
2353
2354 if (MEDIA_IS_SKU(pVeboxState->m_pRenderHal->pSkuTable, FtrSingleVeboxSlice))
2355 {
2356 pVeboxMode->SingleSliceVeboxEnable = 0;
2357 }
2358 else
2359 {
2360 // Permanent program limitation that should go in all the configurations of SKLGT which have 2 VEBOXes (i.e. GT3 & GT4)
2361 // VEBOX1 should be disabled whenever there is an VE-SFC workload.
2362 // This is because we have only one SFC all the GT configurations and that SFC is tied to VEBOX0. Hence the programming restriction.
2363 if (IS_VPHAL_OUTPUT_PIPE_SFC(pRenderData))
2364 {
2365 pVeboxMode->SingleSliceVeboxEnable = 1;
2366 }
2367 else
2368 {
2369 pVeboxMode->SingleSliceVeboxEnable = 0;
2370 }
2371 }
2372
2373 if (pRenderData->bHdr3DLut && pLUT3D)
2374 {
2375 pVeboxMode->ColorGamutExpansionEnable = true;
2376
2377 // Set Vebox 3D Look Up Table Surfaces
2378 pVeboxStateCmdParams->pVebox3DLookUpTables = &pVeboxState->Vebox3DLookUpTables.OsResource;
2379 VPHAL_RENDER_CHK_STATUS(pOsInterface->pfnRegisterResource(
2380 pOsInterface,
2381 &pVeboxState->Vebox3DLookUpTables.OsResource,
2382 false,
2383 true));
2384 pVeboxStateCmdParams->Vebox3DLookUpTablesSurfCtrl.Value = pVeboxState->DnDiSurfMemObjCtl.Vebox3DLookUpTablesSurfMemObjCtl;
2385
2386 pLUT3D->ArbitrationPriorityControl = 0;
2387 pLUT3D->Lut3dEnable = true;
2388 pLUT3D->Lut3dSize = 2;
2389
2390 if (pVeboxState->m_currentSurface->p3DLutParams)
2391 {
2392 if (pVeboxState->m_currentSurface->p3DLutParams->LutSize == 17)
2393 {
2394 pLUT3D->Lut3dSize = 1;
2395 }
2396 else if (pVeboxState->m_currentSurface->p3DLutParams->LutSize == 33)
2397 {
2398 pLUT3D->Lut3dSize = 0;
2399 }
2400 else if (pVeboxState->m_currentSurface->p3DLutParams->LutSize == 65)
2401 {
2402 pLUT3D->Lut3dSize = 2;
2403 }
2404 }
2405 else
2406 {
2407 if (m_hdr3DLutGenerator)
2408 {
2409 m_hdr3DLutGenerator->Render(
2410 pRenderData->uiMaxDisplayLum,
2411 pRenderData->uiMaxContentLevelLum,
2412 pRenderData->hdrMode,
2413 &pVeboxState->Vebox3DLookUpTables);
2414 }
2415 // 65^3 is the default.
2416 pLUT3D->Lut3dSize = 2;
2417 }
2418 }
2419
2420 finish:
2421 return eStatus;
2422 }
2423
GetOutputPipe(PCVPHAL_RENDER_PARAMS pcRenderParams,PVPHAL_SURFACE pSrcSurface,RenderpassData * pRenderData)2424 VPHAL_OUTPUT_PIPE_MODE VPHAL_VEBOX_STATE_G12_BASE::GetOutputPipe(
2425 PCVPHAL_RENDER_PARAMS pcRenderParams,
2426 PVPHAL_SURFACE pSrcSurface,
2427 RenderpassData* pRenderData)
2428
2429 {
2430 VPHAL_OUTPUT_PIPE_MODE OutputPipe;
2431 bool bCompBypassFeasible = false;
2432 bool bOutputPipeVeboxFeasible = false;
2433 bool bHDRToneMappingNeed = false;
2434 PVPHAL_SURFACE pTarget = nullptr;
2435 PVPHAL_VEBOX_STATE_G12_BASE pVeboxState = this;
2436
2437 OutputPipe = VPHAL_OUTPUT_PIPE_MODE_COMP;
2438
2439 VPHAL_RENDER_CHK_NULL_NO_STATUS(pcRenderParams);
2440 VPHAL_RENDER_CHK_NULL_NO_STATUS(pRenderData);
2441 VPHAL_RENDER_CHK_NULL_NO_STATUS(pSrcSurface);
2442 VPHAL_RENDER_CHK_NULL_NO_STATUS(pcRenderParams->pTarget[0]);
2443
2444 pTarget = pcRenderParams->pTarget[0];
2445
2446 bCompBypassFeasible = IS_COMP_BYPASS_FEASIBLE(pRenderData->bCompNeeded, pcRenderParams, pSrcSurface);
2447
2448 if (!bCompBypassFeasible)
2449 {
2450 OutputPipe = VPHAL_OUTPUT_PIPE_MODE_COMP;
2451 goto finish;
2452 }
2453
2454 //Let Kernel to cover the DI cases VEBOX cannot handle.
2455 if (pSrcSurface->pDeinterlaceParams &&
2456 pSrcSurface->pDeinterlaceParams->DIMode == DI_MODE_BOB &&
2457 ((IS_VEBOX_SURFACE_HEIGHT_UNALIGNED(pSrcSurface, 4) &&
2458 (pSrcSurface->Format == Format_P010 ||
2459 pSrcSurface->Format == Format_P016 ||
2460 pSrcSurface->Format == Format_NV12)) ||
2461 !this->IsDiFormatSupported(pSrcSurface)))
2462 {
2463 OutputPipe = VPHAL_OUTPUT_PIPE_MODE_COMP;
2464 goto finish;
2465 }
2466
2467 // Let Kernel to output P010 instead of VEBOX output
2468 if (pSrcSurface->p3DLutParams &&
2469 (pTarget->Format == Format_P010 ||
2470 pTarget->Format == Format_P016))
2471 {
2472 OutputPipe = VPHAL_OUTPUT_PIPE_MODE_COMP;
2473 goto finish;
2474 }
2475
2476 bOutputPipeVeboxFeasible = IS_OUTPUT_PIPE_VEBOX_FEASIBLE(pVeboxState, pcRenderParams, pSrcSurface);
2477 if (bOutputPipeVeboxFeasible)
2478 {
2479 OutputPipe = VPHAL_OUTPUT_PIPE_MODE_VEBOX;
2480 goto finish;
2481 }
2482
2483 if (VeboxIs2PassesCSCNeeded(pSrcSurface, pcRenderParams->pTarget[0]))
2484 {
2485 OutputPipe = VPHAL_OUTPUT_PIPE_MODE_COMP;
2486 goto finish;
2487 }
2488
2489 bHDRToneMappingNeed = (pSrcSurface->pHDRParams || pTarget->pHDRParams);
2490 // Check if SFC can be the output pipe
2491 if (m_sfcPipeState && !bHDRToneMappingNeed)
2492 {
2493 OutputPipe = m_sfcPipeState->GetOutputPipe(pSrcSurface, pTarget, pcRenderParams);
2494 }
2495 else
2496 {
2497 OutputPipe = VPHAL_OUTPUT_PIPE_MODE_COMP;
2498 }
2499
2500 // Explore the potential to still output by VEBOX and perform quick color fill in composition
2501 if (bCompBypassFeasible &&
2502 OutputPipe == VPHAL_OUTPUT_PIPE_MODE_COMP &&
2503 pcRenderParams->pColorFillParams &&
2504 pSrcSurface->rcDst.left == pTarget->rcDst.left &&
2505 pSrcSurface->rcDst.top == pTarget->rcDst.top &&
2506 pSrcSurface->rcDst.right == pTarget->rcDst.right &&
2507 pSrcSurface->rcDst.bottom < pTarget->rcDst.bottom)
2508 {
2509 int32_t lTargetBottom;
2510 lTargetBottom = pTarget->rcDst.bottom;
2511 pTarget->rcDst.bottom = pSrcSurface->rcDst.bottom;
2512
2513 // Check if Vebox can be the output pipe again
2514 bOutputPipeVeboxFeasible = IS_OUTPUT_PIPE_VEBOX_FEASIBLE(pVeboxState, pcRenderParams, pSrcSurface);
2515 if (bOutputPipeVeboxFeasible)
2516 {
2517 OutputPipe = VPHAL_OUTPUT_PIPE_MODE_VEBOX;
2518 pTarget->bFastColorFill = true;
2519
2520 if (pTarget->bIsCompressed &&
2521 pTarget->CompressionMode == MOS_MMC_MC &&
2522 (pSrcSurface->rcDst.bottom - pSrcSurface->rcDst.top) % 8 != 0)
2523 {
2524 //If FastColorFill is enabled, pTarget will be shared by VE and Render
2525 //Upper rectangle in pTarget will be used by VE
2526 //Bottom rectangle in pTarget will be used by Render
2527 //If upper rectangle height is not a multiple of 8 unit When MMC is enabled,
2528 //we need to decompress the target surface to avoid output corruption
2529 MOS_STATUS eStatus = m_pOsInterface->pfnDecompResource(m_pOsInterface, &pTarget->OsResource);
2530 if(eStatus == MOS_STATUS_SUCCESS)
2531 {
2532 pTarget->bIsCompressed = false;
2533 pTarget->CompressionMode = MOS_MMC_DISABLED;
2534 pTarget->CompressionFormat = 0;
2535 }
2536 else
2537 {
2538 VPHAL_RENDER_ASSERTMESSAGE("FastColorFill is enabled and decompress target surface failed");
2539 }
2540 }
2541 }
2542 pTarget->rcDst.bottom = lTargetBottom;
2543 }
2544
2545 finish:
2546 pRenderData->bCompNeeded = (OutputPipe == VPHAL_OUTPUT_PIPE_MODE_COMP) ? true : false;
2547 return OutputPipe;
2548 }
2549
2550 //!
2551 //! \brief Vebox is needed on Gen12
2552 //! \details Check if Vebox Render operation can be applied
2553 //! \param [in] pcRenderParams
2554 //! Pointer to VpHal render parameters
2555 //! \param [in,out] pRenderPassData
2556 //! Pointer to Render data
2557 //! \return bool
2558 //! return true if Vebox is needed, otherwise false
2559 //!
IsNeeded(PCVPHAL_RENDER_PARAMS pcRenderParams,RenderpassData * pRenderPassData)2560 bool VPHAL_VEBOX_STATE_G12_BASE::IsNeeded(
2561 PCVPHAL_RENDER_PARAMS pcRenderParams,
2562 RenderpassData *pRenderPassData)
2563 {
2564 PVPHAL_VEBOX_RENDER_DATA pRenderData;
2565 PRENDERHAL_INTERFACE pRenderHal;
2566 PVPHAL_SURFACE pRenderTarget;
2567 bool bVeboxNeeded;
2568 PMOS_INTERFACE pOsInterface;
2569 MOS_STATUS eStatus;
2570 PVPHAL_VEBOX_STATE_G12_BASE pVeboxState = this;
2571 PVPHAL_SURFACE pSrcSurface = nullptr;
2572 bool bEnableIEF;
2573
2574 bVeboxNeeded = false;
2575 VPHAL_RENDER_CHK_NULL(pVeboxState->m_pRenderHal);
2576 VPHAL_RENDER_CHK_NULL(pVeboxState->m_pOsInterface);
2577
2578 pRenderHal = pVeboxState->m_pRenderHal;
2579 pOsInterface = pVeboxState->m_pOsInterface;
2580
2581 pRenderTarget = pcRenderParams->pTarget[0];
2582 pRenderData = GetLastExecRenderData();
2583 pSrcSurface = pRenderPassData->pSrcSurface;
2584
2585 VPHAL_RENDER_CHK_NULL(pSrcSurface);
2586 VPHAL_RENDER_CHK_NULL(pRenderData);
2587
2588 // Check whether VEBOX is available
2589 // VTd doesn't support VEBOX
2590 if (!MEDIA_IS_SKU(pVeboxState->m_pSkuTable, FtrVERing))
2591 {
2592 pRenderPassData->bCompNeeded = true;
2593 goto finish;
2594 }
2595
2596 // Check if the Surface size is greater than 64x16 which is the minimum Width and Height VEBOX can handle
2597 if (pSrcSurface->dwWidth < MHW_VEBOX_MIN_WIDTH || pSrcSurface->dwHeight < MHW_VEBOX_MIN_HEIGHT)
2598 {
2599 pRenderPassData->bCompNeeded = true;
2600 goto finish;
2601 }
2602
2603 //Force 8K to render
2604 if (pcRenderParams->bDisableVeboxFor8K &&
2605 ((pSrcSurface->dwWidth >= VPHAL_RNDR_8K_WIDTH || pSrcSurface->dwHeight >= VPHAL_RNDR_8K_HEIGHT) ||
2606 (pRenderTarget->dwWidth >= VPHAL_RNDR_8K_WIDTH || pRenderTarget->dwHeight >= VPHAL_RNDR_8K_HEIGHT)))
2607 {
2608 // For HDR/Vebox Scalability, still need Vebox to handle since there is no fallback Render path.
2609 if (!pcRenderParams->pSrc[0]->pHDRParams && !pcRenderParams->pTarget[0]->pHDRParams &&
2610 !pOsInterface->bVeboxScalabilityMode)
2611 {
2612 VPHAL_RENDER_NORMALMESSAGE("Disable VEBOX/SFC for 8k resolution");
2613 pRenderPassData->bCompNeeded = true;
2614 goto finish;
2615 }
2616 }
2617
2618 // Force NV12 16K to render
2619 if (pRenderTarget->Format == Format_NV12 && pRenderTarget->dwHeight > VPHAL_RNDR_16K_HEIGHT_LIMIT)
2620 {
2621 VPHAL_RENDER_NORMALMESSAGE("Disable VEBOX/SFC for NV12 16k resolution");
2622 pRenderPassData->bCompNeeded = true;
2623 goto finish;
2624 }
2625
2626 pRenderData->Init();
2627 if (MEDIA_IS_SKU(m_pSkuTable, FtrSFCPipe) && m_sfcPipeState)
2628 {
2629 m_sfcPipeState->InitRenderData();
2630 }
2631
2632 bEnableIEF = (pSrcSurface->pIEFParams && pSrcSurface->pIEFParams->bEnabled == true) ? true : false;
2633
2634 // We need to change the output pipe priority of SFC on GEN12 Linux due to IEF has been removed from AVS sampler
2635 if (pSrcSurface->ScalingPreference == VPHAL_SCALING_PREFER_COMP && bEnableIEF)
2636 {
2637 VPHAL_RENDER_NORMALMESSAGE("Driver set ScalingPreference to SFC to cover IEF.");
2638 pSrcSurface->ScalingPreference = VPHAL_SCALING_PREFER_SFC;
2639 }
2640
2641 // Determine the output pipe before setting the rendering flags for Vebox and SFC
2642 SET_VPHAL_OUTPUT_PIPE(
2643 pRenderData,
2644 GetOutputPipe(
2645 pcRenderParams,
2646 pSrcSurface,
2647 pRenderPassData));
2648
2649 if (IS_VPHAL_OUTPUT_PIPE_INVALID(pRenderData))
2650 {
2651 VPHAL_RENDER_ASSERTMESSAGE("Invalid output pipe!");
2652 bVeboxNeeded = false;
2653 goto finish;
2654 }
2655
2656 //If using Vebox to Crop, setting the bVEBOXCroppingUsed = true. We use the rcSrc to set Vebox width/height instead of using rcMaxsrc in VeboxAdjustBoundary().
2657 if (IS_VPHAL_OUTPUT_PIPE_VEBOX(pRenderData) &&
2658 ((uint32_t)pSrcSurface->rcSrc.bottom < pSrcSurface->dwHeight ||
2659 (uint32_t)pSrcSurface->rcSrc.right < pSrcSurface->dwWidth))
2660 {
2661 pSrcSurface->bVEBOXCroppingUsed = true;
2662 pRenderTarget->bVEBOXCroppingUsed = true;
2663 VPHAL_RENDER_NORMALMESSAGE("bVEBOXCroppingUsed = true, pSrcSurface->rcSrc.bottom: %d, pSrcSurface->rcSrc.right: %d; pSrcSurface->dwHeight: %d, pSrcSurface->dwHeight: %d;",
2664 (uint32_t)pSrcSurface->rcSrc.bottom,
2665 (uint32_t)pSrcSurface->rcSrc.right,
2666 pSrcSurface->dwHeight,
2667 pSrcSurface->dwWidth);
2668 }
2669 else
2670 {
2671 pSrcSurface->bVEBOXCroppingUsed = false;
2672 pRenderTarget->bVEBOXCroppingUsed = false;
2673 }
2674
2675 // Set MMC State
2676 SET_VPHAL_MMC_STATE(pRenderData, pVeboxState->bEnableMMC);
2677
2678 // Update execution state based on current and past events such as the
2679 // # of future and past frames available.
2680 pVeboxState->UpdateVeboxExecutionState(
2681 pSrcSurface,
2682 pRenderData->OutputPipe);
2683
2684 // Set Component
2685 SET_VPHAL_COMPONENT(pRenderData, pcRenderParams->Component);
2686
2687 // Check if Vebox can be used to process the surface
2688 if (pVeboxState->IsFormatSupported(pSrcSurface))
2689 {
2690 // Save Alpha passed by App to be used in Vebox
2691 if (IS_VPHAL_OUTPUT_PIPE_VEBOX(pRenderData))
2692 {
2693 pRenderData->pAlphaParams = pcRenderParams->pCompAlpha;
2694 }
2695
2696 // Setup Rendering Flags for Vebox
2697 VeboxSetRenderingFlags(
2698 pSrcSurface,
2699 pRenderTarget);
2700
2701 if (pRenderData->b2PassesCSC)
2702 {
2703 pRenderData->bVeboxBypass = false;
2704 }
2705
2706 // Vebox is needed if Vebox isn't bypassed
2707 bVeboxNeeded = !pRenderData->bVeboxBypass;
2708 }
2709
2710 // if ScalingPreference == VPHAL_SCALING_PREFER_SFC_FOR_VEBOX, use SFC only when VEBOX is required
2711 // For GEN12+, IEF has been removed from AVS sampler and do not change the path if IEF is enabled.
2712 if ((pSrcSurface->ScalingPreference == VPHAL_SCALING_PREFER_SFC_FOR_VEBOX) &&
2713 (!bEnableIEF) &&
2714 (bVeboxNeeded == false))
2715 {
2716 VPHAL_RENDER_NORMALMESSAGE("DDI choose to use SFC only for VEBOX, and since VEBOX is not required, change to Composition.");
2717 pRenderData->OutputPipe = VPHAL_OUTPUT_PIPE_MODE_COMP;
2718 pRenderPassData->bCompNeeded = true;
2719 }
2720
2721 // Check if we want to enable SFC processing
2722 if (IS_VPHAL_OUTPUT_PIPE_SFC(pRenderData))
2723 {
2724 // Setup Rendering Flags for SFC pipe
2725 m_sfcPipeState->SetRenderingFlags(
2726 pcRenderParams->pColorFillParams,
2727 pcRenderParams->pCompAlpha,
2728 pSrcSurface,
2729 pRenderTarget,
2730 pRenderData);
2731
2732 // Update Vebox Rendering Flags when the output pipe is SFC.
2733 // If input surface format is AYUV, and just have one layer as primary, Procamp can also enable.
2734 // Those flags cannot be updated inside Vebox's SetRenderingFlags due to ScalingPreference option will
2735 // turn back to composition when Vebox is not needed in above code.
2736 pRenderData->bProcamp = (IS_YUV_FORMAT(pSrcSurface->Format) ||
2737 (pSrcSurface->Format == Format_AYUV &&
2738 pcRenderParams->uSrcCount == 1)) &&
2739 pSrcSurface->pProcampParams &&
2740 pSrcSurface->pProcampParams->bEnabled;
2741 pRenderData->bBeCsc = IS_RGB_CSPACE(pSrcSurface->ColorSpace);
2742 pRenderData->bIECP = pRenderData->bIECP ||
2743 pRenderData->bProcamp ||
2744 pRenderData->bBeCsc;
2745
2746 bVeboxNeeded = true;
2747 }
2748
2749 finish:
2750 return bVeboxNeeded;
2751 }
2752
2753 //!
2754 //! \brief Vebox get the back-end colorspace conversion matrix
2755 //! \details When the i/o is A8R8G8B8 or X8R8G8B8, the transfer matrix
2756 //! needs to be updated accordingly
2757 //! \param [in] pSrcSurface
2758 //! Pointer to input surface of Vebox
2759 //! \param [in] pOutSurface
2760 //! Pointer to output surface of Vebox
2761 //! \return void
2762 //!
VeboxGetBeCSCMatrix(PVPHAL_SURFACE pSrcSurface,PVPHAL_SURFACE pOutSurface)2763 void VPHAL_VEBOX_STATE_G12_BASE::VeboxGetBeCSCMatrix(
2764 PVPHAL_SURFACE pSrcSurface,
2765 PVPHAL_SURFACE pOutSurface)
2766 {
2767 PVPHAL_VEBOX_STATE_G12_BASE pVeboxState = this;
2768 float fTemp[3];
2769
2770 // Get the matrix to use for conversion
2771 VpHal_GetCscMatrix(
2772 pSrcSurface->ColorSpace,
2773 pOutSurface->ColorSpace,
2774 pVeboxState->fCscCoeff,
2775 pVeboxState->fCscInOffset,
2776 pVeboxState->fCscOutOffset);
2777
2778 // Vebox CSC converts RGB input to YUV for SFC
2779 // Vebox only supports A8B8G8R8 input, swap the 1st and 3rd
2780 // columns of the transfer matrix for A8R8G8B8 and X8R8G8B8
2781 // This only happens when SFC output is used
2782 if ((pSrcSurface->Format == Format_A8R8G8B8) ||
2783 (pSrcSurface->Format == Format_X8R8G8B8))
2784 {
2785 fTemp[0] = pVeboxState->fCscCoeff[0];
2786 fTemp[1] = pVeboxState->fCscCoeff[3];
2787 fTemp[2] = pVeboxState->fCscCoeff[6];
2788
2789 pVeboxState->fCscCoeff[0] = pVeboxState->fCscCoeff[2];
2790 pVeboxState->fCscCoeff[3] = pVeboxState->fCscCoeff[5];
2791 pVeboxState->fCscCoeff[6] = pVeboxState->fCscCoeff[8];
2792
2793 pVeboxState->fCscCoeff[2] = fTemp[0];
2794 pVeboxState->fCscCoeff[5] = fTemp[1];
2795 pVeboxState->fCscCoeff[8] = fTemp[2];
2796 }
2797 }
2798
2799 #if VEBOX_AUTO_DENOISE_SUPPORTED
LoadUpdateDenoiseKernelStaticData(int32_t * iCurbeOffsetOutDN)2800 MOS_STATUS VPHAL_VEBOX_STATE_G12_BASE::LoadUpdateDenoiseKernelStaticData(
2801 int32_t *iCurbeOffsetOutDN)
2802 {
2803 PRENDERHAL_INTERFACE pRenderHal;
2804 VEBOX_STATE_UPDATE_STATIC_DATA_G12 DNStaticData; // DN Update kernelStatic parameters
2805 PMHW_VEBOX_INTERFACE pVeboxInterface;
2806 PVPHAL_DENOISE_PARAMS pDenoiseParams; // Denoise
2807 int32_t iOffset0, iOffset1, iOffset2, iOffset3;
2808 int32_t iPitch;
2809 MOS_STATUS eStatus;
2810 PVPHAL_VEBOX_RENDER_DATA pRenderData = GetLastExecRenderData();
2811
2812 VPHAL_RENDER_CHK_NULL(pRenderData);
2813 VPHAL_RENDER_CHK_NULL(iCurbeOffsetOutDN);
2814
2815 pRenderHal = m_pRenderHal;
2816 pVeboxInterface = m_pVeboxInterface;
2817 eStatus = MOS_STATUS_SUCCESS;
2818
2819 // init the static data
2820 MOS_ZeroMemory(&DNStaticData, sizeof(DNStaticData));
2821
2822 pDenoiseParams = m_currentSurface->pDenoiseParams;
2823 VPHAL_RENDER_ASSERT(pDenoiseParams);
2824
2825 // Get offset for slice0 and slice1
2826 VPHAL_RENDER_CHK_STATUS(VeboxGetStatisticsSurfaceOffsets(
2827 &iOffset0,
2828 &iOffset1));
2829
2830 iPitch = iOffset1 - iOffset0;
2831 iOffset2 = iOffset1 + iPitch;
2832 iOffset3 = iOffset2 + iPitch;
2833
2834 // Load DN update kernel CURBE data
2835 if (pRenderData->bAutoDenoise)
2836 {
2837 // set the curbe data for DN update kernel
2838 DNStaticData.DW00.OffsetToSlice0 = iOffset0;
2839 DNStaticData.DW01.OffsetToSlice1 = iOffset1;
2840 DNStaticData.DW02.OffsetToSlice2 = iOffset2;
2841 DNStaticData.DW03.OffsetToSlice3 = iOffset3;
2842 DNStaticData.DW04.FirstFrameFlag = bFirstFrame;
2843 DNStaticData.DW04.NoiseLevel = pDenoiseParams->NoiseLevel;
2844 DNStaticData.DW05.RangeThrAdp2NLvl = 1;
2845 DNStaticData.DW06.VeboxStatisticsSurface = BI_DN_STATISTICS_SURFACE;
2846 DNStaticData.DW07.VeboxDndiStateSurface = BI_DN_VEBOX_STATE_SURFACE;
2847 DNStaticData.DW08.VeboxTempSurface = BI_DN_TEMP_SURFACE;
2848 DNStaticData.DW09.VeboxSpatialAttributesConfigurationSurface = BI_DN_SPATIAL_ATTRIBUTES_CONFIGURATION_SURFACE;
2849
2850 *iCurbeOffsetOutDN = pRenderHal->pfnLoadCurbeData(
2851 pRenderHal,
2852 pRenderData->pMediaState,
2853 &DNStaticData,
2854 sizeof(DNStaticData));
2855
2856 if (*iCurbeOffsetOutDN < 0)
2857 {
2858 eStatus = MOS_STATUS_UNKNOWN;
2859 goto finish;
2860 }
2861
2862 pRenderData->iCurbeLength += sizeof(DNStaticData);
2863 }
2864
2865 finish:
2866 return eStatus;
2867 }
2868 //!
2869 //! \brief Setup surface states for Denoise
2870 //! \details Setup Surface State for Vebox States Auto DN kernel
2871 //! \return MOS_STATUS
2872 //! Return MOS_STATUS_SUCCESS if successful, otherwise failed
2873 //!
SetupSurfaceStatesForDenoise()2874 MOS_STATUS VPHAL_VEBOX_STATE_G12_BASE::SetupSurfaceStatesForDenoise()
2875 {
2876 PRENDERHAL_INTERFACE pRenderHal;
2877 PMOS_INTERFACE pOsInterface;
2878 RENDERHAL_SURFACE_STATE_PARAMS SurfaceParams;
2879 MOS_STATUS eStatus;
2880 MOS_FORMAT tmpFormat;
2881 bool bUseKernelResource;
2882 const MHW_VEBOX_HEAP *pVeboxHeap = nullptr;
2883 PVPHAL_VEBOX_STATE_G12_BASE pVeboxState = this;
2884 PVPHAL_VEBOX_RENDER_DATA pRenderData = GetLastExecRenderData();
2885
2886 VPHAL_RENDER_CHK_NULL(pVeboxState);
2887 VPHAL_RENDER_CHK_NULL(pRenderData);
2888 VPHAL_RENDER_CHK_NULL(pVeboxState->m_pRenderHal);
2889 VPHAL_RENDER_CHK_NULL(pVeboxState->m_pOsInterface);
2890
2891 eStatus = MOS_STATUS_SUCCESS;
2892 pRenderHal = pVeboxState->m_pRenderHal;
2893 pOsInterface = pVeboxState->m_pOsInterface;
2894 VPHAL_RENDER_CHK_STATUS(pVeboxState->m_pVeboxInterface->GetVeboxHeapInfo(&pVeboxHeap));
2895 VPHAL_RENDER_CHK_NULL(pVeboxHeap);
2896
2897 bUseKernelResource = UseKernelResource();
2898
2899 MOS_ZeroMemory(&SurfaceParams, sizeof(SurfaceParams));
2900 MOS_ZeroMemory(&pVeboxState->VeboxHeapResource, sizeof(VPHAL_SURFACE));
2901 MOS_ZeroMemory(&pVeboxState->tmpResource, sizeof(VPHAL_SURFACE));
2902
2903 // Treat the 1D buffer as 2D surface
2904 // VEBox State Surface
2905 pVeboxState->VeboxHeapResource.Format = Format_L8;
2906 pVeboxState->VeboxHeapResource.dwWidth = SECURE_BLOCK_COPY_KERNEL_SURF_WIDTH; // Hard code for secure Block Copy kernel
2907 pVeboxState->VeboxHeapResource.dwPitch = SECURE_BLOCK_COPY_KERNEL_SURF_WIDTH; // Hard code for secure Block Copy kernel
2908 pVeboxState->VeboxHeapResource.dwHeight = MOS_ROUNDUP_DIVIDE(pVeboxHeap->uiInstanceSize, SECURE_BLOCK_COPY_KERNEL_SURF_WIDTH);
2909 pVeboxState->VeboxHeapResource.dwOffset = pVeboxHeap->uiInstanceSize * pVeboxHeap->uiCurState;
2910 pVeboxState->VeboxHeapResource.TileType = MOS_TILE_LINEAR;
2911 pVeboxState->VeboxHeapResource.OsResource = bUseKernelResource ? pVeboxHeap->KernelResource : pVeboxHeap->DriverResource;
2912
2913 // Temp Surface: for Noise Level History
2914 pVeboxState->tmpResource.Format = Format_L8;
2915 pVeboxState->tmpResource.dwWidth = SECURE_BLOCK_COPY_KERNEL_SURF_WIDTH; // Hard code for secure Block Copy kernel
2916 pVeboxState->tmpResource.dwPitch = SECURE_BLOCK_COPY_KERNEL_SURF_WIDTH; // Hard code for secure Block Copy kernel
2917 pVeboxState->tmpResource.dwHeight = MOS_ROUNDUP_DIVIDE(MHW_PAGE_SIZE, SECURE_BLOCK_COPY_KERNEL_SURF_WIDTH);
2918 pVeboxState->tmpResource.dwOffset = 0;
2919 pVeboxState->tmpResource.TileType = MOS_TILE_LINEAR;
2920 pVeboxState->tmpResource.OsResource = pVeboxState->VeboxTempSurface.OsResource;
2921
2922 // Statistics Surface-----------------------------------------------------------
2923 tmpFormat = pVeboxState->VeboxStatisticsSurface.Format;
2924 pVeboxState->VeboxStatisticsSurface.Format = Format_RAW;
2925
2926 VPHAL_RENDER_CHK_STATUS(VpHal_CommonSetBufferSurfaceForHwAccess(
2927 pRenderHal,
2928 &pVeboxState->VeboxStatisticsSurface,
2929 &pVeboxState->RenderHalVeboxStatisticsSurface,
2930 nullptr,
2931 pRenderData->iBindingTable,
2932 BI_DN_STATISTICS_SURFACE,
2933 false));
2934
2935 pVeboxState->VeboxStatisticsSurface.Format = tmpFormat;
2936
2937 // VEBox State Surface-----------------------------------------------------------
2938 MOS_ZeroMemory(&SurfaceParams, sizeof(SurfaceParams));
2939
2940 SurfaceParams.Type = pRenderHal->SurfaceTypeDefault;
2941 SurfaceParams.isOutput = true;
2942 SurfaceParams.bWidthInDword_Y = true;
2943 SurfaceParams.bWidthInDword_UV = true;
2944 SurfaceParams.Boundary = RENDERHAL_SS_BOUNDARY_ORIGINAL;
2945 SurfaceParams.bWidth16Align = false;
2946 SurfaceParams.MemObjCtl = (pRenderHal->pOsInterface->pfnCachePolicyGetMemoryObject(
2947 MOS_MP_RESOURCE_USAGE_DEFAULT,
2948 pRenderHal->pOsInterface->pfnGetGmmClientContext(pRenderHal->pOsInterface))).DwordValue;
2949
2950 VPHAL_RENDER_CHK_STATUS(VpHal_CommonSetSurfaceForHwAccess(
2951 pRenderHal,
2952 &pVeboxState->VeboxHeapResource,
2953 &pVeboxState->RenderHalVeboxHeapResource,
2954 &SurfaceParams,
2955 pRenderData->iBindingTable,
2956 BI_DN_VEBOX_STATE_SURFACE,
2957 true));
2958
2959 // VEBox Temp Surface-----------------------------------------------------------
2960 MOS_ZeroMemory(&SurfaceParams, sizeof(SurfaceParams));
2961
2962 SurfaceParams.Type = pRenderHal->SurfaceTypeDefault;
2963 SurfaceParams.isOutput = true;
2964 SurfaceParams.bWidthInDword_Y = true;
2965 SurfaceParams.bWidthInDword_UV = true;
2966 SurfaceParams.Boundary = RENDERHAL_SS_BOUNDARY_ORIGINAL;
2967 SurfaceParams.bWidth16Align = false;
2968 SurfaceParams.MemObjCtl = (pRenderHal->pOsInterface->pfnCachePolicyGetMemoryObject(
2969 MOS_MP_RESOURCE_USAGE_DEFAULT,
2970 pRenderHal->pOsInterface->pfnGetGmmClientContext(pRenderHal->pOsInterface))).DwordValue;
2971
2972 VPHAL_RENDER_CHK_STATUS(VpHal_CommonSetSurfaceForHwAccess(
2973 pRenderHal,
2974 &pVeboxState->tmpResource,
2975 &pVeboxState->RenderHalTmpResource,
2976 &SurfaceParams,
2977 pRenderData->iBindingTable,
2978 BI_DN_TEMP_SURFACE,
2979 true));
2980
2981 // Spatial Attributes Configuration Surface------------------------------------
2982 MOS_ZeroMemory(&SurfaceParams, sizeof(SurfaceParams));
2983
2984 VPHAL_RENDER_CHK_STATUS(VpHal_CommonSetBufferSurfaceForHwAccess(
2985 pRenderHal,
2986 &pVeboxState->VeboxSpatialAttributesConfigurationSurface,
2987 &pVeboxState->RenderHalVeboxSpatialAttributesConfigurationSurface,
2988 &SurfaceParams,
2989 pRenderData->iBindingTable,
2990 BI_DN_SPATIAL_ATTRIBUTES_CONFIGURATION_SURFACE,
2991 false));
2992
2993 finish:
2994 return eStatus;
2995 }
2996 #endif
2997
2998 //!
2999 //! \brief Setup kernels for Vebox auto mode features
3000 //! \details Setup kernels that co-operate with Vebox auto mode features
3001 //! \param [in] iKDTIndex
3002 //! Index to Kernel Parameter Array (defined platform specific)
3003 //! \return MOS_STATUS
3004 //! Return MOS_STATUS_SUCCESS if successful, otherwise failed
3005 //!
SetupVeboxKernel(int32_t iKDTIndex)3006 MOS_STATUS VPHAL_VEBOX_STATE_G12_BASE::SetupVeboxKernel(
3007 int32_t iKDTIndex)
3008 {
3009 Kdll_CacheEntry *pCacheEntryTable; // Kernel Cache Entry table
3010 Kdll_FilterEntry *pFilter; // Kernel Filter (points to base of filter array)
3011 int32_t iKUID; // Kernel Unique ID (DNDI uses combined kernels)
3012 int32_t iInlineLength; // Inline data length
3013 MOS_STATUS eStatus; // Return code
3014 PVPHAL_VEBOX_STATE_G12_BASE pVeboxState = this;
3015 PVPHAL_VEBOX_RENDER_DATA pRenderData = GetLastExecRenderData();
3016 VPHAL_RENDER_CHK_NULL(pRenderData);
3017 // Initialize Variables
3018 eStatus = MOS_STATUS_SUCCESS;
3019 pFilter = &pVeboxState->SearchFilter[0];
3020 pCacheEntryTable = pVeboxState->m_pKernelDllState->ComponentKernelCache.pCacheEntries;
3021
3022 // Initialize States
3023 MOS_ZeroMemory(pFilter, sizeof(pVeboxState->SearchFilter));
3024 MOS_ZeroMemory(&pRenderData->KernelEntry[iKDTIndex], sizeof(Kdll_CacheEntry));
3025
3026 #if VEBOX_AUTO_DENOISE_SUPPORTED
3027 if (iKDTIndex == KERNEL_UPDATEDNSTATE)
3028 {
3029 iKUID = IDR_VP_UpdateDNState;
3030 iInlineLength = 0; // No inline data
3031 pRenderData->PerfTag = VPHAL_VEBOX_UPDATE_DN_STATE;
3032 }
3033 else // Incorrect index to kernel parameters array
3034 #endif
3035 {
3036 VPHAL_RENDER_ASSERTMESSAGE("Incorrect index to kernel parameters array.");
3037 eStatus = MOS_STATUS_UNKNOWN;
3038 goto finish;
3039 }
3040
3041 // Store pointer to Kernel Parameter
3042 pRenderData->pKernelParam[iKDTIndex] = &pVeboxState->pKernelParamTable[iKDTIndex];
3043
3044 // Set Parameters for Kernel Entry
3045 pRenderData->KernelEntry[iKDTIndex].iKUID = iKUID;
3046 pRenderData->KernelEntry[iKDTIndex].iKCID = -1;
3047 pRenderData->KernelEntry[iKDTIndex].iFilterSize = 2;
3048 pRenderData->KernelEntry[iKDTIndex].pFilter = pFilter;
3049 pRenderData->KernelEntry[iKDTIndex].iSize = pCacheEntryTable[iKUID].iSize;
3050 pRenderData->KernelEntry[iKDTIndex].pBinary = pCacheEntryTable[iKUID].pBinary;
3051
3052 // set the Inline Data length
3053 pRenderData->iInlineLength = iInlineLength;
3054
3055 VPHAL_RENDER_NORMALMESSAGE("Vebox Kernels: %s", g_KernelDNDI_Str_g12[iKDTIndex]);
3056
3057 finish:
3058 return eStatus;
3059 }
3060
3061 //!
3062 //! \brief Vebox set rendering flag
3063 //! \details Setup Rendering Flags due to different usage case - main entrance
3064 //! \param [in] pSrc
3065 //! Pointer to input surface of Vebox
3066 //! \param [in] pRenderTarget
3067 //! Pointer to Render target surface of VPP BLT
3068 //! \return void
3069 //!
VeboxSetRenderingFlags(PVPHAL_SURFACE pSrc,PVPHAL_SURFACE pRenderTarget)3070 void VPHAL_VEBOX_STATE_G12_BASE::VeboxSetRenderingFlags(
3071 PVPHAL_SURFACE pSrc,
3072 PVPHAL_SURFACE pRenderTarget)
3073 {
3074 bool bToneMapping = false;
3075 PVPHAL_VEBOX_RENDER_DATA pRenderData = GetLastExecRenderData();
3076
3077 VPHAL_RENDER_CHK_NULL_NO_STATUS(pSrc);
3078 VPHAL_RENDER_CHK_NULL_NO_STATUS(pRenderTarget);
3079 VPHAL_RENDER_CHK_NULL_NO_STATUS(pRenderData);
3080
3081 if ((pSrc->pHDRParams && (pSrc->pHDRParams->EOTF != VPHAL_HDR_EOTF_TRADITIONAL_GAMMA_SDR)) ||
3082 (pRenderTarget->pHDRParams && (pRenderTarget->pHDRParams->EOTF != VPHAL_HDR_EOTF_TRADITIONAL_GAMMA_SDR)))
3083 {
3084 bToneMapping = true;
3085 }
3086 pRenderData->bHdr3DLut = bToneMapping;
3087 pRenderData->bHdr3DLut |= (pSrc->p3DLutParams != nullptr);
3088 VPHAL_RENDER_NORMALMESSAGE("Enable 3DLut for HDR ToneMapping %d or 3DLUT filter %d.", bToneMapping, (pSrc->p3DLutParams != nullptr));
3089 MT_LOG1(MT_VP_HAL_RENDER_VE, MT_NORMAL, MT_VP_RENDERDATA_HDR3DLUT, pRenderData->bHdr3DLut);
3090
3091 VPHAL_VEBOX_STATE::VeboxSetRenderingFlags(pSrc, pRenderTarget);
3092
3093 finish:
3094 return;
3095 }
3096
3097 //!
3098 //! \brief Render the Vebox Cmd buffer for VeboxSendVeboxCmd
3099 //! Parameters might remain unchanged in case
3100 //! \param [in,out] CmdBuffer
3101 //! reference to Cmd buffer control struct
3102 //! \param [out] VeboxDiIecpCmdParams
3103 //! DiIecpCmd params struct to be set
3104 //! \param [out] VeboxSurfaceStateCmdParams
3105 //! VPHAL surface state cmd to be set
3106 //! \param [out] MhwVeboxSurfaceStateCmdParams
3107 //! MHW surface state cmd to be set
3108 //! \param [out] VeboxStateCmdParams
3109 //! MHW vebox state cmd to be set
3110 //! \param [out] FlushDwParams
3111 //! MHW MI_FLUSH_DW cmd to be set
3112 //! \param [in] pGenericPrologParams
3113 //! pointer to Generic prolog params struct to send to cmd buffer header
3114 //! \return MOS_STATUS
3115 //! Return MOS_STATUS_SUCCESS if successful, otherwise failed
3116 //!
VeboxRenderVeboxCmd(MOS_COMMAND_BUFFER & CmdBuffer,MHW_VEBOX_DI_IECP_CMD_PARAMS & VeboxDiIecpCmdParams,VPHAL_VEBOX_SURFACE_STATE_CMD_PARAMS & VeboxSurfaceStateCmdParams,MHW_VEBOX_SURFACE_STATE_CMD_PARAMS & MhwVeboxSurfaceStateCmdParams,MHW_VEBOX_STATE_CMD_PARAMS & VeboxStateCmdParams,MHW_MI_FLUSH_DW_PARAMS & FlushDwParams,PRENDERHAL_GENERIC_PROLOG_PARAMS pGenericPrologParams)3117 MOS_STATUS VPHAL_VEBOX_STATE_G12_BASE::VeboxRenderVeboxCmd(
3118 MOS_COMMAND_BUFFER& CmdBuffer,
3119 MHW_VEBOX_DI_IECP_CMD_PARAMS& VeboxDiIecpCmdParams,
3120 VPHAL_VEBOX_SURFACE_STATE_CMD_PARAMS& VeboxSurfaceStateCmdParams,
3121 MHW_VEBOX_SURFACE_STATE_CMD_PARAMS& MhwVeboxSurfaceStateCmdParams,
3122 MHW_VEBOX_STATE_CMD_PARAMS& VeboxStateCmdParams,
3123 MHW_MI_FLUSH_DW_PARAMS& FlushDwParams,
3124 PRENDERHAL_GENERIC_PROLOG_PARAMS pGenericPrologParams)
3125 {
3126 MOS_STATUS eStatus = MOS_STATUS_SUCCESS;
3127 MhwVeboxInterfaceG12 *pVeboxInterface = nullptr;
3128 PVPHAL_VEBOX_STATE_G12_BASE pVeboxState = this;
3129
3130 MHW_RENDERHAL_CHK_NULL(pVeboxState);
3131 MHW_RENDERHAL_CHK_NULL(pVeboxState->m_pRenderHal);
3132 MHW_RENDERHAL_CHK_NULL(pVeboxState->m_pRenderHal->pMhwMiInterface);
3133 MHW_RENDERHAL_CHK_NULL(pVeboxState->m_pVeboxInterface);
3134
3135 pVeboxInterface = (MhwVeboxInterfaceG12*)pVeboxState->m_pVeboxInterface;
3136
3137 #ifdef _MMC_SUPPORTED
3138 VPHAL_RENDER_CHK_STATUS(pVeboxInterface->setVeboxPrologCmd(m_pRenderHal->pMhwMiInterface, &CmdBuffer));
3139 #endif
3140
3141 return VPHAL_VEBOX_STATE::VeboxRenderVeboxCmd(CmdBuffer,
3142 VeboxDiIecpCmdParams,
3143 VeboxSurfaceStateCmdParams,
3144 MhwVeboxSurfaceStateCmdParams,
3145 VeboxStateCmdParams,
3146 FlushDwParams,
3147 pGenericPrologParams);
3148
3149 finish:
3150 return eStatus;
3151 }
3152
CreateSfcState()3153 VphalSfcState* VPHAL_VEBOX_STATE_G12_BASE::CreateSfcState()
3154 {
3155 #if __VPHAL_SFC_SUPPORTED
3156 VphalSfcState *sfcState = MOS_New(VphalSfcStateG12, m_pOsInterface, m_pRenderHal, m_pSfcInterface);
3157 #else
3158 VphalSfcState *sfcState = nullptr;
3159 #endif
3160
3161 return sfcState;
3162 }
3163
VPHAL_VEBOX_STATE_G12_BASE(PMOS_INTERFACE pOsInterface,PMHW_VEBOX_INTERFACE pVeboxInterface,PMHW_SFC_INTERFACE pSfcInterface,PRENDERHAL_INTERFACE pRenderHal,PVPHAL_VEBOX_EXEC_STATE pVeboxExecState,PVPHAL_RNDR_PERF_DATA pPerfData,const VPHAL_DNDI_CACHE_CNTL & dndiCacheCntl,MOS_STATUS * peStatus)3164 VPHAL_VEBOX_STATE_G12_BASE::VPHAL_VEBOX_STATE_G12_BASE(
3165 PMOS_INTERFACE pOsInterface,
3166 PMHW_VEBOX_INTERFACE pVeboxInterface,
3167 PMHW_SFC_INTERFACE pSfcInterface,
3168 PRENDERHAL_INTERFACE pRenderHal,
3169 PVPHAL_VEBOX_EXEC_STATE pVeboxExecState,
3170 PVPHAL_RNDR_PERF_DATA pPerfData,
3171 const VPHAL_DNDI_CACHE_CNTL &dndiCacheCntl,
3172 MOS_STATUS *peStatus) :
3173 VPHAL_VEBOX_STATE(pOsInterface, pVeboxInterface, pSfcInterface, pRenderHal, pVeboxExecState, pPerfData, dndiCacheCntl, peStatus)
3174 {
3175 // States
3176 pKernelParamTable = (PRENDERHAL_KERNEL_PARAM)g_Vebox_KernelParam_g12;
3177 iNumFFDISurfaces = 2; // PE on: 4 used. PE off: 2 used
3178
3179 #if defined(ENABLE_KERNELS) && !defined(_FULL_OPEN_SOURCE)
3180 m_hdr3DLutKernelBinary = (uint32_t *)IGVP3DLUT_GENERATION_G12_TGLLP;
3181 m_hdr3DLutKernelBinarySize = IGVP3DLUT_GENERATION_G12_TGLLP_SIZE;
3182 #endif
3183 }
3184
Initialize(const VphalSettings * pSettings,Kdll_State * pKernelDllState)3185 MOS_STATUS VPHAL_VEBOX_STATE_G12_BASE::Initialize(
3186 const VphalSettings *pSettings,
3187 Kdll_State *pKernelDllState)
3188 {
3189 MOS_STATUS eStatus = MOS_STATUS_SUCCESS;
3190 PVPHAL_VEBOX_STATE_G12_BASE pVeboxState = this;
3191 bool enableMMC = false;
3192
3193 VPHAL_VEBOX_STATE::Initialize(pSettings, pKernelDllState);
3194
3195 // Read user feature key for MMC enable
3196 #if (LINUX) && (!WDDM_LINUX)
3197 enableMMC = !MEDIA_IS_WA(pVeboxState->m_pWaTable, WaDisableVPMmc); // enable MMC by default
3198 #else
3199 enableMMC = true;
3200 #endif
3201 if (m_userSettingPtr != nullptr)
3202 {
3203 ReadUserSetting(
3204 m_userSettingPtr,
3205 enableMMC,
3206 __VPHAL_ENABLE_MMC,
3207 MediaUserSetting::Group::Device,
3208 enableMMC,
3209 true);
3210 }
3211 // Set Vebox MMC enable
3212 pVeboxState->bEnableMMC = enableMMC && MEDIA_IS_SKU(pVeboxState->m_pSkuTable, FtrE2ECompression);
3213
3214 // Set SFC MMC enable
3215 if (MEDIA_IS_SKU(pVeboxState->m_pSkuTable, FtrSFCPipe) &&
3216 m_sfcPipeState)
3217 {
3218 m_sfcPipeState->SetSfcOutputMmcStatus(enableMMC && MEDIA_IS_SKU(pVeboxState->m_pSkuTable, FtrE2ECompression));
3219 }
3220
3221 return eStatus;
3222 }
3223