1 /* SPDX-License-Identifier: GPL-2.0-only */ 2 3 #ifndef _MAINBOARD_M3885_H 4 #define _MAINBOARD_M3885_H 5 6 #define M3885_CMCMD 0x04 7 #define M3885_CMDAT1 0x05 8 #define M3885_CMDAT2 0x06 9 #define M3885_CMDAT3 0x07 10 11 #define M3885_GPIO_LEVEL (0 << 7) 12 #define M3885_GPIO_PULSE (1 << 7) 13 14 #define M3885_GPIO_READ (0 << 5) 15 #define M3885_GPIO_SET (1 << 5) 16 #define M3885_GPIO_CLEAR (2 << 5) 17 #define M3885_GPIO_TOGGLE (3 << 5) 18 19 #define M3885_GPIO_P14 (0x00 << 0) 20 #define M3885_GPIO_P15 (0x01 << 0) 21 #define M3885_GPIO_P16 (0x02 << 0) 22 #define M3885_GPIO_P17 (0x03 << 0) 23 24 #define M3885_GPIO_P54 (0x04 << 0) 25 #define M3885_GPIO_P55 (0x05 << 0) 26 #define M3885_GPIO_P56 (0x06 << 0) 27 #define M3885_GPIO_P57 (0x07 << 0) 28 29 #define M3885_GPIO_P20 (0x08 << 0) 30 #define M3885_GPIO_P21 (0x09 << 0) 31 #define M3885_GPIO_P22 (0x0a << 0) 32 #define M3885_GPIO_P23 (0x0b << 0) 33 #define M3885_GPIO_P24 (0x0c << 0) 34 #define M3885_GPIO_P25 (0x0d << 0) 35 #define M3885_GPIO_P26 (0x0e << 0) 36 #define M3885_GPIO_P27 (0x0f << 0) 37 38 #define M3885_GPIO_P40 (0x10 << 0) 39 #define M3885_GPIO_P41 (0x11 << 0) 40 #define M3885_GPIO_P42 (0x12 << 0) 41 #define M3885_GPIO_P43 (0x13 << 0) 42 #define M3885_GPIO_P44 (0x14 << 0) 43 #define M3885_GPIO_P45 (0x15 << 0) 44 #define M3885_GPIO_P46 (0x16 << 0) 45 #define M3885_GPIO_P47 (0x17 << 0) 46 47 #define M3885_GPIO_P60 (0x18 << 0) 48 #define M3885_GPIO_P61 (0x19 << 0) 49 #define M3885_GPIO_P62 (0x1a << 0) 50 #define M3885_GPIO_P63 (0x1b << 0) 51 #define M3885_GPIO_P64 (0x1c << 0) 52 #define M3885_GPIO_P65 (0x1d << 0) 53 #define M3885_GPIO_P66 (0x1e << 0) 54 #define M3885_GPIO_P67 (0x1f << 0) 55 56 void m3885_configure_multikey(void); 57 u8 m3885_gpio(u8 value); 58 59 #endif 60