xref: /aosp_15_r20/external/coreboot/src/southbridge/intel/lynxpoint/hsio/lpt_h_cx.c (revision b9411a12aaaa7e1e6a6fb7c5e057f44ee179a49c)
1 /* SPDX-License-Identifier: GPL-2.0-or-later */
2 
3 #include <device/pci_ops.h>
4 #include <southbridge/intel/lynxpoint/hsio/hsio.h>
5 #include <southbridge/intel/lynxpoint/pch.h>
6 #include <types.h>
7 
8 const struct hsio_table_row hsio_sata_shared_lpt_h_cx[] = {
9 	{ 0xea002008, ~0xfffc6108, 0xea6c6108 },
10 	{ 0xea002208, ~0xfffc6108, 0xea6c6108 },
11 	{ 0xea002038, ~0x3f00000f, 0x0700000d },
12 	{ 0xea002238, ~0x3f00000f, 0x0700000d },
13 	{ 0xea00202c, ~0x00020f00, 0x00020100 },
14 	{ 0xea00222c, ~0x00020f00, 0x00020100 },
15 	{ 0xea002040, ~0x1f000000, 0x01000000 },
16 	{ 0xea002240, ~0x1f000000, 0x01000000 },
17 	{ 0xea002010, ~0xffff0000, 0x0d510000 },
18 	{ 0xea002210, ~0xffff0000, 0x0d510000 },
19 	{ 0xea002018, ~0xffff0300, 0x38250100 },
20 	{ 0xea002218, ~0xffff0300, 0x38250100 },
21 	{ 0xea002000, ~0xcf030000, 0xcf030000 },
22 	{ 0xea002200, ~0xcf030000, 0xcf030000 },
23 	{ 0xea002028, ~0xff1f0000, 0x580e0000 },
24 	{ 0xea002228, ~0xff1f0000, 0x580e0000 },
25 	{ 0xea00201c, ~0x00007c00, 0x00002400 },
26 	{ 0xea00221c, ~0x00007c00, 0x00002400 },
27 	{ 0xea00208c, ~0x00ff0000, 0x00800000 },
28 	{ 0xea00228c, ~0x00ff0000, 0x00800000 },
29 	{ 0xea0020a4, ~0x0030ff00, 0x00308300 },
30 	{ 0xea0022a4, ~0x0030ff00, 0x00308300 },
31 	{ 0xea0020ac, ~0x00000030, 0x00000020 },
32 	{ 0xea0022ac, ~0x00000030, 0x00000020 },
33 	{ 0xea002140, ~0x00ffffff, 0x00140718 },
34 	{ 0xea002340, ~0x00ffffff, 0x00140718 },
35 	{ 0xea002144, ~0x00ffffff, 0x00140998 },
36 	{ 0xea002344, ~0x00ffffff, 0x00140998 },
37 	{ 0xea002148, ~0x00ffffff, 0x00140998 },
38 	{ 0xea002348, ~0x00ffffff, 0x00140998 },
39 	{ 0xea00217c, ~0x03000000, 0x03000000 },
40 	{ 0xea00237c, ~0x03000000, 0x03000000 },
41 	{ 0xea002178, ~0x00001f00, 0x00001800 },
42 	{ 0xea002378, ~0x00001f00, 0x00001800 },
43 	{ 0xea00210c, ~0x0038000f, 0x00000005 },
44 	{ 0xea00230c, ~0x0038000f, 0x00000005 },
45 };
46 
47 const struct hsio_table_row hsio_sata_lpt_h_cx[] = {
48 	{ 0xea008008, ~0xff000000, 0x1c000000 },
49 	{ 0xea002408, ~0xfffc6108, 0xea6c6108 },
50 	{ 0xea002608, ~0xfffc6108, 0xea6c6108 },
51 	{ 0xea000808, ~0xfffc6108, 0xea6c6108 },
52 	{ 0xea000a08, ~0xfffc6108, 0xea6c6108 },
53 	{ 0xea002438, ~0x3f00000f, 0x0700000d },
54 	{ 0xea002638, ~0x3f00000f, 0x0700000d },
55 	{ 0xea000838, ~0x3f00000f, 0x0700000d },
56 	{ 0xea000a38, ~0x3f00000f, 0x0700000d },
57 	{ 0xea002440, ~0x1f000000, 0x01000000 },
58 	{ 0xea002640, ~0x1f000000, 0x01000000 },
59 	{ 0xea000840, ~0x1f000000, 0x01000000 },
60 	{ 0xea000a40, ~0x1f000000, 0x01000000 },
61 	{ 0xea002410, ~0xffff0000, 0x0d510000 },
62 	{ 0xea002610, ~0xffff0000, 0x0d510000 },
63 	{ 0xea000810, ~0xffff0000, 0x0d510000 },
64 	{ 0xea000a10, ~0xffff0000, 0x0d510000 },
65 	{ 0xea00242c, ~0x00020800, 0x00020000 },
66 	{ 0xea00262c, ~0x00020800, 0x00020000 },
67 	{ 0xea00082c, ~0x00020800, 0x00020000 },
68 	{ 0xea000a2c, ~0x00020800, 0x00020000 },
69 	{ 0xea002418, ~0xffff0300, 0x38250100 },
70 	{ 0xea002618, ~0xffff0300, 0x38250100 },
71 	{ 0xea000818, ~0xffff0300, 0x38250100 },
72 	{ 0xea000a18, ~0xffff0300, 0x38250100 },
73 	{ 0xea002400, ~0xcf030000, 0xcf030000 },
74 	{ 0xea002600, ~0xcf030000, 0xcf030000 },
75 	{ 0xea000800, ~0xcf030000, 0xcf030000 },
76 	{ 0xea000a00, ~0xcf030000, 0xcf030000 },
77 	{ 0xea002428, ~0xff1f0000, 0x580e0000 },
78 	{ 0xea002628, ~0xff1f0000, 0x580e0000 },
79 	{ 0xea000828, ~0xff1f0000, 0x580e0000 },
80 	{ 0xea000a28, ~0xff1f0000, 0x580e0000 },
81 	{ 0xea00241c, ~0x00007c00, 0x00002400 },
82 	{ 0xea00261c, ~0x00007c00, 0x00002400 },
83 	{ 0xea00081c, ~0x00007c00, 0x00002400 },
84 	{ 0xea000a1c, ~0x00007c00, 0x00002400 },
85 	{ 0xea00248c, ~0x00ff0000, 0x00800000 },
86 	{ 0xea00268c, ~0x00ff0000, 0x00800000 },
87 	{ 0xea00088c, ~0x00ff0000, 0x00800000 },
88 	{ 0xea000a8c, ~0x00ff0000, 0x00800000 },
89 	{ 0xea0024a4, ~0x0030ff00, 0x00308300 },
90 	{ 0xea0026a4, ~0x0030ff00, 0x00308300 },
91 	{ 0xea0008a4, ~0x0030ff00, 0x00308300 },
92 	{ 0xea000aa4, ~0x0030ff00, 0x00308300 },
93 	{ 0xea0024ac, ~0x00000030, 0x00000020 },
94 	{ 0xea0026ac, ~0x00000030, 0x00000020 },
95 	{ 0xea0008ac, ~0x00000030, 0x00000020 },
96 	{ 0xea000aac, ~0x00000030, 0x00000020 },
97 	{ 0xea002540, ~0x00ffffff, 0x00140718 },
98 	{ 0xea002740, ~0x00ffffff, 0x00140718 },
99 	{ 0xea000940, ~0x00ffffff, 0x00140718 },
100 	{ 0xea000b40, ~0x00ffffff, 0x00140718 },
101 	{ 0xea002544, ~0x00ffffff, 0x00140998 },
102 	{ 0xea002744, ~0x00ffffff, 0x00140998 },
103 	{ 0xea000944, ~0x00ffffff, 0x00140998 },
104 	{ 0xea000b44, ~0x00ffffff, 0x00140998 },
105 	{ 0xea002548, ~0x00ffffff, 0x00140998 },
106 	{ 0xea002748, ~0x00ffffff, 0x00140998 },
107 	{ 0xea000948, ~0x00ffffff, 0x00140998 },
108 	{ 0xea000b48, ~0x00ffffff, 0x00140998 },
109 	{ 0xea00257c, ~0x03000000, 0x03000000 },
110 	{ 0xea00277c, ~0x03000000, 0x03000000 },
111 	{ 0xea00097c, ~0x03000000, 0x03000000 },
112 	{ 0xea000b7c, ~0x03000000, 0x03000000 },
113 	{ 0xea002578, ~0x00001f00, 0x00001800 },
114 	{ 0xea002778, ~0x00001f00, 0x00001800 },
115 	{ 0xea000978, ~0x00001f00, 0x00001800 },
116 	{ 0xea000b78, ~0x00001f00, 0x00001800 },
117 	{ 0xea00250c, ~0x0038000f, 0x00000005 },
118 	{ 0xea00270c, ~0x0038000f, 0x00000005 },
119 	{ 0xea00090c, ~0x0038000f, 0x00000005 },
120 	{ 0xea000b0c, ~0x0038000f, 0x00000005 },
121 };
122 
123 const struct hsio_table_row hsio_xhci_shared_lpt_h_cx[] = {
124 	{ 0xe9002c2c, ~0x00000700, 0x00000100 },
125 	{ 0xe9002e2c, ~0x00000700, 0x00000100 },
126 	{ 0xe9002dcc, ~0x00001407, 0x00001407 },
127 	{ 0xe9002fcc, ~0x00001407, 0x00001407 },
128 	{ 0xe9002d68, ~0x01000f3c, 0x00000a28 },
129 	{ 0xe9002f68, ~0x01000f3c, 0x00000a28 },
130 	{ 0xe9002d6c, ~0x000000ff, 0x0000003f },
131 	{ 0xe9002f6c, ~0x000000ff, 0x0000003f },
132 	{ 0xe9002d4c, ~0x00ffff00, 0x00120500 },
133 	{ 0xe9002f4c, ~0x00ffff00, 0x00120500 },
134 	{ 0xe9002d14, ~0x38000700, 0x00000100 },
135 	{ 0xe9002f14, ~0x38000700, 0x00000100 },
136 	{ 0xe9002d64, ~0x0000f000, 0x00005000 },
137 	{ 0xe9002f64, ~0x0000f000, 0x00005000 },
138 	{ 0xe9002d70, ~0x00000018, 0x00000000 },
139 	{ 0xe9002f70, ~0x00000018, 0x00000000 },
140 	{ 0xe9002c38, ~0x3f00000f, 0x0700000b },
141 	{ 0xe9002e38, ~0x3f00000f, 0x0700000b },
142 	{ 0xe9002d40, ~0x00800000, 0x00000000 },
143 	{ 0xe9002f40, ~0x00800000, 0x00000000 },
144 };
145 
146 const struct hsio_table_row hsio_xhci_lpt_h_cx[] = {
147 	{ 0xe90031cc, ~0x00001407, 0x00001407 },
148 	{ 0xe90033cc, ~0x00001407, 0x00001407 },
149 	{ 0xe90015cc, ~0x00001407, 0x00001407 },
150 	{ 0xe90017cc, ~0x00001407, 0x00001407 },
151 	{ 0xe9003168, ~0x01000f3c, 0x00000a28 },
152 	{ 0xe9003368, ~0x01000f3c, 0x00000a28 },
153 	{ 0xe9001568, ~0x01000f3c, 0x00000a28 },
154 	{ 0xe9001768, ~0x01000f3c, 0x00000a28 },
155 	{ 0xe900316c, ~0x000000ff, 0x0000003f },
156 	{ 0xe900336c, ~0x000000ff, 0x0000003f },
157 	{ 0xe900156c, ~0x000000ff, 0x0000003f },
158 	{ 0xe900176c, ~0x000000ff, 0x0000003f },
159 	{ 0xe900314c, ~0x00ffff00, 0x00120500 },
160 	{ 0xe900334c, ~0x00ffff00, 0x00120500 },
161 	{ 0xe900154c, ~0x00ffff00, 0x00120500 },
162 	{ 0xe900174c, ~0x00ffff00, 0x00120500 },
163 	{ 0xe9003114, ~0x38000700, 0x00000100 },
164 	{ 0xe9003314, ~0x38000700, 0x00000100 },
165 	{ 0xe9001514, ~0x38000700, 0x00000100 },
166 	{ 0xe9001714, ~0x38000700, 0x00000100 },
167 	{ 0xe9003164, ~0x0000f000, 0x00005000 },
168 	{ 0xe9003364, ~0x0000f000, 0x00005000 },
169 	{ 0xe9001564, ~0x0000f000, 0x00005000 },
170 	{ 0xe9001764, ~0x0000f000, 0x00005000 },
171 	{ 0xe9003170, ~0x00000018, 0x00000000 },
172 	{ 0xe9003370, ~0x00000018, 0x00000000 },
173 	{ 0xe9001570, ~0x00000018, 0x00000000 },
174 	{ 0xe9001770, ~0x00000018, 0x00000000 },
175 	{ 0xe9003038, ~0x3f00000f, 0x0700000b },
176 	{ 0xe9003238, ~0x3f00000f, 0x0700000b },
177 	{ 0xe9001438, ~0x3f00000f, 0x0700000b },
178 	{ 0xe9001638, ~0x3f00000f, 0x0700000b },
179 	{ 0xe9003140, ~0x00800000, 0x00000000 },
180 	{ 0xe9003340, ~0x00800000, 0x00000000 },
181 	{ 0xe9001540, ~0x00800000, 0x00000000 },
182 	{ 0xe9001740, ~0x00800000, 0x00000000 },
183 };
184 
program_hsio_sata_lpt_h_cx(const bool is_mobile)185 void program_hsio_sata_lpt_h_cx(const bool is_mobile)
186 {
187 	const struct hsio_table_row *pch_hsio_table;
188 	size_t len;
189 
190 	pch_hsio_table = hsio_sata_lpt_h_cx;
191 	len = ARRAY_SIZE(hsio_sata_lpt_h_cx);
192 	for (size_t i = 0; i < len; i++)
193 		hsio_update_row(pch_hsio_table[i]);
194 
195 	pch_hsio_table = hsio_sata_shared_lpt_h_cx;
196 	len = ARRAY_SIZE(hsio_sata_shared_lpt_h_cx);
197 	for (size_t i = 0; i < len; i++)
198 		hsio_sata_shared_update_row(pch_hsio_table[i]);
199 
200 	const uint32_t hsio_sata_value = is_mobile ? 0x00004c5a : 0x00003e67;
201 
202 	hsio_update(0xea002490, ~0x0000ffff, hsio_sata_value);
203 	hsio_update(0xea002690, ~0x0000ffff, hsio_sata_value);
204 	hsio_update(0xea000890, ~0x0000ffff, hsio_sata_value);
205 	hsio_update(0xea000a90, ~0x0000ffff, hsio_sata_value);
206 
207 	hsio_sata_shared_update(0xea002090, ~0x0000ffff, hsio_sata_value);
208 	hsio_sata_shared_update(0xea002290, ~0x0000ffff, hsio_sata_value);
209 }
210 
program_hsio_xhci_lpt_h_cx(void)211 void program_hsio_xhci_lpt_h_cx(void)
212 {
213 	const struct hsio_table_row *pch_hsio_table;
214 	size_t len;
215 
216 	pch_hsio_table = hsio_xhci_lpt_h_cx;
217 	len = ARRAY_SIZE(hsio_xhci_lpt_h_cx);
218 
219 	for (size_t i = 0; i < len; i++)
220 		hsio_update_row(pch_hsio_table[i]);
221 
222 	pch_hsio_table = hsio_xhci_shared_lpt_h_cx;
223 	len = ARRAY_SIZE(hsio_xhci_shared_lpt_h_cx);
224 
225 	for (size_t i = 0; i < len; i++)
226 		hsio_xhci_shared_update_row(pch_hsio_table[i]);
227 }
228 
program_hsio_igbe_lpt_h_cx(void)229 void program_hsio_igbe_lpt_h_cx(void)
230 {
231 	const uint32_t strpfusecfg1 = pci_read_config32(PCH_PCIE_DEV(0), 0xfc);
232 	if (!(strpfusecfg1 & (1 << 19)))
233 		return;
234 
235 	const uint8_t gbe_port = (strpfusecfg1 >> 16) & 0x7;
236 	const uint8_t lane_owner = pci_read_config8(PCH_PCIE_DEV(0), 0x410);
237 	if (gbe_port == 0 && ((lane_owner >> 0) & 3) != 1)
238 		return;
239 
240 	if (gbe_port == 1 && ((lane_owner >> 2) & 3) != 1)
241 		return;
242 
243 	const uint32_t gbe_hsio_base = 0xe900 << 16 | (0x2e - 2 * gbe_port) << 8;
244 	hsio_update(gbe_hsio_base + 0x08, ~0xf0000100, 0xe0000100);
245 }
246