1 /*
2  * Copyright (c) 2021 Arm Limited.
3  *
4  * SPDX-License-Identifier: MIT
5  *
6  * Permission is hereby granted, free of charge, to any person obtaining a copy
7  * of this software and associated documentation files (the "Software"), to
8  * deal in the Software without restriction, including without limitation the
9  * rights to use, copy, modify, merge, publish, distribute, sublicense, and/or
10  * sell copies of the Software, and to permit persons to whom the Software is
11  * furnished to do so, subject to the following conditions:
12  *
13  * The above copyright notice and this permission notice shall be included in
14  * all copies or substantial portions of the Software.
15  *
16  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
19  * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
21  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
22  * IN THE SOFTWARE.
23  */
24 #pragma once
25 
26 #ifdef ARM_COMPUTE_ENABLE_SVE
27 #include "../std_transforms_sve.hpp"
28 #include "../performance_parameters.hpp"
29 
30 #define ARGLIST  \
31     unsigned int, const unsigned int *, \
32     IndirectInputArg<uint8_t>, \
33     size_t, size_t, \
34     const uint8_t *, \
35     IndirectOutputArg<uint32_t>, \
36     const uint32_t *, Activation, bool
37 
38 namespace arm_gemm
39 {
40 // Actual kernel implementations
41 void sve_hybrid_u8u32_dot_6x4VL( ARGLIST );
42 
43 class cls_sve_hybrid_u8u32_dot_6x4VL
44 {
45 public:
46     typedef uint8_t lhs_operand_type;
47     typedef uint8_t rhs_operand_type;
48     typedef uint32_t result_type;
49 
50     typedef void (*kern_type)( ARGLIST );
51 
52     /* Kernel blocking parameters */
out_height()53     static constexpr unsigned int out_height()
54     {
55         return 6;
56     }
57 
out_width()58     static unsigned int out_width()
59     {
60         return get_vector_length<uint32_t>() * 4;
61     }
62 
k_unroll()63     static constexpr unsigned int k_unroll()
64     {
65         return 4;
66     }
67 
supports_accumulate()68     static constexpr bool supports_accumulate()
69     {
70         return true;
71     }
72 
73     StdTransformsSVE<rhs_operand_type, result_type, 6, 4, 4> transforms = {};
74     template<typename T>
get_performance_parameters(const CPUInfo * ci)75     static inline PerformanceParameters get_performance_parameters(const CPUInfo *ci)
76     {
77 
78         if (std::is_same<T, uint32_t>::value) {
79             switch (ci->get_cpu_model()) {
80                 default:
81                     return { 31.56 };
82                 case CPUModel::A510:
83                     return { 20.98 };
84                 case CPUModel::V1:
85                     return { 62.19 };
86             }
87         }
88 
89 
90         if (std::is_same<T, uint8_t>::value) {
91             switch (ci->get_cpu_model()) {
92                 default:
93                     return { 31.59, 15.67, 0.61 };
94                 case CPUModel::A510:
95                     return { 22.75, 3.90, 0.47 };
96                 case CPUModel::V1:
97                     return { 48.09, 16.24, 0.83 };
98             }
99         }
100 
101         return { 1.0 };
102     }
103 
104     // Default to the generic kernel
105     kern_type kernel=sve_hybrid_u8u32_dot_6x4VL;
cls_sve_hybrid_u8u32_dot_6x4VL(const CPUInfo *)106     cls_sve_hybrid_u8u32_dot_6x4VL(const CPUInfo *)
107     {
108     }
109 };
110 
111 } // namespace arm_gemm
112 
113 #undef ARGLIST
114 
115 #endif // ARM_COMPUTE_ENABLE_SVE
116