1 /* 2 * Copyright (c) 2019-2021 Arm Limited. 3 * 4 * SPDX-License-Identifier: MIT 5 * 6 * Permission is hereby granted, free of charge, to any person obtaining a copy 7 * of this software and associated documentation files (the "Software"), to 8 * deal in the Software without restriction, including without limitation the 9 * rights to use, copy, modify, merge, publish, distribute, sublicense, and/or 10 * sell copies of the Software, and to permit persons to whom the Software is 11 * furnished to do so, subject to the following conditions: 12 * 13 * The above copyright notice and this permission notice shall be included in 14 * all copies or substantial portions of the Software. 15 * 16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE 19 * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING 21 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS 22 * IN THE SOFTWARE. 23 */ 24 #pragma once 25 26 #ifdef ARM_COMPUTE_ENABLE_SVE 27 #include "../std_transforms_sve.hpp" 28 29 #define ARGLIST \ 30 unsigned int, const unsigned int *, \ 31 IndirectInputArg<float>, \ 32 size_t, size_t, \ 33 const float *, \ 34 IndirectOutputArg<float>, \ 35 const float *, Activation, bool 36 37 namespace arm_gemm 38 { 39 // Actual kernel implementations 40 void sve_hybrid_fp32_mla_8x1VL( ARGLIST ); 41 void sve_hybrid_fp32_mla_8x1VL_a64fx( ARGLIST ); 42 43 class cls_sve_hybrid_fp32_mla_8x1VL 44 { 45 public: 46 typedef float lhs_operand_type; 47 typedef float rhs_operand_type; 48 typedef float result_type; 49 50 typedef void (*kern_type)( ARGLIST ); 51 52 /* Kernel blocking parameters */ out_height()53 static constexpr unsigned int out_height() 54 { 55 return 8; 56 } 57 out_width()58 static unsigned int out_width() 59 { 60 return get_vector_length<float>() * 1; 61 } 62 k_unroll()63 static constexpr unsigned int k_unroll() 64 { 65 return 1; 66 } 67 supports_accumulate()68 static constexpr bool supports_accumulate() 69 { 70 return true; 71 } 72 73 StdTransformsSVE<rhs_operand_type, result_type, 8, 1, 1> transforms = {}; 74 75 // Default to the generic kernel 76 kern_type kernel=sve_hybrid_fp32_mla_8x1VL; cls_sve_hybrid_fp32_mla_8x1VL(const CPUInfo * ci)77 cls_sve_hybrid_fp32_mla_8x1VL(const CPUInfo *ci) 78 { 79 switch(ci->get_cpu_model()) { 80 default: 81 break; 82 case CPUModel::A64FX: 83 kernel=sve_hybrid_fp32_mla_8x1VL_a64fx; 84 break; 85 } 86 } 87 }; 88 89 } // namespace arm_gemm 90 91 #undef ARGLIST 92 93 #endif // ARM_COMPUTE_ENABLE_SVE 94