1 /* 2 * Copyright (c) 2019-2021 Arm Limited. 3 * 4 * SPDX-License-Identifier: MIT 5 * 6 * Permission is hereby granted, free of charge, to any person obtaining a copy 7 * of this software and associated documentation files (the "Software"), to 8 * deal in the Software without restriction, including without limitation the 9 * rights to use, copy, modify, merge, publish, distribute, sublicense, and/or 10 * sell copies of the Software, and to permit persons to whom the Software is 11 * furnished to do so, subject to the following conditions: 12 * 13 * The above copyright notice and this permission notice shall be included in 14 * all copies or substantial portions of the Software. 15 * 16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE 19 * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING 21 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS 22 * IN THE SOFTWARE. 23 */ 24 #pragma once 25 26 #ifdef ARM_COMPUTE_ENABLE_SVE 27 #include "../std_transforms_sve.hpp" 28 #include "../performance_parameters.hpp" 29 30 #define ARGLIST \ 31 unsigned int, const unsigned int *, \ 32 IndirectInputArg<float>, \ 33 size_t, size_t, \ 34 const float *, \ 35 IndirectOutputArg<float>, \ 36 const float *, Activation, bool 37 38 namespace arm_gemm 39 { 40 // Actual kernel implementations 41 void sve_hybrid_fp32_mla_6x4VL( ARGLIST ); 42 void sve_hybrid_fp32_mla_6x4VL_a64fx( ARGLIST ); 43 44 class cls_sve_hybrid_fp32_mla_6x4VL 45 { 46 public: 47 typedef float lhs_operand_type; 48 typedef float rhs_operand_type; 49 typedef float result_type; 50 51 typedef void (*kern_type)( ARGLIST ); 52 53 /* Kernel blocking parameters */ out_height()54 static constexpr unsigned int out_height() 55 { 56 return 6; 57 } 58 out_width()59 static unsigned int out_width() 60 { 61 return get_vector_length<float>() * 4; 62 } 63 k_unroll()64 static constexpr unsigned int k_unroll() 65 { 66 return 1; 67 } 68 supports_accumulate()69 static constexpr bool supports_accumulate() 70 { 71 return true; 72 } 73 74 StdTransformsSVE<rhs_operand_type, result_type, 6, 4, 1> transforms = {}; 75 template<typename T> get_performance_parameters(const CPUInfo * ci)76 static inline PerformanceParameters get_performance_parameters(const CPUInfo *ci) 77 { 78 79 if (std::is_same<T, float>::value) { 80 switch (ci->get_cpu_model()) { 81 case CPUModel::V1: 82 return { 15.65 }; 83 default: 84 return { 6.667 }; 85 } 86 } 87 88 return { 1.0 }; 89 } 90 91 // Default to the generic kernel 92 kern_type kernel=sve_hybrid_fp32_mla_6x4VL; cls_sve_hybrid_fp32_mla_6x4VL(const CPUInfo * ci)93 cls_sve_hybrid_fp32_mla_6x4VL(const CPUInfo *ci) 94 { 95 switch(ci->get_cpu_model()) { 96 default: 97 break; 98 case CPUModel::A64FX: 99 kernel=sve_hybrid_fp32_mla_6x4VL_a64fx; 100 break; 101 } 102 } 103 }; 104 105 } // namespace arm_gemm 106 107 #undef ARGLIST 108 109 #endif // ARM_COMPUTE_ENABLE_SVE 110