1 /*
2  * Copyright (c) 2019-2022 Arm Limited.
3  *
4  * SPDX-License-Identifier: MIT
5  *
6  * Permission is hereby granted, free of charge, to any person obtaining a copy
7  * of this software and associated documentation files (the "Software"), to
8  * deal in the Software without restriction, including without limitation the
9  * rights to use, copy, modify, merge, publish, distribute, sublicense, and/or
10  * sell copies of the Software, and to permit persons to whom the Software is
11  * furnished to do so, subject to the following conditions:
12  *
13  * The above copyright notice and this permission notice shall be included in
14  * all copies or substantial portions of the Software.
15  *
16  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
19  * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
21  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
22  * IN THE SOFTWARE.
23  */
24 #pragma once
25 
26 #ifdef __aarch64__
27 #include "../std_transforms_fixed.hpp"
28 #include "../bfloat.hpp"
29 #include "../performance_parameters.hpp"
30 
31 #define ARGLIST  \
32     const bfloat16 *, const bfloat16 *, \
33     float *, int, int, int
34 
35 namespace arm_gemm
36 {
37 // Actual kernel implementations
38 void a64_interleaved_bf16fp32_mmla_8x12( ARGLIST );
39 void a64_interleaved_bf16fp32_mmla_8x12_a510( ARGLIST );
40 
41 class cls_a64_interleaved_bf16fp32_mmla_8x12
42 {
43 public:
44     typedef bfloat16 operand_type;
45     typedef float result_type;
46 
47     typedef void (*kern_type)( ARGLIST );
48 
49     /* Kernel blocking parameters */
out_height()50     static constexpr unsigned int out_height()
51     {
52         return 8;
53     }
54 
out_width()55     static unsigned int out_width()
56     {
57         return 12;
58     }
59 
stripe_width()60     static unsigned int stripe_width()
61     {
62         return 4;
63     }
64 
k_unroll()65     static constexpr unsigned int k_unroll()
66     {
67         return 4;
68     }
69 
70 
71     StdTransformsFixed<operand_type, result_type, 8, 12, 4> transforms = {};
72     StdTransformsFixed<operand_type, result_type, 8, 12, 4, true> transforms_quantized = {};
73     template<typename T>
get_performance_parameters(const CPUInfo * ci)74     static inline PerformanceParameters get_performance_parameters(const CPUInfo *ci)
75     {
76 
77         if (std::is_same<T, bfloat16>::value) {
78             switch (ci->get_cpu_model()) {
79                 default:
80                     return { 31.54, 4.30, 7.33 };
81                 case CPUModel::V1:
82                     return { 59.94, 5.08, 9.83 };
83                 case CPUModel::A510:
84                     return { 7.82, 4.05, 3.07 };
85             }
86         }
87 
88 
89         if (std::is_same<T, float>::value) {
90             switch (ci->get_cpu_model()) {
91                 default:
92                     return { 31.15, 2.51, 5.25 };
93                 case CPUModel::V1:
94                     return { 41.44, 5.01, 5.64 };
95                 case CPUModel::A510:
96                     return { 7.83, 2.53, 2.71 };
97             }
98         }
99 
100         return { 1.0 };
101     }
102 
103     // Default to the generic kernel
104     kern_type kernel=a64_interleaved_bf16fp32_mmla_8x12;
cls_a64_interleaved_bf16fp32_mmla_8x12(const CPUInfo * ci)105     cls_a64_interleaved_bf16fp32_mmla_8x12(const CPUInfo *ci)
106     {
107         switch(ci->get_cpu_model()) {
108             default:
109                 break;
110             case CPUModel::A510:
111                 kernel=a64_interleaved_bf16fp32_mmla_8x12_a510;
112                 break;
113         }
114     }
115 };
116 
117 } // namespace arm_gemm
118 
119 #undef ARGLIST
120 
121 #endif // __aarch64__
122