xref: /aosp_15_r20/external/ComputeLibrary/src/core/NEON/kernels/arm_gemm/kernels/a64_hybrid_fp32_mla_4x24.hpp (revision c217d954acce2dbc11938adb493fc0abd69584f3)
1 /*
2  * Copyright (c) 2021 Arm Limited.
3  *
4  * SPDX-License-Identifier: MIT
5  *
6  * Permission is hereby granted, free of charge, to any person obtaining a copy
7  * of this software and associated documentation files (the "Software"), to
8  * deal in the Software without restriction, including without limitation the
9  * rights to use, copy, modify, merge, publish, distribute, sublicense, and/or
10  * sell copies of the Software, and to permit persons to whom the Software is
11  * furnished to do so, subject to the following conditions:
12  *
13  * The above copyright notice and this permission notice shall be included in
14  * all copies or substantial portions of the Software.
15  *
16  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
19  * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
21  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
22  * IN THE SOFTWARE.
23  */
24 #pragma once
25 
26 #ifdef __aarch64__
27 #include "../std_transforms_fixed.hpp"
28 #include "../performance_parameters.hpp"
29 
30 #define ARGLIST  \
31     unsigned int, const unsigned int *, \
32     IndirectInputArg<float>, \
33     size_t, size_t, \
34     const float *, \
35     IndirectOutputArg<float>, \
36     const float *, Activation, bool
37 
38 namespace arm_gemm
39 {
40 // Actual kernel implementations
41 void a64_hybrid_fp32_mla_4x24( ARGLIST );
42 void a64_hybrid_fp32_mla_4x24_a55( ARGLIST );
43 
44 class cls_a64_hybrid_fp32_mla_4x24
45 {
46 public:
47     typedef float lhs_operand_type;
48     typedef float rhs_operand_type;
49     typedef float result_type;
50 
51     typedef void (*kern_type)( ARGLIST );
52 
53     /* Kernel blocking parameters */
out_height()54     static constexpr unsigned int out_height()
55     {
56         return 4;
57     }
58 
out_width()59     static unsigned int out_width()
60     {
61         return 24;
62     }
63 
k_unroll()64     static constexpr unsigned int k_unroll()
65     {
66         return 1;
67     }
68 
supports_accumulate()69     static constexpr bool supports_accumulate()
70     {
71         return true;
72     }
73 
74     StdTransformsFixed<rhs_operand_type, result_type, 4, 24, 1> transforms = {};
75     template<typename T>
get_performance_parameters(const CPUInfo * ci)76     static inline PerformanceParameters get_performance_parameters(const CPUInfo *ci)
77     {
78         if (std::is_same<T, float>::value) {
79             switch (ci->get_cpu_model()) {
80                 case CPUModel::A55r1:
81                     return { 2.985 };
82                 case CPUModel::A53:
83                     return { 1.43 };
84                 case CPUModel::A73:
85                     return { 2.56 };
86                 case CPUModel::A510:
87                     return { 3.51 };
88                 case CPUModel::V1:
89                     return { 13.86 };
90                 default:
91                     return { 6.614 };
92             }
93         }
94 
95         return { 1.0 };
96     }
97 
98     // Default to the generic kernel
99     kern_type kernel=a64_hybrid_fp32_mla_4x24;
cls_a64_hybrid_fp32_mla_4x24(const CPUInfo * ci)100     cls_a64_hybrid_fp32_mla_4x24(const CPUInfo *ci)
101     {
102         switch(ci->get_cpu_model()) {
103             default:
104                 break;
105             case CPUModel::A55r1:
106             case CPUModel::A53:
107                 kernel=a64_hybrid_fp32_mla_4x24_a55;
108                 break;
109         }
110     }
111 };
112 
113 } // namespace arm_gemm
114 
115 #undef ARGLIST
116 
117 #endif // __aarch64__
118