1// SPDX-License-Identifier: GPL-2.0-only OR MIT
2/*
3 * Device Tree Source for AM62A SoC Family Wakeup Domain peripherals
4 *
5 * Copyright (C) 2022-2025 Texas Instruments Incorporated - https://www.ti.com/
6 */
7
8#include <dt-bindings/bus/ti-sysc.h>
9
10&cbass_wakeup {
11	wkup_conf: bus@43000000 {
12		compatible = "simple-bus";
13		#address-cells = <1>;
14		#size-cells = <1>;
15		ranges = <0x00 0x00 0x43000000 0x20000>;
16
17		chipid: chipid@14 {
18			compatible = "ti,am654-chipid";
19			reg = <0x14 0x4>;
20		};
21
22		opp_efuse_table: syscon@18 {
23			compatible = "ti,am62-opp-efuse-table", "syscon";
24			reg = <0x18 0x4>;
25		};
26
27		cpsw_mac_syscon: ethernet-mac-syscon@200 {
28			compatible = "ti,am62p-cpsw-mac-efuse", "syscon";
29			reg = <0x200 0x8>;
30		};
31
32		usb0_phy_ctrl: syscon@4008 {
33			compatible = "ti,am62-usb-phy-ctrl", "syscon";
34			reg = <0x4008 0x4>;
35		};
36
37		usb1_phy_ctrl: syscon@4018 {
38			compatible = "ti,am62-usb-phy-ctrl", "syscon";
39			reg = <0x4018 0x4>;
40		};
41	};
42
43	target-module@2b300050 {
44		compatible = "ti,sysc-omap2", "ti,sysc";
45		reg = <0 0x2b300050 0 0x4>,
46		      <0 0x2b300054 0 0x4>,
47		      <0 0x2b300058 0 0x4>;
48		reg-names = "rev", "sysc", "syss";
49		ti,sysc-mask = <(SYSC_OMAP2_ENAWAKEUP |
50				 SYSC_OMAP2_SOFTRESET |
51				 SYSC_OMAP2_AUTOIDLE)>;
52		ti,sysc-sidle = <SYSC_IDLE_FORCE>,
53				<SYSC_IDLE_NO>,
54				<SYSC_IDLE_SMART>,
55				<SYSC_IDLE_SMART_WKUP>;
56		ti,syss-mask = <1>;
57		ti,no-reset-on-init;
58		power-domains = <&k3_pds 114 TI_SCI_PD_EXCLUSIVE>;
59		clocks = <&k3_clks 114 0>;
60		clock-names = "fck";
61		#address-cells = <1>;
62		#size-cells = <1>;
63		ranges = <0 0 0x2b300000 0x100000>;
64
65		wkup_uart0: serial@0 {
66			compatible = "ti,am64-uart", "ti,am654-uart";
67			reg = <0 0x100>;
68			interrupts = <GIC_SPI 186 IRQ_TYPE_LEVEL_HIGH>;
69			status = "disabled";
70	       };
71	};
72
73	wkup_i2c0: i2c@2b200000 {
74		compatible = "ti,am64-i2c", "ti,omap4-i2c";
75		reg = <0x00 0x2b200000 0x00 0x100>;
76		interrupts = <GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>;
77		#address-cells = <1>;
78		#size-cells = <0>;
79		power-domains = <&k3_pds 107 TI_SCI_PD_EXCLUSIVE>;
80		clocks = <&k3_clks 107 4>;
81		clock-names = "fck";
82		status = "disabled";
83	};
84
85	wkup_rtc0: rtc@2b1f0000 {
86		compatible = "ti,am62-rtc";
87		reg = <0x00 0x2b1f0000 0x00 0x100>;
88		interrupts = <GIC_SPI 100 IRQ_TYPE_LEVEL_HIGH>;
89		clocks = <&k3_clks 117 6> , <&k3_clks 117 0>;
90		clock-names = "vbus", "osc32k";
91		power-domains = <&k3_pds 117 TI_SCI_PD_EXCLUSIVE>;
92		wakeup-source;
93	};
94
95	wkup_rti0: watchdog@2b000000 {
96		compatible = "ti,j7-rti-wdt";
97		reg = <0x00 0x2b000000 0x00 0x100>;
98		clocks = <&k3_clks 132 0>;
99		power-domains = <&k3_pds 132 TI_SCI_PD_EXCLUSIVE>;
100		assigned-clocks = <&k3_clks 132 0>;
101		assigned-clock-parents = <&k3_clks 132 2>;
102		/* Used by DM firmware */
103		status = "reserved";
104	};
105
106	wkup_vtm0: temperature-sensor@b00000 {
107		compatible = "ti,j7200-vtm";
108		reg = <0x00 0xb00000 0x00 0x400>,
109		      <0x00 0xb01000 0x00 0x400>;
110		power-domains = <&k3_pds 95 TI_SCI_PD_EXCLUSIVE>;
111		#thermal-sensor-cells = <1>;
112	};
113};
114