1 /* SPDX-License-Identifier: GPL-2.0-only */ 2 3 #ifndef SOC_INTEL_COMMON_BLOCK_PCR_H 4 #define SOC_INTEL_COMMON_BLOCK_PCR_H 5 6 /* Port Id lives in bits 23:16 and register offset lives in 15:0 of address. */ 7 #define PCR_PORTID_SHIFT 16 8 9 #if !defined(__ACPI__) 10 #include <types.h> 11 #include <device/pci_ops.h> 12 13 uint32_t pcr_read32(uint8_t pid, uint16_t offset); 14 uint16_t pcr_read16(uint8_t pid, uint16_t offset); 15 uint8_t pcr_read8(uint8_t pid, uint16_t offset); 16 void pcr_write32(uint8_t pid, uint16_t offset, uint32_t indata); 17 void pcr_write16(uint8_t pid, uint16_t offset, uint16_t indata); 18 void pcr_write8(uint8_t pid, uint16_t offset, uint8_t indata); 19 void pcr_rmw32(uint8_t pid, uint16_t offset, uint32_t anddata, 20 uint32_t ordata); 21 void pcr_rmw16(uint8_t pid, uint16_t offset, uint16_t anddata, 22 uint16_t ordata); 23 void pcr_rmw8(uint8_t pid, uint16_t offset, uint8_t anddata, 24 uint8_t ordata); 25 void pcr_or32(uint8_t pid, uint16_t offset, uint32_t ordata); 26 void pcr_or16(uint8_t pid, uint16_t offset, uint16_t ordata); 27 void pcr_or8(uint8_t pid, uint16_t offset, uint8_t ordata); 28 29 /* SBI command */ 30 enum { 31 MEM_READ = 0x00, 32 MEM_WRITE = 0x01, 33 PCI_CONFIG_READ = 0x04, 34 PCI_CONFIG_WRITE = 0x05, 35 PCR_READ = 0x06, 36 PCR_WRITE = 0x07, 37 GPIO_LOCK_UNLOCK = 0x13, 38 }; 39 40 struct pcr_sbi_msg { 41 uint8_t pid; /* 0x00 - Port ID of the SBI message */ 42 uint32_t offset; /* 0x01 - Register offset of the SBI message */ 43 uint8_t opcode; /* 0x05 - Opcode */ 44 bool is_posted; /* 0x06 - Posted message */ 45 uint16_t fast_byte_enable; /* 0x07 - First Byte Enable */ 46 uint16_t bar; /* 0x09 - base address */ 47 uint16_t fid; /* 0x0B - Function ID */ 48 }; 49 50 /* 51 * API to perform sideband communication 52 * 53 * Input: 54 * struct pcr_sbi_msg 55 * data - read/write for sbi message 56 * response - 57 * 0 - successful 58 * 1 - unsuccessful 59 * 2 - powered down 60 * 3 - multi-cast mixed 61 * 62 * Output: 63 * 0: SBI message is successfully completed 64 * -1: SBI message failure 65 */ 66 int pcr_execute_sideband_msg(pci_devfn_t dev, struct pcr_sbi_msg *msg, uint32_t *data, 67 uint8_t *response); 68 69 /* Get the starting address of the port's registers. */ 70 void *pcr_reg_address(uint8_t pid, uint16_t offset); 71 #endif /* if !defined(__ACPI__) */ 72 73 #endif /* SOC_INTEL_COMMON_BLOCK_PCR_H */ 74