xref: /aosp_15_r20/external/coreboot/src/soc/intel/common/block/include/intelblocks/gspi.h (revision b9411a12aaaa7e1e6a6fb7c5e057f44ee179a49c)
1 /* SPDX-License-Identifier: GPL-2.0-only */
2 
3 #ifndef SOC_INTEL_COMMON_BLOCK_GSPI_H
4 #define SOC_INTEL_COMMON_BLOCK_GSPI_H
5 
6 #include <spi-generic.h>
7 #include <stdint.h>
8 
9 /* GSPI controller structure to allow SoCs to define bus-controller mapping. */
10 extern const struct spi_ctrlr gspi_ctrlr;
11 
12 struct gspi_cfg {
13 	/* Bus speed in MHz. */
14 	uint32_t speed_mhz;
15 	/* Bus should be enabled prior to ramstage with temporary base. */
16 	uint8_t early_init;
17 };
18 
19 /* GSPI controller APIs. */
20 void gspi_early_bar_init(void);
21 
22 /* SoC-callbacks */
23 /*
24  * Map given GSPI bus number to devfn.
25  * Return value:
26  * -1 = error
27  * otherwise, devfn(>=0) corresponding to GSPI bus number.
28  */
29 int gspi_soc_bus_to_devfn(unsigned int gspi_bus);
30 
31 /*
32  * SoC-provided callback for getting configuration of SPI bus. Driver provides
33  * weak implementation with default SPI-bus configuration.
34  *
35  * Return value:
36  * 0 = Success
37  * -1 = Error
38  */
39 int gspi_get_soc_spi_cfg(unsigned int bus, struct spi_cfg *cfg);
40 
41 #endif /* SOC_INTEL_COMMON_BLOCK_GSPI_H */
42