xref: /aosp_15_r20/external/coreboot/src/soc/intel/common/block/include/intelblocks/crashlog.h (revision b9411a12aaaa7e1e6a6fb7c5e057f44ee179a49c)
1 /* SPDX-License-Identifier: GPL-2.0-only */
2 
3 #ifndef SOC_INTEL_COMMON_BLOCK_CRASHLOG_H
4 #define SOC_INTEL_COMMON_BLOCK_CRASHLOG_H
5 
6 #include <fsp/util.h>
7 #include <types.h>
8 
9 /* PMC  CrashLog Command */
10 #define PMC_IPC_CMD_CRASHLOG			0xA6
11 #define PMC_IPC_CMD_ID_CRASHLOG_DISCOVERY	0x01
12 #define PMC_IPC_CMD_ID_CRASHLOG_DISABLE		0x02
13 #define PMC_IPC_CMD_ID_CRASHLOG_ERASE		0x04
14 #define PMC_IPC_CMD_ID_CRASHLOG_ON_RESET	0x05
15 #define PMC_IPC_CMD_ID_CRASHLOG_RE_ARM_ON_RESET 0x06
16 
17 /* CPU CrashLog Mailbox commands */
18 #define CPU_CRASHLOG_CMD_DISABLE		0
19 #define CPU_CRASHLOG_CMD_CLEAR			2
20 #define CPU_CRASHLOG_WAIT_STALL			1
21 #define CPU_CRASHLOG_WAIT_TIMEOUT		1000
22 #define CPU_CRASHLOG_DISC_TAB_GUID_VALID	0x1600
23 
24 #define CRASHLOG_SIZE_DEBUG_PURPOSE		0x640
25 
26 #define INVALID_CRASHLOG_RECORD			0xdeadbeef
27 
28 /*
29  * Tag field definitions.
30  * Each region pointed by the descriptor table contains TAG information. This TAG information
31  * is used to identify the type of SRAM the region belongs to, for example:
32  * - TAG 0 represents the SoC PMC region
33  * - TAG 1 represents the IOE PMC region
34  * - TAG 7 represents a special case aka metadata information. This metadata information can be
35  *   SoC specific too.
36  */
37 #define CRASHLOG_DESCRIPTOR_TABLE_TAG_SOC	0x0
38 #define CRASHLOG_DESCRIPTOR_TABLE_TAG_IOE	0x1
39 #define CRASHLOG_DESCRIPTOR_TABLE_TAG_META	0x7
40 
41 /* PMC crashlog discovery structs */
42 typedef union {
43 	struct {
44 		u16 offset	:16;
45 		u16 size	:13;
46 		u16 assign_tag	:3;
47 	} bits;
48 	u32 data;
49 } __packed pmc_crashlog_discov_region_t;
50 
51 typedef struct {
52 	u32 numb_regions;
53 	pmc_crashlog_discov_region_t regions[256];
54 } __packed pmc_crashlog_desc_table_t;
55 
56 typedef union {
57 	struct {
58 		u32 supported		:1;
59 		u32 dis			:1;
60 		u32 discov_mechanism	:2;
61 		u32 size		:12;
62 		u32 base_offset		:16; /* Start offset of CrashLog in PMC SSRAM */
63 		u32 rsvd		:16;
64 		u32 desc_tabl_offset	:16; /* Start offset of descriptor table */
65 	} bits;
66 	u64 val_64_bits;
67 
68 	/* Converged Capability and Status - PMC */
69 	struct {
70 		/* Capability */
71 		u32 supported		:1; /* CrashLog feature availability bit */
72 		u32 dis			:1; /* CrashLog Disable bit */
73 		u32 discov_mechanism	:2; /* CrashLog discovery mechanism */
74 		u32 manu_trig_cmd	:1; /* Manuel trigger command */
75 		u32 clear		:1; /* Clear Command */
76 		u32 all_reset		:1; /* Trigger on all reset command */
77 		u32 re_arm		:1; /* Re-arm command */
78 		u32 glb_rst_trig_mask_sup:1; /* Global reset trigger mask supported */
79 		u32 rsvd		:18; /* Pch Specific reserved */
80 		/* Status */
81 		u32 glb_rst_trig_mask_sts	:1; /* Global reset trigger mask status */
82 		u32 crashLog_req		:1; /* CrashLog requestor flow */
83 		u32 trig_armed_sts		:1; /* Trigger armed status */
84 		u32 trig_all_rst		:1; /* Trigger on all resets status */
85 		u32 crash_dis_sts		:1; /* Crash log disabled status */
86 		u32 pch_rsvd			:16; /* Pch Specific reserved */
87 		u32 desc_tabl_offset		:16; /* Descriptor Table offset */
88 	} conv_bits64;
89 	u64 conv_val_64_bits;
90 } __packed pmc_ipc_discovery_buf_t;
91 
92 /* CPU/TELEMETRY crashlog discovery structs */
93 
94 typedef union {
95 	struct {
96 		u32 pcie_cap_id		:16;
97 		u32 cap_ver		:4;
98 		u32 next_cap_offset	:12;
99 	} fields;
100 	u32 data;
101 } __packed cap_data_t;
102 
103 typedef union {
104 	struct {
105 		u64 devsc_ven_id	:16;
106 		u64 devsc_ver		:4;
107 		u64 devsc_len		:12;
108 		u64 devsc_id		:16;
109 		u64 num_entries		:8; /*Numb of telemetry aggregators in lookup table. */
110 		u64 entries_size	:8; /* Entry Size in DWORDS */
111 	} fields;
112 	u64 data_64;
113 	u32 data_32[2];
114 } __packed devsc_data_t;
115 
116 typedef union {
117 	struct {
118 		u32 t_bir_q			:3;  /* tBIR, The BAR to be used */
119 		u32 discovery_table_offset	:29;
120 	} fields;
121 	u32 data;
122 } __packed discovery_data_t;
123 
124 typedef struct {
125 	cap_data_t	cap_data;
126 	devsc_data_t	devsc_data;
127 	discovery_data_t  discovery_data;
128 } __packed tel_crashlog_devsc_cap_t;
129 
130 typedef union {
131 	struct {
132 		u64 access_type		:4;
133 		u64 crash_type		:4;
134 		u64 count		:8;
135 		u64 reserved1		:4;
136 		u64 clr_support		:1;
137 		u64 storage_off_support	:1;
138 		u64 reserved2		:2;
139 		u64 storage_off_status	:1;
140 		u64 re_arm_status	:1;
141 		u64 reserved3		:6;
142 		u64 guid		:32;
143 	} fields;
144 	u64 data;
145 } __packed cpu_crashlog_header_t;
146 
147 /* Structures for CPU CrashLog mailbox interface */
148 typedef union {
149 	struct {
150 		u32 command	:8;
151 		u32 param	:8;
152 		u32 reserved	:15;
153 		u32 busy	:1;
154 	} fields;
155 	u32 data;
156 } __packed cpu_crashlog_mailbox_t;
157 
158 typedef union {
159 	struct {
160 		u32 offset	:32;
161 		u32 size	:32;
162 	} fields;
163 	u64 data;
164 } __packed cpu_crashlog_buffer_info_t;
165 
166 typedef struct {
167 	cpu_crashlog_header_t header;
168 	cpu_crashlog_mailbox_t cmd_mailbox;
169 	u32 mailbox_data;
170 	cpu_crashlog_buffer_info_t buffers[256];
171 } __packed cpu_crashlog_discovery_table_t;
172 
173 typedef struct cl_node_t {
174 	u32 size;
175 	void *data;
176 	struct cl_node_t *next;
177 } cl_node_t;
178 
179 cl_node_t *malloc_cl_node(size_t len);
180 void free_cl_node(cl_node_t *node);
181 int cl_get_cpu_record_size(void);
182 int cl_get_pmc_record_size(void);
183 int cl_get_ioe_record_size(void);
184 uintptr_t cl_get_cpu_bar_addr(void);
185 uintptr_t cl_get_cpu_tmp_bar(void);
186 uintptr_t cl_get_cpu_mb_int_addr(void);
187 int cl_get_total_data_size(void);
188 bool cl_pmc_sram_has_mmio_access(void);
189 bool cl_ioe_sram_has_mmio_access(void);
190 bool cpu_crashlog_support(void);
191 bool pmc_crashlog_support(void);
192 bool cl_cpu_data_present(void);
193 bool cl_pmc_data_present(void);
194 bool cl_ioe_data_present(void);
195 void cl_get_cpu_sram_data(cl_node_t *head);
196 void cl_get_pmc_sram_data(cl_node_t *head);
197 void reset_discovery_buffers(void);
198 void update_new_pmc_crashlog_size(u32 *pmc_crash_size);
199 void update_new_cpu_crashlog_size(u32 *cpu_crash_size);
200 void update_new_ioe_crashlog_size(u32 *pmc_crash_size);
201 pmc_ipc_discovery_buf_t cl_get_pmc_discovery_buf(void);
202 pmc_crashlog_desc_table_t cl_get_pmc_descriptor_table(void);
203 cpu_crashlog_discovery_table_t cl_get_cpu_discovery_table(void);
204 uintptr_t cl_gen_cpu_bar_addr(void);
205 int cpu_cl_poll_mailbox_ready(uintptr_t cl_mailbox_addr);
206 int cpu_cl_mailbox_cmd(u8 cmd, u8 param);
207 int cpu_cl_clear_data(void);
208 void cpu_cl_rearm(void);
209 void cpu_cl_cleanup(void);
210 int pmc_cl_gen_descriptor_table(uintptr_t desc_table_addr,
211 				pmc_crashlog_desc_table_t *descriptor_table);
212 bool pmc_cl_discovery(void);
213 bool cpu_cl_discovery(void);
214 int cl_pmc_re_arm_after_reset(void);
215 int cl_pmc_clear(void);
216 int cl_pmc_en_gen_on_all_reboot(void);
217 bool discover_crashlog(void);
218 bool cl_copy_data_from_sram(uintptr_t src_bar, u32 offset, size_t size, u32 *dest_addr,
219 				u32 buffer_index, bool pmc_sram);
220 void collect_pmc_and_cpu_crashlog_from_srams(cl_node_t *head);
221 static const EFI_GUID FW_ERR_SECTION_GUID = {
222 	0x81212a96, 0x09ed, 0x4996,
223 	{ 0x94, 0x71, 0x8d, 0x72, 0x9c, 0x8e, 0x69, 0xed }
224 };
225 
226 #endif /* SOC_INTEL_COMMON_BLOCK_CRASHLOG */
227