xref: /aosp_15_r20/external/mesa3d/src/intel/compiler/intel_nir_clamp_per_vertex_loads.c (revision 6104692788411f58d303aa86923a9ff6ecaded22)
1 /*
2  * Copyright (c) 2022 Intel Corporation
3  *
4  * Permission is hereby granted, free of charge, to any person obtaining a
5  * copy of this software and associated documentation files (the "Software"),
6  * to deal in the Software without restriction, including without limitation
7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8  * and/or sell copies of the Software, and to permit persons to whom the
9  * Software is furnished to do so, subject to the following conditions:
10  *
11  * The above copyright notice and this permission notice (including the next
12  * paragraph) shall be included in all copies or substantial portions of the
13  * Software.
14  *
15  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
18  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
21  * IN THE SOFTWARE.
22  */
23 
24 /*
25  * Limit input per vertex input accesses. This is useful for the tesselation stages.
26  * On Gfx12.5+ out of bound accesses generate hangs.
27  *
28  * This pass operates on derefs, it must be called before shader inputs are
29  * lowered.
30  */
31 
32 #include "intel_nir.h"
33 #include "compiler/nir/nir_builder.h"
34 #include "compiler/nir/nir_deref.h"
35 
36 static bool
clamp_per_vertex_loads_instr(nir_builder * b,nir_intrinsic_instr * intrin,void * cb_data)37 clamp_per_vertex_loads_instr(nir_builder *b, nir_intrinsic_instr *intrin,
38                              void *cb_data)
39 {
40    if (intrin->intrinsic != nir_intrinsic_load_deref)
41       return false;
42 
43    nir_deref_instr *deref = nir_instr_as_deref(intrin->src[0].ssa->parent_instr);
44    nir_variable *var = nir_deref_instr_get_variable(deref);
45    if (var == NULL || (var->data.mode & nir_var_shader_in) == 0)
46       return false;
47 
48    nir_deref_path path;
49    nir_deref_path_init(&path, deref, cb_data);
50 
51    bool progress = false;
52    for (unsigned i = 0; path.path[i]; i++) {
53       if (path.path[i]->deref_type != nir_deref_type_array)
54          continue;
55 
56       b->cursor = nir_before_instr(&path.path[i]->instr);
57 
58       nir_src_rewrite(&path.path[i]->arr.index,
59                       nir_umin(b, path.path[i]->arr.index.ssa, nir_iadd_imm(b, nir_load_patch_vertices_in(b), -1)));
60 
61       progress = true;
62       break;
63    }
64 
65    nir_deref_path_finish(&path);
66 
67    return progress;
68 }
69 
70 bool
intel_nir_clamp_per_vertex_loads(nir_shader * shader)71 intel_nir_clamp_per_vertex_loads(nir_shader *shader)
72 {
73    void *mem_ctx = ralloc_context(NULL);
74 
75    bool ret = nir_shader_intrinsics_pass(shader, clamp_per_vertex_loads_instr,
76                                            nir_metadata_control_flow,
77                                            mem_ctx);
78 
79    ralloc_free(mem_ctx);
80 
81    return ret;
82 }
83 
84 static bool
lower_patch_vertices_instr(nir_builder * b,nir_intrinsic_instr * intrin,void * cb_data)85 lower_patch_vertices_instr(nir_builder *b, nir_intrinsic_instr *intrin,
86                            void *cb_data)
87 {
88    if (intrin->intrinsic != nir_intrinsic_load_patch_vertices_in)
89       return false;
90 
91    unsigned *input_vertices = cb_data;
92 
93    b->cursor = nir_before_instr(&intrin->instr);
94 
95    nir_def_rewrite_uses(&intrin->def, nir_imm_int(b, *input_vertices));
96 
97    return true;
98 }
99 
100 bool
intel_nir_lower_patch_vertices_in(nir_shader * shader,unsigned input_vertices)101 intel_nir_lower_patch_vertices_in(nir_shader *shader, unsigned input_vertices)
102 {
103    return nir_shader_intrinsics_pass(shader, lower_patch_vertices_instr,
104                                        nir_metadata_control_flow,
105                                        &input_vertices);
106 }
107