1 /* SPDX-License-Identifier: GPL-2.0 */ 2 /* 3 * Support for Intel Camera Imaging ISP subsystem. 4 * Copyright (c) 2010-2015, Intel Corporation. 5 */ 6 7 #ifndef __INPUT_FORMATTER_LOCAL_H_INCLUDED__ 8 #define __INPUT_FORMATTER_LOCAL_H_INCLUDED__ 9 10 #include "input_formatter_global.h" 11 12 #include "isp.h" /* ISP_VEC_ALIGN */ 13 14 typedef struct input_formatter_switch_state_s input_formatter_switch_state_t; 15 typedef struct input_formatter_state_s input_formatter_state_t; 16 typedef struct input_formatter_bin_state_s input_formatter_bin_state_t; 17 18 #define HIVE_IF_FSM_SYNC_STATUS 0x100 19 #define HIVE_IF_FSM_SYNC_COUNTER 0x104 20 #define HIVE_IF_FSM_DEINTERLEAVING_IDX 0x114 21 #define HIVE_IF_FSM_DECIMATION_H_COUNTER 0x118 22 #define HIVE_IF_FSM_DECIMATION_V_COUNTER 0x11C 23 #define HIVE_IF_FSM_DECIMATION_BLOCK_V_COUNTER 0x120 24 #define HIVE_IF_FSM_PADDING_STATUS 0x124 25 #define HIVE_IF_FSM_PADDING_ELEMENT_COUNTER 0x128 26 #define HIVE_IF_FSM_VECTOR_SUPPORT_ERROR 0x12C 27 #define HIVE_IF_FSM_VECTOR_SUPPORT_BUFF_FULL 0x130 28 #define HIVE_IF_FSM_VECTOR_SUPPORT 0x134 29 #define HIVE_IF_FIFO_SENSOR_STATUS 0x138 30 31 /* 32 * The switch LUT's coding defines a sink for each 33 * single channel ID + channel format type. Conversely 34 * the sink (i.e. an input formatter) can be reached 35 * from multiple channel & format type combinations 36 * 37 * LUT[0,1] channel=0, format type {0,1,...31} 38 * LUT[2,3] channel=1, format type {0,1,...31} 39 * LUT[4,5] channel=2, format type {0,1,...31} 40 * LUT[6,7] channel=3, format type {0,1,...31} 41 * 42 * Each register hold 16 2-bit fields encoding the sink 43 * {0,1,2,3}, "0" means unconnected. 44 * 45 * The single FSYNCH register uses four 3-bit fields of 1-hot 46 * encoded sink information, "0" means unconnected. 47 * 48 * The encoding is redundant. The FSYNCH setting will connect 49 * a channel to a sink. At that point the LUT's belonging to 50 * that channel can be directed to another sink. Thus the data 51 * goes to another place than the synch 52 */ 53 struct input_formatter_switch_state_s { 54 int if_input_switch_lut_reg[8]; 55 int if_input_switch_fsync_lut; 56 int if_input_switch_ch_id_fmt_type; 57 bool if_input_switch_map[HIVE_SWITCH_N_CHANNELS][HIVE_SWITCH_N_FORMATTYPES]; 58 }; 59 60 struct input_formatter_state_s { 61 /* int reset; */ 62 int start_line; 63 int start_column; 64 int cropped_height; 65 int cropped_width; 66 int ver_decimation; 67 int hor_decimation; 68 int ver_deinterleaving; 69 int hor_deinterleaving; 70 int left_padding; 71 int eol_offset; 72 int vmem_start_address; 73 int vmem_end_address; 74 int vmem_increment; 75 int is_yuv420; 76 int vsync_active_low; 77 int hsync_active_low; 78 int allow_fifo_overflow; 79 int block_fifo_when_no_req; 80 int fsm_sync_status; 81 int fsm_sync_counter; 82 int fsm_crop_status; 83 int fsm_crop_line_counter; 84 int fsm_crop_pixel_counter; 85 int fsm_deinterleaving_index; 86 int fsm_dec_h_counter; 87 int fsm_dec_v_counter; 88 int fsm_dec_block_v_counter; 89 int fsm_padding_status; 90 int fsm_padding_elem_counter; 91 int fsm_vector_support_error; 92 int fsm_vector_buffer_full; 93 int vector_support; 94 int sensor_data_lost; 95 }; 96 97 struct input_formatter_bin_state_s { 98 u32 reset; 99 u32 input_endianness; 100 u32 output_endianness; 101 u32 bitswap; 102 u32 block_synch; 103 u32 packet_synch; 104 u32 readpostwrite_synch; 105 u32 is_2ppc; 106 u32 en_status_update; 107 }; 108 109 #endif /* __INPUT_FORMATTER_LOCAL_H_INCLUDED__ */ 110