1 /* SPDX-License-Identifier: GPL-2.0 */ 2 /* 3 * Support for Intel Camera Imaging ISP subsystem. 4 * Copyright (c) 2015, Intel Corporation. 5 */ 6 7 #ifndef __INPUT_FORMATTER_GLOBAL_H_INCLUDED__ 8 #define __INPUT_FORMATTER_GLOBAL_H_INCLUDED__ 9 10 #define IS_INPUT_FORMATTER_VERSION2 11 #define IS_INPUT_SWITCH_VERSION2 12 13 #include <type_support.h> 14 #include <system_local.h> 15 #include "if_defs.h" 16 #include "str2mem_defs.h" 17 #include "input_switch_2400_defs.h" 18 19 #define _HIVE_INPUT_SWITCH_GET_FSYNC_REG_LSB(ch_id) ((ch_id) * 3) 20 21 #define HIVE_SWITCH_N_CHANNELS 4 22 #define HIVE_SWITCH_N_FORMATTYPES 32 23 #define HIVE_SWITCH_N_SWITCH_CODE 4 24 #define HIVE_SWITCH_M_CHANNELS 0x00000003 25 #define HIVE_SWITCH_M_FORMATTYPES 0x0000001f 26 #define HIVE_SWITCH_M_SWITCH_CODE 0x00000003 27 #define HIVE_SWITCH_M_FSYNC 0x00000007 28 29 #define HIVE_SWITCH_ENCODE_FSYNC(x) \ 30 (1U << (((x) - 1) & HIVE_SWITCH_M_CHANNELS)) 31 32 #define _HIVE_INPUT_SWITCH_GET_LUT_FIELD(reg, bit_index) \ 33 (((reg) >> (bit_index)) & HIVE_SWITCH_M_SWITCH_CODE) 34 #define _HIVE_INPUT_SWITCH_SET_LUT_FIELD(reg, bit_index, val) \ 35 (((reg) & ~(HIVE_SWITCH_M_SWITCH_CODE << (bit_index))) | (((hrt_data)(val) & HIVE_SWITCH_M_SWITCH_CODE) << (bit_index))) 36 #define _HIVE_INPUT_SWITCH_GET_FSYNC_FIELD(reg, bit_index) \ 37 (((reg) >> (bit_index)) & HIVE_SWITCH_M_FSYNC) 38 #define _HIVE_INPUT_SWITCH_SET_FSYNC_FIELD(reg, bit_index, val) \ 39 (((reg) & ~(HIVE_SWITCH_M_FSYNC << (bit_index))) | (((hrt_data)(val) & HIVE_SWITCH_M_FSYNC) << (bit_index))) 40 41 typedef struct input_formatter_cfg_s input_formatter_cfg_t; 42 43 /* Hardware registers */ 44 /*#define HIVE_IF_RESET_ADDRESS 0x000*/ /* deprecated */ 45 #define HIVE_IF_START_LINE_ADDRESS 0x004 46 #define HIVE_IF_START_COLUMN_ADDRESS 0x008 47 #define HIVE_IF_CROPPED_HEIGHT_ADDRESS 0x00C 48 #define HIVE_IF_CROPPED_WIDTH_ADDRESS 0x010 49 #define HIVE_IF_VERTICAL_DECIMATION_ADDRESS 0x014 50 #define HIVE_IF_HORIZONTAL_DECIMATION_ADDRESS 0x018 51 #define HIVE_IF_H_DEINTERLEAVING_ADDRESS 0x01C 52 #define HIVE_IF_LEFTPADDING_WIDTH_ADDRESS 0x020 53 #define HIVE_IF_END_OF_LINE_OFFSET_ADDRESS 0x024 54 #define HIVE_IF_VMEM_START_ADDRESS_ADDRESS 0x028 55 #define HIVE_IF_VMEM_END_ADDRESS_ADDRESS 0x02C 56 #define HIVE_IF_VMEM_INCREMENT_ADDRESS 0x030 57 #define HIVE_IF_YUV_420_FORMAT_ADDRESS 0x034 58 #define HIVE_IF_VSYNCK_ACTIVE_LOW_ADDRESS 0x038 59 #define HIVE_IF_HSYNCK_ACTIVE_LOW_ADDRESS 0x03C 60 #define HIVE_IF_ALLOW_FIFO_OVERFLOW_ADDRESS 0x040 61 #define HIVE_IF_BLOCK_FIFO_NO_REQ_ADDRESS 0x044 62 #define HIVE_IF_V_DEINTERLEAVING_ADDRESS 0x048 63 #define HIVE_IF_FSM_CROP_PIXEL_COUNTER 0x110 64 #define HIVE_IF_FSM_CROP_LINE_COUNTER 0x10C 65 #define HIVE_IF_FSM_CROP_STATUS 0x108 66 67 /* Registers only for simulation */ 68 #define HIVE_IF_CRUN_MODE_ADDRESS 0x04C 69 #define HIVE_IF_DUMP_OUTPUT_ADDRESS 0x050 70 71 /* Follow the DMA syntax, "cmd" last */ 72 #define IF_PACK(val, cmd) ((val & 0x0fff) | (cmd /*& 0xf000*/)) 73 74 #define HIVE_STR2MEM_SOFT_RESET_REG_ADDRESS (_STR2MEM_SOFT_RESET_REG_ID * _STR2MEM_REG_ALIGN) 75 #define HIVE_STR2MEM_INPUT_ENDIANNESS_REG_ADDRESS (_STR2MEM_INPUT_ENDIANNESS_REG_ID * _STR2MEM_REG_ALIGN) 76 #define HIVE_STR2MEM_OUTPUT_ENDIANNESS_REG_ADDRESS (_STR2MEM_OUTPUT_ENDIANNESS_REG_ID * _STR2MEM_REG_ALIGN) 77 #define HIVE_STR2MEM_BIT_SWAPPING_REG_ADDRESS (_STR2MEM_BIT_SWAPPING_REG_ID * _STR2MEM_REG_ALIGN) 78 #define HIVE_STR2MEM_BLOCK_SYNC_LEVEL_REG_ADDRESS (_STR2MEM_BLOCK_SYNC_LEVEL_REG_ID * _STR2MEM_REG_ALIGN) 79 #define HIVE_STR2MEM_PACKET_SYNC_LEVEL_REG_ADDRESS (_STR2MEM_PACKET_SYNC_LEVEL_REG_ID * _STR2MEM_REG_ALIGN) 80 #define HIVE_STR2MEM_READ_POST_WRITE_SYNC_ENABLE_REG_ADDRESS (_STR2MEM_READ_POST_WRITE_SYNC_ENABLE_REG_ID * _STR2MEM_REG_ALIGN) 81 #define HIVE_STR2MEM_DUAL_BYTE_INPUTS_ENABLED_REG_ADDRESS (_STR2MEM_DUAL_BYTE_INPUTS_ENABLED_REG_ID * _STR2MEM_REG_ALIGN) 82 #define HIVE_STR2MEM_EN_STAT_UPDATE_ADDRESS (_STR2MEM_EN_STAT_UPDATE_ID * _STR2MEM_REG_ALIGN) 83 84 /* 85 * This data structure is shared between host and SP 86 */ 87 struct input_formatter_cfg_s { 88 u32 start_line; 89 u32 start_column; 90 u32 left_padding; 91 u32 cropped_height; 92 u32 cropped_width; 93 u32 deinterleaving; 94 u32 buf_vecs; 95 u32 buf_start_index; 96 u32 buf_increment; 97 u32 buf_eol_offset; 98 u32 is_yuv420_format; 99 u32 block_no_reqs; 100 }; 101 102 extern const hrt_address HIVE_IF_SRST_ADDRESS[N_INPUT_FORMATTER_ID]; 103 extern const hrt_data HIVE_IF_SRST_MASK[N_INPUT_FORMATTER_ID]; 104 extern const u8 HIVE_IF_SWITCH_CODE[N_INPUT_FORMATTER_ID]; 105 106 #endif /* __INPUT_FORMATTER_GLOBAL_H_INCLUDED__ */ 107