1 /* SPDX-License-Identifier: GPL-2.0 */ 2 /* 3 * Copyright (c) 2020 Synopsys, Inc. and/or its affiliates. 4 * Synopsys DesignWare XPCS helpers 5 */ 6 7 #ifndef __LINUX_PCS_XPCS_H 8 #define __LINUX_PCS_XPCS_H 9 10 #include <linux/clk.h> 11 #include <linux/fwnode.h> 12 #include <linux/mdio.h> 13 #include <linux/phy.h> 14 #include <linux/phylink.h> 15 #include <linux/types.h> 16 17 /* AN mode */ 18 #define DW_AN_C73 1 19 #define DW_AN_C37_SGMII 2 20 #define DW_2500BASEX 3 21 #define DW_AN_C37_1000BASEX 4 22 #define DW_10GBASER 5 23 24 enum dw_xpcs_pcs_id { 25 DW_XPCS_ID_NATIVE = 0, 26 NXP_SJA1105_XPCS_ID = 0x00000010, 27 NXP_SJA1110_XPCS_ID = 0x00000020, 28 DW_XPCS_ID = 0x7996ced0, 29 DW_XPCS_ID_MASK = 0xffffffff, 30 }; 31 32 enum dw_xpcs_pma_id { 33 DW_XPCS_PMA_ID_NATIVE = 0, 34 DW_XPCS_PMA_GEN1_3G_ID, 35 DW_XPCS_PMA_GEN2_3G_ID, 36 DW_XPCS_PMA_GEN2_6G_ID, 37 DW_XPCS_PMA_GEN4_3G_ID, 38 DW_XPCS_PMA_GEN4_6G_ID, 39 DW_XPCS_PMA_GEN5_10G_ID, 40 DW_XPCS_PMA_GEN5_12G_ID, 41 WX_TXGBE_XPCS_PMA_10G_ID = 0x0018fc80, 42 }; 43 44 struct dw_xpcs_info { 45 u32 pcs; 46 u32 pma; 47 }; 48 49 struct dw_xpcs; 50 51 struct phylink_pcs *xpcs_to_phylink_pcs(struct dw_xpcs *xpcs); 52 int xpcs_get_an_mode(struct dw_xpcs *xpcs, phy_interface_t interface); 53 int xpcs_config_eee(struct dw_xpcs *xpcs, int mult_fact_100ns, 54 int enable); 55 struct dw_xpcs *xpcs_create_mdiodev(struct mii_bus *bus, int addr); 56 struct dw_xpcs *xpcs_create_fwnode(struct fwnode_handle *fwnode); 57 void xpcs_destroy(struct dw_xpcs *xpcs); 58 59 struct phylink_pcs *xpcs_create_pcs_mdiodev(struct mii_bus *bus, int addr); 60 void xpcs_destroy_pcs(struct phylink_pcs *pcs); 61 62 #endif /* __LINUX_PCS_XPCS_H */ 63