xref: /aosp_15_r20/external/libhevc/decoder/ihevcd_api.c (revision c83a76b084498d55f252f48b2e3786804cdf24b7)
1 /******************************************************************************
2 *
3 * Copyright (C) 2012 Ittiam Systems Pvt Ltd, Bangalore
4 *
5 * Licensed under the Apache License, Version 2.0 (the "License");
6 * you may not use this file except in compliance with the License.
7 * You may obtain a copy of the License at:
8 *
9 * http://www.apache.org/licenses/LICENSE-2.0
10 *
11 * Unless required by applicable law or agreed to in writing, software
12 * distributed under the License is distributed on an "AS IS" BASIS,
13 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
14 * See the License for the specific language governing permissions and
15 * limitations under the License.
16 *
17 ******************************************************************************/
18 /**
19 *******************************************************************************
20 * @file
21 *  ihevcd_api.c
22 *
23 * @brief
24 *  Contains api functions definitions for HEVC decoder
25 *
26 * @author
27 *  Harish
28 *
29 * @par List of Functions:
30 * - api_check_struct_sanity()
31 * - ihevcd_get_version()
32 * - ihevcd_set_default_params()
33 * - ihevcd_init()
34 * - ihevcd_get_num_rec()
35 * - ihevcd_allocate_static_bufs()
36 * - ihevcd_create()
37 * - ihevcd_retrieve_memrec()
38 * - ihevcd_set_display_frame()
39 * - ihevcd_set_flush_mode()
40 * - ihevcd_get_status()
41 * - ihevcd_get_buf_info()
42 * - ihevcd_set_params()
43 * - ihevcd_reset()
44 * - ihevcd_rel_display_frame()
45 * - ihevcd_disable_deblk()
46 * - ihevcd_get_frame_dimensions()
47 * - ihevcd_set_num_cores()
48 * - ihevcd_ctl()
49 * - ihevcd_cxa_api_function()
50 *
51 * @remarks
52 *  None
53 *
54 *******************************************************************************
55 */
56 /*****************************************************************************/
57 /* File Includes                                                             */
58 /*****************************************************************************/
59 #include <stdio.h>
60 #include <stddef.h>
61 #include <stdlib.h>
62 #include <string.h>
63 
64 #include "ihevc_typedefs.h"
65 #include "iv.h"
66 #include "ivd.h"
67 #include "ihevcd_cxa.h"
68 #include "ithread.h"
69 
70 #include "ihevc_defs.h"
71 #include "ihevc_debug.h"
72 
73 #include "ihevc_structs.h"
74 #include "ihevc_macros.h"
75 #include "ihevc_platform_macros.h"
76 
77 #include "ihevc_buf_mgr.h"
78 #include "ihevc_dpb_mgr.h"
79 #include "ihevc_disp_mgr.h"
80 #include "ihevc_common_tables.h"
81 #include "ihevc_cabac_tables.h"
82 #include "ihevc_error.h"
83 
84 #include "ihevcd_defs.h"
85 #include "ihevcd_trace.h"
86 
87 #include "ihevcd_function_selector.h"
88 #include "ihevcd_structs.h"
89 #include "ihevcd_error.h"
90 #include "ihevcd_utils.h"
91 #include "ihevcd_decode.h"
92 #include "ihevcd_job_queue.h"
93 #include "ihevcd_statistics.h"
94 
95 
96 #define ALIGNED_FREE(ps_codec, y) \
97 if(y) {ps_codec->pf_aligned_free(ps_codec->pv_mem_ctxt, ((void *)y)); (y) = NULL;}
98 
99 /*****************************************************************************/
100 /* Function Prototypes                                                       */
101 /*****************************************************************************/
102 IV_API_CALL_STATUS_T ihevcd_get_version(CHAR *pc_version_string,
103                                         UWORD32 u4_version_buffer_size);
104 WORD32 ihevcd_free_dynamic_bufs(codec_t *ps_codec);
105 
106 
107 /**
108 *******************************************************************************
109 *
110 * @brief
111 *  Used to test arguments for corresponding API call
112 *
113 * @par Description:
114 *  For each command the arguments are validated
115 *
116 * @param[in] ps_handle
117 *  Codec handle at API level
118 *
119 * @param[in] pv_api_ip
120 *  Pointer to input structure
121 *
122 * @param[out] pv_api_op
123 *  Pointer to output structure
124 *
125 * @returns  Status of error checking
126 *
127 * @remarks
128 *
129 *
130 *******************************************************************************
131 */
132 
api_check_struct_sanity(iv_obj_t * ps_handle,void * pv_api_ip,void * pv_api_op)133 static IV_API_CALL_STATUS_T api_check_struct_sanity(iv_obj_t *ps_handle,
134                                                     void *pv_api_ip,
135                                                     void *pv_api_op)
136 {
137     IVD_API_COMMAND_TYPE_T e_cmd;
138     UWORD32 *pu4_api_ip;
139     UWORD32 *pu4_api_op;
140     WORD32 i;
141 
142     if(NULL == pv_api_op)
143         return (IV_FAIL);
144 
145     if(NULL == pv_api_ip)
146         return (IV_FAIL);
147 
148     pu4_api_ip = (UWORD32 *)pv_api_ip;
149     pu4_api_op = (UWORD32 *)pv_api_op;
150     e_cmd = (IVD_API_COMMAND_TYPE_T)*(pu4_api_ip + 1);
151 
152     *(pu4_api_op + 1) = 0;
153     /* error checks on handle */
154     switch((WORD32)e_cmd)
155     {
156         case IVD_CMD_CREATE:
157             break;
158 
159         case IVD_CMD_REL_DISPLAY_FRAME:
160         case IVD_CMD_SET_DISPLAY_FRAME:
161         case IVD_CMD_GET_DISPLAY_FRAME:
162         case IVD_CMD_VIDEO_DECODE:
163         case IVD_CMD_DELETE:
164         case IVD_CMD_VIDEO_CTL:
165             if(ps_handle == NULL)
166             {
167                 *(pu4_api_op + 1) |= 1 << IVD_UNSUPPORTEDPARAM;
168                 *(pu4_api_op + 1) |= IVD_HANDLE_NULL;
169                 return IV_FAIL;
170             }
171 
172             if(ps_handle->u4_size != sizeof(iv_obj_t))
173             {
174                 *(pu4_api_op + 1) |= 1 << IVD_UNSUPPORTEDPARAM;
175                 *(pu4_api_op + 1) |= IVD_HANDLE_STRUCT_SIZE_INCORRECT;
176                 return IV_FAIL;
177             }
178 
179 
180             if(ps_handle->pv_codec_handle == NULL)
181             {
182                 *(pu4_api_op + 1) |= 1 << IVD_UNSUPPORTEDPARAM;
183                 *(pu4_api_op + 1) |= IVD_INVALID_HANDLE_NULL;
184                 return IV_FAIL;
185             }
186             break;
187         default:
188             *(pu4_api_op + 1) |= 1 << IVD_UNSUPPORTEDPARAM;
189             *(pu4_api_op + 1) |= IVD_INVALID_API_CMD;
190             return IV_FAIL;
191     }
192 
193     switch((WORD32)e_cmd)
194     {
195         case IVD_CMD_CREATE:
196         {
197             ihevcd_cxa_create_ip_t *ps_ip = (ihevcd_cxa_create_ip_t *)pv_api_ip;
198             ihevcd_cxa_create_op_t *ps_op = (ihevcd_cxa_create_op_t *)pv_api_op;
199 
200 
201             ps_op->s_ivd_create_op_t.u4_error_code = 0;
202 
203             if((ps_ip->s_ivd_create_ip_t.u4_size > sizeof(ihevcd_cxa_create_ip_t))
204                             || (ps_ip->s_ivd_create_ip_t.u4_size
205                                             < sizeof(ivd_create_ip_t)))
206             {
207                 ps_op->s_ivd_create_op_t.u4_error_code |= 1
208                                 << IVD_UNSUPPORTEDPARAM;
209                 ps_op->s_ivd_create_op_t.u4_error_code |=
210                                 IVD_IP_API_STRUCT_SIZE_INCORRECT;
211 
212                 return (IV_FAIL);
213             }
214 
215             if((ps_op->s_ivd_create_op_t.u4_size != sizeof(ihevcd_cxa_create_op_t))
216                             && (ps_op->s_ivd_create_op_t.u4_size
217                                             != sizeof(ivd_create_op_t)))
218             {
219                 ps_op->s_ivd_create_op_t.u4_error_code |= 1
220                                 << IVD_UNSUPPORTEDPARAM;
221                 ps_op->s_ivd_create_op_t.u4_error_code |=
222                                 IVD_OP_API_STRUCT_SIZE_INCORRECT;
223 
224                 return (IV_FAIL);
225             }
226 
227 
228             if((ps_ip->s_ivd_create_ip_t.e_output_format != IV_YUV_420P)
229                             && (ps_ip->s_ivd_create_ip_t.e_output_format
230                                             != IV_YUV_422ILE)
231                             && (ps_ip->s_ivd_create_ip_t.e_output_format
232                                             != IV_RGB_565)
233                             && (ps_ip->s_ivd_create_ip_t.e_output_format
234                                             != IV_YUV_420SP_UV)
235                             && (ps_ip->s_ivd_create_ip_t.e_output_format
236                                             != IV_YUV_420SP_VU))
237             {
238                 ps_op->s_ivd_create_op_t.u4_error_code |= 1
239                                 << IVD_UNSUPPORTEDPARAM;
240                 ps_op->s_ivd_create_op_t.u4_error_code |=
241                                 IVD_INIT_DEC_COL_FMT_NOT_SUPPORTED;
242 
243                 return (IV_FAIL);
244             }
245 
246         }
247             break;
248 
249         case IVD_CMD_GET_DISPLAY_FRAME:
250         {
251             ihevcd_cxa_get_display_frame_ip_t *ps_ip =
252                             (ihevcd_cxa_get_display_frame_ip_t *)pv_api_ip;
253             ihevcd_cxa_get_display_frame_op_t *ps_op =
254                             (ihevcd_cxa_get_display_frame_op_t *)pv_api_op;
255 
256             ps_op->s_ivd_get_display_frame_op_t.u4_error_code = 0;
257 
258             if((ps_ip->s_ivd_get_display_frame_ip_t.u4_size
259                             != sizeof(ihevcd_cxa_get_display_frame_ip_t))
260                             && (ps_ip->s_ivd_get_display_frame_ip_t.u4_size
261                                             != sizeof(ivd_get_display_frame_ip_t)))
262             {
263                 ps_op->s_ivd_get_display_frame_op_t.u4_error_code |= 1
264                                 << IVD_UNSUPPORTEDPARAM;
265                 ps_op->s_ivd_get_display_frame_op_t.u4_error_code |=
266                                 IVD_IP_API_STRUCT_SIZE_INCORRECT;
267                 return (IV_FAIL);
268             }
269 
270             if((ps_op->s_ivd_get_display_frame_op_t.u4_size
271                             != sizeof(ihevcd_cxa_get_display_frame_op_t))
272                             && (ps_op->s_ivd_get_display_frame_op_t.u4_size
273                                             != sizeof(ivd_get_display_frame_op_t)))
274             {
275                 ps_op->s_ivd_get_display_frame_op_t.u4_error_code |= 1
276                                 << IVD_UNSUPPORTEDPARAM;
277                 ps_op->s_ivd_get_display_frame_op_t.u4_error_code |=
278                                 IVD_OP_API_STRUCT_SIZE_INCORRECT;
279                 return (IV_FAIL);
280             }
281 
282         }
283             break;
284 
285         case IVD_CMD_REL_DISPLAY_FRAME:
286         {
287             ihevcd_cxa_rel_display_frame_ip_t *ps_ip =
288                             (ihevcd_cxa_rel_display_frame_ip_t *)pv_api_ip;
289             ihevcd_cxa_rel_display_frame_op_t *ps_op =
290                             (ihevcd_cxa_rel_display_frame_op_t *)pv_api_op;
291 
292             ps_op->s_ivd_rel_display_frame_op_t.u4_error_code = 0;
293 
294             if((ps_ip->s_ivd_rel_display_frame_ip_t.u4_size
295                             != sizeof(ihevcd_cxa_rel_display_frame_ip_t))
296                             && (ps_ip->s_ivd_rel_display_frame_ip_t.u4_size
297                                             != sizeof(ivd_rel_display_frame_ip_t)))
298             {
299                 ps_op->s_ivd_rel_display_frame_op_t.u4_error_code |= 1
300                                 << IVD_UNSUPPORTEDPARAM;
301                 ps_op->s_ivd_rel_display_frame_op_t.u4_error_code |=
302                                 IVD_IP_API_STRUCT_SIZE_INCORRECT;
303                 return (IV_FAIL);
304             }
305 
306             if((ps_op->s_ivd_rel_display_frame_op_t.u4_size
307                             != sizeof(ihevcd_cxa_rel_display_frame_op_t))
308                             && (ps_op->s_ivd_rel_display_frame_op_t.u4_size
309                                             != sizeof(ivd_rel_display_frame_op_t)))
310             {
311                 ps_op->s_ivd_rel_display_frame_op_t.u4_error_code |= 1
312                                 << IVD_UNSUPPORTEDPARAM;
313                 ps_op->s_ivd_rel_display_frame_op_t.u4_error_code |=
314                                 IVD_OP_API_STRUCT_SIZE_INCORRECT;
315                 return (IV_FAIL);
316             }
317 
318         }
319             break;
320 
321         case IVD_CMD_SET_DISPLAY_FRAME:
322         {
323             ihevcd_cxa_set_display_frame_ip_t *ps_ip =
324                             (ihevcd_cxa_set_display_frame_ip_t *)pv_api_ip;
325             ihevcd_cxa_set_display_frame_op_t *ps_op =
326                             (ihevcd_cxa_set_display_frame_op_t *)pv_api_op;
327             UWORD32 j;
328 
329             ps_op->s_ivd_set_display_frame_op_t.u4_error_code = 0;
330 
331             if((ps_ip->s_ivd_set_display_frame_ip_t.u4_size
332                             != sizeof(ihevcd_cxa_set_display_frame_ip_t))
333                             && (ps_ip->s_ivd_set_display_frame_ip_t.u4_size
334                                             != sizeof(ivd_set_display_frame_ip_t)))
335             {
336                 ps_op->s_ivd_set_display_frame_op_t.u4_error_code |= 1
337                                 << IVD_UNSUPPORTEDPARAM;
338                 ps_op->s_ivd_set_display_frame_op_t.u4_error_code |=
339                                 IVD_IP_API_STRUCT_SIZE_INCORRECT;
340                 return (IV_FAIL);
341             }
342 
343             if((ps_op->s_ivd_set_display_frame_op_t.u4_size
344                             != sizeof(ihevcd_cxa_set_display_frame_op_t))
345                             && (ps_op->s_ivd_set_display_frame_op_t.u4_size
346                                             != sizeof(ivd_set_display_frame_op_t)))
347             {
348                 ps_op->s_ivd_set_display_frame_op_t.u4_error_code |= 1
349                                 << IVD_UNSUPPORTEDPARAM;
350                 ps_op->s_ivd_set_display_frame_op_t.u4_error_code |=
351                                 IVD_OP_API_STRUCT_SIZE_INCORRECT;
352                 return (IV_FAIL);
353             }
354 
355             if(ps_ip->s_ivd_set_display_frame_ip_t.num_disp_bufs == 0)
356             {
357                 ps_op->s_ivd_set_display_frame_op_t.u4_error_code |= 1
358                                 << IVD_UNSUPPORTEDPARAM;
359                 ps_op->s_ivd_set_display_frame_op_t.u4_error_code |=
360                                 IVD_DISP_FRM_ZERO_OP_BUFS;
361                 return IV_FAIL;
362             }
363 
364             for(j = 0; j < ps_ip->s_ivd_set_display_frame_ip_t.num_disp_bufs;
365                             j++)
366             {
367                 if(ps_ip->s_ivd_set_display_frame_ip_t.s_disp_buffer[j].u4_num_bufs
368                                 == 0)
369                 {
370                     ps_op->s_ivd_set_display_frame_op_t.u4_error_code |= 1
371                                     << IVD_UNSUPPORTEDPARAM;
372                     ps_op->s_ivd_set_display_frame_op_t.u4_error_code |=
373                                     IVD_DISP_FRM_ZERO_OP_BUFS;
374                     return IV_FAIL;
375                 }
376 
377                 for(i = 0;
378                                 i
379                                                 < (WORD32)ps_ip->s_ivd_set_display_frame_ip_t.s_disp_buffer[j].u4_num_bufs;
380                                 i++)
381                 {
382                     if(ps_ip->s_ivd_set_display_frame_ip_t.s_disp_buffer[j].pu1_bufs[i]
383                                     == NULL)
384                     {
385                         ps_op->s_ivd_set_display_frame_op_t.u4_error_code |= 1
386                                         << IVD_UNSUPPORTEDPARAM;
387                         ps_op->s_ivd_set_display_frame_op_t.u4_error_code |=
388                                         IVD_DISP_FRM_OP_BUF_NULL;
389                         return IV_FAIL;
390                     }
391 
392                     if(ps_ip->s_ivd_set_display_frame_ip_t.s_disp_buffer[j].u4_min_out_buf_size[i]
393                                     == 0)
394                     {
395                         ps_op->s_ivd_set_display_frame_op_t.u4_error_code |= 1
396                                         << IVD_UNSUPPORTEDPARAM;
397                         ps_op->s_ivd_set_display_frame_op_t.u4_error_code |=
398                                         IVD_DISP_FRM_ZERO_OP_BUF_SIZE;
399                         return IV_FAIL;
400                     }
401                 }
402             }
403         }
404             break;
405 
406         case IVD_CMD_VIDEO_DECODE:
407         {
408             ihevcd_cxa_video_decode_ip_t *ps_ip =
409                             (ihevcd_cxa_video_decode_ip_t *)pv_api_ip;
410             ihevcd_cxa_video_decode_op_t *ps_op =
411                             (ihevcd_cxa_video_decode_op_t *)pv_api_op;
412 
413             DEBUG("The input bytes is: %d",
414                             ps_ip->s_ivd_video_decode_ip_t.u4_num_Bytes);
415             ps_op->s_ivd_video_decode_op_t.u4_error_code = 0;
416 
417             if(ps_ip->s_ivd_video_decode_ip_t.u4_size
418                             != sizeof(ihevcd_cxa_video_decode_ip_t)
419                             && ps_ip->s_ivd_video_decode_ip_t.u4_size
420                                             != sizeof(ivd_video_decode_ip_t))
421             {
422                 ps_op->s_ivd_video_decode_op_t.u4_error_code |= 1
423                                 << IVD_UNSUPPORTEDPARAM;
424                 ps_op->s_ivd_video_decode_op_t.u4_error_code |=
425                                 IVD_IP_API_STRUCT_SIZE_INCORRECT;
426                 return (IV_FAIL);
427             }
428 
429             if(ps_op->s_ivd_video_decode_op_t.u4_size
430                             != sizeof(ihevcd_cxa_video_decode_op_t)
431                             && ps_op->s_ivd_video_decode_op_t.u4_size
432                                             != sizeof(ivd_video_decode_op_t))
433             {
434                 ps_op->s_ivd_video_decode_op_t.u4_error_code |= 1
435                                 << IVD_UNSUPPORTEDPARAM;
436                 ps_op->s_ivd_video_decode_op_t.u4_error_code |=
437                                 IVD_OP_API_STRUCT_SIZE_INCORRECT;
438                 return (IV_FAIL);
439             }
440 
441             if(((codec_t *)(ps_handle->pv_codec_handle))->u1_enable_cu_info
442                             && !ps_ip->pu1_8x8_blk_qp_map && !ps_ip->pu1_8x8_blk_type_map)
443             {
444                 ps_op->s_ivd_video_decode_op_t.u4_error_code |= 1
445                                 << IVD_UNSUPPORTEDPARAM;
446                 ps_op->s_ivd_video_decode_op_t.u4_error_code |=
447                                 IHEVCD_FRAME_INFO_OP_BUF_NULL;
448                 return (IV_FAIL);
449             }
450 
451         }
452             break;
453 
454         case IVD_CMD_DELETE:
455         {
456             ihevcd_cxa_delete_ip_t *ps_ip =
457                             (ihevcd_cxa_delete_ip_t *)pv_api_ip;
458             ihevcd_cxa_delete_op_t *ps_op =
459                             (ihevcd_cxa_delete_op_t *)pv_api_op;
460 
461             ps_op->s_ivd_delete_op_t.u4_error_code = 0;
462 
463             if(ps_ip->s_ivd_delete_ip_t.u4_size
464                             != sizeof(ihevcd_cxa_delete_ip_t))
465             {
466                 ps_op->s_ivd_delete_op_t.u4_error_code |= 1
467                                 << IVD_UNSUPPORTEDPARAM;
468                 ps_op->s_ivd_delete_op_t.u4_error_code |=
469                                 IVD_IP_API_STRUCT_SIZE_INCORRECT;
470                 return (IV_FAIL);
471             }
472 
473             if(ps_op->s_ivd_delete_op_t.u4_size
474                             != sizeof(ihevcd_cxa_delete_op_t))
475             {
476                 ps_op->s_ivd_delete_op_t.u4_error_code |= 1
477                                 << IVD_UNSUPPORTEDPARAM;
478                 ps_op->s_ivd_delete_op_t.u4_error_code |=
479                                 IVD_OP_API_STRUCT_SIZE_INCORRECT;
480                 return (IV_FAIL);
481             }
482 
483         }
484             break;
485 
486         case IVD_CMD_VIDEO_CTL:
487         {
488             UWORD32 *pu4_ptr_cmd;
489             UWORD32 sub_command;
490 
491             pu4_ptr_cmd = (UWORD32 *)pv_api_ip;
492             pu4_ptr_cmd += 2;
493             sub_command = *pu4_ptr_cmd;
494 
495             switch(sub_command)
496             {
497                 case IVD_CMD_CTL_SETPARAMS:
498                 {
499                     ihevcd_cxa_ctl_set_config_ip_t *ps_ip;
500                     ihevcd_cxa_ctl_set_config_op_t *ps_op;
501                     ps_ip = (ihevcd_cxa_ctl_set_config_ip_t *)pv_api_ip;
502                     ps_op = (ihevcd_cxa_ctl_set_config_op_t *)pv_api_op;
503 
504                     if(ps_ip->s_ivd_ctl_set_config_ip_t.u4_size
505                                     != sizeof(ihevcd_cxa_ctl_set_config_ip_t) &&
506                                     ps_ip->s_ivd_ctl_set_config_ip_t.u4_size
507                                                 != sizeof(ivd_ctl_set_config_ip_t))
508                     {
509                         ps_op->s_ivd_ctl_set_config_op_t.u4_error_code |= 1
510                                         << IVD_UNSUPPORTEDPARAM;
511                         ps_op->s_ivd_ctl_set_config_op_t.u4_error_code |=
512                                         IVD_IP_API_STRUCT_SIZE_INCORRECT;
513                         return IV_FAIL;
514                     }
515                 }
516                     //no break; is needed here
517                 case IVD_CMD_CTL_SETDEFAULT:
518                 {
519                     ihevcd_cxa_ctl_set_config_op_t *ps_op;
520                     ps_op = (ihevcd_cxa_ctl_set_config_op_t *)pv_api_op;
521                     if(ps_op->s_ivd_ctl_set_config_op_t.u4_size
522                                     != sizeof(ihevcd_cxa_ctl_set_config_op_t))
523                     {
524                         ps_op->s_ivd_ctl_set_config_op_t.u4_error_code |= 1
525                                         << IVD_UNSUPPORTEDPARAM;
526                         ps_op->s_ivd_ctl_set_config_op_t.u4_error_code |=
527                                         IVD_OP_API_STRUCT_SIZE_INCORRECT;
528                         return IV_FAIL;
529                     }
530                 }
531                     break;
532 
533                 case IVD_CMD_CTL_GETPARAMS:
534                 {
535                     ihevcd_cxa_ctl_getstatus_ip_t *ps_ip;
536                     ihevcd_cxa_ctl_getstatus_op_t *ps_op;
537 
538                     ps_ip = (ihevcd_cxa_ctl_getstatus_ip_t *)pv_api_ip;
539                     ps_op = (ihevcd_cxa_ctl_getstatus_op_t *)pv_api_op;
540                     if(ps_ip->s_ivd_ctl_getstatus_ip_t.u4_size
541                                     != sizeof(ihevcd_cxa_ctl_getstatus_ip_t))
542                     {
543                         ps_op->s_ivd_ctl_getstatus_op_t.u4_error_code |= 1
544                                         << IVD_UNSUPPORTEDPARAM;
545                         ps_op->s_ivd_ctl_getstatus_op_t.u4_error_code |=
546                                         IVD_IP_API_STRUCT_SIZE_INCORRECT;
547                         return IV_FAIL;
548                     }
549                     if((ps_op->s_ivd_ctl_getstatus_op_t.u4_size
550                                     != sizeof(ihevcd_cxa_ctl_getstatus_op_t)) &&
551                        (ps_op->s_ivd_ctl_getstatus_op_t.u4_size
552                                     != sizeof(ivd_ctl_getstatus_op_t)))
553                     {
554                         ps_op->s_ivd_ctl_getstatus_op_t.u4_error_code |= 1
555                                         << IVD_UNSUPPORTEDPARAM;
556                         ps_op->s_ivd_ctl_getstatus_op_t.u4_error_code |=
557                                         IVD_OP_API_STRUCT_SIZE_INCORRECT;
558                         return IV_FAIL;
559                     }
560                 }
561                     break;
562 
563                 case IVD_CMD_CTL_GETBUFINFO:
564                 {
565                     ihevcd_cxa_ctl_getbufinfo_ip_t *ps_ip;
566                     ihevcd_cxa_ctl_getbufinfo_op_t *ps_op;
567                     ps_ip = (ihevcd_cxa_ctl_getbufinfo_ip_t *)pv_api_ip;
568                     ps_op = (ihevcd_cxa_ctl_getbufinfo_op_t *)pv_api_op;
569 
570                     if(ps_ip->s_ivd_ctl_getbufinfo_ip_t.u4_size
571                                     != sizeof(ihevcd_cxa_ctl_getbufinfo_ip_t))
572                     {
573                         ps_op->s_ivd_ctl_getbufinfo_op_t.u4_error_code |= 1
574                                         << IVD_UNSUPPORTEDPARAM;
575                         ps_op->s_ivd_ctl_getbufinfo_op_t.u4_error_code |=
576                                         IVD_IP_API_STRUCT_SIZE_INCORRECT;
577                         return IV_FAIL;
578                     }
579                     if(ps_op->s_ivd_ctl_getbufinfo_op_t.u4_size
580                                     != sizeof(ihevcd_cxa_ctl_getbufinfo_op_t))
581                     {
582                         ps_op->s_ivd_ctl_getbufinfo_op_t.u4_error_code |= 1
583                                         << IVD_UNSUPPORTEDPARAM;
584                         ps_op->s_ivd_ctl_getbufinfo_op_t.u4_error_code |=
585                                         IVD_OP_API_STRUCT_SIZE_INCORRECT;
586                         return IV_FAIL;
587                     }
588                 }
589                     break;
590 
591                 case IVD_CMD_CTL_GETVERSION:
592                 {
593                     ihevcd_cxa_ctl_getversioninfo_ip_t *ps_ip;
594                     ihevcd_cxa_ctl_getversioninfo_op_t *ps_op;
595                     ps_ip = (ihevcd_cxa_ctl_getversioninfo_ip_t *)pv_api_ip;
596                     ps_op = (ihevcd_cxa_ctl_getversioninfo_op_t *)pv_api_op;
597                     if(ps_ip->s_ivd_ctl_getversioninfo_ip_t.u4_size
598                                     != sizeof(ihevcd_cxa_ctl_getversioninfo_ip_t))
599                     {
600                         ps_op->s_ivd_ctl_getversioninfo_op_t.u4_error_code |= 1
601                                         << IVD_UNSUPPORTEDPARAM;
602                         ps_op->s_ivd_ctl_getversioninfo_op_t.u4_error_code |=
603                                         IVD_IP_API_STRUCT_SIZE_INCORRECT;
604                         return IV_FAIL;
605                     }
606                     if(ps_op->s_ivd_ctl_getversioninfo_op_t.u4_size
607                                     != sizeof(ihevcd_cxa_ctl_getversioninfo_op_t))
608                     {
609                         ps_op->s_ivd_ctl_getversioninfo_op_t.u4_error_code |= 1
610                                         << IVD_UNSUPPORTEDPARAM;
611                         ps_op->s_ivd_ctl_getversioninfo_op_t.u4_error_code |=
612                                         IVD_OP_API_STRUCT_SIZE_INCORRECT;
613                         return IV_FAIL;
614                     }
615                 }
616                     break;
617 
618                 case IVD_CMD_CTL_FLUSH:
619                 {
620                     ihevcd_cxa_ctl_flush_ip_t *ps_ip;
621                     ihevcd_cxa_ctl_flush_op_t *ps_op;
622                     ps_ip = (ihevcd_cxa_ctl_flush_ip_t *)pv_api_ip;
623                     ps_op = (ihevcd_cxa_ctl_flush_op_t *)pv_api_op;
624                     if(ps_ip->s_ivd_ctl_flush_ip_t.u4_size
625                                     != sizeof(ihevcd_cxa_ctl_flush_ip_t))
626                     {
627                         ps_op->s_ivd_ctl_flush_op_t.u4_error_code |= 1
628                                         << IVD_UNSUPPORTEDPARAM;
629                         ps_op->s_ivd_ctl_flush_op_t.u4_error_code |=
630                                         IVD_IP_API_STRUCT_SIZE_INCORRECT;
631                         return IV_FAIL;
632                     }
633                     if(ps_op->s_ivd_ctl_flush_op_t.u4_size
634                                     != sizeof(ihevcd_cxa_ctl_flush_op_t))
635                     {
636                         ps_op->s_ivd_ctl_flush_op_t.u4_error_code |= 1
637                                         << IVD_UNSUPPORTEDPARAM;
638                         ps_op->s_ivd_ctl_flush_op_t.u4_error_code |=
639                                         IVD_OP_API_STRUCT_SIZE_INCORRECT;
640                         return IV_FAIL;
641                     }
642                 }
643                     break;
644 
645                 case IVD_CMD_CTL_RESET:
646                 {
647                     ihevcd_cxa_ctl_reset_ip_t *ps_ip;
648                     ihevcd_cxa_ctl_reset_op_t *ps_op;
649                     ps_ip = (ihevcd_cxa_ctl_reset_ip_t *)pv_api_ip;
650                     ps_op = (ihevcd_cxa_ctl_reset_op_t *)pv_api_op;
651                     if(ps_ip->s_ivd_ctl_reset_ip_t.u4_size
652                                     != sizeof(ihevcd_cxa_ctl_reset_ip_t))
653                     {
654                         ps_op->s_ivd_ctl_reset_op_t.u4_error_code |= 1
655                                         << IVD_UNSUPPORTEDPARAM;
656                         ps_op->s_ivd_ctl_reset_op_t.u4_error_code |=
657                                         IVD_IP_API_STRUCT_SIZE_INCORRECT;
658                         return IV_FAIL;
659                     }
660                     if(ps_op->s_ivd_ctl_reset_op_t.u4_size
661                                     != sizeof(ihevcd_cxa_ctl_reset_op_t))
662                     {
663                         ps_op->s_ivd_ctl_reset_op_t.u4_error_code |= 1
664                                         << IVD_UNSUPPORTEDPARAM;
665                         ps_op->s_ivd_ctl_reset_op_t.u4_error_code |=
666                                         IVD_OP_API_STRUCT_SIZE_INCORRECT;
667                         return IV_FAIL;
668                     }
669                 }
670                     break;
671                 case IHEVCD_CXA_CMD_CTL_DEGRADE:
672                 {
673                     ihevcd_cxa_ctl_degrade_ip_t *ps_ip;
674                     ihevcd_cxa_ctl_degrade_op_t *ps_op;
675 
676                     ps_ip = (ihevcd_cxa_ctl_degrade_ip_t *)pv_api_ip;
677                     ps_op = (ihevcd_cxa_ctl_degrade_op_t *)pv_api_op;
678 
679                     if(ps_ip->u4_size
680                                     != sizeof(ihevcd_cxa_ctl_degrade_ip_t))
681                     {
682                         ps_op->u4_error_code |= 1 << IVD_UNSUPPORTEDPARAM;
683                         ps_op->u4_error_code |=
684                                         IVD_IP_API_STRUCT_SIZE_INCORRECT;
685                         return IV_FAIL;
686                     }
687 
688                     if(ps_op->u4_size
689                                     != sizeof(ihevcd_cxa_ctl_degrade_op_t))
690                     {
691                         ps_op->u4_error_code |= 1 << IVD_UNSUPPORTEDPARAM;
692                         ps_op->u4_error_code |=
693                                         IVD_OP_API_STRUCT_SIZE_INCORRECT;
694                         return IV_FAIL;
695                     }
696 
697                     if((ps_ip->i4_degrade_pics < 0) ||
698                        (ps_ip->i4_degrade_pics > 4) ||
699                        (ps_ip->i4_nondegrade_interval < 0) ||
700                        (ps_ip->i4_degrade_type < 0) ||
701                        (ps_ip->i4_degrade_type > 15))
702                     {
703                         ps_op->u4_error_code |= 1 << IVD_UNSUPPORTEDPARAM;
704                         return IV_FAIL;
705                     }
706 
707                     break;
708                 }
709 
710                 case IHEVCD_CXA_CMD_CTL_GET_BUFFER_DIMENSIONS:
711                 {
712                     ihevcd_cxa_ctl_get_frame_dimensions_ip_t *ps_ip;
713                     ihevcd_cxa_ctl_get_frame_dimensions_op_t *ps_op;
714 
715                     ps_ip =
716                                     (ihevcd_cxa_ctl_get_frame_dimensions_ip_t *)pv_api_ip;
717                     ps_op =
718                                     (ihevcd_cxa_ctl_get_frame_dimensions_op_t *)pv_api_op;
719 
720                     if(ps_ip->u4_size
721                                     != sizeof(ihevcd_cxa_ctl_get_frame_dimensions_ip_t))
722                     {
723                         ps_op->u4_error_code |= 1 << IVD_UNSUPPORTEDPARAM;
724                         ps_op->u4_error_code |=
725                                         IVD_IP_API_STRUCT_SIZE_INCORRECT;
726                         return IV_FAIL;
727                     }
728 
729                     if(ps_op->u4_size
730                                     != sizeof(ihevcd_cxa_ctl_get_frame_dimensions_op_t))
731                     {
732                         ps_op->u4_error_code |= 1 << IVD_UNSUPPORTEDPARAM;
733                         ps_op->u4_error_code |=
734                                         IVD_OP_API_STRUCT_SIZE_INCORRECT;
735                         return IV_FAIL;
736                     }
737 
738                     break;
739                 }
740 
741                 case IHEVCD_CXA_CMD_CTL_GET_VUI_PARAMS:
742                 {
743                     ihevcd_cxa_ctl_get_vui_params_ip_t *ps_ip;
744                     ihevcd_cxa_ctl_get_vui_params_op_t *ps_op;
745 
746                     ps_ip =
747                                     (ihevcd_cxa_ctl_get_vui_params_ip_t *)pv_api_ip;
748                     ps_op =
749                                     (ihevcd_cxa_ctl_get_vui_params_op_t *)pv_api_op;
750 
751                     if(ps_ip->u4_size
752                                     != sizeof(ihevcd_cxa_ctl_get_vui_params_ip_t))
753                     {
754                         ps_op->u4_error_code |= 1 << IVD_UNSUPPORTEDPARAM;
755                         ps_op->u4_error_code |=
756                                         IVD_IP_API_STRUCT_SIZE_INCORRECT;
757                         return IV_FAIL;
758                     }
759 
760                     if(ps_op->u4_size
761                                     != sizeof(ihevcd_cxa_ctl_get_vui_params_op_t))
762                     {
763                         ps_op->u4_error_code |= 1 << IVD_UNSUPPORTEDPARAM;
764                         ps_op->u4_error_code |=
765                                         IVD_OP_API_STRUCT_SIZE_INCORRECT;
766                         return IV_FAIL;
767                     }
768 
769                     break;
770                 }
771 #ifndef DISABLE_SEI
772                 case IHEVCD_CXA_CMD_CTL_GET_SEI_MASTERING_PARAMS:
773                 {
774                     ihevcd_cxa_ctl_get_sei_mastering_params_ip_t *ps_ip;
775                     ihevcd_cxa_ctl_get_sei_mastering_params_op_t *ps_op;
776 
777                     ps_ip = (ihevcd_cxa_ctl_get_sei_mastering_params_ip_t *)pv_api_ip;
778                     ps_op = (ihevcd_cxa_ctl_get_sei_mastering_params_op_t *)pv_api_op;
779 
780                     if(ps_ip->u4_size
781                                     != sizeof(ihevcd_cxa_ctl_get_sei_mastering_params_ip_t))
782                     {
783                         ps_op->u4_error_code |= 1 << IVD_UNSUPPORTEDPARAM;
784                         ps_op->u4_error_code |=
785                                         IVD_IP_API_STRUCT_SIZE_INCORRECT;
786                         return IV_FAIL;
787                     }
788 
789                     if(ps_op->u4_size
790                                     != sizeof(ihevcd_cxa_ctl_get_sei_mastering_params_op_t))
791                     {
792                         ps_op->u4_error_code |= 1 << IVD_UNSUPPORTEDPARAM;
793                         ps_op->u4_error_code |=
794                                         IVD_OP_API_STRUCT_SIZE_INCORRECT;
795                         return IV_FAIL;
796                     }
797 
798                     break;
799                 }
800 #endif
801                 case IHEVCD_CXA_CMD_CTL_SET_NUM_CORES:
802                 {
803                     ihevcd_cxa_ctl_set_num_cores_ip_t *ps_ip;
804                     ihevcd_cxa_ctl_set_num_cores_op_t *ps_op;
805 
806                     ps_ip = (ihevcd_cxa_ctl_set_num_cores_ip_t *)pv_api_ip;
807                     ps_op = (ihevcd_cxa_ctl_set_num_cores_op_t *)pv_api_op;
808 
809                     if(ps_ip->u4_size
810                                     != sizeof(ihevcd_cxa_ctl_set_num_cores_ip_t))
811                     {
812                         ps_op->u4_error_code |= 1 << IVD_UNSUPPORTEDPARAM;
813                         ps_op->u4_error_code |=
814                                         IVD_IP_API_STRUCT_SIZE_INCORRECT;
815                         return IV_FAIL;
816                     }
817 
818                     if(ps_op->u4_size
819                                     != sizeof(ihevcd_cxa_ctl_set_num_cores_op_t))
820                     {
821                         ps_op->u4_error_code |= 1 << IVD_UNSUPPORTEDPARAM;
822                         ps_op->u4_error_code |=
823                                         IVD_OP_API_STRUCT_SIZE_INCORRECT;
824                         return IV_FAIL;
825                     }
826 
827                     if((ps_ip->u4_num_cores < 1) || (ps_ip->u4_num_cores > MAX_NUM_CORES))
828                     {
829                         ps_op->u4_error_code |= 1 << IVD_UNSUPPORTEDPARAM;
830                         return IV_FAIL;
831                     }
832                     break;
833                 }
834                 case IHEVCD_CXA_CMD_CTL_SET_PROCESSOR:
835                 {
836                     ihevcd_cxa_ctl_set_processor_ip_t *ps_ip;
837                     ihevcd_cxa_ctl_set_processor_op_t *ps_op;
838 
839                     ps_ip = (ihevcd_cxa_ctl_set_processor_ip_t *)pv_api_ip;
840                     ps_op = (ihevcd_cxa_ctl_set_processor_op_t *)pv_api_op;
841 
842                     if(ps_ip->u4_size
843                                     != sizeof(ihevcd_cxa_ctl_set_processor_ip_t))
844                     {
845                         ps_op->u4_error_code |= 1 << IVD_UNSUPPORTEDPARAM;
846                         ps_op->u4_error_code |=
847                                         IVD_IP_API_STRUCT_SIZE_INCORRECT;
848                         return IV_FAIL;
849                     }
850 
851                     if(ps_op->u4_size
852                                     != sizeof(ihevcd_cxa_ctl_set_processor_op_t))
853                     {
854                         ps_op->u4_error_code |= 1 << IVD_UNSUPPORTEDPARAM;
855                         ps_op->u4_error_code |=
856                                         IVD_OP_API_STRUCT_SIZE_INCORRECT;
857                         return IV_FAIL;
858                     }
859 
860                     break;
861                 }
862                 default:
863                     *(pu4_api_op + 1) |= 1 << IVD_UNSUPPORTEDPARAM;
864                     *(pu4_api_op + 1) |= IVD_UNSUPPORTED_API_CMD;
865                     return IV_FAIL;
866             }
867         }
868             break;
869         default:
870             *(pu4_api_op + 1) |= 1 << IVD_UNSUPPORTEDPARAM;
871             *(pu4_api_op + 1) |= IVD_UNSUPPORTED_API_CMD;
872             return IV_FAIL;
873     }
874 
875     return IV_SUCCESS;
876 }
877 
878 
879 /**
880 *******************************************************************************
881 *
882 * @brief
883 *  Sets default dynamic parameters
884 *
885 * @par Description:
886 *  Sets default dynamic parameters. Will be called in ihevcd_init() to ensure
887 * that even if set_params is not called, codec  continues to work
888 *
889 * @param[in] ps_codec_obj
890 *  Pointer to codec object at API level
891 *
892 * @param[in] pv_api_ip
893 *  Pointer to input argument structure
894 *
895 * @param[out] pv_api_op
896 *  Pointer to output argument structure
897 *
898 * @returns  Status
899 *
900 * @remarks
901 *
902 *
903 *******************************************************************************
904 */
ihevcd_set_default_params(codec_t * ps_codec)905 WORD32 ihevcd_set_default_params(codec_t *ps_codec)
906 {
907 
908     WORD32 ret = IV_SUCCESS;
909 
910     ps_codec->e_pic_skip_mode = IVD_SKIP_NONE;
911     ps_codec->i4_strd = 0;
912     ps_codec->i4_disp_strd = 0;
913     ps_codec->i4_header_mode = 0;
914     ps_codec->e_pic_out_order = IVD_DISPLAY_FRAME_OUT;
915     return ret;
916 }
917 
ihevcd_update_function_ptr(codec_t * ps_codec)918 void ihevcd_update_function_ptr(codec_t *ps_codec)
919 {
920 
921     /* Init inter pred function array */
922     ps_codec->apf_inter_pred[0] = NULL;
923     ps_codec->apf_inter_pred[1] = (pf_inter_pred)ps_codec->s_func_selector.ihevc_inter_pred_luma_copy_fptr;
924     ps_codec->apf_inter_pred[2] = (pf_inter_pred)ps_codec->s_func_selector.ihevc_inter_pred_luma_vert_fptr;
925     ps_codec->apf_inter_pred[3] = (pf_inter_pred)ps_codec->s_func_selector.ihevc_inter_pred_luma_horz_fptr;
926     ps_codec->apf_inter_pred[4] = (pf_inter_pred)ps_codec->s_func_selector.ihevc_inter_pred_luma_horz_w16out_fptr;
927     ps_codec->apf_inter_pred[5] = (pf_inter_pred)ps_codec->s_func_selector.ihevc_inter_pred_luma_copy_w16out_fptr;
928     ps_codec->apf_inter_pred[6] = (pf_inter_pred)ps_codec->s_func_selector.ihevc_inter_pred_luma_vert_w16out_fptr;
929     ps_codec->apf_inter_pred[7] = (pf_inter_pred)ps_codec->s_func_selector.ihevc_inter_pred_luma_horz_w16out_fptr;
930     ps_codec->apf_inter_pred[8] = (pf_inter_pred)ps_codec->s_func_selector.ihevc_inter_pred_luma_horz_w16out_fptr;
931     ps_codec->apf_inter_pred[9] = (pf_inter_pred)ps_codec->s_func_selector.ihevc_inter_pred_luma_vert_w16inp_fptr;
932     ps_codec->apf_inter_pred[10] = (pf_inter_pred)ps_codec->s_func_selector.ihevc_inter_pred_luma_vert_w16inp_w16out_fptr;
933     ps_codec->apf_inter_pred[11] = NULL;
934     ps_codec->apf_inter_pred[12] = (pf_inter_pred)ps_codec->s_func_selector.ihevc_inter_pred_chroma_copy_fptr;
935     ps_codec->apf_inter_pred[13] = (pf_inter_pred)ps_codec->s_func_selector.ihevc_inter_pred_chroma_vert_fptr;
936     ps_codec->apf_inter_pred[14] = (pf_inter_pred)ps_codec->s_func_selector.ihevc_inter_pred_chroma_horz_fptr;
937     ps_codec->apf_inter_pred[15] = (pf_inter_pred)ps_codec->s_func_selector.ihevc_inter_pred_chroma_horz_w16out_fptr;
938     ps_codec->apf_inter_pred[16] = (pf_inter_pred)ps_codec->s_func_selector.ihevc_inter_pred_chroma_copy_w16out_fptr;
939     ps_codec->apf_inter_pred[17] = (pf_inter_pred)ps_codec->s_func_selector.ihevc_inter_pred_chroma_vert_w16out_fptr;
940     ps_codec->apf_inter_pred[18] = (pf_inter_pred)ps_codec->s_func_selector.ihevc_inter_pred_chroma_horz_w16out_fptr;
941     ps_codec->apf_inter_pred[19] = (pf_inter_pred)ps_codec->s_func_selector.ihevc_inter_pred_chroma_horz_w16out_fptr;
942     ps_codec->apf_inter_pred[20] = (pf_inter_pred)ps_codec->s_func_selector.ihevc_inter_pred_chroma_vert_w16inp_fptr;
943     ps_codec->apf_inter_pred[21] = (pf_inter_pred)ps_codec->s_func_selector.ihevc_inter_pred_chroma_vert_w16inp_w16out_fptr;
944 
945     /* Init intra pred function array */
946     ps_codec->apf_intra_pred_luma[0] = (pf_intra_pred)NULL;
947     ps_codec->apf_intra_pred_luma[1] = (pf_intra_pred)ps_codec->s_func_selector.ihevc_intra_pred_luma_planar_fptr;
948     ps_codec->apf_intra_pred_luma[2] = (pf_intra_pred)ps_codec->s_func_selector.ihevc_intra_pred_luma_dc_fptr;
949     ps_codec->apf_intra_pred_luma[3] = (pf_intra_pred)ps_codec->s_func_selector.ihevc_intra_pred_luma_mode2_fptr;
950     ps_codec->apf_intra_pred_luma[4] = (pf_intra_pred)ps_codec->s_func_selector.ihevc_intra_pred_luma_mode_3_to_9_fptr;
951     ps_codec->apf_intra_pred_luma[5] = (pf_intra_pred)ps_codec->s_func_selector.ihevc_intra_pred_luma_horz_fptr;
952     ps_codec->apf_intra_pred_luma[6] = (pf_intra_pred)ps_codec->s_func_selector.ihevc_intra_pred_luma_mode_11_to_17_fptr;
953     ps_codec->apf_intra_pred_luma[7] = (pf_intra_pred)ps_codec->s_func_selector.ihevc_intra_pred_luma_mode_18_34_fptr;
954     ps_codec->apf_intra_pred_luma[8] = (pf_intra_pred)ps_codec->s_func_selector.ihevc_intra_pred_luma_mode_19_to_25_fptr;
955     ps_codec->apf_intra_pred_luma[9] = (pf_intra_pred)ps_codec->s_func_selector.ihevc_intra_pred_luma_ver_fptr;
956     ps_codec->apf_intra_pred_luma[10] =  (pf_intra_pred)ps_codec->s_func_selector.ihevc_intra_pred_luma_mode_27_to_33_fptr;
957 
958     ps_codec->apf_intra_pred_chroma[0] = (pf_intra_pred)NULL;
959     ps_codec->apf_intra_pred_chroma[1] = (pf_intra_pred)ps_codec->s_func_selector.ihevc_intra_pred_chroma_planar_fptr;
960     ps_codec->apf_intra_pred_chroma[2] = (pf_intra_pred)ps_codec->s_func_selector.ihevc_intra_pred_chroma_dc_fptr;
961     ps_codec->apf_intra_pred_chroma[3] = (pf_intra_pred)ps_codec->s_func_selector.ihevc_intra_pred_chroma_mode2_fptr;
962     ps_codec->apf_intra_pred_chroma[4] = (pf_intra_pred)ps_codec->s_func_selector.ihevc_intra_pred_chroma_mode_3_to_9_fptr;
963     ps_codec->apf_intra_pred_chroma[5] = (pf_intra_pred)ps_codec->s_func_selector.ihevc_intra_pred_chroma_horz_fptr;
964     ps_codec->apf_intra_pred_chroma[6] = (pf_intra_pred)ps_codec->s_func_selector.ihevc_intra_pred_chroma_mode_11_to_17_fptr;
965     ps_codec->apf_intra_pred_chroma[7] = (pf_intra_pred)ps_codec->s_func_selector.ihevc_intra_pred_chroma_mode_18_34_fptr;
966     ps_codec->apf_intra_pred_chroma[8] = (pf_intra_pred)ps_codec->s_func_selector.ihevc_intra_pred_chroma_mode_19_to_25_fptr;
967     ps_codec->apf_intra_pred_chroma[9] =  (pf_intra_pred)ps_codec->s_func_selector.ihevc_intra_pred_chroma_ver_fptr;
968     ps_codec->apf_intra_pred_chroma[10] = (pf_intra_pred)ps_codec->s_func_selector.ihevc_intra_pred_chroma_mode_27_to_33_fptr;
969 
970     /* Init itrans_recon function array */
971     ps_codec->apf_itrans_recon[0] = (pf_itrans_recon)ps_codec->s_func_selector.ihevc_itrans_recon_4x4_ttype1_fptr;
972     ps_codec->apf_itrans_recon[1] = (pf_itrans_recon)ps_codec->s_func_selector.ihevc_itrans_recon_4x4_fptr;
973     ps_codec->apf_itrans_recon[2] = (pf_itrans_recon)ps_codec->s_func_selector.ihevc_itrans_recon_8x8_fptr;
974     ps_codec->apf_itrans_recon[3] = (pf_itrans_recon)ps_codec->s_func_selector.ihevc_itrans_recon_16x16_fptr;
975     ps_codec->apf_itrans_recon[4] = (pf_itrans_recon)ps_codec->s_func_selector.ihevc_itrans_recon_32x32_fptr;
976     ps_codec->apf_itrans_recon[5] = (pf_itrans_recon)ps_codec->s_func_selector.ihevc_chroma_itrans_recon_4x4_fptr;
977     ps_codec->apf_itrans_recon[6] = (pf_itrans_recon)ps_codec->s_func_selector.ihevc_chroma_itrans_recon_8x8_fptr;
978     ps_codec->apf_itrans_recon[7] = (pf_itrans_recon)ps_codec->s_func_selector.ihevc_chroma_itrans_recon_16x16_fptr;
979 
980     /* Init recon function array */
981     ps_codec->apf_recon[0] = (pf_recon)ps_codec->s_func_selector.ihevc_recon_4x4_ttype1_fptr;
982     ps_codec->apf_recon[1] = (pf_recon)ps_codec->s_func_selector.ihevc_recon_4x4_fptr;
983     ps_codec->apf_recon[2] = (pf_recon)ps_codec->s_func_selector.ihevc_recon_8x8_fptr;
984     ps_codec->apf_recon[3] = (pf_recon)ps_codec->s_func_selector.ihevc_recon_16x16_fptr;
985     ps_codec->apf_recon[4] = (pf_recon)ps_codec->s_func_selector.ihevc_recon_32x32_fptr;
986     ps_codec->apf_recon[5] = (pf_recon)ps_codec->s_func_selector.ihevc_chroma_recon_4x4_fptr;
987     ps_codec->apf_recon[6] = (pf_recon)ps_codec->s_func_selector.ihevc_chroma_recon_8x8_fptr;
988     ps_codec->apf_recon[7] = (pf_recon)ps_codec->s_func_selector.ihevc_chroma_recon_16x16_fptr;
989 
990     /* Init itrans_recon_dc function array */
991     ps_codec->apf_itrans_recon_dc[0] = (pf_itrans_recon_dc)ps_codec->s_func_selector.ihevcd_itrans_recon_dc_luma_fptr;
992     ps_codec->apf_itrans_recon_dc[1] = (pf_itrans_recon_dc)ps_codec->s_func_selector.ihevcd_itrans_recon_dc_chroma_fptr;
993 
994     /* Init sao function array */
995     ps_codec->apf_sao_luma[0] = (pf_sao_luma)ps_codec->s_func_selector.ihevc_sao_edge_offset_class0_fptr;
996     ps_codec->apf_sao_luma[1] = (pf_sao_luma)ps_codec->s_func_selector.ihevc_sao_edge_offset_class1_fptr;
997     ps_codec->apf_sao_luma[2] = (pf_sao_luma)ps_codec->s_func_selector.ihevc_sao_edge_offset_class2_fptr;
998     ps_codec->apf_sao_luma[3] = (pf_sao_luma)ps_codec->s_func_selector.ihevc_sao_edge_offset_class3_fptr;
999 
1000     ps_codec->apf_sao_chroma[0] = (pf_sao_chroma)ps_codec->s_func_selector.ihevc_sao_edge_offset_class0_chroma_fptr;
1001     ps_codec->apf_sao_chroma[1] = (pf_sao_chroma)ps_codec->s_func_selector.ihevc_sao_edge_offset_class1_chroma_fptr;
1002     ps_codec->apf_sao_chroma[2] = (pf_sao_chroma)ps_codec->s_func_selector.ihevc_sao_edge_offset_class2_chroma_fptr;
1003     ps_codec->apf_sao_chroma[3] = (pf_sao_chroma)ps_codec->s_func_selector.ihevc_sao_edge_offset_class3_chroma_fptr;
1004 }
1005 /**
1006 *******************************************************************************
1007 *
1008 * @brief
1009 *  Initialize the context. This will be called by  create and during
1010 * reset
1011 *
1012 * @par Description:
1013 *  Initializes the context
1014 *
1015 * @param[in] ps_codec
1016 *  Codec context pointer
1017 *
1018 * @returns  Status
1019 *
1020 * @remarks
1021 *
1022 *
1023 *******************************************************************************
1024 */
ihevcd_init(codec_t * ps_codec)1025 WORD32 ihevcd_init(codec_t *ps_codec)
1026 {
1027     WORD32 status = IV_SUCCESS;
1028     WORD32 i;
1029 
1030     /* Free any dynamic buffers that are allocated */
1031     ihevcd_free_dynamic_bufs(ps_codec);
1032 
1033     ps_codec->u4_allocate_dynamic_done = 0;
1034     ps_codec->i4_num_disp_bufs = 1;
1035     ps_codec->i4_flush_mode = 0;
1036 
1037     ps_codec->i4_ht = ps_codec->i4_disp_ht = 0;
1038     ps_codec->i4_wd = ps_codec->i4_disp_wd = 0;
1039     ps_codec->i4_strd = 0;
1040     ps_codec->i4_disp_strd = 0;
1041     ps_codec->i4_num_cores = 1;
1042 
1043     ps_codec->u4_pic_cnt = 0;
1044     ps_codec->u4_disp_cnt = 0;
1045 
1046     ps_codec->i4_header_mode = 0;
1047     ps_codec->i4_header_in_slice_mode = 0;
1048     ps_codec->i4_sps_done = 0;
1049     ps_codec->i4_pps_done = 0;
1050     ps_codec->i4_init_done   = 1;
1051     ps_codec->i4_first_pic_done = 0;
1052     ps_codec->s_parse.i4_first_pic_init = 0;
1053     ps_codec->i4_error_code = 0;
1054     ps_codec->i4_reset_flag = 0;
1055     ps_codec->i4_cra_as_first_pic = 1;
1056     ps_codec->i4_rasl_output_flag = 0;
1057 
1058     ps_codec->i4_prev_poc_msb = 0;
1059     ps_codec->i4_prev_poc_lsb = -1;
1060     ps_codec->i4_max_prev_poc_lsb = -1;
1061     ps_codec->s_parse.i4_abs_pic_order_cnt = -1;
1062 
1063     /* Set ref chroma format by default to 420SP UV interleaved */
1064     ps_codec->e_ref_chroma_fmt = IV_YUV_420SP_UV;
1065 
1066     /* If the codec is in shared mode and required format is 420 SP VU interleaved then change
1067      * reference buffers chroma format
1068      */
1069     if(IV_YUV_420SP_VU == ps_codec->e_chroma_fmt)
1070     {
1071         ps_codec->e_ref_chroma_fmt = IV_YUV_420SP_VU;
1072     }
1073 
1074 
1075 
1076     ps_codec->i4_disable_deblk_pic = 0;
1077 
1078     ps_codec->i4_degrade_pic_cnt    = 0;
1079     ps_codec->i4_degrade_pics       = 0;
1080     ps_codec->i4_degrade_type       = 0;
1081     ps_codec->i4_disable_sao_pic    = 0;
1082     ps_codec->i4_fullpel_inter_pred = 0;
1083     ps_codec->u4_enable_fmt_conv_ahead = 0;
1084     ps_codec->i4_share_disp_buf_cnt = 0;
1085 
1086     {
1087         sps_t *ps_sps = ps_codec->ps_sps_base;
1088         pps_t *ps_pps = ps_codec->ps_pps_base;
1089 
1090         for(i = 0; i < MAX_SPS_CNT; i++)
1091         {
1092             ps_sps->i1_sps_valid = 0;
1093             ps_sps++;
1094         }
1095 
1096         for(i = 0; i < MAX_PPS_CNT; i++)
1097         {
1098             ps_pps->i1_pps_valid = 0;
1099             ps_pps++;
1100         }
1101     }
1102 
1103     ihevcd_set_default_params(ps_codec);
1104     /* Initialize MV Bank buffer manager */
1105     ihevc_buf_mgr_init((buf_mgr_t *)ps_codec->pv_mv_buf_mgr);
1106 
1107     /* Initialize Picture buffer manager */
1108     ihevc_buf_mgr_init((buf_mgr_t *)ps_codec->pv_pic_buf_mgr);
1109 
1110     ps_codec->ps_pic_buf = (pic_buf_t *)ps_codec->pv_pic_buf_base;
1111 
1112     memset(ps_codec->ps_pic_buf, 0, BUF_MGR_MAX_CNT  * sizeof(pic_buf_t));
1113 
1114 
1115 
1116     /* Initialize display buffer manager */
1117     ihevc_disp_mgr_init((disp_mgr_t *)ps_codec->pv_disp_buf_mgr);
1118 
1119     /* Initialize dpb manager */
1120     ihevc_dpb_mgr_init((dpb_mgr_t *)ps_codec->pv_dpb_mgr);
1121 
1122     ps_codec->e_processor_soc = SOC_GENERIC;
1123     /* The following can be over-ridden using soc parameter as a hack */
1124     ps_codec->u4_nctb = 0x7FFFFFFF;
1125     ihevcd_init_arch(ps_codec);
1126 
1127     ihevcd_init_function_ptr(ps_codec);
1128 
1129     ihevcd_update_function_ptr(ps_codec);
1130 
1131     return status;
1132 }
1133 
1134 /**
1135 *******************************************************************************
1136 *
1137 * @brief
1138 *  Allocate static memory for the codec
1139 *
1140 * @par Description:
1141 *  Allocates static memory for the codec
1142 *
1143 * @param[in] pv_api_ip
1144 *  Pointer to input argument structure
1145 *
1146 * @param[out] pv_api_op
1147 *  Pointer to output argument structure
1148 *
1149 * @returns  Status
1150 *
1151 * @remarks
1152 *
1153 *
1154 *******************************************************************************
1155 */
ihevcd_allocate_static_bufs(iv_obj_t ** pps_codec_obj,ihevcd_cxa_create_ip_t * ps_create_ip,ihevcd_cxa_create_op_t * ps_create_op)1156 WORD32 ihevcd_allocate_static_bufs(iv_obj_t **pps_codec_obj,
1157                                    ihevcd_cxa_create_ip_t *ps_create_ip,
1158                                    ihevcd_cxa_create_op_t *ps_create_op)
1159 {
1160     WORD32 size;
1161     void *pv_buf;
1162     UWORD8 *pu1_buf;
1163     WORD32 i;
1164     codec_t *ps_codec;
1165     IV_API_CALL_STATUS_T status = IV_SUCCESS;
1166     void *(*pf_aligned_alloc)(void *pv_mem_ctxt, WORD32 alignment, WORD32 size);
1167     void (*pf_aligned_free)(void *pv_mem_ctxt, void *pv_buf);
1168     void *pv_mem_ctxt;
1169 
1170     /* Request memory for HEVCD object */
1171     ps_create_op->s_ivd_create_op_t.pv_handle = NULL;
1172 
1173     pf_aligned_alloc = ps_create_ip->s_ivd_create_ip_t.pf_aligned_alloc;
1174     pf_aligned_free = ps_create_ip->s_ivd_create_ip_t.pf_aligned_free;
1175     pv_mem_ctxt  = ps_create_ip->s_ivd_create_ip_t.pv_mem_ctxt;
1176 
1177 
1178     pv_buf = pf_aligned_alloc(pv_mem_ctxt, 128, sizeof(iv_obj_t));
1179     RETURN_IF((NULL == pv_buf), IV_FAIL);
1180     memset(pv_buf, 0, sizeof(iv_obj_t));
1181     *pps_codec_obj = (iv_obj_t *)pv_buf;
1182     ps_create_op->s_ivd_create_op_t.pv_handle = *pps_codec_obj;
1183 
1184 
1185     (*pps_codec_obj)->pv_codec_handle = NULL;
1186     pv_buf = pf_aligned_alloc(pv_mem_ctxt, 128, sizeof(codec_t));
1187     RETURN_IF((NULL == pv_buf), IV_FAIL);
1188     (*pps_codec_obj)->pv_codec_handle = (codec_t *)pv_buf;
1189     ps_codec = (codec_t *)pv_buf;
1190 
1191     memset(ps_codec, 0, sizeof(codec_t));
1192 
1193 #ifndef LOGO_EN
1194     ps_codec->i4_share_disp_buf = ps_create_ip->s_ivd_create_ip_t.u4_share_disp_buf;
1195 #else
1196     ps_codec->i4_share_disp_buf = 0;
1197 #endif
1198 
1199     /* Shared display mode is supported only for 420SP and 420P formats */
1200     if((ps_create_ip->s_ivd_create_ip_t.e_output_format != IV_YUV_420P) &&
1201        (ps_create_ip->s_ivd_create_ip_t.e_output_format != IV_YUV_420SP_UV) &&
1202        (ps_create_ip->s_ivd_create_ip_t.e_output_format != IV_YUV_420SP_VU))
1203     {
1204         ps_codec->i4_share_disp_buf = 0;
1205     }
1206 
1207     if (ps_create_ip->s_ivd_create_ip_t.u4_size == sizeof(ihevcd_cxa_create_ip_t))
1208     {
1209         ps_codec->u1_enable_cu_info = ps_create_ip->u4_enable_frame_info;
1210     }
1211 
1212     ps_codec->e_chroma_fmt = ps_create_ip->s_ivd_create_ip_t.e_output_format;
1213 
1214     ps_codec->pf_aligned_alloc = pf_aligned_alloc;
1215     ps_codec->pf_aligned_free = pf_aligned_free;
1216     ps_codec->pv_mem_ctxt = pv_mem_ctxt;
1217     ps_codec->i4_threads_active = ps_create_ip->u4_keep_threads_active;
1218 
1219     /* Request memory to hold thread handles for each processing thread */
1220     size = MAX_PROCESS_THREADS * ithread_get_handle_size();
1221     pv_buf = pf_aligned_alloc(pv_mem_ctxt, 128, size);
1222     RETURN_IF((NULL == pv_buf), IV_FAIL);
1223     memset(pv_buf, 0, size);
1224 
1225     for(i = 0; i < MAX_PROCESS_THREADS; i++)
1226     {
1227         WORD32 handle_size = ithread_get_handle_size();
1228         ps_codec->apv_process_thread_handle[i] =
1229                         (UWORD8 *)pv_buf + (i * handle_size);
1230     }
1231 
1232     if(ps_codec->i4_threads_active)
1233     {
1234         /* Request memory to hold mutex (start/done) for each processing thread */
1235         size = 2 * MAX_PROCESS_THREADS * ithread_get_mutex_lock_size();
1236         pv_buf = ps_codec->pf_aligned_alloc(pv_mem_ctxt, 128, size);
1237         RETURN_IF((NULL == pv_buf), IV_FAIL);
1238         memset(pv_buf, 0, size);
1239 
1240         for(i = 0; i < MAX_PROCESS_THREADS; i++)
1241         {
1242             WORD32 ret;
1243             WORD32 mutex_size = ithread_get_mutex_lock_size();
1244             ps_codec->apv_proc_start_mutex[i] =
1245                             (UWORD8 *)pv_buf + (2 * i * mutex_size);
1246             ps_codec->apv_proc_done_mutex[i] =
1247                             (UWORD8 *)pv_buf + ((2 * i + 1) * mutex_size);
1248 
1249             ret = ithread_mutex_init(ps_codec->apv_proc_start_mutex[i]);
1250             RETURN_IF((ret != (IHEVCD_ERROR_T)IHEVCD_SUCCESS), ret);
1251 
1252             ret = ithread_mutex_init(ps_codec->apv_proc_done_mutex[i]);
1253             RETURN_IF((ret != (IHEVCD_ERROR_T)IHEVCD_SUCCESS), ret);
1254         }
1255 
1256         size = 2 * MAX_PROCESS_THREADS * ithread_get_cond_struct_size();
1257         pv_buf = ps_codec->pf_aligned_alloc(pv_mem_ctxt, 128, size);
1258         RETURN_IF((NULL == pv_buf), IV_FAIL);
1259         memset(pv_buf, 0, size);
1260 
1261         for(i = 0; i < MAX_PROCESS_THREADS; i++)
1262         {
1263             WORD32 ret;
1264             WORD32 cond_size = ithread_get_cond_struct_size();
1265             ps_codec->apv_proc_start_condition[i] =
1266                             (UWORD8 *)pv_buf + (2 * i * cond_size);
1267             ps_codec->apv_proc_done_condition[i] =
1268                             (UWORD8 *)pv_buf + ((2 * i + 1) * cond_size);
1269 
1270             ret = ithread_cond_init(ps_codec->apv_proc_start_condition[i]);
1271             RETURN_IF((ret != (IHEVCD_ERROR_T)IHEVCD_SUCCESS), ret);
1272 
1273             ret = ithread_cond_init(ps_codec->apv_proc_done_condition[i]);
1274             RETURN_IF((ret != (IHEVCD_ERROR_T)IHEVCD_SUCCESS), ret);
1275         }
1276     }
1277 
1278     /* Request memory for static bitstream buffer which holds bitstream after emulation prevention */
1279     size = MIN_BITSBUF_SIZE;
1280     pv_buf = pf_aligned_alloc(pv_mem_ctxt, 128, size + 16); //Alloc extra for parse optimization
1281     RETURN_IF((NULL == pv_buf), IV_FAIL);
1282     memset(pv_buf, 0, size + 16);
1283     ps_codec->pu1_bitsbuf_static = pv_buf;
1284     ps_codec->u4_bitsbuf_size_static = size;
1285 
1286     /* size for holding display manager context */
1287     size = sizeof(buf_mgr_t);
1288     pv_buf = pf_aligned_alloc(pv_mem_ctxt, 128, size);
1289     RETURN_IF((NULL == pv_buf), IV_FAIL);
1290     memset(pv_buf, 0, size);
1291     ps_codec->pv_disp_buf_mgr = pv_buf;
1292 
1293     /* size for holding dpb manager context */
1294     size = sizeof(dpb_mgr_t);
1295     pv_buf = pf_aligned_alloc(pv_mem_ctxt, 128, size);
1296     RETURN_IF((NULL == pv_buf), IV_FAIL);
1297     memset(pv_buf, 0, size);
1298     ps_codec->pv_dpb_mgr = pv_buf;
1299 
1300     /* size for holding buffer manager context */
1301     size = sizeof(buf_mgr_t);
1302     pv_buf = pf_aligned_alloc(pv_mem_ctxt, 128, size);
1303     RETURN_IF((NULL == pv_buf), IV_FAIL);
1304     memset(pv_buf, 0, size);
1305     ps_codec->pv_pic_buf_mgr = pv_buf;
1306 
1307     /* size for holding mv buffer manager context */
1308     size = sizeof(buf_mgr_t);
1309     pv_buf = pf_aligned_alloc(pv_mem_ctxt, 128, size);
1310     RETURN_IF((NULL == pv_buf), IV_FAIL);
1311     memset(pv_buf, 0, size);
1312     ps_codec->pv_mv_buf_mgr = pv_buf;
1313 
1314     size = MAX_VPS_CNT * sizeof(vps_t);
1315     pv_buf = pf_aligned_alloc(pv_mem_ctxt, 128, size);
1316     RETURN_IF((NULL == pv_buf), IV_FAIL);
1317     memset(pv_buf, 0, size);
1318     ps_codec->ps_vps_base = pv_buf;
1319     ps_codec->s_parse.ps_vps_base = ps_codec->ps_vps_base;
1320 
1321     size = MAX_SPS_CNT * sizeof(sps_t);
1322     pv_buf = pf_aligned_alloc(pv_mem_ctxt, 128, size);
1323     RETURN_IF((NULL == pv_buf), IV_FAIL);
1324     memset(pv_buf, 0, size);
1325     ps_codec->ps_sps_base = pv_buf;
1326     ps_codec->s_parse.ps_sps_base = ps_codec->ps_sps_base;
1327 
1328     size = MAX_PPS_CNT * sizeof(pps_t);
1329     pv_buf = pf_aligned_alloc(pv_mem_ctxt, 128, size);
1330     RETURN_IF((NULL == pv_buf), IV_FAIL);
1331     memset(pv_buf, 0, size);
1332     ps_codec->ps_pps_base = pv_buf;
1333     ps_codec->s_parse.ps_pps_base = ps_codec->ps_pps_base;
1334 
1335     size = MAX_SLICE_HDR_CNT * sizeof(slice_header_t);
1336     pv_buf = pf_aligned_alloc(pv_mem_ctxt, 128, size);
1337     RETURN_IF((NULL == pv_buf), IV_FAIL);
1338     memset(pv_buf, 0, size);
1339     ps_codec->ps_slice_hdr_base = (slice_header_t *)pv_buf;
1340     ps_codec->s_parse.ps_slice_hdr_base = ps_codec->ps_slice_hdr_base;
1341 
1342 
1343     SCALING_MAT_SIZE(size)
1344     size = (MAX_SPS_CNT + MAX_PPS_CNT) * size * sizeof(WORD16);
1345     pv_buf = pf_aligned_alloc(pv_mem_ctxt, 128, size);
1346     RETURN_IF((NULL == pv_buf), IV_FAIL);
1347     memset(pv_buf, 0, size);
1348     ps_codec->pi2_scaling_mat = (WORD16 *)pv_buf;
1349 
1350 
1351     /* Size for holding pic_buf_t for each reference picture
1352      * Since this is only a structure allocation and not actual buffer allocation,
1353      * it is allocated for BUF_MGR_MAX_CNT entries
1354      */
1355     size = BUF_MGR_MAX_CNT * sizeof(pic_buf_t);
1356     pv_buf = pf_aligned_alloc(pv_mem_ctxt, 128, size);
1357     RETURN_IF((NULL == pv_buf), IV_FAIL);
1358     memset(pv_buf, 0, size);
1359     ps_codec->pv_pic_buf_base = (UWORD8 *)pv_buf;
1360 
1361     /* TO hold scratch buffers needed for each SAO context */
1362     size = 4 * MAX_CTB_SIZE * MAX_CTB_SIZE;
1363 
1364     /* 2 temporary buffers*/
1365     size *= 2;
1366     size *= MAX_PROCESS_THREADS;
1367 
1368     pu1_buf = pf_aligned_alloc(pv_mem_ctxt, 128, size);
1369     RETURN_IF((NULL == pu1_buf), IV_FAIL);
1370     memset(pu1_buf, 0, size);
1371 
1372     for(i = 0; i < MAX_PROCESS_THREADS; i++)
1373     {
1374         ps_codec->as_process[i].s_sao_ctxt.pu1_tmp_buf_luma = (UWORD8 *)pu1_buf;
1375         pu1_buf += 4 * MAX_CTB_SIZE * MAX_CTB_SIZE * sizeof(UWORD8);
1376 
1377         ps_codec->as_process[i].s_sao_ctxt.pu1_tmp_buf_chroma = (UWORD8 *)pu1_buf;
1378         pu1_buf += 4 * MAX_CTB_SIZE * MAX_CTB_SIZE * sizeof(UWORD8);
1379     }
1380 
1381     /* Allocate intra pred modes buffer */
1382     /* 8 bits per 4x4 */
1383     /* 16 bytes each for top and left 64 pixels and 16 bytes for default mode */
1384     size =  3 * 16 * sizeof(UWORD8);
1385     pu1_buf = pf_aligned_alloc(pv_mem_ctxt, 128, size);
1386     RETURN_IF((NULL == pu1_buf), IV_FAIL);
1387     memset(pu1_buf, 0, size);
1388     ps_codec->s_parse.pu1_luma_intra_pred_mode_left = pu1_buf;
1389     ps_codec->s_parse.pu1_luma_intra_pred_mode_top  = pu1_buf + 16;
1390 
1391     {
1392         WORD32 inter_pred_tmp_buf_size, ntaps_luma;
1393         WORD32 pic_pu_idx_map_size;
1394 
1395         /* Max inter pred size */
1396         ntaps_luma = 8;
1397         inter_pred_tmp_buf_size = sizeof(WORD16) * (MAX_CTB_SIZE + ntaps_luma) * MAX_CTB_SIZE;
1398 
1399         inter_pred_tmp_buf_size = ALIGN64(inter_pred_tmp_buf_size);
1400 
1401         /* To hold pu_index w.r.t. frame level pu_t array for a CTB */
1402         pic_pu_idx_map_size = sizeof(WORD32) * (18 * 18);
1403         pic_pu_idx_map_size = ALIGN64(pic_pu_idx_map_size);
1404 
1405         size =  inter_pred_tmp_buf_size * 2;
1406         size += pic_pu_idx_map_size;
1407         size *= MAX_PROCESS_THREADS;
1408 
1409         pu1_buf = ps_codec->pf_aligned_alloc(pv_mem_ctxt, 128, size);
1410         RETURN_IF((NULL == pu1_buf), IV_FAIL);
1411         memset(pu1_buf, 0, size);
1412 
1413         for(i = 0; i < MAX_PROCESS_THREADS; i++)
1414         {
1415             ps_codec->as_process[i].pi2_inter_pred_tmp_buf1 = (WORD16 *)pu1_buf;
1416             pu1_buf += inter_pred_tmp_buf_size;
1417 
1418             ps_codec->as_process[i].pi2_inter_pred_tmp_buf2 = (WORD16 *)pu1_buf;
1419             pu1_buf += inter_pred_tmp_buf_size;
1420 
1421             /* Inverse transform intermediate and inverse scan output buffers reuse inter pred scratch buffers */
1422             ps_codec->as_process[i].pi2_itrans_intrmd_buf =
1423                             ps_codec->as_process[i].pi2_inter_pred_tmp_buf2;
1424             ps_codec->as_process[i].pi2_invscan_out =
1425                             ps_codec->as_process[i].pi2_inter_pred_tmp_buf1;
1426 
1427             ps_codec->as_process[i].pu4_pic_pu_idx_map = (UWORD32 *)pu1_buf;
1428             ps_codec->as_process[i].s_bs_ctxt.pu4_pic_pu_idx_map =
1429                             (UWORD32 *)pu1_buf;
1430             pu1_buf += pic_pu_idx_map_size;
1431 
1432             //   ps_codec->as_process[i].pi2_inter_pred_tmp_buf3 = (WORD16 *)pu1_buf;
1433             //   pu1_buf += inter_pred_tmp_buf_size;
1434 
1435             ps_codec->as_process[i].i4_inter_pred_tmp_buf_strd = MAX_CTB_SIZE;
1436 
1437         }
1438     }
1439     /* Initialize pointers in PPS structures */
1440     {
1441         sps_t *ps_sps = ps_codec->ps_sps_base;
1442         pps_t *ps_pps = ps_codec->ps_pps_base;
1443         WORD16 *pi2_scaling_mat =  ps_codec->pi2_scaling_mat;
1444         WORD32 scaling_mat_size;
1445 
1446         SCALING_MAT_SIZE(scaling_mat_size);
1447 
1448         for(i = 0; i < MAX_SPS_CNT; i++)
1449         {
1450             ps_sps->pi2_scaling_mat  = pi2_scaling_mat;
1451             pi2_scaling_mat += scaling_mat_size;
1452             ps_sps++;
1453         }
1454 
1455         for(i = 0; i < MAX_PPS_CNT; i++)
1456         {
1457             ps_pps->pi2_scaling_mat  = pi2_scaling_mat;
1458             pi2_scaling_mat += scaling_mat_size;
1459             ps_pps++;
1460         }
1461     }
1462 
1463     return (status);
1464 }
1465 
ihevcd_join_threads(codec_t * ps_codec)1466 WORD32 ihevcd_join_threads(codec_t *ps_codec)
1467 {
1468     if(ps_codec->i4_threads_active)
1469     {
1470         int i;
1471         /* Wait for threads */
1472         ps_codec->i4_break_threads = 1;
1473 
1474         for(i = 0; i < MAX_PROCESS_THREADS; i++)
1475         {
1476             WORD32 ret;
1477             if(ps_codec->ai4_process_thread_created[i])
1478             {
1479                 ret = ithread_mutex_lock(ps_codec->apv_proc_start_mutex[i]);
1480                 RETURN_IF((ret != (IHEVCD_ERROR_T)IHEVCD_SUCCESS), ret);
1481 
1482                 ps_codec->ai4_process_start[i] = 1;
1483                 ret = ithread_cond_signal(ps_codec->apv_proc_start_condition[i]);
1484                 RETURN_IF((ret != (IHEVCD_ERROR_T)IHEVCD_SUCCESS), ret);
1485 
1486                 ret = ithread_mutex_unlock(ps_codec->apv_proc_start_mutex[i]);
1487                 RETURN_IF((ret != (IHEVCD_ERROR_T)IHEVCD_SUCCESS), ret);
1488 
1489                 ithread_join(ps_codec->apv_process_thread_handle[i], NULL);
1490 
1491                 ps_codec->ai4_process_thread_created[i] = 0;
1492             }
1493         }
1494     }
1495     return IV_SUCCESS;
1496 }
1497 /**
1498 *******************************************************************************
1499 *
1500 * @brief
1501 *  Free static memory for the codec
1502 *
1503 * @par Description:
1504 *  Free static memory for the codec
1505 *
1506 * @param[in] ps_codec
1507 *  Pointer to codec context
1508 *
1509 * @returns  Status
1510 *
1511 * @remarks
1512 *
1513 *
1514 *******************************************************************************
1515 */
ihevcd_free_static_bufs(iv_obj_t * ps_codec_obj)1516 WORD32 ihevcd_free_static_bufs(iv_obj_t *ps_codec_obj)
1517 {
1518     codec_t *ps_codec;
1519 
1520     void (*pf_aligned_free)(void *pv_mem_ctxt, void *pv_buf);
1521     void *pv_mem_ctxt;
1522 
1523     ps_codec = (codec_t *)ps_codec_obj->pv_codec_handle;
1524     pf_aligned_free = ps_codec->pf_aligned_free;
1525     pv_mem_ctxt = ps_codec->pv_mem_ctxt;
1526 
1527     if(ps_codec->i4_threads_active)
1528     {
1529         /* Wait for threads */
1530         ihevcd_join_threads(ps_codec);
1531 
1532         for(int i = 0; i < MAX_PROCESS_THREADS; i++)
1533         {
1534             WORD32 ret;
1535             ret = ithread_cond_destroy(ps_codec->apv_proc_start_condition[i]);
1536             RETURN_IF((ret != (IHEVCD_ERROR_T)IHEVCD_SUCCESS), ret);
1537 
1538             ret = ithread_cond_destroy(ps_codec->apv_proc_done_condition[i]);
1539             RETURN_IF((ret != (IHEVCD_ERROR_T)IHEVCD_SUCCESS), ret);
1540 
1541             ret = ithread_mutex_destroy(ps_codec->apv_proc_start_mutex[i]);
1542             RETURN_IF((ret != (IHEVCD_ERROR_T)IHEVCD_SUCCESS), ret);
1543 
1544             ret = ithread_mutex_destroy(ps_codec->apv_proc_done_mutex[i]);
1545             RETURN_IF((ret != (IHEVCD_ERROR_T)IHEVCD_SUCCESS), ret);
1546         }
1547         ALIGNED_FREE(ps_codec, ps_codec->apv_proc_start_mutex[0]);
1548         ALIGNED_FREE(ps_codec, ps_codec->apv_proc_start_condition[0]);
1549     }
1550 
1551     ALIGNED_FREE(ps_codec, ps_codec->apv_process_thread_handle[0]);
1552     ALIGNED_FREE(ps_codec, ps_codec->pu1_bitsbuf_static);
1553 
1554     ALIGNED_FREE(ps_codec, ps_codec->pv_disp_buf_mgr);
1555     ALIGNED_FREE(ps_codec, ps_codec->pv_dpb_mgr);
1556     ALIGNED_FREE(ps_codec, ps_codec->pv_pic_buf_mgr);
1557     ALIGNED_FREE(ps_codec, ps_codec->pv_mv_buf_mgr);
1558     ALIGNED_FREE(ps_codec, ps_codec->ps_vps_base);
1559     ALIGNED_FREE(ps_codec, ps_codec->ps_sps_base);
1560     ALIGNED_FREE(ps_codec, ps_codec->ps_pps_base);
1561     ALIGNED_FREE(ps_codec, ps_codec->ps_slice_hdr_base);
1562     ALIGNED_FREE(ps_codec, ps_codec->pi2_scaling_mat);
1563     ALIGNED_FREE(ps_codec, ps_codec->pv_pic_buf_base);
1564     ALIGNED_FREE(ps_codec, ps_codec->s_parse.pu1_luma_intra_pred_mode_left);
1565     ALIGNED_FREE(ps_codec, ps_codec->as_process[0].s_sao_ctxt.pu1_tmp_buf_luma);
1566     ALIGNED_FREE(ps_codec, ps_codec->as_process[0].pi2_inter_pred_tmp_buf1);
1567     ALIGNED_FREE(ps_codec, ps_codec_obj->pv_codec_handle);
1568 
1569     if(ps_codec_obj)
1570     {
1571         pf_aligned_free(pv_mem_ctxt, ps_codec_obj);
1572     }
1573 
1574     return IV_SUCCESS;
1575 
1576 }
1577 
1578 
1579 /**
1580 *******************************************************************************
1581 *
1582 * @brief
1583 *  Allocate dynamic memory for the codec
1584 *
1585 * @par Description:
1586 *  Allocates dynamic memory for the codec
1587 *
1588 * @param[in] ps_codec
1589 *  Pointer to codec context
1590 *
1591 * @returns  Status
1592 *
1593 * @remarks
1594 *
1595 *
1596 *******************************************************************************
1597 */
ihevcd_allocate_dynamic_bufs(codec_t * ps_codec)1598 WORD32 ihevcd_allocate_dynamic_bufs(codec_t *ps_codec)
1599 {
1600     WORD32 max_tile_cols, max_tile_rows;
1601     WORD32 max_ctb_rows, max_ctb_cols;
1602     WORD32 max_num_cu_cols;
1603     WORD32 max_num_cu_rows;
1604     WORD32 max_num_4x4_cols;
1605     WORD32 max_ctb_cnt;
1606     WORD32 wd;
1607     WORD32 ht;
1608     WORD32 i;
1609     WORD32 max_dpb_size;
1610     void *pv_mem_ctxt = ps_codec->pv_mem_ctxt;
1611     void *pv_buf;
1612     UWORD8 *pu1_buf;
1613     WORD32 size;
1614 
1615     wd = ALIGN64(ps_codec->i4_wd);
1616     ht = ALIGN64(ps_codec->i4_ht);
1617 
1618     max_tile_cols = (wd + MIN_TILE_WD - 1) / MIN_TILE_WD;
1619     max_tile_rows = (ht + MIN_TILE_HT - 1) / MIN_TILE_HT;
1620     max_ctb_rows  = ht / MIN_CTB_SIZE;
1621     max_ctb_cols  = wd / MIN_CTB_SIZE;
1622     max_ctb_cnt   = max_ctb_rows * max_ctb_cols;
1623     max_num_cu_cols = wd / MIN_CU_SIZE;
1624     max_num_cu_rows = ht / MIN_CU_SIZE;
1625     max_num_4x4_cols = wd / 4;
1626 
1627     /* Allocate tile structures */
1628     size = max_tile_cols * max_tile_rows;
1629     size *= sizeof(tile_t);
1630     size *= MAX_PPS_CNT;
1631 
1632     pv_buf = ps_codec->pf_aligned_alloc(pv_mem_ctxt, 128, size);
1633     RETURN_IF((NULL == pv_buf), IV_FAIL);
1634     memset(pv_buf, 0, size);
1635     ps_codec->ps_tile = (tile_t *)pv_buf;
1636 
1637 
1638     /* Allocate memory to hold entry point offsets */
1639     /* One entry point per tile */
1640     size = max_tile_cols * max_tile_rows;
1641 
1642     /* One entry point per row of CTBs */
1643     /*********************************************************************/
1644     /* Only tiles or entropy sync is enabled at a time in main           */
1645     /* profile, but since memory required does not increase too much,    */
1646     /* this allocation is done to handle both cases                      */
1647     /*********************************************************************/
1648     size  += max_ctb_rows;
1649     size *= sizeof(WORD32);
1650 
1651     pv_buf = ps_codec->pf_aligned_alloc(pv_mem_ctxt, 128, size);
1652     RETURN_IF((NULL == pv_buf), IV_FAIL);
1653     memset(pv_buf, 0, size);
1654     ps_codec->pi4_entry_ofst = (WORD32 *)pv_buf;
1655 
1656     /* Allocate parse skip flag buffer */
1657     /* 1 bit per 8x8 */
1658     size = max_num_cu_cols / 8;
1659     size = ALIGN4(size);
1660     pv_buf = ps_codec->pf_aligned_alloc(pv_mem_ctxt, 128, size);
1661     RETURN_IF((NULL == pv_buf), IV_FAIL);
1662     memset(pv_buf, 0, size);
1663     ps_codec->s_parse.pu4_skip_cu_top = (UWORD32 *)pv_buf;
1664 
1665     /* Allocate parse coding tree depth buffer */
1666     /* 2 bits per 8x8 */
1667     size =  max_num_cu_cols / 4;
1668     size = ALIGN4(size);
1669     pv_buf = ps_codec->pf_aligned_alloc(pv_mem_ctxt, 128, size);
1670     RETURN_IF((NULL == pv_buf), IV_FAIL);
1671     memset(pv_buf, 0, size);
1672     ps_codec->s_parse.pu4_ct_depth_top = (UWORD32 *)pv_buf;
1673 
1674     /* Allocate intra flag buffer */
1675     /* 1 bit per 8x8 */
1676     size =  max_num_cu_cols * max_num_cu_rows / 8;
1677     size = ALIGN4(size);
1678     pv_buf = ps_codec->pf_aligned_alloc(pv_mem_ctxt, 128, size);
1679     RETURN_IF((NULL == pv_buf), IV_FAIL);
1680     memset(pv_buf, 0, size);
1681     ps_codec->pu1_pic_intra_flag = (UWORD8 *)pv_buf;
1682     ps_codec->s_parse.pu1_pic_intra_flag = ps_codec->pu1_pic_intra_flag;
1683 
1684     /* Allocate transquant bypass flag buffer */
1685     /* 1 bit per 8x8 */
1686     /* Extra row and column are allocated for easy processing of top and left blocks while loop filtering */
1687     size =  ((max_num_cu_cols + 8) * (max_num_cu_rows + 8)) / 8;
1688     size = ALIGN4(size);
1689     pv_buf = ps_codec->pf_aligned_alloc(pv_mem_ctxt, 128, size);
1690     RETURN_IF((NULL == pv_buf), IV_FAIL);
1691     memset(pv_buf, 1, size);
1692     {
1693         WORD32 loop_filter_strd = (wd + 63) >> 6;
1694         ps_codec->pu1_pic_no_loop_filter_flag_base = pv_buf;
1695         /* The offset is added for easy processing of top and left blocks while loop filtering */
1696         ps_codec->pu1_pic_no_loop_filter_flag = (UWORD8 *)pv_buf + loop_filter_strd + 1;
1697         ps_codec->s_parse.pu1_pic_no_loop_filter_flag = ps_codec->pu1_pic_no_loop_filter_flag;
1698         ps_codec->s_parse.s_deblk_ctxt.pu1_pic_no_loop_filter_flag = ps_codec->pu1_pic_no_loop_filter_flag;
1699         ps_codec->s_parse.s_sao_ctxt.pu1_pic_no_loop_filter_flag = ps_codec->pu1_pic_no_loop_filter_flag;
1700     }
1701 
1702     /* Initialize pointers in PPS structures */
1703     {
1704         pps_t *ps_pps = ps_codec->ps_pps_base;
1705         tile_t *ps_tile =  ps_codec->ps_tile;
1706 
1707         for(i = 0; i < MAX_PPS_CNT; i++)
1708         {
1709             ps_pps->ps_tile = ps_tile;
1710             ps_tile += (max_tile_cols * max_tile_rows);
1711             ps_pps++;
1712         }
1713 
1714     }
1715 
1716     /* Allocate memory for job queue */
1717 
1718     /* One job per row of CTBs */
1719     size  = max_ctb_rows;
1720 
1721     /* One each tile a row of CTBs, num_jobs has to incremented */
1722     size  *= max_tile_cols;
1723 
1724     /* One format convert/frame copy job per row of CTBs for non-shared mode*/
1725     size  += max_ctb_rows;
1726 
1727     size *= sizeof(proc_job_t);
1728 
1729     size += ihevcd_jobq_ctxt_size();
1730     size = ALIGN4(size);
1731 
1732     pv_buf = ps_codec->pf_aligned_alloc(pv_mem_ctxt, 128, size);
1733     RETURN_IF((NULL == pv_buf), IV_FAIL);
1734     memset(pv_buf, 0, size);
1735     ps_codec->pv_proc_jobq_buf = pv_buf;
1736     ps_codec->i4_proc_jobq_buf_size = size;
1737 
1738     size =  max_ctb_cnt;
1739     size = ALIGN4(size);
1740     pv_buf = ps_codec->pf_aligned_alloc(pv_mem_ctxt, 128, size);
1741     RETURN_IF((NULL == pv_buf), IV_FAIL);
1742     memset(pv_buf, 0, size);
1743     ps_codec->pu1_parse_map = (UWORD8 *)pv_buf;
1744 
1745     size =  max_ctb_cnt;
1746     size = ALIGN4(size);
1747     pv_buf = ps_codec->pf_aligned_alloc(pv_mem_ctxt, 128, size);
1748     RETURN_IF((NULL == pv_buf), IV_FAIL);
1749     memset(pv_buf, 0, size);
1750     ps_codec->pu1_proc_map = (UWORD8 *)pv_buf;
1751 
1752     /** Holds top and left neighbor's pu idx into picture level pu array */
1753     /* Only one top row is enough but left has to be replicated for each process context */
1754     size =  (max_num_4x4_cols  /* left */ + MAX_PROCESS_THREADS * (MAX_CTB_SIZE / 4)/* top */ + 1/* top right */) * sizeof(WORD32);
1755     size = ALIGN4(size);
1756     pv_buf = ps_codec->pf_aligned_alloc(pv_mem_ctxt, 128, size);
1757     RETURN_IF((NULL == pv_buf), IV_FAIL);
1758     memset(pv_buf, 0, size);
1759 
1760     for(i = 0; i < MAX_PROCESS_THREADS; i++)
1761     {
1762         UWORD32 *pu4_buf = (UWORD32 *)pv_buf;
1763         ps_codec->as_process[i].pu4_pic_pu_idx_left = pu4_buf + i * (MAX_CTB_SIZE / 4);
1764         memset(ps_codec->as_process[i].pu4_pic_pu_idx_left, 0, sizeof(UWORD32) * MAX_CTB_SIZE / 4);
1765         ps_codec->as_process[i].pu4_pic_pu_idx_top = pu4_buf + MAX_PROCESS_THREADS * (MAX_CTB_SIZE / 4);
1766     }
1767     memset(ps_codec->as_process[0].pu4_pic_pu_idx_top, 0, sizeof(UWORD32) * (wd / 4 + 1));
1768 
1769     {
1770         /* To hold SAO left buffer for luma */
1771         size  = sizeof(UWORD8) * (MAX(ht, wd));
1772 
1773         /* To hold SAO left buffer for chroma */
1774         size += sizeof(UWORD8) * (MAX(ht, wd));
1775 
1776         /* To hold SAO top buffer for luma */
1777         size += sizeof(UWORD8) * wd;
1778 
1779         /* To hold SAO top buffer for chroma */
1780         size += sizeof(UWORD8) * wd;
1781 
1782         /* To hold SAO top left luma pixel value for last output ctb in a row*/
1783         size += sizeof(UWORD8) * max_ctb_rows;
1784 
1785         /* To hold SAO top left chroma pixel value last output ctb in a row*/
1786         size += sizeof(UWORD8) * max_ctb_rows * 2;
1787 
1788         /* To hold SAO top left pixel luma for current ctb - column array*/
1789         size += sizeof(UWORD8) * max_ctb_rows;
1790 
1791         /* To hold SAO top left pixel chroma for current ctb-column array*/
1792         size += sizeof(UWORD8) * max_ctb_rows * 2;
1793 
1794         /* To hold SAO top right pixel luma pixel value last output ctb in a row*/
1795         size += sizeof(UWORD8) * max_ctb_cols;
1796 
1797         /* To hold SAO top right pixel chroma pixel value last output ctb in a row*/
1798         size += sizeof(UWORD8) * max_ctb_cols * 2;
1799 
1800         /*To hold SAO botton bottom left pixels for luma*/
1801         size += sizeof(UWORD8) * max_ctb_rows;
1802 
1803         /*To hold SAO botton bottom left pixels for luma*/
1804         size += sizeof(UWORD8) * max_ctb_rows * 2;
1805         size = ALIGN64(size);
1806 
1807         pu1_buf = ps_codec->pf_aligned_alloc(pv_mem_ctxt, 128, size);
1808         RETURN_IF((NULL == pu1_buf), IV_FAIL);
1809         memset(pu1_buf, 0, size);
1810 
1811         for(i = 0; i < MAX_PROCESS_THREADS; i++)
1812         {
1813             ps_codec->as_process[i].s_sao_ctxt.pu1_sao_src_left_luma = (UWORD8 *)pu1_buf;
1814         }
1815         ps_codec->s_parse.s_sao_ctxt.pu1_sao_src_left_luma = (UWORD8 *)pu1_buf;
1816         pu1_buf += MAX(ht, wd);
1817 
1818         for(i = 0; i < MAX_PROCESS_THREADS; i++)
1819         {
1820             ps_codec->as_process[i].s_sao_ctxt.pu1_sao_src_left_chroma = (UWORD8 *)pu1_buf;
1821         }
1822         ps_codec->s_parse.s_sao_ctxt.pu1_sao_src_left_chroma = (UWORD8 *)pu1_buf;
1823         pu1_buf += MAX(ht, wd);
1824         for(i = 0; i < MAX_PROCESS_THREADS; i++)
1825         {
1826             ps_codec->as_process[i].s_sao_ctxt.pu1_sao_src_top_luma = (UWORD8 *)pu1_buf;
1827         }
1828         ps_codec->s_parse.s_sao_ctxt.pu1_sao_src_top_luma = (UWORD8 *)pu1_buf;
1829         pu1_buf += wd;
1830 
1831         for(i = 0; i < MAX_PROCESS_THREADS; i++)
1832         {
1833             ps_codec->as_process[i].s_sao_ctxt.pu1_sao_src_top_chroma = (UWORD8 *)pu1_buf;
1834         }
1835         ps_codec->s_parse.s_sao_ctxt.pu1_sao_src_top_chroma = (UWORD8 *)pu1_buf;
1836         pu1_buf += wd;
1837         for(i = 0; i < MAX_PROCESS_THREADS; i++)
1838         {
1839             ps_codec->as_process[i].s_sao_ctxt.pu1_sao_src_luma_top_left_ctb = (UWORD8 *)pu1_buf;
1840         }
1841         ps_codec->s_parse.s_sao_ctxt.pu1_sao_src_luma_top_left_ctb = (UWORD8 *)pu1_buf;
1842         pu1_buf += ht / MIN_CTB_SIZE;
1843 
1844         for(i = 0; i < MAX_PROCESS_THREADS; i++)
1845         {
1846             ps_codec->as_process[i].s_sao_ctxt.pu1_sao_src_chroma_top_left_ctb = (UWORD8 *)pu1_buf;
1847         }
1848         ps_codec->s_parse.s_sao_ctxt.pu1_sao_src_chroma_top_left_ctb = (UWORD8 *)pu1_buf;
1849         pu1_buf += (ht / MIN_CTB_SIZE) * 2;
1850 
1851         for(i = 0; i < MAX_PROCESS_THREADS; i++)
1852         {
1853             ps_codec->as_process[i].s_sao_ctxt.pu1_sao_src_top_left_luma_curr_ctb = (UWORD8 *)pu1_buf;
1854         }
1855         ps_codec->s_parse.s_sao_ctxt.pu1_sao_src_top_left_luma_curr_ctb = (UWORD8 *)pu1_buf;
1856         pu1_buf += ht / MIN_CTB_SIZE;
1857 
1858         for(i = 0; i < MAX_PROCESS_THREADS; i++)
1859         {
1860             ps_codec->as_process[i].s_sao_ctxt.pu1_sao_src_top_left_chroma_curr_ctb = (UWORD8 *)pu1_buf;
1861         }
1862         ps_codec->s_parse.s_sao_ctxt.pu1_sao_src_top_left_chroma_curr_ctb = (UWORD8 *)pu1_buf;
1863 
1864         pu1_buf += (ht / MIN_CTB_SIZE) * 2;
1865         for(i = 0; i < MAX_PROCESS_THREADS; i++)
1866         {
1867             ps_codec->as_process[i].s_sao_ctxt.pu1_sao_src_top_left_luma_top_right = (UWORD8 *)pu1_buf;
1868         }
1869         ps_codec->s_parse.s_sao_ctxt.pu1_sao_src_top_left_luma_top_right = (UWORD8 *)pu1_buf;
1870 
1871         pu1_buf += wd / MIN_CTB_SIZE;
1872         for(i = 0; i < MAX_PROCESS_THREADS; i++)
1873         {
1874             ps_codec->as_process[i].s_sao_ctxt.pu1_sao_src_top_left_chroma_top_right = (UWORD8 *)pu1_buf;
1875         }
1876         ps_codec->s_parse.s_sao_ctxt.pu1_sao_src_top_left_chroma_top_right = (UWORD8 *)pu1_buf;
1877 
1878         pu1_buf += (wd / MIN_CTB_SIZE) * 2;
1879 
1880         /*Per CTB, Store 1 value for luma , 2 values for chroma*/
1881         for(i = 0; i < MAX_PROCESS_THREADS; i++)
1882         {
1883             ps_codec->as_process[i].s_sao_ctxt.pu1_sao_src_top_left_luma_bot_left = (UWORD8 *)pu1_buf;
1884         }
1885         ps_codec->s_parse.s_sao_ctxt.pu1_sao_src_top_left_luma_bot_left = (UWORD8 *)pu1_buf;
1886 
1887         pu1_buf += (ht / MIN_CTB_SIZE);
1888 
1889         for(i = 0; i < MAX_PROCESS_THREADS; i++)
1890         {
1891             ps_codec->as_process[i].s_sao_ctxt.pu1_sao_src_top_left_chroma_bot_left = (UWORD8 *)pu1_buf;
1892         }
1893         ps_codec->s_parse.s_sao_ctxt.pu1_sao_src_top_left_chroma_bot_left = (UWORD8 *)pu1_buf;
1894 
1895         pu1_buf += (ht / MIN_CTB_SIZE) * 2;
1896     }
1897 
1898 
1899     {
1900         UWORD8 *pu1_buf = (UWORD8 *)pv_buf;
1901         WORD32 vert_bs_size, horz_bs_size;
1902         WORD32 qp_const_flag_size;
1903         WORD32 qp_size;
1904         WORD32 num_8x8;
1905 
1906         /* Max Number of vertical edges */
1907         vert_bs_size = wd / 8 + 2 * MAX_CTB_SIZE / 8;
1908 
1909         /* Max Number of horizontal edges - extra MAX_CTB_SIZE / 8 to handle the last 4 rows separately(shifted CTB processing) */
1910         vert_bs_size *= (ht + MAX_CTB_SIZE) / MIN_TU_SIZE;
1911 
1912         /* Number of bytes */
1913         vert_bs_size /= 8;
1914 
1915         /* Two bits per edge */
1916         vert_bs_size *= 2;
1917 
1918         /* Max Number of horizontal edges */
1919         horz_bs_size = ht / 8 + MAX_CTB_SIZE / 8;
1920 
1921         /* Max Number of vertical edges - extra MAX_CTB_SIZE / 8 to handle the last 4 columns separately(shifted CTB processing) */
1922         horz_bs_size *= (wd + MAX_CTB_SIZE) / MIN_TU_SIZE;
1923 
1924         /* Number of bytes */
1925         horz_bs_size /= 8;
1926 
1927         /* Two bits per edge */
1928         horz_bs_size *= 2;
1929 
1930         /* Max CTBs in a row */
1931         qp_const_flag_size = wd / MIN_CTB_SIZE + 1 /* The last ctb row deblk is done in last ctb + 1 row.*/;
1932 
1933         /* Max CTBs in a column */
1934         qp_const_flag_size *= ht / MIN_CTB_SIZE;
1935 
1936         /* Number of bytes */
1937         qp_const_flag_size /= 8;
1938 
1939         /* QP changes at CU level - So store at 8x8 level */
1940         num_8x8 = (wd * ht) / (MIN_CU_SIZE * MIN_CU_SIZE);
1941         qp_size = num_8x8;
1942 
1943         /* To hold vertical boundary strength */
1944         size += vert_bs_size;
1945 
1946         /* To hold horizontal boundary strength */
1947         size += horz_bs_size;
1948 
1949         /* To hold QP */
1950         size += qp_size;
1951 
1952         /* To hold QP const in CTB flags */
1953         size += qp_const_flag_size;
1954 
1955         pu1_buf = ps_codec->pf_aligned_alloc(pv_mem_ctxt, 128, size);
1956         RETURN_IF((NULL == pu1_buf), IV_FAIL);
1957 
1958         memset(pu1_buf, 0, size);
1959 
1960         for(i = 0; i < MAX_PROCESS_THREADS; i++)
1961         {
1962             ps_codec->as_process[i].s_bs_ctxt.pu4_pic_vert_bs = (UWORD32 *)pu1_buf;
1963             ps_codec->as_process[i].s_deblk_ctxt.s_bs_ctxt.pu4_pic_vert_bs = (UWORD32 *)pu1_buf;
1964             ps_codec->s_parse.s_deblk_ctxt.s_bs_ctxt.pu4_pic_vert_bs = (UWORD32 *)pu1_buf;
1965             pu1_buf += vert_bs_size;
1966 
1967             ps_codec->as_process[i].s_bs_ctxt.pu4_pic_horz_bs = (UWORD32 *)pu1_buf;
1968             ps_codec->as_process[i].s_deblk_ctxt.s_bs_ctxt.pu4_pic_horz_bs = (UWORD32 *)pu1_buf;
1969             ps_codec->s_parse.s_deblk_ctxt.s_bs_ctxt.pu4_pic_horz_bs = (UWORD32 *)pu1_buf;
1970             pu1_buf += horz_bs_size;
1971 
1972             ps_codec->as_process[i].s_bs_ctxt.pu1_pic_qp = (UWORD8 *)pu1_buf;
1973             ps_codec->as_process[i].s_deblk_ctxt.s_bs_ctxt.pu1_pic_qp = (UWORD8 *)pu1_buf;
1974             ps_codec->s_parse.s_deblk_ctxt.s_bs_ctxt.pu1_pic_qp = (UWORD8 *)pu1_buf;
1975             pu1_buf += qp_size;
1976 
1977             ps_codec->as_process[i].s_bs_ctxt.pu1_pic_qp_const_in_ctb = (UWORD8 *)pu1_buf;
1978             ps_codec->as_process[i].s_deblk_ctxt.s_bs_ctxt.pu1_pic_qp_const_in_ctb = (UWORD8 *)pu1_buf;
1979             ps_codec->s_parse.s_deblk_ctxt.s_bs_ctxt.pu1_pic_qp_const_in_ctb = (UWORD8 *)pu1_buf;
1980             pu1_buf += qp_const_flag_size;
1981 
1982             pu1_buf -= (vert_bs_size + horz_bs_size + qp_size + qp_const_flag_size);
1983         }
1984         ps_codec->s_parse.s_bs_ctxt.pu4_pic_vert_bs = (UWORD32 *)pu1_buf;
1985         pu1_buf += vert_bs_size;
1986 
1987         ps_codec->s_parse.s_bs_ctxt.pu4_pic_horz_bs = (UWORD32 *)pu1_buf;
1988         pu1_buf += horz_bs_size;
1989 
1990         ps_codec->s_parse.s_bs_ctxt.pu1_pic_qp = (UWORD8 *)pu1_buf;
1991         pu1_buf += qp_size;
1992 
1993         ps_codec->s_parse.s_bs_ctxt.pu1_pic_qp_const_in_ctb = (UWORD8 *)pu1_buf;
1994         pu1_buf += qp_const_flag_size;
1995 
1996     }
1997 
1998     /* Max CTBs in a row */
1999     size  = wd / MIN_CTB_SIZE;
2000     /* Max CTBs in a column */
2001     size *= (ht / MIN_CTB_SIZE + 2) /* Top row and bottom row extra. This ensures accessing left,top in first row
2002                                               and right in last row will not result in invalid access*/;
2003 
2004     size *= sizeof(UWORD16);
2005     pv_buf = ps_codec->pf_aligned_alloc(pv_mem_ctxt, 128, size);
2006     RETURN_IF((NULL == pv_buf), IV_FAIL);
2007     memset(pv_buf, 0, size);
2008 
2009     ps_codec->pu1_tile_idx_base = pv_buf;
2010     for(i = 0; i < MAX_PROCESS_THREADS; i++)
2011     {
2012         ps_codec->as_process[i].pu1_tile_idx = (UWORD16 *)pv_buf + wd / MIN_CTB_SIZE /* Offset 1 row */;
2013     }
2014 
2015     /* 4 bytes per color component per CTB */
2016     size = 3 * 4;
2017 
2018     /* MAX number of CTBs in a row */
2019     size *= wd / MIN_CTB_SIZE;
2020 
2021     /* MAX number of CTBs in a column */
2022     size *= ht / MIN_CTB_SIZE;
2023     pv_buf = ps_codec->pf_aligned_alloc(pv_mem_ctxt, 128, size);
2024     RETURN_IF((NULL == pv_buf), IV_FAIL);
2025     memset(pv_buf, 0, size);
2026 
2027     ps_codec->s_parse.ps_pic_sao = (sao_t *)pv_buf;
2028     ps_codec->s_parse.s_sao_ctxt.ps_pic_sao = (sao_t *)pv_buf;
2029     for(i = 0; i < MAX_PROCESS_THREADS; i++)
2030     {
2031         ps_codec->as_process[i].s_sao_ctxt.ps_pic_sao = ps_codec->s_parse.ps_pic_sao;
2032     }
2033 
2034     /* Only if width * height * 3 / 2 is greater than MIN_BITSBUF_SIZE,
2035     then allocate dynamic bistream buffer */
2036     ps_codec->pu1_bitsbuf_dynamic = NULL;
2037     size = wd * ht;
2038     if(size > MIN_BITSBUF_SIZE)
2039     {
2040         pv_buf = ps_codec->pf_aligned_alloc(pv_mem_ctxt, 128, size + 16); //Alloc extra for parse optimization
2041         RETURN_IF((NULL == pv_buf), IV_FAIL);
2042         memset(pv_buf, 0, size + 16);
2043         ps_codec->pu1_bitsbuf_dynamic = pv_buf;
2044         ps_codec->u4_bitsbuf_size_dynamic = size;
2045     }
2046 
2047     size = ihevcd_get_tu_data_size(wd * ht);
2048     pv_buf = ps_codec->pf_aligned_alloc(pv_mem_ctxt, 128, size);
2049     RETURN_IF((NULL == pv_buf), IV_FAIL);
2050     memset(pv_buf, 0, size);
2051     ps_codec->pv_tu_data = pv_buf;
2052 
2053     /* CU info map to store qp and CU type at 8x8 level */
2054     if(ps_codec->u1_enable_cu_info)
2055     {
2056         size = ((wd * ht) / (MIN_CU_SIZE * MIN_CU_SIZE)) * BUF_MGR_MAX_CNT;
2057 
2058         pv_buf = ps_codec->pf_aligned_alloc(pv_mem_ctxt, 128, size);
2059         RETURN_IF((NULL == pv_buf), IV_FAIL);
2060         memset(pv_buf, 0, size);
2061         ps_codec->pu1_qp_map_base = pv_buf;
2062 
2063         pv_buf = ps_codec->pf_aligned_alloc(pv_mem_ctxt, 128, size);
2064         RETURN_IF((NULL == pv_buf), IV_FAIL);
2065         memset(pv_buf, 0, size);
2066         ps_codec->pu1_cu_type_map_base = pv_buf;
2067     }
2068 
2069     {
2070         sps_t *ps_sps = (ps_codec->s_parse.ps_sps_base + ps_codec->i4_sps_id);
2071 
2072 
2073         /* Allocate for pu_map, pu_t and pic_pu_idx for each MV bank */
2074         /* Note: Number of luma samples is not max_wd * max_ht here, instead it is
2075          * set to maximum number of luma samples allowed at the given level.
2076          * This is done to ensure that any stream with width and height lesser
2077          * than max_wd and max_ht is supported. Number of buffers required can be greater
2078          * for lower width and heights at a given level and this increased number of buffers
2079          * might require more memory than what max_wd and max_ht buffer would have required
2080          * Also note one extra buffer is allocted to store current pictures MV bank
2081          * In case of asynchronous parsing and processing, number of buffers should increase here
2082          * based on when parsing and processing threads are synchronized
2083          */
2084         max_dpb_size = ps_sps->ai1_sps_max_dec_pic_buffering[ps_sps->i1_sps_max_sub_layers - 1];
2085         /* Size for holding mv_buf_t for each MV Bank
2086          * One extra MV Bank is needed to hold current pics MV bank.
2087          */
2088         size = (max_dpb_size + 1) * sizeof(mv_buf_t);
2089 
2090         size += (max_dpb_size + 1) *
2091                         ihevcd_get_pic_mv_bank_size(wd * ht);
2092 
2093         pv_buf = ps_codec->pf_aligned_alloc(pv_mem_ctxt, 128, size);
2094         RETURN_IF((NULL == pv_buf), IV_FAIL);
2095         memset(pv_buf, 0, size);
2096 
2097         ps_codec->pv_mv_bank_buf_base = pv_buf;
2098         ps_codec->i4_total_mv_bank_size = size;
2099 
2100     }
2101 
2102     /* In case of non-shared mode allocate for reference picture buffers */
2103     /* In case of shared and 420p output, allocate for chroma samples */
2104     if(0 == ps_codec->i4_share_disp_buf)
2105     {
2106         /* Number of buffers is doubled in order to return one frame at a time instead of sending
2107          * multiple outputs during dpb full case.
2108          * Also note one extra buffer is allocted to store current picture
2109          * In case of asynchronous parsing and processing, number of buffers should increase here
2110          * based on when parsing and processing threads are synchronized
2111          */
2112         size = ihevcd_get_total_pic_buf_size(ps_codec, wd, ht);
2113         pv_buf = ps_codec->pf_aligned_alloc(pv_mem_ctxt, 128, size);
2114         RETURN_IF((NULL == pv_buf), IV_FAIL);
2115         memset(pv_buf, 0, size);
2116 
2117         ps_codec->i4_total_pic_buf_size = size;
2118         ps_codec->pu1_ref_pic_buf_base = (UWORD8 *)pv_buf;
2119     }
2120 
2121     ps_codec->pv_proc_jobq = ihevcd_jobq_init(ps_codec->pv_proc_jobq_buf, ps_codec->i4_proc_jobq_buf_size);
2122     RETURN_IF((ps_codec->pv_proc_jobq == NULL), IV_FAIL);
2123 
2124     /* Update the jobq context to all the threads */
2125     ps_codec->s_parse.pv_proc_jobq = ps_codec->pv_proc_jobq;
2126     for(i = 0; i < MAX_PROCESS_THREADS; i++)
2127     {
2128         ps_codec->as_process[i].pv_proc_jobq = ps_codec->pv_proc_jobq;
2129         ps_codec->as_process[i].i4_id = i;
2130         ps_codec->as_process[i].ps_codec = ps_codec;
2131 
2132         /* Set the following to zero assuming it is a single core solution
2133          * When threads are launched these will be set appropriately
2134          */
2135         ps_codec->as_process[i].i4_check_parse_status = 0;
2136         ps_codec->as_process[i].i4_check_proc_status = 0;
2137     }
2138 
2139     ps_codec->u4_allocate_dynamic_done = 1;
2140 
2141     return IV_SUCCESS;
2142 }
2143 
2144 /**
2145 *******************************************************************************
2146 *
2147 * @brief
2148 *  Free dynamic memory for the codec
2149 *
2150 * @par Description:
2151 *  Free dynamic memory for the codec
2152 *
2153 * @param[in] ps_codec
2154 *  Pointer to codec context
2155 *
2156 * @returns  Status
2157 *
2158 * @remarks
2159 *
2160 *
2161 *******************************************************************************
2162 */
ihevcd_free_dynamic_bufs(codec_t * ps_codec)2163 WORD32 ihevcd_free_dynamic_bufs(codec_t *ps_codec)
2164 {
2165 
2166     if(ps_codec->pv_proc_jobq)
2167     {
2168         ihevcd_jobq_deinit(ps_codec->pv_proc_jobq);
2169         ps_codec->pv_proc_jobq = NULL;
2170     }
2171 
2172     ALIGNED_FREE(ps_codec, ps_codec->ps_tile);
2173     ALIGNED_FREE(ps_codec, ps_codec->pi4_entry_ofst);
2174     ALIGNED_FREE(ps_codec, ps_codec->s_parse.pu4_skip_cu_top);
2175     ALIGNED_FREE(ps_codec, ps_codec->s_parse.pu4_ct_depth_top);
2176     ALIGNED_FREE(ps_codec, ps_codec->pu1_pic_intra_flag);
2177     ALIGNED_FREE(ps_codec, ps_codec->pu1_pic_no_loop_filter_flag_base);
2178     ALIGNED_FREE(ps_codec, ps_codec->pv_proc_jobq_buf);
2179     ALIGNED_FREE(ps_codec, ps_codec->pu1_parse_map);
2180     ALIGNED_FREE(ps_codec, ps_codec->pu1_proc_map);
2181     ALIGNED_FREE(ps_codec, ps_codec->as_process[0].pu4_pic_pu_idx_left);
2182     ALIGNED_FREE(ps_codec, ps_codec->as_process[0].s_sao_ctxt.pu1_sao_src_left_luma);
2183     ALIGNED_FREE(ps_codec, ps_codec->as_process[0].s_bs_ctxt.pu4_pic_vert_bs);
2184     ALIGNED_FREE(ps_codec, ps_codec->pu1_tile_idx_base);
2185     ALIGNED_FREE(ps_codec, ps_codec->s_parse.ps_pic_sao);
2186     ALIGNED_FREE(ps_codec, ps_codec->pu1_bitsbuf_dynamic);
2187     ALIGNED_FREE(ps_codec, ps_codec->pv_tu_data);
2188     ALIGNED_FREE(ps_codec, ps_codec->pv_mv_bank_buf_base);
2189     ALIGNED_FREE(ps_codec, ps_codec->pu1_ref_pic_buf_base);
2190     ALIGNED_FREE(ps_codec, ps_codec->pu1_cur_chroma_ref_buf);
2191     if(ps_codec->u1_enable_cu_info)
2192     {
2193         ALIGNED_FREE(ps_codec, ps_codec->pu1_qp_map_base);
2194         ALIGNED_FREE(ps_codec, ps_codec->pu1_cu_type_map_base);
2195     }
2196 
2197     ps_codec->u4_allocate_dynamic_done = 0;
2198     return IV_SUCCESS;
2199 }
2200 
2201 
2202 /**
2203 *******************************************************************************
2204 *
2205 * @brief
2206 *  Initializes from mem records passed to the codec
2207 *
2208 * @par Description:
2209 *  Initializes pointers based on mem records passed
2210 *
2211 * @param[in] ps_codec_obj
2212 *  Pointer to codec object at API level
2213 *
2214 * @param[in] pv_api_ip
2215 *  Pointer to input argument structure
2216 *
2217 * @param[out] pv_api_op
2218 *  Pointer to output argument structure
2219 *
2220 * @returns  Status
2221 *
2222 * @remarks
2223 *
2224 *
2225 *******************************************************************************
2226 */
ihevcd_create(iv_obj_t * ps_codec_obj,void * pv_api_ip,void * pv_api_op)2227 WORD32 ihevcd_create(iv_obj_t *ps_codec_obj,
2228                            void *pv_api_ip,
2229                            void *pv_api_op)
2230 {
2231     ihevcd_cxa_create_ip_t *ps_create_ip;
2232     ihevcd_cxa_create_op_t *ps_create_op;
2233 
2234     WORD32 ret;
2235     codec_t *ps_codec;
2236     ps_create_ip = (ihevcd_cxa_create_ip_t *)pv_api_ip;
2237     ps_create_op = (ihevcd_cxa_create_op_t *)pv_api_op;
2238 
2239     ps_create_op->s_ivd_create_op_t.u4_error_code = 0;
2240     ps_codec_obj = NULL;
2241     ret = ihevcd_allocate_static_bufs(&ps_codec_obj, pv_api_ip, pv_api_op);
2242 
2243     /* If allocation of some buffer fails, then free buffers allocated till then */
2244     if(IV_FAIL == ret)
2245     {
2246         if(NULL != ps_codec_obj)
2247         {
2248             if(ps_codec_obj->pv_codec_handle)
2249             {
2250                 ihevcd_free_static_bufs(ps_codec_obj);
2251             }
2252             else
2253             {
2254                 void (*pf_aligned_free)(void *pv_mem_ctxt, void *pv_buf);
2255                 void *pv_mem_ctxt;
2256 
2257                 pf_aligned_free = ps_create_ip->s_ivd_create_ip_t.pf_aligned_free;
2258                 pv_mem_ctxt  = ps_create_ip->s_ivd_create_ip_t.pv_mem_ctxt;
2259                 pf_aligned_free(pv_mem_ctxt, ps_codec_obj);
2260             }
2261         }
2262         ps_create_op->s_ivd_create_op_t.u4_error_code = IVD_MEM_ALLOC_FAILED;
2263         ps_create_op->s_ivd_create_op_t.u4_error_code |= 1 << IVD_FATALERROR;
2264 
2265         return IV_FAIL;
2266     }
2267     ps_codec = (codec_t *)ps_codec_obj->pv_codec_handle;
2268     ret = ihevcd_init(ps_codec);
2269 
2270     TRACE_INIT(NULL);
2271     STATS_INIT();
2272 
2273     return ret;
2274 }
2275 /**
2276 *******************************************************************************
2277 *
2278 * @brief
2279 *  Delete codec
2280 *
2281 * @par Description:
2282 *  Delete codec
2283 *
2284 * @param[in] ps_codec_obj
2285 *  Pointer to codec object at API level
2286 *
2287 * @param[in] pv_api_ip
2288 *  Pointer to input argument structure
2289 *
2290 * @param[out] pv_api_op
2291 *  Pointer to output argument structure
2292 *
2293 * @returns  Status
2294 *
2295 * @remarks
2296 *
2297 *
2298 *******************************************************************************
2299 */
ihevcd_delete(iv_obj_t * ps_codec_obj,void * pv_api_ip,void * pv_api_op)2300 WORD32 ihevcd_delete(iv_obj_t *ps_codec_obj, void *pv_api_ip, void *pv_api_op)
2301 {
2302     codec_t *ps_dec;
2303     ihevcd_cxa_delete_ip_t *ps_ip = (ihevcd_cxa_delete_ip_t *)pv_api_ip;
2304     ihevcd_cxa_delete_op_t *ps_op = (ihevcd_cxa_delete_op_t *)pv_api_op;
2305 
2306     ps_dec = (codec_t *)(ps_codec_obj->pv_codec_handle);
2307     UNUSED(ps_ip);
2308     ps_op->s_ivd_delete_op_t.u4_error_code = 0;
2309     ihevcd_free_dynamic_bufs(ps_dec);
2310     ihevcd_free_static_bufs(ps_codec_obj);
2311     return IV_SUCCESS;
2312 }
2313 
2314 
2315 /**
2316 *******************************************************************************
2317 *
2318 * @brief
2319 *  Passes display buffer from application to codec
2320 *
2321 * @par Description:
2322 *  Adds display buffer to the codec
2323 *
2324 * @param[in] ps_codec_obj
2325 *  Pointer to codec object at API level
2326 *
2327 * @param[in] pv_api_ip
2328 *  Pointer to input argument structure
2329 *
2330 * @param[out] pv_api_op
2331 *  Pointer to output argument structure
2332 *
2333 * @returns  Status
2334 *
2335 * @remarks
2336 *
2337 *
2338 *******************************************************************************
2339 */
ihevcd_set_display_frame(iv_obj_t * ps_codec_obj,void * pv_api_ip,void * pv_api_op)2340 WORD32 ihevcd_set_display_frame(iv_obj_t *ps_codec_obj,
2341                                 void *pv_api_ip,
2342                                 void *pv_api_op)
2343 {
2344     WORD32 ret = IV_SUCCESS;
2345 
2346     ivd_set_display_frame_ip_t *ps_dec_disp_ip;
2347     ivd_set_display_frame_op_t *ps_dec_disp_op;
2348 
2349     WORD32 i;
2350 
2351     codec_t *ps_codec = (codec_t *)(ps_codec_obj->pv_codec_handle);
2352 
2353     ps_dec_disp_ip = (ivd_set_display_frame_ip_t *)pv_api_ip;
2354     ps_dec_disp_op = (ivd_set_display_frame_op_t *)pv_api_op;
2355 
2356     ps_codec->i4_num_disp_bufs = 0;
2357     if(ps_codec->i4_share_disp_buf)
2358     {
2359         UWORD32 num_bufs = ps_dec_disp_ip->num_disp_bufs;
2360         pic_buf_t *ps_pic_buf;
2361         UWORD8 *pu1_buf;
2362         WORD32 buf_ret;
2363 
2364         UWORD8 *pu1_chroma_buf = NULL;
2365         num_bufs = MIN(num_bufs, BUF_MGR_MAX_CNT);
2366         ps_codec->i4_num_disp_bufs = num_bufs;
2367 
2368         ps_pic_buf = (pic_buf_t *)ps_codec->ps_pic_buf;
2369 
2370         /* If color format is 420P, then allocate chroma buffers to hold semiplanar
2371          * chroma data */
2372         if(ps_codec->e_chroma_fmt == IV_YUV_420P)
2373         {
2374             WORD32 num_samples = ps_dec_disp_ip->s_disp_buffer[0].u4_min_out_buf_size[1] << 1;
2375             WORD32 size = num_samples * num_bufs;
2376             void *pv_mem_ctxt = ps_codec->pv_mem_ctxt;
2377 
2378             pu1_chroma_buf = ps_codec->pf_aligned_alloc(pv_mem_ctxt, 128, size);
2379             RETURN_IF((NULL == pu1_chroma_buf), IV_FAIL);
2380             memset(pu1_chroma_buf, 0, size);
2381 
2382             ps_codec->pu1_cur_chroma_ref_buf = pu1_chroma_buf;
2383         }
2384         for(i = 0; i < (WORD32)num_bufs; i++)
2385         {
2386             /* Stride is not available in some cases here.
2387                So store base pointers to buffer manager now,
2388                and update these pointers once header is decoded */
2389             pu1_buf =  ps_dec_disp_ip->s_disp_buffer[i].pu1_bufs[0];
2390             ps_pic_buf->pu1_luma = pu1_buf;
2391 
2392             if(ps_codec->e_chroma_fmt == IV_YUV_420P)
2393             {
2394                 pu1_buf = pu1_chroma_buf;
2395                 pu1_chroma_buf += ps_dec_disp_ip->s_disp_buffer[0].u4_min_out_buf_size[1] << 1;
2396             }
2397             else
2398             {
2399                 /* For YUV 420SP case use display buffer itself as chroma ref buffer */
2400                 pu1_buf =  ps_dec_disp_ip->s_disp_buffer[i].pu1_bufs[1];
2401             }
2402 
2403             ps_pic_buf->pu1_chroma = pu1_buf;
2404 
2405             buf_ret = ihevc_buf_mgr_add((buf_mgr_t *)ps_codec->pv_pic_buf_mgr, ps_pic_buf, i);
2406 
2407             if(0 != buf_ret)
2408             {
2409                 ps_codec->i4_error_code = IHEVCD_BUF_MGR_ERROR;
2410                 return IHEVCD_BUF_MGR_ERROR;
2411             }
2412 
2413             /* Mark pic buf as needed for display */
2414             /* This ensures that till the buffer is explicitly passed to the codec,
2415              * application owns the buffer. Decoder is allowed to use a buffer only
2416              * when application sends it through fill this buffer call in OMX
2417              */
2418             ihevc_buf_mgr_set_status((buf_mgr_t *)ps_codec->pv_pic_buf_mgr, i, BUF_MGR_DISP);
2419 
2420             ps_pic_buf++;
2421 
2422             /* Store display buffers in codec context. Needed for 420p output */
2423             memcpy(&ps_codec->s_disp_buffer[ps_codec->i4_share_disp_buf_cnt],
2424                    &ps_dec_disp_ip->s_disp_buffer[i],
2425                    sizeof(ps_dec_disp_ip->s_disp_buffer[i]));
2426 
2427             ps_codec->i4_share_disp_buf_cnt++;
2428 
2429         }
2430     }
2431 
2432     ps_dec_disp_op->u4_error_code = 0;
2433     return ret;
2434 
2435 }
2436 
2437 /**
2438 *******************************************************************************
2439 *
2440 * @brief
2441 *  Sets the decoder in flush mode. Decoder will come out of  flush only
2442 * after returning all the buffers or at reset
2443 *
2444 * @par Description:
2445 *  Sets the decoder in flush mode
2446 *
2447 * @param[in] ps_codec_obj
2448 *  Pointer to codec object at API level
2449 *
2450 * @param[in] pv_api_ip
2451 *  Pointer to input argument structure
2452 *
2453 * @param[out] pv_api_op
2454 *  Pointer to output argument structure
2455 *
2456 * @returns  Status
2457 *
2458 * @remarks
2459 *
2460 *
2461 *******************************************************************************
2462 */
ihevcd_set_flush_mode(iv_obj_t * ps_codec_obj,void * pv_api_ip,void * pv_api_op)2463 WORD32 ihevcd_set_flush_mode(iv_obj_t *ps_codec_obj,
2464                              void *pv_api_ip,
2465                              void *pv_api_op)
2466 {
2467 
2468     codec_t *ps_codec;
2469     ivd_ctl_flush_op_t *ps_ctl_op = (ivd_ctl_flush_op_t *)pv_api_op;
2470     UNUSED(pv_api_ip);
2471     ps_codec = (codec_t *)(ps_codec_obj->pv_codec_handle);
2472     ihevcd_join_threads(ps_codec);
2473 
2474     /* Signal flush frame control call */
2475     ps_codec->i4_flush_mode = 1;
2476 
2477     ps_ctl_op->u4_error_code = 0;
2478 
2479     /* Set pic count to zero, so that decoder starts buffering again */
2480     /* once it comes out of flush mode */
2481     ps_codec->u4_pic_cnt = 0;
2482     ps_codec->u4_disp_cnt = 0;
2483 
2484     /* If the first slice NAL fed to decoder after flush is a CRA NAL, then */
2485     /* it may have associated RASL nals that need to be skipped */
2486     ps_codec->i4_cra_as_first_pic = 1;
2487     return IV_SUCCESS;
2488 
2489 
2490 }
2491 
2492 /**
2493 *******************************************************************************
2494 *
2495 * @brief
2496 *  Gets decoder status and buffer requirements
2497 *
2498 * @par Description:
2499 *  Gets the decoder status
2500 *
2501 * @param[in] ps_codec_obj
2502 *  Pointer to codec object at API level
2503 *
2504 * @param[in] pv_api_ip
2505 *  Pointer to input argument structure
2506 *
2507 * @param[out] pv_api_op
2508 *  Pointer to output argument structure
2509 *
2510 * @returns  Status
2511 *
2512 * @remarks
2513 *
2514 *
2515 *******************************************************************************
2516 */
2517 
ihevcd_get_status(iv_obj_t * ps_codec_obj,void * pv_api_ip,void * pv_api_op)2518 WORD32 ihevcd_get_status(iv_obj_t *ps_codec_obj,
2519                          void *pv_api_ip,
2520                          void *pv_api_op)
2521 {
2522 
2523     WORD32 i;
2524     codec_t *ps_codec;
2525     WORD32 wd, ht;
2526     ivd_ctl_getstatus_op_t *ps_ctl_op = (ivd_ctl_getstatus_op_t *)pv_api_op;
2527 
2528     UNUSED(pv_api_ip);
2529 
2530     ps_ctl_op->u4_error_code = 0;
2531 
2532     ps_codec = (codec_t *)(ps_codec_obj->pv_codec_handle);
2533 
2534     ps_ctl_op->u4_min_num_in_bufs = MIN_IN_BUFS;
2535     if(ps_codec->e_chroma_fmt == IV_YUV_420P)
2536         ps_ctl_op->u4_min_num_out_bufs = MIN_OUT_BUFS_420;
2537     else if(ps_codec->e_chroma_fmt == IV_YUV_422ILE)
2538         ps_ctl_op->u4_min_num_out_bufs = MIN_OUT_BUFS_422ILE;
2539     else if(ps_codec->e_chroma_fmt == IV_RGB_565)
2540         ps_ctl_op->u4_min_num_out_bufs = MIN_OUT_BUFS_RGB565;
2541     else if(ps_codec->e_chroma_fmt == IV_RGBA_8888)
2542         ps_ctl_op->u4_min_num_out_bufs = MIN_OUT_BUFS_RGBA8888;
2543     else if((ps_codec->e_chroma_fmt == IV_YUV_420SP_UV)
2544                     || (ps_codec->e_chroma_fmt == IV_YUV_420SP_VU))
2545         ps_ctl_op->u4_min_num_out_bufs = MIN_OUT_BUFS_420SP;
2546 
2547     ps_ctl_op->u4_num_disp_bufs = 1;
2548 
2549     for(i = 0; i < (WORD32)ps_ctl_op->u4_min_num_in_bufs; i++)
2550     {
2551         wd = ALIGN64(ps_codec->i4_wd);
2552         ht = ALIGN64(ps_codec->i4_ht);
2553         ps_ctl_op->u4_min_in_buf_size[i] = MAX((wd * ht), MIN_BITSBUF_SIZE);
2554     }
2555 
2556     wd = ps_codec->i4_wd;
2557     ht = ps_codec->i4_ht;
2558 
2559     if(ps_codec->i4_sps_done)
2560     {
2561         if(0 == ps_codec->i4_share_disp_buf)
2562         {
2563             wd = ps_codec->i4_disp_wd;
2564             ht = ps_codec->i4_disp_ht;
2565 
2566         }
2567         else
2568         {
2569             wd = ps_codec->i4_disp_strd;
2570             ht = ps_codec->i4_ht + PAD_HT;
2571         }
2572     }
2573 
2574     if(ps_codec->i4_disp_strd > wd)
2575         wd = ps_codec->i4_disp_strd;
2576 
2577     if(0 == ps_codec->i4_share_disp_buf)
2578         ps_ctl_op->u4_num_disp_bufs = 1;
2579     else
2580     {
2581         if(ps_codec->i4_sps_done)
2582         {
2583             sps_t *ps_sps = (ps_codec->s_parse.ps_sps_base + ps_codec->i4_sps_id);
2584             WORD32 reorder_pic_cnt, ref_pic_cnt;
2585             reorder_pic_cnt = 0;
2586             if(ps_codec->e_frm_out_mode != IVD_DECODE_FRAME_OUT)
2587                 reorder_pic_cnt = ps_sps->ai1_sps_max_num_reorder_pics[ps_sps->i1_sps_max_sub_layers - 1];
2588             ref_pic_cnt = ps_sps->ai1_sps_max_dec_pic_buffering[ps_sps->i1_sps_max_sub_layers - 1];
2589 
2590             ps_ctl_op->u4_num_disp_bufs = reorder_pic_cnt;
2591 
2592             ps_ctl_op->u4_num_disp_bufs += ref_pic_cnt + 1;
2593         }
2594         else
2595         {
2596             ps_ctl_op->u4_num_disp_bufs = MAX_REF_CNT;
2597         }
2598 
2599         ps_ctl_op->u4_num_disp_bufs = MIN(
2600                         ps_ctl_op->u4_num_disp_bufs, 32);
2601     }
2602 
2603     /*!*/
2604     if(ps_codec->e_chroma_fmt == IV_YUV_420P)
2605     {
2606         ps_ctl_op->u4_min_out_buf_size[0] = (wd * ht);
2607         ps_ctl_op->u4_min_out_buf_size[1] = (wd * ht) >> 2;
2608         ps_ctl_op->u4_min_out_buf_size[2] = (wd * ht) >> 2;
2609     }
2610     else if(ps_codec->e_chroma_fmt == IV_YUV_422ILE)
2611     {
2612         ps_ctl_op->u4_min_out_buf_size[0] = (wd * ht) * 2;
2613         ps_ctl_op->u4_min_out_buf_size[1] =
2614                         ps_ctl_op->u4_min_out_buf_size[2] = 0;
2615     }
2616     else if(ps_codec->e_chroma_fmt == IV_RGB_565)
2617     {
2618         ps_ctl_op->u4_min_out_buf_size[0] = (wd * ht) * 2;
2619         ps_ctl_op->u4_min_out_buf_size[1] =
2620                         ps_ctl_op->u4_min_out_buf_size[2] = 0;
2621     }
2622     else if(ps_codec->e_chroma_fmt == IV_RGBA_8888)
2623     {
2624         ps_ctl_op->u4_min_out_buf_size[0] = (wd * ht) * 4;
2625         ps_ctl_op->u4_min_out_buf_size[1] =
2626                         ps_ctl_op->u4_min_out_buf_size[2] = 0;
2627     }
2628     else if((ps_codec->e_chroma_fmt == IV_YUV_420SP_UV)
2629                     || (ps_codec->e_chroma_fmt == IV_YUV_420SP_VU))
2630     {
2631         ps_ctl_op->u4_min_out_buf_size[0] = (wd * ht);
2632         ps_ctl_op->u4_min_out_buf_size[1] = (wd * ht) >> 1;
2633         ps_ctl_op->u4_min_out_buf_size[2] = 0;
2634     }
2635     ps_ctl_op->u4_pic_ht = ht;
2636     ps_ctl_op->u4_pic_wd = wd;
2637     ps_ctl_op->u4_frame_rate = 30000;
2638     ps_ctl_op->u4_bit_rate = 1000000;
2639     ps_ctl_op->e_content_type = IV_PROGRESSIVE;
2640     ps_ctl_op->e_output_chroma_format = ps_codec->e_chroma_fmt;
2641     ps_codec->i4_num_disp_bufs = ps_ctl_op->u4_num_disp_bufs;
2642 
2643     if(ps_ctl_op->u4_size == sizeof(ihevcd_cxa_ctl_getstatus_op_t))
2644     {
2645         ihevcd_cxa_ctl_getstatus_op_t *ps_ext_ctl_op = (ihevcd_cxa_ctl_getstatus_op_t *)ps_ctl_op;
2646         ps_ext_ctl_op->u4_coded_pic_wd = ps_codec->i4_wd;
2647         ps_ext_ctl_op->u4_coded_pic_wd = ps_codec->i4_ht;
2648     }
2649     return IV_SUCCESS;
2650 }
2651 /**
2652 *******************************************************************************
2653 *
2654 * @brief
2655 *  Gets decoder buffer requirements
2656 *
2657 * @par Description:
2658 *  Gets the decoder buffer requirements. If called before  header decoder,
2659 * buffer requirements are based on max_wd  and max_ht else actual width and
2660 * height will be used
2661 *
2662 * @param[in] ps_codec_obj
2663 *  Pointer to codec object at API level
2664 *
2665 * @param[in] pv_api_ip
2666 *  Pointer to input argument structure
2667 *
2668 * @param[out] pv_api_op
2669 *  Pointer to output argument structure
2670 *
2671 * @returns  Status
2672 *
2673 * @remarks
2674 *
2675 *
2676 *******************************************************************************
2677 */
ihevcd_get_buf_info(iv_obj_t * ps_codec_obj,void * pv_api_ip,void * pv_api_op)2678 WORD32 ihevcd_get_buf_info(iv_obj_t *ps_codec_obj,
2679                            void *pv_api_ip,
2680                            void *pv_api_op)
2681 {
2682 
2683     codec_t *ps_codec;
2684     UWORD32 i = 0;
2685     WORD32 wd, ht;
2686     ivd_ctl_getbufinfo_op_t *ps_ctl_op =
2687                     (ivd_ctl_getbufinfo_op_t *)pv_api_op;
2688 
2689     UNUSED(pv_api_ip);
2690     ps_ctl_op->u4_error_code = 0;
2691 
2692     ps_codec = (codec_t *)(ps_codec_obj->pv_codec_handle);
2693 
2694     ps_ctl_op->u4_min_num_in_bufs = MIN_IN_BUFS;
2695     if(ps_codec->e_chroma_fmt == IV_YUV_420P)
2696         ps_ctl_op->u4_min_num_out_bufs = MIN_OUT_BUFS_420;
2697     else if(ps_codec->e_chroma_fmt == IV_YUV_422ILE)
2698         ps_ctl_op->u4_min_num_out_bufs = MIN_OUT_BUFS_422ILE;
2699     else if(ps_codec->e_chroma_fmt == IV_RGB_565)
2700         ps_ctl_op->u4_min_num_out_bufs = MIN_OUT_BUFS_RGB565;
2701     else if(ps_codec->e_chroma_fmt == IV_RGBA_8888)
2702         ps_ctl_op->u4_min_num_out_bufs = MIN_OUT_BUFS_RGBA8888;
2703     else if((ps_codec->e_chroma_fmt == IV_YUV_420SP_UV)
2704                     || (ps_codec->e_chroma_fmt == IV_YUV_420SP_VU))
2705         ps_ctl_op->u4_min_num_out_bufs = MIN_OUT_BUFS_420SP;
2706 
2707     ps_ctl_op->u4_num_disp_bufs = 1;
2708 
2709     for(i = 0; i < ps_ctl_op->u4_min_num_in_bufs; i++)
2710     {
2711         wd = ALIGN64(ps_codec->i4_wd);
2712         ht = ALIGN64(ps_codec->i4_ht);
2713 
2714         ps_ctl_op->u4_min_in_buf_size[i] = MAX((wd * ht), MIN_BITSBUF_SIZE);
2715     }
2716 
2717     wd = 0;
2718     ht = 0;
2719 
2720     if(ps_codec->i4_sps_done)
2721     {
2722         if(0 == ps_codec->i4_share_disp_buf)
2723         {
2724             wd = ps_codec->i4_disp_wd;
2725             ht = ps_codec->i4_disp_ht;
2726 
2727         }
2728         else
2729         {
2730             wd = ps_codec->i4_disp_strd;
2731             ht = ps_codec->i4_ht + PAD_HT;
2732         }
2733     }
2734     else
2735     {
2736         if(1 == ps_codec->i4_share_disp_buf)
2737         {
2738             wd = ALIGN32(wd + PAD_WD);
2739             ht += PAD_HT;
2740         }
2741     }
2742 
2743     if(ps_codec->i4_disp_strd > wd)
2744         wd = ps_codec->i4_disp_strd;
2745 
2746     if(0 == ps_codec->i4_share_disp_buf)
2747         ps_ctl_op->u4_num_disp_bufs = 1;
2748     else
2749     {
2750         if(ps_codec->i4_sps_done)
2751         {
2752             sps_t *ps_sps = (ps_codec->s_parse.ps_sps_base + ps_codec->i4_sps_id);
2753             WORD32 reorder_pic_cnt, ref_pic_cnt;
2754             reorder_pic_cnt = 0;
2755             if(ps_codec->e_frm_out_mode != IVD_DECODE_FRAME_OUT)
2756                 reorder_pic_cnt = ps_sps->ai1_sps_max_num_reorder_pics[ps_sps->i1_sps_max_sub_layers - 1];
2757             ref_pic_cnt = ps_sps->ai1_sps_max_dec_pic_buffering[ps_sps->i1_sps_max_sub_layers - 1];
2758 
2759             ps_ctl_op->u4_num_disp_bufs = reorder_pic_cnt;
2760 
2761             ps_ctl_op->u4_num_disp_bufs += ref_pic_cnt + 1;
2762         }
2763         else
2764         {
2765             ps_ctl_op->u4_num_disp_bufs = MAX_REF_CNT;
2766         }
2767 
2768         ps_ctl_op->u4_num_disp_bufs = MIN(
2769                         ps_ctl_op->u4_num_disp_bufs, 32);
2770 
2771     }
2772 
2773     /*!*/
2774     if(ps_codec->e_chroma_fmt == IV_YUV_420P)
2775     {
2776         ps_ctl_op->u4_min_out_buf_size[0] = (wd * ht);
2777         ps_ctl_op->u4_min_out_buf_size[1] = (wd * ht) >> 2;
2778         ps_ctl_op->u4_min_out_buf_size[2] = (wd * ht) >> 2;
2779     }
2780     else if(ps_codec->e_chroma_fmt == IV_YUV_422ILE)
2781     {
2782         ps_ctl_op->u4_min_out_buf_size[0] = (wd * ht) * 2;
2783         ps_ctl_op->u4_min_out_buf_size[1] =
2784                         ps_ctl_op->u4_min_out_buf_size[2] = 0;
2785     }
2786     else if(ps_codec->e_chroma_fmt == IV_RGB_565)
2787     {
2788         ps_ctl_op->u4_min_out_buf_size[0] = (wd * ht) * 2;
2789         ps_ctl_op->u4_min_out_buf_size[1] =
2790                         ps_ctl_op->u4_min_out_buf_size[2] = 0;
2791     }
2792     else if(ps_codec->e_chroma_fmt == IV_RGBA_8888)
2793     {
2794         ps_ctl_op->u4_min_out_buf_size[0] = (wd * ht) * 4;
2795         ps_ctl_op->u4_min_out_buf_size[1] =
2796                         ps_ctl_op->u4_min_out_buf_size[2] = 0;
2797     }
2798     else if((ps_codec->e_chroma_fmt == IV_YUV_420SP_UV)
2799                     || (ps_codec->e_chroma_fmt == IV_YUV_420SP_VU))
2800     {
2801         ps_ctl_op->u4_min_out_buf_size[0] = (wd * ht);
2802         ps_ctl_op->u4_min_out_buf_size[1] = (wd * ht) >> 1;
2803         ps_ctl_op->u4_min_out_buf_size[2] = 0;
2804     }
2805     ps_codec->i4_num_disp_bufs = ps_ctl_op->u4_num_disp_bufs;
2806 
2807     return IV_SUCCESS;
2808 }
2809 
2810 
2811 /**
2812 *******************************************************************************
2813 *
2814 * @brief
2815 *  Sets dynamic parameters
2816 *
2817 * @par Description:
2818 *  Sets dynamic parameters. Note Frame skip, decode header  mode are dynamic
2819 *  Dynamic change in stride is not  supported
2820 *
2821 * @param[in] ps_codec_obj
2822 *  Pointer to codec object at API level
2823 *
2824 * @param[in] pv_api_ip
2825 *  Pointer to input argument structure
2826 *
2827 * @param[out] pv_api_op
2828 *  Pointer to output argument structure
2829 *
2830 * @returns  Status
2831 *
2832 * @remarks
2833 *
2834 *
2835 *******************************************************************************
2836 */
ihevcd_set_params(iv_obj_t * ps_codec_obj,void * pv_api_ip,void * pv_api_op)2837 WORD32 ihevcd_set_params(iv_obj_t *ps_codec_obj,
2838                          void *pv_api_ip,
2839                          void *pv_api_op)
2840 {
2841 
2842     codec_t *ps_codec;
2843     WORD32 ret = IV_SUCCESS;
2844     WORD32 strd;
2845     ivd_ctl_set_config_ip_t *s_ctl_dynparams_ip =
2846                     (ivd_ctl_set_config_ip_t *)pv_api_ip;
2847     ivd_ctl_set_config_op_t *s_ctl_dynparams_op =
2848                     (ivd_ctl_set_config_op_t *)pv_api_op;
2849 
2850     ps_codec = (codec_t *)(ps_codec_obj->pv_codec_handle);
2851 
2852     s_ctl_dynparams_op->u4_error_code = 0;
2853 
2854     ps_codec->e_pic_skip_mode = s_ctl_dynparams_ip->e_frm_skip_mode;
2855 
2856     if(s_ctl_dynparams_ip->e_frm_skip_mode != IVD_SKIP_NONE)
2857     {
2858 
2859         if((s_ctl_dynparams_ip->e_frm_skip_mode != IVD_SKIP_P) &&
2860            (s_ctl_dynparams_ip->e_frm_skip_mode != IVD_SKIP_B) &&
2861            (s_ctl_dynparams_ip->e_frm_skip_mode != IVD_SKIP_PB))
2862         {
2863             s_ctl_dynparams_op->u4_error_code = (1 << IVD_UNSUPPORTEDPARAM);
2864             ret = IV_FAIL;
2865         }
2866     }
2867 
2868     strd = ps_codec->i4_disp_strd;
2869     if(1 == ps_codec->i4_share_disp_buf)
2870     {
2871         strd = ps_codec->i4_strd;
2872     }
2873 
2874 
2875     {
2876         if((WORD32)s_ctl_dynparams_ip->u4_disp_wd >= ps_codec->i4_disp_wd)
2877         {
2878             strd = s_ctl_dynparams_ip->u4_disp_wd;
2879         }
2880         else if(0 == ps_codec->i4_sps_done)
2881         {
2882             strd = s_ctl_dynparams_ip->u4_disp_wd;
2883         }
2884         else if(s_ctl_dynparams_ip->u4_disp_wd == 0)
2885         {
2886             strd = ps_codec->i4_disp_strd;
2887         }
2888         else
2889         {
2890             strd = 0;
2891             s_ctl_dynparams_op->u4_error_code |= (1 << IVD_UNSUPPORTEDPARAM);
2892             s_ctl_dynparams_op->u4_error_code |= IHEVCD_INVALID_DISP_STRD;
2893             ret = IV_FAIL;
2894         }
2895     }
2896 
2897     ps_codec->i4_disp_strd = strd;
2898     if(1 == ps_codec->i4_share_disp_buf)
2899     {
2900         ps_codec->i4_strd = strd;
2901     }
2902 
2903     if(s_ctl_dynparams_ip->e_vid_dec_mode == IVD_DECODE_FRAME)
2904         ps_codec->i4_header_mode = 0;
2905     else if(s_ctl_dynparams_ip->e_vid_dec_mode == IVD_DECODE_HEADER)
2906         ps_codec->i4_header_mode = 1;
2907     else
2908     {
2909 
2910         s_ctl_dynparams_op->u4_error_code = (1 << IVD_UNSUPPORTEDPARAM);
2911         ps_codec->i4_header_mode = 1;
2912         ret = IV_FAIL;
2913     }
2914 
2915     ps_codec->e_frm_out_mode = IVD_DISPLAY_FRAME_OUT;
2916 
2917     if((s_ctl_dynparams_ip->e_frm_out_mode != IVD_DECODE_FRAME_OUT) &&
2918        (s_ctl_dynparams_ip->e_frm_out_mode != IVD_DISPLAY_FRAME_OUT))
2919     {
2920         s_ctl_dynparams_op->u4_error_code = (1 << IVD_UNSUPPORTEDPARAM);
2921         ret = IV_FAIL;
2922     }
2923     ps_codec->e_frm_out_mode = s_ctl_dynparams_ip->e_frm_out_mode;
2924 
2925     return ret;
2926 
2927 }
2928 /**
2929 *******************************************************************************
2930 *
2931 * @brief
2932 *  Resets the decoder state
2933 *
2934 * @par Description:
2935 *  Resets the decoder state by calling ihevcd_init()
2936 *
2937 * @param[in] ps_codec_obj
2938 *  Pointer to codec object at API level
2939 *
2940 * @param[in] pv_api_ip
2941 *  Pointer to input argument structure
2942 *
2943 * @param[out] pv_api_op
2944 *  Pointer to output argument structure
2945 *
2946 * @returns  Status
2947 *
2948 * @remarks
2949 *
2950 *
2951 *******************************************************************************
2952 */
ihevcd_reset(iv_obj_t * ps_codec_obj,void * pv_api_ip,void * pv_api_op)2953 WORD32 ihevcd_reset(iv_obj_t *ps_codec_obj, void *pv_api_ip, void *pv_api_op)
2954 {
2955     codec_t *ps_codec;
2956     ivd_ctl_reset_op_t *s_ctl_reset_op = (ivd_ctl_reset_op_t *)pv_api_op;
2957     UNUSED(pv_api_ip);
2958     ps_codec = (codec_t *)(ps_codec_obj->pv_codec_handle);
2959 
2960     if(ps_codec != NULL)
2961     {
2962         DEBUG("\nReset called \n");
2963         ihevcd_join_threads(ps_codec);
2964 
2965         ihevcd_init(ps_codec);
2966     }
2967     else
2968     {
2969         DEBUG("\nReset called without Initializing the decoder\n");
2970         s_ctl_reset_op->u4_error_code = IHEVCD_INIT_NOT_DONE;
2971     }
2972 
2973     return IV_SUCCESS;
2974 }
2975 
2976 /**
2977 *******************************************************************************
2978 *
2979 * @brief
2980 *  Releases display buffer from application to codec  to signal to the codec
2981 * that it can write to this buffer  if required. Till release is called,
2982 * codec can not write  to this buffer
2983 *
2984 * @par Description:
2985 *  Marks the buffer as display done
2986 *
2987 * @param[in] ps_codec_obj
2988 *  Pointer to codec object at API level
2989 *
2990 * @param[in] pv_api_ip
2991 *  Pointer to input argument structure
2992 *
2993 * @param[out] pv_api_op
2994 *  Pointer to output argument structure
2995 *
2996 * @returns  Status
2997 *
2998 * @remarks
2999 *
3000 *
3001 *******************************************************************************
3002 */
3003 
ihevcd_rel_display_frame(iv_obj_t * ps_codec_obj,void * pv_api_ip,void * pv_api_op)3004 WORD32 ihevcd_rel_display_frame(iv_obj_t *ps_codec_obj,
3005                                 void *pv_api_ip,
3006                                 void *pv_api_op)
3007 {
3008 
3009     ivd_rel_display_frame_ip_t *ps_dec_rel_disp_ip;
3010     ivd_rel_display_frame_op_t *ps_dec_rel_disp_op;
3011 
3012     codec_t *ps_codec = (codec_t *)ps_codec_obj->pv_codec_handle;
3013 
3014     ps_dec_rel_disp_ip = (ivd_rel_display_frame_ip_t *)pv_api_ip;
3015     ps_dec_rel_disp_op = (ivd_rel_display_frame_op_t *)pv_api_op;
3016 
3017     UNUSED(ps_dec_rel_disp_op);
3018 
3019     if(0 == ps_codec->i4_share_disp_buf)
3020     {
3021         return IV_SUCCESS;
3022     }
3023 
3024     ihevc_buf_mgr_release((buf_mgr_t *)ps_codec->pv_pic_buf_mgr, ps_dec_rel_disp_ip->u4_disp_buf_id, BUF_MGR_DISP);
3025 
3026     return IV_SUCCESS;
3027 }
3028 /**
3029 *******************************************************************************
3030 *
3031 * @brief
3032 *  Sets degrade params
3033 *
3034 * @par Description:
3035 *  Sets degrade params.
3036 *  Refer to ihevcd_cxa_ctl_degrade_ip_t definition for details
3037 *
3038 * @param[in] ps_codec_obj
3039 *  Pointer to codec object at API level
3040 *
3041 * @param[in] pv_api_ip
3042 *  Pointer to input argument structure
3043 *
3044 * @param[out] pv_api_op
3045 *  Pointer to output argument structure
3046 *
3047 * @returns  Status
3048 *
3049 * @remarks
3050 *
3051 *
3052 *******************************************************************************
3053 */
3054 
ihevcd_set_degrade(iv_obj_t * ps_codec_obj,void * pv_api_ip,void * pv_api_op)3055 WORD32 ihevcd_set_degrade(iv_obj_t *ps_codec_obj,
3056                           void *pv_api_ip,
3057                           void *pv_api_op)
3058 {
3059     ihevcd_cxa_ctl_degrade_ip_t *ps_ip;
3060     ihevcd_cxa_ctl_degrade_op_t *ps_op;
3061     codec_t *ps_codec = (codec_t *)ps_codec_obj->pv_codec_handle;
3062 
3063     ps_ip = (ihevcd_cxa_ctl_degrade_ip_t *)pv_api_ip;
3064     ps_op = (ihevcd_cxa_ctl_degrade_op_t *)pv_api_op;
3065 
3066     ps_codec->i4_degrade_type = ps_ip->i4_degrade_type;
3067     ps_codec->i4_nondegrade_interval = ps_ip->i4_nondegrade_interval;
3068     ps_codec->i4_degrade_pics = ps_ip->i4_degrade_pics;
3069 
3070     ps_op->u4_error_code = 0;
3071     ps_codec->i4_degrade_pic_cnt = 0;
3072 
3073     return IV_SUCCESS;
3074 }
3075 
3076 
3077 /**
3078 *******************************************************************************
3079 *
3080 * @brief
3081 *  Gets frame dimensions/offsets
3082 *
3083 * @par Description:
3084 *  Gets frame buffer chararacteristics such a x & y offsets  display and
3085 * buffer dimensions
3086 *
3087 * @param[in] ps_codec_obj
3088 *  Pointer to codec object at API level
3089 *
3090 * @param[in] pv_api_ip
3091 *  Pointer to input argument structure
3092 *
3093 * @param[out] pv_api_op
3094 *  Pointer to output argument structure
3095 *
3096 * @returns  Status
3097 *
3098 * @remarks
3099 *
3100 *
3101 *******************************************************************************
3102 */
3103 
ihevcd_get_frame_dimensions(iv_obj_t * ps_codec_obj,void * pv_api_ip,void * pv_api_op)3104 WORD32 ihevcd_get_frame_dimensions(iv_obj_t *ps_codec_obj,
3105                                    void *pv_api_ip,
3106                                    void *pv_api_op)
3107 {
3108     ihevcd_cxa_ctl_get_frame_dimensions_ip_t *ps_ip;
3109     ihevcd_cxa_ctl_get_frame_dimensions_op_t *ps_op;
3110     codec_t *ps_codec = (codec_t *)ps_codec_obj->pv_codec_handle;
3111     WORD32 disp_wd, disp_ht, buffer_wd, buffer_ht, x_offset, y_offset;
3112     ps_ip = (ihevcd_cxa_ctl_get_frame_dimensions_ip_t *)pv_api_ip;
3113     ps_op = (ihevcd_cxa_ctl_get_frame_dimensions_op_t *)pv_api_op;
3114     UNUSED(ps_ip);
3115     if(ps_codec->i4_sps_done)
3116     {
3117         disp_wd = ps_codec->i4_disp_wd;
3118         disp_ht = ps_codec->i4_disp_ht;
3119 
3120         if(0 == ps_codec->i4_share_disp_buf)
3121         {
3122             buffer_wd = disp_wd;
3123             buffer_ht = disp_ht;
3124         }
3125         else
3126         {
3127             buffer_wd = ps_codec->i4_strd;
3128             buffer_ht = ps_codec->i4_ht + PAD_HT;
3129         }
3130     }
3131     else
3132     {
3133 
3134         disp_wd = 0;
3135         disp_ht = 0;
3136 
3137         if(0 == ps_codec->i4_share_disp_buf)
3138         {
3139             buffer_wd = disp_wd;
3140             buffer_ht = disp_ht;
3141         }
3142         else
3143         {
3144             buffer_wd = ALIGN16(disp_wd) + PAD_WD;
3145             buffer_ht = ALIGN16(disp_ht) + PAD_HT;
3146 
3147         }
3148     }
3149     if(ps_codec->i4_strd > buffer_wd)
3150         buffer_wd = ps_codec->i4_strd;
3151 
3152     if(0 == ps_codec->i4_share_disp_buf)
3153     {
3154         x_offset = 0;
3155         y_offset = 0;
3156     }
3157     else
3158     {
3159         y_offset = PAD_TOP;
3160         x_offset = PAD_LEFT;
3161     }
3162 
3163     ps_op->u4_disp_wd[0] = disp_wd;
3164     ps_op->u4_disp_ht[0] = disp_ht;
3165     ps_op->u4_buffer_wd[0] = buffer_wd;
3166     ps_op->u4_buffer_ht[0] = buffer_ht;
3167     ps_op->u4_x_offset[0] = x_offset;
3168     ps_op->u4_y_offset[0] = y_offset;
3169 
3170     ps_op->u4_disp_wd[1] = ps_op->u4_disp_wd[2] = ((ps_op->u4_disp_wd[0] + 1)
3171                     >> 1);
3172     ps_op->u4_disp_ht[1] = ps_op->u4_disp_ht[2] = ((ps_op->u4_disp_ht[0] + 1)
3173                     >> 1);
3174     ps_op->u4_buffer_wd[1] = ps_op->u4_buffer_wd[2] = (ps_op->u4_buffer_wd[0]
3175                     >> 1);
3176     ps_op->u4_buffer_ht[1] = ps_op->u4_buffer_ht[2] = (ps_op->u4_buffer_ht[0]
3177                     >> 1);
3178     ps_op->u4_x_offset[1] = ps_op->u4_x_offset[2] = (ps_op->u4_x_offset[0]
3179                     >> 1);
3180     ps_op->u4_y_offset[1] = ps_op->u4_y_offset[2] = (ps_op->u4_y_offset[0]
3181                     >> 1);
3182 
3183     if((ps_codec->e_chroma_fmt == IV_YUV_420SP_UV)
3184                     || (ps_codec->e_chroma_fmt == IV_YUV_420SP_VU))
3185     {
3186         ps_op->u4_disp_wd[2] = 0;
3187         ps_op->u4_disp_ht[2] = 0;
3188         ps_op->u4_buffer_wd[2] = 0;
3189         ps_op->u4_buffer_ht[2] = 0;
3190         ps_op->u4_x_offset[2] = 0;
3191         ps_op->u4_y_offset[2] = 0;
3192 
3193         ps_op->u4_disp_wd[1] <<= 1;
3194         ps_op->u4_buffer_wd[1] <<= 1;
3195         ps_op->u4_x_offset[1] <<= 1;
3196     }
3197 
3198     return IV_SUCCESS;
3199 
3200 }
3201 
3202 
3203 /**
3204 *******************************************************************************
3205 *
3206 * @brief
3207 *  Gets vui parameters
3208 *
3209 * @par Description:
3210 *  Gets VUI parameters
3211 *
3212 * @param[in] ps_codec_obj
3213 *  Pointer to codec object at API level
3214 *
3215 * @param[in] pv_api_ip
3216 *  Pointer to input argument structure
3217 *
3218 * @param[out] pv_api_op
3219 *  Pointer to output argument structure
3220 *
3221 * @returns  Status
3222 *
3223 * @remarks
3224 *
3225 *
3226 *******************************************************************************
3227 */
ihevcd_get_vui_params(iv_obj_t * ps_codec_obj,void * pv_api_ip,void * pv_api_op)3228 WORD32 ihevcd_get_vui_params(iv_obj_t *ps_codec_obj,
3229                              void *pv_api_ip,
3230                              void *pv_api_op)
3231 {
3232     ihevcd_cxa_ctl_get_vui_params_ip_t *ps_ip;
3233     ihevcd_cxa_ctl_get_vui_params_op_t *ps_op;
3234     codec_t *ps_codec = (codec_t *)ps_codec_obj->pv_codec_handle;
3235     sps_t *ps_sps;
3236     vui_t *ps_vui;
3237     WORD32 i;
3238 
3239     ps_ip = (ihevcd_cxa_ctl_get_vui_params_ip_t *)pv_api_ip;
3240     ps_op = (ihevcd_cxa_ctl_get_vui_params_op_t *)pv_api_op;
3241 
3242     if(0 == ps_codec->i4_sps_done)
3243     {
3244         ps_op->u4_error_code = IHEVCD_VUI_PARAMS_NOT_FOUND;
3245         return IV_FAIL;
3246     }
3247 
3248     ps_sps = ps_codec->s_parse.ps_sps;
3249     if(0 == ps_sps->i1_sps_valid || 0 == ps_sps->i1_vui_parameters_present_flag)
3250     {
3251         WORD32 sps_idx = 0;
3252         ps_sps = ps_codec->ps_sps_base;
3253 
3254         while((0 == ps_sps->i1_sps_valid) || (0 == ps_sps->i1_vui_parameters_present_flag))
3255         {
3256             sps_idx++;
3257             ps_sps++;
3258 
3259             if(sps_idx == MAX_SPS_CNT - 1)
3260             {
3261                 ps_op->u4_error_code = IHEVCD_VUI_PARAMS_NOT_FOUND;
3262                 return IV_FAIL;
3263             }
3264         }
3265     }
3266 
3267     ps_vui = &ps_sps->s_vui_parameters;
3268     UNUSED(ps_ip);
3269 
3270     ps_op->u1_aspect_ratio_info_present_flag         =  ps_vui->u1_aspect_ratio_info_present_flag;
3271     ps_op->u1_aspect_ratio_idc                       =  ps_vui->u1_aspect_ratio_idc;
3272     ps_op->u2_sar_width                              =  ps_vui->u2_sar_width;
3273     ps_op->u2_sar_height                             =  ps_vui->u2_sar_height;
3274     ps_op->u1_overscan_info_present_flag             =  ps_vui->u1_overscan_info_present_flag;
3275     ps_op->u1_overscan_appropriate_flag              =  ps_vui->u1_overscan_appropriate_flag;
3276     ps_op->u1_video_signal_type_present_flag         =  ps_vui->u1_video_signal_type_present_flag;
3277     ps_op->u1_video_format                           =  ps_vui->u1_video_format;
3278     ps_op->u1_video_full_range_flag                  =  ps_vui->u1_video_full_range_flag;
3279     ps_op->u1_colour_description_present_flag        =  ps_vui->u1_colour_description_present_flag;
3280     ps_op->u1_colour_primaries                       =  ps_vui->u1_colour_primaries;
3281     ps_op->u1_transfer_characteristics               =  ps_vui->u1_transfer_characteristics;
3282     ps_op->u1_matrix_coefficients                    =  ps_vui->u1_matrix_coefficients;
3283     ps_op->u1_chroma_loc_info_present_flag           =  ps_vui->u1_chroma_loc_info_present_flag;
3284     ps_op->u1_chroma_sample_loc_type_top_field       =  ps_vui->u1_chroma_sample_loc_type_top_field;
3285     ps_op->u1_chroma_sample_loc_type_bottom_field    =  ps_vui->u1_chroma_sample_loc_type_bottom_field;
3286     ps_op->u1_neutral_chroma_indication_flag         =  ps_vui->u1_neutral_chroma_indication_flag;
3287     ps_op->u1_field_seq_flag                         =  ps_vui->u1_field_seq_flag;
3288     ps_op->u1_frame_field_info_present_flag          =  ps_vui->u1_frame_field_info_present_flag;
3289     ps_op->u1_default_display_window_flag            =  ps_vui->u1_default_display_window_flag;
3290     ps_op->u4_def_disp_win_left_offset               =  ps_vui->u4_def_disp_win_left_offset;
3291     ps_op->u4_def_disp_win_right_offset              =  ps_vui->u4_def_disp_win_right_offset;
3292     ps_op->u4_def_disp_win_top_offset                =  ps_vui->u4_def_disp_win_top_offset;
3293     ps_op->u4_def_disp_win_bottom_offset             =  ps_vui->u4_def_disp_win_bottom_offset;
3294     ps_op->u1_vui_hrd_parameters_present_flag        =  ps_vui->u1_vui_hrd_parameters_present_flag;
3295     ps_op->u1_vui_timing_info_present_flag           =  ps_vui->u1_vui_timing_info_present_flag;
3296     ps_op->u4_vui_num_units_in_tick                  =  ps_vui->u4_vui_num_units_in_tick;
3297     ps_op->u4_vui_time_scale                         =  ps_vui->u4_vui_time_scale;
3298     ps_op->u1_poc_proportional_to_timing_flag        =  ps_vui->u1_poc_proportional_to_timing_flag;
3299     ps_op->u4_num_ticks_poc_diff_one_minus1          =  ps_vui->u4_num_ticks_poc_diff_one_minus1;
3300     ps_op->u1_bitstream_restriction_flag             =  ps_vui->u1_bitstream_restriction_flag;
3301     ps_op->u1_tiles_fixed_structure_flag             =  ps_vui->u1_tiles_fixed_structure_flag;
3302     ps_op->u1_motion_vectors_over_pic_boundaries_flag =  ps_vui->u1_motion_vectors_over_pic_boundaries_flag;
3303     ps_op->u1_restricted_ref_pic_lists_flag          =  ps_vui->u1_restricted_ref_pic_lists_flag;
3304     ps_op->u4_min_spatial_segmentation_idc           =  ps_vui->u4_min_spatial_segmentation_idc;
3305     ps_op->u1_max_bytes_per_pic_denom                =  ps_vui->u1_max_bytes_per_pic_denom;
3306     ps_op->u1_max_bits_per_mincu_denom               =  ps_vui->u1_max_bits_per_mincu_denom;
3307     ps_op->u1_log2_max_mv_length_horizontal          =  ps_vui->u1_log2_max_mv_length_horizontal;
3308     ps_op->u1_log2_max_mv_length_vertical            =  ps_vui->u1_log2_max_mv_length_vertical;
3309 
3310 
3311     /* HRD parameters */
3312     ps_op->u1_timing_info_present_flag                         =    ps_vui->s_vui_hrd_parameters.u1_timing_info_present_flag;
3313     ps_op->u4_num_units_in_tick                                =    ps_vui->s_vui_hrd_parameters.u4_num_units_in_tick;
3314     ps_op->u4_time_scale                                       =    ps_vui->s_vui_hrd_parameters.u4_time_scale;
3315     ps_op->u1_nal_hrd_parameters_present_flag                  =    ps_vui->s_vui_hrd_parameters.u1_nal_hrd_parameters_present_flag;
3316     ps_op->u1_vcl_hrd_parameters_present_flag                  =    ps_vui->s_vui_hrd_parameters.u1_vcl_hrd_parameters_present_flag;
3317     ps_op->u1_cpbdpb_delays_present_flag                       =    ps_vui->s_vui_hrd_parameters.u1_cpbdpb_delays_present_flag;
3318     ps_op->u1_sub_pic_cpb_params_present_flag                  =    ps_vui->s_vui_hrd_parameters.u1_sub_pic_cpb_params_present_flag;
3319     ps_op->u1_tick_divisor_minus2                              =    ps_vui->s_vui_hrd_parameters.u1_tick_divisor_minus2;
3320     ps_op->u1_du_cpb_removal_delay_increment_length_minus1     =    ps_vui->s_vui_hrd_parameters.u1_du_cpb_removal_delay_increment_length_minus1;
3321     ps_op->u1_sub_pic_cpb_params_in_pic_timing_sei_flag        =    ps_vui->s_vui_hrd_parameters.u1_sub_pic_cpb_params_in_pic_timing_sei_flag;
3322     ps_op->u1_dpb_output_delay_du_length_minus1                =    ps_vui->s_vui_hrd_parameters.u1_dpb_output_delay_du_length_minus1;
3323     ps_op->u4_bit_rate_scale                                   =    ps_vui->s_vui_hrd_parameters.u4_bit_rate_scale;
3324     ps_op->u4_cpb_size_scale                                   =    ps_vui->s_vui_hrd_parameters.u4_cpb_size_scale;
3325     ps_op->u4_cpb_size_du_scale                                =    ps_vui->s_vui_hrd_parameters.u4_cpb_size_du_scale;
3326     ps_op->u1_initial_cpb_removal_delay_length_minus1          =    ps_vui->s_vui_hrd_parameters.u1_initial_cpb_removal_delay_length_minus1;
3327     ps_op->u1_au_cpb_removal_delay_length_minus1               =    ps_vui->s_vui_hrd_parameters.u1_au_cpb_removal_delay_length_minus1;
3328     ps_op->u1_dpb_output_delay_length_minus1                   =    ps_vui->s_vui_hrd_parameters.u1_dpb_output_delay_length_minus1;
3329 
3330     for(i = 0; i < 6; i++)
3331     {
3332         ps_op->au1_fixed_pic_rate_general_flag[i]                  =    ps_vui->s_vui_hrd_parameters.au1_fixed_pic_rate_general_flag[i];
3333         ps_op->au1_fixed_pic_rate_within_cvs_flag[i]               =    ps_vui->s_vui_hrd_parameters.au1_fixed_pic_rate_within_cvs_flag[i];
3334         ps_op->au2_elemental_duration_in_tc_minus1[i]              =    ps_vui->s_vui_hrd_parameters.au2_elemental_duration_in_tc_minus1[i];
3335         ps_op->au1_low_delay_hrd_flag[i]                           =    ps_vui->s_vui_hrd_parameters.au1_low_delay_hrd_flag[i];
3336         ps_op->au1_cpb_cnt_minus1[i]                               =    ps_vui->s_vui_hrd_parameters.au1_cpb_cnt_minus1[i];
3337     }
3338 
3339 
3340     return IV_SUCCESS;
3341 }
3342 
3343 #ifndef DISABLE_SEI
3344 /**
3345 *******************************************************************************
3346 *
3347 * @brief
3348 *  Gets SEI mastering display color volume parameters
3349 *
3350 * @par Description:
3351 *  Gets SEI mastering display color volume parameters
3352 *
3353 * @param[in] ps_codec_obj
3354 *  Pointer to codec object at API level
3355 *
3356 * @param[in] pv_api_ip
3357 *  Pointer to input argument structure
3358 *
3359 * @param[out] pv_api_op
3360 *  Pointer to output argument structure
3361 *
3362 * @returns  Status
3363 *
3364 * @remarks
3365 *
3366 *
3367 *******************************************************************************
3368 */
ihevcd_get_sei_mastering_params(iv_obj_t * ps_codec_obj,void * pv_api_ip,void * pv_api_op)3369 WORD32 ihevcd_get_sei_mastering_params(iv_obj_t *ps_codec_obj,
3370                              void *pv_api_ip,
3371                              void *pv_api_op)
3372 {
3373     ihevcd_cxa_ctl_get_sei_mastering_params_ip_t *ps_ip;
3374     ihevcd_cxa_ctl_get_sei_mastering_params_op_t *ps_op;
3375     codec_t *ps_codec = (codec_t *)ps_codec_obj->pv_codec_handle;
3376     sei_params_t *ps_sei;
3377     mastering_dis_col_vol_sei_params_t *ps_mastering_dis_col_vol;
3378     WORD32 i;
3379 
3380     ps_ip = (ihevcd_cxa_ctl_get_sei_mastering_params_ip_t *)pv_api_ip;
3381     ps_op = (ihevcd_cxa_ctl_get_sei_mastering_params_op_t *)pv_api_op;
3382     UNUSED(ps_ip);
3383     if(NULL == ps_codec->ps_disp_buf)
3384     {
3385         ps_op->u4_error_code = IHEVCD_SEI_MASTERING_PARAMS_NOT_FOUND;
3386         return IV_FAIL;
3387     }
3388     ps_sei = &ps_codec->ps_disp_buf->s_sei_params;
3389     if((0 == ps_sei->i4_sei_mastering_disp_colour_vol_params_present_flags)
3390                     || (0 == ps_sei->i1_sei_parameters_present_flag))
3391     {
3392         ps_op->u4_error_code = IHEVCD_SEI_MASTERING_PARAMS_NOT_FOUND;
3393         return IV_FAIL;
3394     }
3395 
3396     ps_mastering_dis_col_vol = &ps_sei->s_mastering_dis_col_vol_sei_params;
3397 
3398     for(i = 0; i < 3; i++)
3399     {
3400         ps_op->au2_display_primaries_x[i] =
3401                     ps_mastering_dis_col_vol->au2_display_primaries_x[i];
3402 
3403         ps_op->au2_display_primaries_y[i] =
3404                     ps_mastering_dis_col_vol->au2_display_primaries_y[i];
3405     }
3406 
3407     ps_op->u2_white_point_x = ps_mastering_dis_col_vol->u2_white_point_x;
3408 
3409     ps_op->u2_white_point_y = ps_mastering_dis_col_vol->u2_white_point_y;
3410 
3411     ps_op->u4_max_display_mastering_luminance =
3412                     ps_mastering_dis_col_vol->u4_max_display_mastering_luminance;
3413 
3414     ps_op->u4_min_display_mastering_luminance =
3415                     ps_mastering_dis_col_vol->u4_min_display_mastering_luminance;
3416 
3417     return IV_SUCCESS;
3418 }
3419 #endif
3420 
3421 /**
3422 *******************************************************************************
3423 *
3424 * @brief
3425 *  Sets Processor type
3426 *
3427 * @par Description:
3428 *  Sets Processor type
3429 *
3430 * @param[in] ps_codec_obj
3431 *  Pointer to codec object at API level
3432 *
3433 * @param[in] pv_api_ip
3434 *  Pointer to input argument structure
3435 *
3436 * @param[out] pv_api_op
3437 *  Pointer to output argument structure
3438 *
3439 * @returns  Status
3440 *
3441 * @remarks
3442 *
3443 *
3444 *******************************************************************************
3445 */
3446 
ihevcd_set_processor(iv_obj_t * ps_codec_obj,void * pv_api_ip,void * pv_api_op)3447 WORD32 ihevcd_set_processor(iv_obj_t *ps_codec_obj,
3448                             void *pv_api_ip,
3449                             void *pv_api_op)
3450 {
3451     ihevcd_cxa_ctl_set_processor_ip_t *ps_ip;
3452     ihevcd_cxa_ctl_set_processor_op_t *ps_op;
3453     codec_t *ps_codec = (codec_t *)ps_codec_obj->pv_codec_handle;
3454 
3455     ps_ip = (ihevcd_cxa_ctl_set_processor_ip_t *)pv_api_ip;
3456     ps_op = (ihevcd_cxa_ctl_set_processor_op_t *)pv_api_op;
3457 
3458     ps_codec->e_processor_arch = (IVD_ARCH_T)ps_ip->u4_arch;
3459     ps_codec->e_processor_soc = (IVD_SOC_T)ps_ip->u4_soc;
3460 
3461     ihevcd_init_function_ptr(ps_codec);
3462 
3463     ihevcd_update_function_ptr(ps_codec);
3464 
3465     if(ps_codec->e_processor_soc && (ps_codec->e_processor_soc <= SOC_HISI_37X))
3466     {
3467         /* 8th bit indicates if format conversion is to be done ahead */
3468         if(ps_codec->e_processor_soc & 0x80)
3469             ps_codec->u4_enable_fmt_conv_ahead = 1;
3470 
3471         /* Lower 7 bit indicate NCTB - if non-zero */
3472         ps_codec->e_processor_soc &= 0x7F;
3473 
3474         if(ps_codec->e_processor_soc)
3475             ps_codec->u4_nctb = ps_codec->e_processor_soc;
3476 
3477 
3478     }
3479 
3480     if((ps_codec->e_processor_soc == SOC_HISI_37X) && (ps_codec->i4_num_cores == 2))
3481     {
3482         ps_codec->u4_nctb = 2;
3483     }
3484 
3485 
3486     ps_op->u4_error_code = 0;
3487     return IV_SUCCESS;
3488 }
3489 
3490 /**
3491 *******************************************************************************
3492 *
3493 * @brief
3494 *  Sets Number of cores that can be used in the codec. Codec uses these many
3495 * threads for decoding
3496 *
3497 * @par Description:
3498 *  Sets number of cores
3499 *
3500 * @param[in] ps_codec_obj
3501 *  Pointer to codec object at API level
3502 *
3503 * @param[in] pv_api_ip
3504 *  Pointer to input argument structure
3505 *
3506 * @param[out] pv_api_op
3507 *  Pointer to output argument structure
3508 *
3509 * @returns  Status
3510 *
3511 * @remarks
3512 *
3513 *
3514 *******************************************************************************
3515 */
3516 
ihevcd_set_num_cores(iv_obj_t * ps_codec_obj,void * pv_api_ip,void * pv_api_op)3517 WORD32 ihevcd_set_num_cores(iv_obj_t *ps_codec_obj,
3518                             void *pv_api_ip,
3519                             void *pv_api_op)
3520 {
3521     ihevcd_cxa_ctl_set_num_cores_ip_t *ps_ip;
3522     ihevcd_cxa_ctl_set_num_cores_op_t *ps_op;
3523     codec_t *ps_codec = (codec_t *)ps_codec_obj->pv_codec_handle;
3524 
3525     ps_ip = (ihevcd_cxa_ctl_set_num_cores_ip_t *)pv_api_ip;
3526     ps_op = (ihevcd_cxa_ctl_set_num_cores_op_t *)pv_api_op;
3527 
3528     ps_codec->i4_num_cores = ps_ip->u4_num_cores;
3529     ps_op->u4_error_code = 0;
3530     return IV_SUCCESS;
3531 }
3532 /**
3533 *******************************************************************************
3534 *
3535 * @brief
3536 *  Codec control call
3537 *
3538 * @par Description:
3539 *  Codec control call which in turn calls appropriate calls  based on
3540 * subcommand
3541 *
3542 * @param[in] ps_codec_obj
3543 *  Pointer to codec object at API level
3544 *
3545 * @param[in] pv_api_ip
3546 *  Pointer to input argument structure
3547 *
3548 * @param[out] pv_api_op
3549 *  Pointer to output argument structure
3550 *
3551 * @returns  Status
3552 *
3553 * @remarks
3554 *
3555 *
3556 *******************************************************************************
3557 */
3558 
ihevcd_ctl(iv_obj_t * ps_codec_obj,void * pv_api_ip,void * pv_api_op)3559 WORD32 ihevcd_ctl(iv_obj_t *ps_codec_obj, void *pv_api_ip, void *pv_api_op)
3560 {
3561     ivd_ctl_set_config_ip_t *ps_ctl_ip;
3562     ivd_ctl_set_config_op_t *ps_ctl_op;
3563     WORD32 ret = 0;
3564     WORD32 subcommand;
3565     codec_t *ps_codec = (codec_t *)ps_codec_obj->pv_codec_handle;
3566 
3567     ps_ctl_ip = (ivd_ctl_set_config_ip_t *)pv_api_ip;
3568     ps_ctl_op = (ivd_ctl_set_config_op_t *)pv_api_op;
3569 
3570     if(ps_codec->i4_init_done != 1)
3571     {
3572         ps_ctl_op->u4_error_code |= 1 << IVD_FATALERROR;
3573         ps_ctl_op->u4_error_code |= IHEVCD_INIT_NOT_DONE;
3574         return IV_FAIL;
3575     }
3576     subcommand = ps_ctl_ip->e_sub_cmd;
3577 
3578     switch(subcommand)
3579     {
3580         case IVD_CMD_CTL_GETPARAMS:
3581             ret = ihevcd_get_status(ps_codec_obj, (void *)pv_api_ip,
3582                                     (void *)pv_api_op);
3583             break;
3584         case IVD_CMD_CTL_SETPARAMS:
3585             ret = ihevcd_set_params(ps_codec_obj, (void *)pv_api_ip,
3586                                     (void *)pv_api_op);
3587             break;
3588         case IVD_CMD_CTL_RESET:
3589             ret = ihevcd_reset(ps_codec_obj, (void *)pv_api_ip,
3590                                (void *)pv_api_op);
3591             break;
3592         case IVD_CMD_CTL_SETDEFAULT:
3593         {
3594             ivd_ctl_set_config_op_t *s_ctl_dynparams_op =
3595                             (ivd_ctl_set_config_op_t *)pv_api_op;
3596 
3597             ret = ihevcd_set_default_params(ps_codec);
3598             if(IV_SUCCESS == ret)
3599                 s_ctl_dynparams_op->u4_error_code = 0;
3600             break;
3601         }
3602         case IVD_CMD_CTL_FLUSH:
3603             ret = ihevcd_set_flush_mode(ps_codec_obj, (void *)pv_api_ip,
3604                                         (void *)pv_api_op);
3605             break;
3606         case IVD_CMD_CTL_GETBUFINFO:
3607             ret = ihevcd_get_buf_info(ps_codec_obj, (void *)pv_api_ip,
3608                                       (void *)pv_api_op);
3609             break;
3610         case IVD_CMD_CTL_GETVERSION:
3611         {
3612             ivd_ctl_getversioninfo_ip_t *ps_ip;
3613             ivd_ctl_getversioninfo_op_t *ps_op;
3614             IV_API_CALL_STATUS_T ret;
3615             ps_ip = (ivd_ctl_getversioninfo_ip_t *)pv_api_ip;
3616             ps_op = (ivd_ctl_getversioninfo_op_t *)pv_api_op;
3617 
3618             ps_op->u4_error_code = IV_SUCCESS;
3619 
3620             if((WORD32)ps_ip->u4_version_buffer_size <= 0)
3621             {
3622                 ps_op->u4_error_code = IHEVCD_CXA_VERS_BUF_INSUFFICIENT;
3623                 ret = IV_FAIL;
3624             }
3625             else
3626             {
3627                 ret = ihevcd_get_version((CHAR *)ps_ip->pv_version_buffer,
3628                                          ps_ip->u4_version_buffer_size);
3629                 if(ret != IV_SUCCESS)
3630                 {
3631                     ps_op->u4_error_code = IHEVCD_CXA_VERS_BUF_INSUFFICIENT;
3632                     ret = IV_FAIL;
3633                 }
3634             }
3635         }
3636             break;
3637         case IHEVCD_CXA_CMD_CTL_DEGRADE:
3638             ret = ihevcd_set_degrade(ps_codec_obj, (void *)pv_api_ip,
3639                             (void *)pv_api_op);
3640             break;
3641         case IHEVCD_CXA_CMD_CTL_SET_NUM_CORES:
3642             ret = ihevcd_set_num_cores(ps_codec_obj, (void *)pv_api_ip,
3643                                        (void *)pv_api_op);
3644             break;
3645         case IHEVCD_CXA_CMD_CTL_GET_BUFFER_DIMENSIONS:
3646             ret = ihevcd_get_frame_dimensions(ps_codec_obj, (void *)pv_api_ip,
3647                                               (void *)pv_api_op);
3648             break;
3649         case IHEVCD_CXA_CMD_CTL_GET_VUI_PARAMS:
3650             ret = ihevcd_get_vui_params(ps_codec_obj, (void *)pv_api_ip,
3651                                         (void *)pv_api_op);
3652             break;
3653         case IHEVCD_CXA_CMD_CTL_GET_SEI_MASTERING_PARAMS:
3654 #ifndef DISABLE_SEI
3655             ret = ihevcd_get_sei_mastering_params(ps_codec_obj, (void *)pv_api_ip,
3656                                         (void *)pv_api_op);
3657 #else
3658             {
3659                 ihevcd_cxa_ctl_get_sei_mastering_params_op_t *ps_op =
3660                         (ihevcd_cxa_ctl_get_sei_mastering_params_op_t *)pv_api_op;
3661                 ps_op->u4_error_code = IHEVCD_SEI_MASTERING_PARAMS_NOT_FOUND;
3662                 return IV_FAIL;
3663             }
3664 #endif
3665             break;
3666         case IHEVCD_CXA_CMD_CTL_SET_PROCESSOR:
3667             ret = ihevcd_set_processor(ps_codec_obj, (void *)pv_api_ip,
3668                             (void *)pv_api_op);
3669             break;
3670         default:
3671             DEBUG("\nDo nothing\n");
3672             break;
3673     }
3674 
3675     return ret;
3676 }
3677 
3678 /**
3679 *******************************************************************************
3680 *
3681 * @brief
3682 *  Codecs entry point function. All the function calls to  the codec are
3683 * done using this function with different  values specified in command
3684 *
3685 * @par Description:
3686 *  Arguments are tested for validity and then based on the  command
3687 * appropriate function is called
3688 *
3689 * @param[in] ps_handle
3690 *  API level handle for codec
3691 *
3692 * @param[in] pv_api_ip
3693 *  Input argument structure
3694 *
3695 * @param[out] pv_api_op
3696 *  Output argument structure
3697 *
3698 * @returns  Status of the function corresponding to command
3699 *
3700 * @remarks
3701 *
3702 *
3703 *******************************************************************************
3704 */
ihevcd_cxa_api_function(iv_obj_t * ps_handle,void * pv_api_ip,void * pv_api_op)3705 IV_API_CALL_STATUS_T ihevcd_cxa_api_function(iv_obj_t *ps_handle,
3706                                              void *pv_api_ip,
3707                                              void *pv_api_op)
3708 {
3709     WORD32 command;
3710     UWORD32 *pu4_ptr_cmd;
3711     WORD32 ret = 0;
3712     IV_API_CALL_STATUS_T e_status;
3713     e_status = api_check_struct_sanity(ps_handle, pv_api_ip, pv_api_op);
3714 
3715     if(e_status != IV_SUCCESS)
3716     {
3717         DEBUG("error code = %d\n", *((UWORD32 *)pv_api_op + 1));
3718         return IV_FAIL;
3719     }
3720 
3721     pu4_ptr_cmd = (UWORD32 *)pv_api_ip;
3722     pu4_ptr_cmd++;
3723 
3724     command = *pu4_ptr_cmd;
3725 
3726     switch(command)
3727     {
3728         case IVD_CMD_CREATE:
3729             ret = ihevcd_create(ps_handle, (void *)pv_api_ip, (void *)pv_api_op);
3730             break;
3731         case IVD_CMD_DELETE:
3732             ret = ihevcd_delete(ps_handle, (void *)pv_api_ip, (void *)pv_api_op);
3733             break;
3734 
3735         case IVD_CMD_VIDEO_DECODE:
3736             ret = ihevcd_decode(ps_handle, (void *)pv_api_ip, (void *)pv_api_op);
3737             break;
3738 
3739         case IVD_CMD_GET_DISPLAY_FRAME:
3740             //ret = ihevcd_get_display_frame(ps_handle,(void *)pv_api_ip,(void *)pv_api_op);
3741             break;
3742 
3743         case IVD_CMD_SET_DISPLAY_FRAME:
3744             ret = ihevcd_set_display_frame(ps_handle, (void *)pv_api_ip,
3745                                            (void *)pv_api_op);
3746 
3747             break;
3748 
3749         case IVD_CMD_REL_DISPLAY_FRAME:
3750             ret = ihevcd_rel_display_frame(ps_handle, (void *)pv_api_ip,
3751                                            (void *)pv_api_op);
3752             break;
3753 
3754         case IVD_CMD_VIDEO_CTL:
3755             ret = ihevcd_ctl(ps_handle, (void *)pv_api_ip, (void *)pv_api_op);
3756             break;
3757         default:
3758             ret = IV_FAIL;
3759             break;
3760     }
3761 
3762     return (IV_API_CALL_STATUS_T)ret;
3763 }
3764 
3765