1 /*
2 * Copyright (c) 2015 - 2018, Nordic Semiconductor ASA
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are met:
7 *
8 * 1. Redistributions of source code must retain the above copyright notice, this
9 * list of conditions and the following disclaimer.
10 *
11 * 2. Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution.
14 *
15 * 3. Neither the name of the copyright holder nor the names of its
16 * contributors may be used to endorse or promote products derived from this
17 * software without specific prior written permission.
18 *
19 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
20 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
21 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
22 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
23 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
24 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
25 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
26 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
27 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
28 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
29 * POSSIBILITY OF SUCH DAMAGE.
30 */
31
32 #ifndef NRF_TWIM_H__
33 #define NRF_TWIM_H__
34
35 #include <nrfx.h>
36
37 #ifdef __cplusplus
38 extern "C" {
39 #endif
40
41 /**
42 * @defgroup nrf_twim_hal TWIM HAL
43 * @{
44 * @ingroup nrf_twim
45 * @brief Hardware access layer for managing the TWIM peripheral.
46 */
47
48 /**
49 * @brief TWIM tasks.
50 */
51 typedef enum
52 {
53 /*lint -save -e30*/
54 NRF_TWIM_TASK_STARTRX = offsetof(NRF_TWIM_Type, TASKS_STARTRX), ///< Start TWI receive sequence.
55 NRF_TWIM_TASK_STARTTX = offsetof(NRF_TWIM_Type, TASKS_STARTTX), ///< Start TWI transmit sequence.
56 NRF_TWIM_TASK_STOP = offsetof(NRF_TWIM_Type, TASKS_STOP), ///< Stop TWI transaction.
57 NRF_TWIM_TASK_SUSPEND = offsetof(NRF_TWIM_Type, TASKS_SUSPEND), ///< Suspend TWI transaction.
58 NRF_TWIM_TASK_RESUME = offsetof(NRF_TWIM_Type, TASKS_RESUME) ///< Resume TWI transaction.
59 /*lint -restore*/
60 } nrf_twim_task_t;
61
62 /**
63 * @brief TWIM events.
64 */
65 typedef enum
66 {
67 /*lint -save -e30*/
68 NRF_TWIM_EVENT_STOPPED = offsetof(NRF_TWIM_Type, EVENTS_STOPPED), ///< TWI stopped.
69 NRF_TWIM_EVENT_ERROR = offsetof(NRF_TWIM_Type, EVENTS_ERROR), ///< TWI error.
70 NRF_TWIM_EVENT_SUSPENDED = 0x148, ///< TWI suspended.
71 NRF_TWIM_EVENT_RXSTARTED = offsetof(NRF_TWIM_Type, EVENTS_RXSTARTED), ///< Receive sequence started.
72 NRF_TWIM_EVENT_TXSTARTED = offsetof(NRF_TWIM_Type, EVENTS_TXSTARTED), ///< Transmit sequence started.
73 NRF_TWIM_EVENT_LASTRX = offsetof(NRF_TWIM_Type, EVENTS_LASTRX), ///< Byte boundary, starting to receive the last byte.
74 NRF_TWIM_EVENT_LASTTX = offsetof(NRF_TWIM_Type, EVENTS_LASTTX) ///< Byte boundary, starting to transmit the last byte.
75 /*lint -restore*/
76 } nrf_twim_event_t;
77
78 /**
79 * @brief TWIM shortcuts.
80 */
81 typedef enum
82 {
83 NRF_TWIM_SHORT_LASTTX_STARTRX_MASK = TWIM_SHORTS_LASTTX_STARTRX_Msk, ///< Shortcut between LASTTX event and STARTRX task.
84 NRF_TWIM_SHORT_LASTTX_SUSPEND_MASK = TWIM_SHORTS_LASTTX_SUSPEND_Msk, ///< Shortcut between LASTTX event and SUSPEND task.
85 NRF_TWIM_SHORT_LASTTX_STOP_MASK = TWIM_SHORTS_LASTTX_STOP_Msk, ///< Shortcut between LASTTX event and STOP task.
86 NRF_TWIM_SHORT_LASTRX_STARTTX_MASK = TWIM_SHORTS_LASTRX_STARTTX_Msk, ///< Shortcut between LASTRX event and STARTTX task.
87 NRF_TWIM_SHORT_LASTRX_STOP_MASK = TWIM_SHORTS_LASTRX_STOP_Msk, ///< Shortcut between LASTRX event and STOP task.
88 NRF_TWIM_ALL_SHORTS_MASK = TWIM_SHORTS_LASTTX_STARTRX_Msk |
89 TWIM_SHORTS_LASTTX_SUSPEND_Msk |
90 TWIM_SHORTS_LASTTX_STOP_Msk |
91 TWIM_SHORTS_LASTRX_STARTTX_Msk |
92 TWIM_SHORTS_LASTRX_STOP_Msk ///< All TWIM shortcuts.
93 } nrf_twim_short_mask_t;
94
95 /**
96 * @brief TWIM interrupts.
97 */
98 typedef enum
99 {
100 NRF_TWIM_INT_STOPPED_MASK = TWIM_INTENSET_STOPPED_Msk, ///< Interrupt on STOPPED event.
101 NRF_TWIM_INT_ERROR_MASK = TWIM_INTENSET_ERROR_Msk, ///< Interrupt on ERROR event.
102 NRF_TWIM_INT_SUSPENDED_MASK = TWIM_INTENSET_SUSPENDED_Msk, ///< Interrupt on SUSPENDED event.
103 NRF_TWIM_INT_RXSTARTED_MASK = TWIM_INTENSET_RXSTARTED_Msk, ///< Interrupt on RXSTARTED event.
104 NRF_TWIM_INT_TXSTARTED_MASK = TWIM_INTENSET_TXSTARTED_Msk, ///< Interrupt on TXSTARTED event.
105 NRF_TWIM_INT_LASTRX_MASK = TWIM_INTENSET_LASTRX_Msk, ///< Interrupt on LASTRX event.
106 NRF_TWIM_INT_LASTTX_MASK = TWIM_INTENSET_LASTTX_Msk, ///< Interrupt on LASTTX event.
107 NRF_TWIM_ALL_INTS_MASK = TWIM_INTENSET_STOPPED_Msk |
108 TWIM_INTENSET_ERROR_Msk |
109 TWIM_INTENSET_SUSPENDED_Msk |
110 TWIM_INTENSET_RXSTARTED_Msk |
111 TWIM_INTENSET_TXSTARTED_Msk |
112 TWIM_INTENSET_LASTRX_Msk |
113 TWIM_INTENSET_LASTTX_Msk ///< Interrupt on LASTTX event.
114 } nrf_twim_int_mask_t;
115
116 /**
117 * @brief TWIM master clock frequency.
118 */
119 typedef enum
120 {
121 NRF_TWIM_FREQ_100K = TWIM_FREQUENCY_FREQUENCY_K100, ///< 100 kbps.
122 NRF_TWIM_FREQ_250K = TWIM_FREQUENCY_FREQUENCY_K250, ///< 250 kbps.
123 NRF_TWIM_FREQ_400K = TWIM_FREQUENCY_FREQUENCY_K400 ///< 400 kbps.
124 } nrf_twim_frequency_t;
125
126 /**
127 * @brief TWIM error source.
128 */
129 typedef enum
130 {
131 NRF_TWIM_ERROR_ADDRESS_NACK = TWIM_ERRORSRC_ANACK_Msk, ///< NACK received after sending the address.
132 NRF_TWIM_ERROR_DATA_NACK = TWIM_ERRORSRC_DNACK_Msk ///< NACK received after sending a data byte.
133 } nrf_twim_error_t;
134
135
136 /**
137 * @brief Function for activating a specific TWIM task.
138 *
139 * @param[in] p_reg Pointer to the peripheral registers structure.
140 * @param[in] task Task to activate.
141 */
142 __STATIC_INLINE void nrf_twim_task_trigger(NRF_TWIM_Type * p_reg,
143 nrf_twim_task_t task);
144
145 /**
146 * @brief Function for getting the address of a specific TWIM task register.
147 *
148 * @param[in] p_reg Pointer to the peripheral registers structure.
149 * @param[in] task Requested task.
150 *
151 * @return Address of the specified task register.
152 */
153 __STATIC_INLINE uint32_t * nrf_twim_task_address_get(NRF_TWIM_Type * p_reg,
154 nrf_twim_task_t task);
155
156 /**
157 * @brief Function for clearing a specific TWIM event.
158 *
159 * @param[in] p_reg Pointer to the peripheral registers structure.
160 * @param[in] event Event to clear.
161 */
162 __STATIC_INLINE void nrf_twim_event_clear(NRF_TWIM_Type * p_reg,
163 nrf_twim_event_t event);
164
165 /**
166 * @brief Function for checking the state of a specific TWIM event.
167 *
168 * @param[in] p_reg Pointer to the peripheral registers structure.
169 * @param[in] event Event to check.
170 *
171 * @retval true If the event is set.
172 * @retval false If the event is not set.
173 */
174 __STATIC_INLINE bool nrf_twim_event_check(NRF_TWIM_Type * p_reg,
175 nrf_twim_event_t event);
176
177 /**
178 * @brief Function for getting the address of a specific TWIM event register.
179 *
180 * @param[in] p_reg Pointer to the peripheral registers structure.
181 * @param[in] event Requested event.
182 *
183 * @return Address of the specified event register.
184 */
185 __STATIC_INLINE uint32_t * nrf_twim_event_address_get(NRF_TWIM_Type * p_reg,
186 nrf_twim_event_t event);
187
188 /**
189 * @brief Function for enabling specified shortcuts.
190 *
191 * @param[in] p_reg Pointer to the peripheral registers structure.
192 * @param[in] shorts_mask Shortcuts to enable.
193 */
194 __STATIC_INLINE void nrf_twim_shorts_enable(NRF_TWIM_Type * p_reg,
195 uint32_t shorts_mask);
196
197 /**
198 * @brief Function for disabling specified shortcuts.
199 *
200 * @param[in] p_reg Pointer to the peripheral registers structure.
201 * @param[in] shorts_mask Shortcuts to disable.
202 */
203 __STATIC_INLINE void nrf_twim_shorts_disable(NRF_TWIM_Type * p_reg,
204 uint32_t shorts_mask);
205
206 /**
207 * @brief Function for enabling specified interrupts.
208 *
209 * @param[in] p_reg Pointer to the peripheral registers structure.
210 * @param[in] int_mask Interrupts to enable.
211 */
212 __STATIC_INLINE void nrf_twim_int_enable(NRF_TWIM_Type * p_reg,
213 uint32_t int_mask);
214
215 /**
216 * @brief Function for disabling specified interrupts.
217 *
218 * @param[in] p_reg Pointer to the peripheral registers structure.
219 * @param[in] int_mask Interrupts to disable.
220 */
221 __STATIC_INLINE void nrf_twim_int_disable(NRF_TWIM_Type * p_reg,
222 uint32_t int_mask);
223
224 /**
225 * @brief Function for checking the state of a given interrupt.
226 *
227 * @param[in] p_reg Pointer to the peripheral registers structure.
228 * @param[in] int_mask Interrupt to check.
229 *
230 * @retval true If the interrupt is enabled.
231 * @retval false If the interrupt is not enabled.
232 */
233 __STATIC_INLINE bool nrf_twim_int_enable_check(NRF_TWIM_Type * p_reg,
234 nrf_twim_int_mask_t int_mask);
235
236 #if defined(DPPI_PRESENT) || defined(__NRFX_DOXYGEN__)
237 /**
238 * @brief Function for setting the subscribe configuration for a given
239 * TWIM task.
240 *
241 * @param[in] p_reg Pointer to the structure of registers of the peripheral.
242 * @param[in] task Task for which to set the configuration.
243 * @param[in] channel Channel through which to subscribe events.
244 */
245 __STATIC_INLINE void nrf_twim_subscribe_set(NRF_TWIM_Type * p_reg,
246 nrf_twim_task_t task,
247 uint8_t channel);
248
249 /**
250 * @brief Function for clearing the subscribe configuration for a given
251 * TWIM task.
252 *
253 * @param[in] p_reg Pointer to the structure of registers of the peripheral.
254 * @param[in] task Task for which to clear the configuration.
255 */
256 __STATIC_INLINE void nrf_twim_subscribe_clear(NRF_TWIM_Type * p_reg,
257 nrf_twim_task_t task);
258
259 /**
260 * @brief Function for setting the publish configuration for a given
261 * TWIM event.
262 *
263 * @param[in] p_reg Pointer to the structure of registers of the peripheral.
264 * @param[in] event Event for which to set the configuration.
265 * @param[in] channel Channel through which to publish the event.
266 */
267 __STATIC_INLINE void nrf_twim_publish_set(NRF_TWIM_Type * p_reg,
268 nrf_twim_event_t event,
269 uint8_t channel);
270
271 /**
272 * @brief Function for clearing the publish configuration for a given
273 * TWIM event.
274 *
275 * @param[in] p_reg Pointer to the structure of registers of the peripheral.
276 * @param[in] event Event for which to clear the configuration.
277 */
278 __STATIC_INLINE void nrf_twim_publish_clear(NRF_TWIM_Type * p_reg,
279 nrf_twim_event_t event);
280 #endif // defined(DPPI_PRESENT) || defined(__NRFX_DOXYGEN__)
281
282 /**
283 * @brief Function for enabling the TWIM peripheral.
284 *
285 * @param[in] p_reg Pointer to the peripheral registers structure.
286 */
287 __STATIC_INLINE void nrf_twim_enable(NRF_TWIM_Type * p_reg);
288
289 /**
290 * @brief Function for disabling the TWIM peripheral.
291 *
292 * @param[in] p_reg Pointer to the peripheral registers structure.
293 */
294 __STATIC_INLINE void nrf_twim_disable(NRF_TWIM_Type * p_reg);
295
296 /**
297 * @brief Function for configuring TWI pins.
298 *
299 *
300 * @param[in] p_reg Pointer to the peripheral registers structure.
301 * @param[in] scl_pin SCL pin number.
302 * @param[in] sda_pin SDA pin number.
303 */
304 __STATIC_INLINE void nrf_twim_pins_set(NRF_TWIM_Type * p_reg,
305 uint32_t scl_pin,
306 uint32_t sda_pin);
307
308 /**
309 * @brief Function for setting the TWI master clock frequency.
310 *
311 * @param[in] p_reg Pointer to the peripheral registers structure.
312 * @param[in] frequency TWI frequency.
313 */
314 __STATIC_INLINE void nrf_twim_frequency_set(NRF_TWIM_Type * p_reg,
315 nrf_twim_frequency_t frequency);
316
317 /**
318 * @brief Function for checking the TWI error source.
319 *
320 * The error flags are cleared after reading.
321 *
322 * @param[in] p_reg Pointer to the peripheral registers structure.
323 *
324 * @return Mask with error source flags.
325 */
326 __STATIC_INLINE uint32_t nrf_twim_errorsrc_get_and_clear(NRF_TWIM_Type * p_reg);
327
328 /**
329 * @brief Function for setting the address to be used in TWI transfers.
330 *
331 * @param[in] p_reg Pointer to the peripheral registers structure.
332 * @param[in] address Address to be used in transfers.
333 */
334 __STATIC_INLINE void nrf_twim_address_set(NRF_TWIM_Type * p_reg,
335 uint8_t address);
336
337 /**
338 * @brief Function for setting the transmit buffer.
339 *
340 * @param[in] p_reg Pointer to the peripheral registers structure.
341 * @param[in] p_buffer Pointer to the buffer with data to send.
342 * @param[in] length Maximum number of data bytes to transmit.
343 */
344 __STATIC_INLINE void nrf_twim_tx_buffer_set(NRF_TWIM_Type * p_reg,
345 uint8_t const * p_buffer,
346 size_t length);
347
348 /**
349 * @brief Function for setting the receive buffer.
350 *
351 * @param[in] p_reg Pointer to the peripheral registers structure.
352 * @param[in] p_buffer Pointer to the buffer for received data.
353 * @param[in] length Maximum number of data bytes to receive.
354 */
355 __STATIC_INLINE void nrf_twim_rx_buffer_set(NRF_TWIM_Type * p_reg,
356 uint8_t * p_buffer,
357 size_t length);
358
359 __STATIC_INLINE void nrf_twim_shorts_set(NRF_TWIM_Type * p_reg,
360 uint32_t shorts_mask);
361
362 __STATIC_INLINE size_t nrf_twim_txd_amount_get(NRF_TWIM_Type * p_reg);
363
364 __STATIC_INLINE size_t nrf_twim_rxd_amount_get(NRF_TWIM_Type * p_reg);
365
366 /**
367 * @brief Function for enabling the TX list feature.
368 *
369 * @param[in] p_reg Pointer to the peripheral registers structure.
370 */
371 __STATIC_INLINE void nrf_twim_tx_list_enable(NRF_TWIM_Type * p_reg);
372
373 /**
374 * @brief Function for disabling the TX list feature.
375 *
376 * @param[in] p_reg Pointer to the peripheral registers structure.
377 */
378 __STATIC_INLINE void nrf_twim_tx_list_disable(NRF_TWIM_Type * p_reg);
379
380 /**
381 * @brief Function for enabling the RX list feature.
382 *
383 * @param[in] p_reg Pointer to the peripheral registers structure.
384 */
385 __STATIC_INLINE void nrf_twim_rx_list_enable(NRF_TWIM_Type * p_reg);
386
387 /**
388 * @brief Function for disabling the RX list feature.
389 *
390 * @param[in] p_reg Pointer to the peripheral registers structure.
391 */
392 __STATIC_INLINE void nrf_twim_rx_list_disable(NRF_TWIM_Type * p_reg);
393
394 #ifndef SUPPRESS_INLINE_IMPLEMENTATION
395
nrf_twim_task_trigger(NRF_TWIM_Type * p_reg,nrf_twim_task_t task)396 __STATIC_INLINE void nrf_twim_task_trigger(NRF_TWIM_Type * p_reg,
397 nrf_twim_task_t task)
398 {
399 *((volatile uint32_t *)((uint8_t *)p_reg + (uint32_t)task)) = 0x1UL;
400 }
401
nrf_twim_task_address_get(NRF_TWIM_Type * p_reg,nrf_twim_task_t task)402 __STATIC_INLINE uint32_t * nrf_twim_task_address_get(NRF_TWIM_Type * p_reg,
403 nrf_twim_task_t task)
404 {
405 return (uint32_t *)((uint8_t *)p_reg + (uint32_t)task);
406 }
407
nrf_twim_event_clear(NRF_TWIM_Type * p_reg,nrf_twim_event_t event)408 __STATIC_INLINE void nrf_twim_event_clear(NRF_TWIM_Type * p_reg,
409 nrf_twim_event_t event)
410 {
411 *((volatile uint32_t *)((uint8_t *)p_reg + (uint32_t)event)) = 0x0UL;
412 #if __CORTEX_M == 0x04
413 volatile uint32_t dummy = *((volatile uint32_t *)((uint8_t *)p_reg + (uint32_t)event));
414 (void)dummy;
415 #endif
416 }
417
nrf_twim_event_check(NRF_TWIM_Type * p_reg,nrf_twim_event_t event)418 __STATIC_INLINE bool nrf_twim_event_check(NRF_TWIM_Type * p_reg,
419 nrf_twim_event_t event)
420 {
421 return (bool)*(volatile uint32_t *)((uint8_t *)p_reg + (uint32_t)event);
422 }
423
nrf_twim_event_address_get(NRF_TWIM_Type * p_reg,nrf_twim_event_t event)424 __STATIC_INLINE uint32_t * nrf_twim_event_address_get(NRF_TWIM_Type * p_reg,
425 nrf_twim_event_t event)
426 {
427 return (uint32_t *)((uint8_t *)p_reg + (uint32_t)event);
428 }
429
nrf_twim_shorts_enable(NRF_TWIM_Type * p_reg,uint32_t shorts_mask)430 __STATIC_INLINE void nrf_twim_shorts_enable(NRF_TWIM_Type * p_reg,
431 uint32_t shorts_mask)
432 {
433 p_reg->SHORTS |= shorts_mask;
434 }
435
nrf_twim_shorts_disable(NRF_TWIM_Type * p_reg,uint32_t shorts_mask)436 __STATIC_INLINE void nrf_twim_shorts_disable(NRF_TWIM_Type * p_reg,
437 uint32_t shorts_mask)
438 {
439 p_reg->SHORTS &= ~(shorts_mask);
440 }
441
nrf_twim_int_enable(NRF_TWIM_Type * p_reg,uint32_t int_mask)442 __STATIC_INLINE void nrf_twim_int_enable(NRF_TWIM_Type * p_reg,
443 uint32_t int_mask)
444 {
445 p_reg->INTENSET = int_mask;
446 }
447
nrf_twim_int_disable(NRF_TWIM_Type * p_reg,uint32_t int_mask)448 __STATIC_INLINE void nrf_twim_int_disable(NRF_TWIM_Type * p_reg,
449 uint32_t int_mask)
450 {
451 p_reg->INTENCLR = int_mask;
452 }
453
nrf_twim_int_enable_check(NRF_TWIM_Type * p_reg,nrf_twim_int_mask_t int_mask)454 __STATIC_INLINE bool nrf_twim_int_enable_check(NRF_TWIM_Type * p_reg,
455 nrf_twim_int_mask_t int_mask)
456 {
457 return (bool)(p_reg->INTENSET & int_mask);
458 }
459
460 #if defined(DPPI_PRESENT)
nrf_twim_subscribe_set(NRF_TWIM_Type * p_reg,nrf_twim_task_t task,uint8_t channel)461 __STATIC_INLINE void nrf_twim_subscribe_set(NRF_TWIM_Type * p_reg,
462 nrf_twim_task_t task,
463 uint8_t channel)
464 {
465 *((volatile uint32_t *) ((uint8_t *) p_reg + (uint32_t) task + 0x80uL)) =
466 ((uint32_t)channel | TWIM_SUBSCRIBE_STARTRX_EN_Msk);
467 }
468
nrf_twim_subscribe_clear(NRF_TWIM_Type * p_reg,nrf_twim_task_t task)469 __STATIC_INLINE void nrf_twim_subscribe_clear(NRF_TWIM_Type * p_reg,
470 nrf_twim_task_t task)
471 {
472 *((volatile uint32_t *) ((uint8_t *) p_reg + (uint32_t) task + 0x80uL)) = 0;
473 }
474
nrf_twim_publish_set(NRF_TWIM_Type * p_reg,nrf_twim_event_t event,uint8_t channel)475 __STATIC_INLINE void nrf_twim_publish_set(NRF_TWIM_Type * p_reg,
476 nrf_twim_event_t event,
477 uint8_t channel)
478 {
479 *((volatile uint32_t *) ((uint8_t *) p_reg + (uint32_t) event + 0x80uL)) =
480 ((uint32_t)channel | TWIM_PUBLISH_STOPPED_EN_Msk);
481 }
482
nrf_twim_publish_clear(NRF_TWIM_Type * p_reg,nrf_twim_event_t event)483 __STATIC_INLINE void nrf_twim_publish_clear(NRF_TWIM_Type * p_reg,
484 nrf_twim_event_t event)
485 {
486 *((volatile uint32_t *) ((uint8_t *) p_reg + (uint32_t) event + 0x80uL)) = 0;
487 }
488 #endif // defined(DPPI_PRESENT)
489
nrf_twim_enable(NRF_TWIM_Type * p_reg)490 __STATIC_INLINE void nrf_twim_enable(NRF_TWIM_Type * p_reg)
491 {
492 p_reg->ENABLE = (TWIM_ENABLE_ENABLE_Enabled << TWIM_ENABLE_ENABLE_Pos);
493 }
494
nrf_twim_disable(NRF_TWIM_Type * p_reg)495 __STATIC_INLINE void nrf_twim_disable(NRF_TWIM_Type * p_reg)
496 {
497 p_reg->ENABLE = (TWIM_ENABLE_ENABLE_Disabled << TWIM_ENABLE_ENABLE_Pos);
498 }
499
nrf_twim_pins_set(NRF_TWIM_Type * p_reg,uint32_t scl_pin,uint32_t sda_pin)500 __STATIC_INLINE void nrf_twim_pins_set(NRF_TWIM_Type * p_reg,
501 uint32_t scl_pin,
502 uint32_t sda_pin)
503 {
504 p_reg->PSEL.SCL = scl_pin;
505 p_reg->PSEL.SDA = sda_pin;
506 }
507
nrf_twim_frequency_set(NRF_TWIM_Type * p_reg,nrf_twim_frequency_t frequency)508 __STATIC_INLINE void nrf_twim_frequency_set(NRF_TWIM_Type * p_reg,
509 nrf_twim_frequency_t frequency)
510 {
511 p_reg->FREQUENCY = frequency;
512 }
513
nrf_twim_errorsrc_get_and_clear(NRF_TWIM_Type * p_reg)514 __STATIC_INLINE uint32_t nrf_twim_errorsrc_get_and_clear(NRF_TWIM_Type * p_reg)
515 {
516 uint32_t error_source = p_reg->ERRORSRC;
517
518 // [error flags are cleared by writing '1' on their position]
519 p_reg->ERRORSRC = error_source;
520
521 return error_source;
522 }
523
nrf_twim_address_set(NRF_TWIM_Type * p_reg,uint8_t address)524 __STATIC_INLINE void nrf_twim_address_set(NRF_TWIM_Type * p_reg,
525 uint8_t address)
526 {
527 p_reg->ADDRESS = address;
528 }
529
nrf_twim_tx_buffer_set(NRF_TWIM_Type * p_reg,uint8_t const * p_buffer,size_t length)530 __STATIC_INLINE void nrf_twim_tx_buffer_set(NRF_TWIM_Type * p_reg,
531 uint8_t const * p_buffer,
532 size_t length)
533 {
534 p_reg->TXD.PTR = (uint32_t)p_buffer;
535 p_reg->TXD.MAXCNT = length;
536 }
537
nrf_twim_rx_buffer_set(NRF_TWIM_Type * p_reg,uint8_t * p_buffer,size_t length)538 __STATIC_INLINE void nrf_twim_rx_buffer_set(NRF_TWIM_Type * p_reg,
539 uint8_t * p_buffer,
540 size_t length)
541 {
542 p_reg->RXD.PTR = (uint32_t)p_buffer;
543 p_reg->RXD.MAXCNT = length;
544 }
545
nrf_twim_shorts_set(NRF_TWIM_Type * p_reg,uint32_t shorts_mask)546 __STATIC_INLINE void nrf_twim_shorts_set(NRF_TWIM_Type * p_reg,
547 uint32_t shorts_mask)
548 {
549 p_reg->SHORTS = shorts_mask;
550 }
551
nrf_twim_txd_amount_get(NRF_TWIM_Type * p_reg)552 __STATIC_INLINE size_t nrf_twim_txd_amount_get(NRF_TWIM_Type * p_reg)
553 {
554 return p_reg->TXD.AMOUNT;
555 }
556
nrf_twim_rxd_amount_get(NRF_TWIM_Type * p_reg)557 __STATIC_INLINE size_t nrf_twim_rxd_amount_get(NRF_TWIM_Type * p_reg)
558 {
559 return p_reg->RXD.AMOUNT;
560 }
561
nrf_twim_tx_list_enable(NRF_TWIM_Type * p_reg)562 __STATIC_INLINE void nrf_twim_tx_list_enable(NRF_TWIM_Type * p_reg)
563 {
564 p_reg->TXD.LIST = 1;
565 }
566
nrf_twim_tx_list_disable(NRF_TWIM_Type * p_reg)567 __STATIC_INLINE void nrf_twim_tx_list_disable(NRF_TWIM_Type * p_reg)
568 {
569 p_reg->TXD.LIST = 0;
570 }
571
nrf_twim_rx_list_enable(NRF_TWIM_Type * p_reg)572 __STATIC_INLINE void nrf_twim_rx_list_enable(NRF_TWIM_Type * p_reg)
573 {
574 p_reg->RXD.LIST = 1;
575 }
576
nrf_twim_rx_list_disable(NRF_TWIM_Type * p_reg)577 __STATIC_INLINE void nrf_twim_rx_list_disable(NRF_TWIM_Type * p_reg)
578 {
579 p_reg->RXD.LIST = 0;
580 }
581 #endif // SUPPRESS_INLINE_IMPLEMENTATION
582
583 /** @} */
584
585 #ifdef __cplusplus
586 }
587 #endif
588
589 #endif // NRF_TWIM_H__
590