xref: /aosp_15_r20/external/coreboot/src/drivers/genesyslogic/gl9750/gl9750.c (revision b9411a12aaaa7e1e6a6fb7c5e057f44ee179a49c)
1 /* SPDX-License-Identifier: GPL-2.0-only */
2 
3 /* Driver for Genesys Logic GL9750 */
4 
5 #include <console/console.h>
6 #include <device/device.h>
7 #include <device/pci.h>
8 #include <device/pci_ops.h>
9 #include <device/pci_ids.h>
10 #include "gl9750.h"
11 
gl9750_enable(struct device * dev)12 static void gl9750_enable(struct device *dev)
13 {
14 	printk(BIOS_INFO, "GL9750: configure ASPM\n");
15 
16 	/* Set Vendor Config to be configurable */
17 	pci_or_config32(dev, CFG, CFG_EN);
18 
19 	/*
20 	 * When both ASPM L0s and L1 are supported, GL9750 may not enter L1.
21 	 * So disable L0s support.
22 	 */
23 	pci_and_config32(dev, CFG2, ~CFG2_L0S_SUPPORT);
24 
25 	if (CONFIG(DRIVERS_GENESYSLOGIC_GL9750_INVERT_WP))
26 		/* invert write protect polarity */
27 		pci_or_config32(dev, CFG1, CFG1_WP_INVERT);
28 
29 	/* Set Vendor Config to be non-configurable */
30 	pci_and_config32(dev, CFG, ~CFG_EN);
31 }
32 
33 static struct device_operations gl9750_ops = {
34 	.read_resources		= pci_dev_read_resources,
35 	.set_resources		= pci_dev_set_resources,
36 	.enable_resources	= pci_dev_enable_resources,
37 	.ops_pci		= &pci_dev_ops_pci,
38 	.enable			= gl9750_enable
39 };
40 
41 static const unsigned short pci_device_ids[] = {
42 	PCI_DID_GLI_9750,
43 	0
44 };
45 
46 static const struct pci_driver genesyslogic_gl9750 __pci_driver = {
47 	.ops		= &gl9750_ops,
48 	.vendor		= PCI_VID_GLI,
49 	.devices	= pci_device_ids,
50 };
51 
52 struct chip_operations drivers_generic_genesyslogic_gl9750_ops = {
53 	.name = "Genesys Logic GL9750",
54 };
55