xref: /aosp_15_r20/external/coreboot/src/drivers/intel/fsp1_1/fsp_report.c (revision b9411a12aaaa7e1e6a6fb7c5e057f44ee179a49c)
1 /* SPDX-License-Identifier: GPL-2.0-only */
2 
3 #include <arch/symbols.h>
4 #include <console/console.h>
5 #include <fsp/util.h>
6 
7 /* filled in assembly after FSP-T ran */
8 uintptr_t temp_memory_start;
9 uintptr_t temp_memory_end;
10 
report_fsp_output(void)11 void report_fsp_output(void)
12 {
13 	const struct region fsp_car_region = {
14 		.offset = temp_memory_start,
15 		.size = temp_memory_end - temp_memory_start,
16 	};
17 	const struct region coreboot_car_region = {
18 		.offset = (uintptr_t)_car_region_start,
19 		.size = (uintptr_t)_car_region_size,
20 	};
21 	printk(BIOS_DEBUG, "FSP: reported temp_mem region: [0x%08lx,0x%08lx)\n",
22 	       temp_memory_start, temp_memory_end);
23 	if (!region_is_subregion(&fsp_car_region, &coreboot_car_region)) {
24 		printk(BIOS_ERR, "Wrong CAR region used!\n");
25 		printk(BIOS_ERR, "Adapt DCACHE_RAM_BASE and DCACHE_RAM_SIZE to match FSP-T\n");
26 	}
27 }
28