xref: /aosp_15_r20/external/coreboot/src/superio/fintek/f81866d/f81866d_hwm.c (revision b9411a12aaaa7e1e6a6fb7c5e057f44ee179a49c)
1 /* SPDX-License-Identifier: GPL-2.0-or-later */
2 
3 /* Setup only for Fan2
4  * TODO: Add support for Fan1 and Fan3
5  */
6 
7 #include <console/console.h>
8 #include <device/device.h>
9 #include <device/pnp.h>
10 #include "fintek_internal.h"
11 #include "chip.h"
12 
13 /* Register addresses */
14 // Choose between AMD and Intel
15 #define HWM_AMD_TSI_ADDR		0x08
16 #define HWM_AMD_TSI_CONTROL_REG		0x0A
17 
18 // Set temp sensors type
19 #define TEMP_SENS_TYPE_REG		0x6B
20 
21 // FAN prog sel
22 #define HWM_FAN3_CONTROL		0x9A
23 #define HWM_FAN_SEL			0x94
24 #define HWM_FAN_MODE			0x96
25 #define HWM_FAN2_TEMP_MAP_SEL		0xBF
26 
27 // Fan 2 - 4 Boundaries
28 #define HWM_FAN2_BOUND1			0xB6
29 #define HWM_FAN2_BOUND2			0xB7
30 #define HWM_FAN2_BOUND3			0xB8
31 #define HWM_FAN2_BOUND4			0xB9
32 // Fan 2 - 5 Segment speeds
33 #define HWM_FAN2_SEG1_SPEED_COUNT	0xBA
34 #define HWM_FAN2_SEG2_SPEED_COUNT	0xBB
35 #define HWM_FAN2_SEG3_SPEED_COUNT	0xBC
36 #define HWM_FAN2_SEG4_SPEED_COUNT	0xBD
37 #define HWM_FAN2_SEG5_SPEED_COUNT	0xBE
38 
f81866d_hwm_init(struct device * dev)39 void f81866d_hwm_init(struct device *dev)
40 {
41 	struct resource *res = probe_resource(dev, PNP_IDX_IO0);
42 
43 	if (!res) {
44 		printk(BIOS_WARNING, "Super I/O HWM: No HWM resource found.\n");
45 		return;
46 	}
47 
48 	const struct superio_fintek_f81866d_config *reg = dev->chip_info;
49 	u16 port = res->base;
50 
51 	pnp_enter_conf_mode(dev);
52 
53 	/* Use AMD TSI */
54 	pnp_write_index(port, HWM_AMD_TSI_ADDR, reg->hwm_amd_tsi_addr);
55 	pnp_write_index(port, HWM_AMD_TSI_CONTROL_REG, reg->hwm_amd_tsi_control);
56 
57 	/* Set temp1 sensor to thermistor */
58 	pnp_write_index(port, TEMP_SENS_TYPE_REG, reg->hwm_temp_sens_type);
59 
60 	/* Select FAN Type */
61 	pnp_write_index(port, HWM_FAN_SEL, reg->hwm_fan_select);
62 
63 	/* Select FAN Mode*/
64 	pnp_write_index(port, HWM_FAN_MODE, reg->hwm_fan_mode);
65 
66 	/* Set Boundaries */
67 	pnp_write_index(port, HWM_FAN2_BOUND1, reg->hwm_fan2_bound1);
68 	pnp_write_index(port, HWM_FAN2_BOUND2, reg->hwm_fan2_bound2);
69 	pnp_write_index(port, HWM_FAN2_BOUND3, reg->hwm_fan2_bound3);
70 	pnp_write_index(port, HWM_FAN2_BOUND4, reg->hwm_fan2_bound4);
71 
72 	/* Set Speed */
73 	pnp_write_index(port, HWM_FAN2_SEG1_SPEED_COUNT, reg->hwm_fan2_seg1_speed);
74 	pnp_write_index(port, HWM_FAN2_SEG2_SPEED_COUNT, reg->hwm_fan2_seg2_speed);
75 	pnp_write_index(port, HWM_FAN2_SEG3_SPEED_COUNT, reg->hwm_fan2_seg3_speed);
76 	pnp_write_index(port, HWM_FAN2_SEG4_SPEED_COUNT, reg->hwm_fan2_seg4_speed);
77 	pnp_write_index(port, HWM_FAN2_SEG5_SPEED_COUNT, reg->hwm_fan2_seg5_speed);
78 
79 	/* Set Fan control freq */
80 	pnp_write_index(port, HWM_FAN3_CONTROL, reg->hwm_fan3_control);
81 	pnp_write_index(port, HWM_FAN2_TEMP_MAP_SEL, reg->hwm_fan2_temp_map_select);
82 
83 	pnp_exit_conf_mode(dev);
84 }
85