1#
2# Copyright 2020 NXP
3# Copyright (c) 2023, Arm Limited. All rights reserved.
4#
5# SPDX-License-Identifier: BSD-3-Clause
6#
7#-----------------------------------------------------------------------------
8ifeq (${DDR_FIP_IO_STORAGE_ADDED},)
9
10$(eval $(call add_define, PLAT_DEF_FIP_UUID))
11$(eval $(call add_define, PLAT_TBBR_IMG_DEF))
12$(eval $(call SET_NXP_MAKE_FLAG,IMG_LOADR_NEEDED,BL2))
13
14DDR_FIP_IO_STORAGE_ADDED	:= 1
15$(eval $(call add_define,CONFIG_DDR_FIP_IMAGE))
16
17FIP_HANDLER_PATH	:=  ${PLAT_COMMON_PATH}/fip_handler
18FIP_HANDLER_COMMON_PATH	:=  ${FIP_HANDLER_PATH}/common
19DDR_FIP_IO_STORAGE_PATH	:=  ${FIP_HANDLER_PATH}/ddr_fip
20
21PLAT_INCLUDES		+= -I${FIP_HANDLER_COMMON_PATH}\
22			   -I$(DDR_FIP_IO_STORAGE_PATH)
23
24DDR_FIP_IO_SOURCES	+= $(DDR_FIP_IO_STORAGE_PATH)/ddr_io_storage.c
25
26ifeq (${BL_COMM_DDR_FIP_IO_NEEDED},yes)
27BL_COMMON_SOURCES	+= ${DDR_FIP_IO_SOURCES}
28else
29ifeq (${BL2_DDR_FIP_IO_NEEDED},yes)
30BL2_SOURCES		+= ${DDR_FIP_IO_SOURCES}
31endif
32ifeq (${BL31_DDR_FIP_IO_NEEDED},yes)
33BL31_SOURCES		+= ${DDR_FIP_IO_SOURCES}
34endif
35endif
36endif
37#------------------------------------------------
38