1#
2# Copyright 2019-2022 NXP
3#
4# SPDX-License-Identifier: BSD-3-Clause
5#
6
7PLAT_INCLUDES		:=	-Iplat/imx/common/include		\
8				-Iplat/imx/imx8m/include		\
9				-Iplat/imx/imx8m/imx8mp/include		\
10				-Idrivers/imx/usdhc			\
11				-Iinclude/common/tbbr
12# Translation tables library
13include lib/xlat_tables_v2/xlat_tables.mk
14
15# Include GICv3 driver files
16include drivers/arm/gic/v3/gicv3.mk
17
18IMX_DRAM_SOURCES	:=	plat/imx/imx8m/ddr/dram.c		\
19				plat/imx/imx8m/ddr/clock.c		\
20				plat/imx/imx8m/ddr/dram_retention.c	\
21				plat/imx/imx8m/ddr/ddr4_dvfs.c		\
22				plat/imx/imx8m/ddr/lpddr4_dvfs.c
23
24IMX_GIC_SOURCES		:=	${GICV3_SOURCES}			\
25				plat/common/plat_gicv3.c		\
26				plat/common/plat_psci_common.c		\
27				plat/imx/common/plat_imx8_gic.c
28
29BL31_SOURCES		+=	plat/imx/common/imx8_helpers.S			\
30				plat/imx/imx8m/gpc_common.c			\
31				plat/imx/imx8m/imx_hab.c			\
32				plat/imx/imx8m/imx_aipstz.c			\
33				plat/imx/imx8m/imx_rdc.c			\
34				plat/imx/imx8m/imx8m_caam.c			\
35				plat/imx/imx8m/imx8m_ccm.c			\
36				plat/imx/imx8m/imx8m_csu.c			\
37				plat/imx/imx8m/imx8m_psci_common.c		\
38				plat/imx/imx8m/imx8m_snvs.c			\
39				plat/imx/imx8m/imx8mp/imx8mp_bl31_setup.c	\
40				plat/imx/imx8m/imx8mp/imx8mp_psci.c		\
41				plat/imx/imx8m/imx8mp/gpc.c			\
42				plat/imx/common/imx8_topology.c			\
43				plat/imx/common/imx_sip_handler.c		\
44				plat/imx/common/imx_sip_svc.c			\
45				plat/imx/common/imx_uart_console.S		\
46				lib/cpus/aarch64/cortex_a53.S			\
47				drivers/arm/tzc/tzc380.c			\
48				drivers/delay_timer/delay_timer.c		\
49				drivers/delay_timer/generic_delay_timer.c	\
50				${IMX_DRAM_SOURCES}				\
51				${IMX_GIC_SOURCES}				\
52				${XLAT_TABLES_LIB_SRCS}
53
54ifeq (${NEED_BL2},yes)
55BL2_SOURCES		+=	common/desc_image_load.c			\
56				plat/imx/common/imx8_helpers.S			\
57				plat/imx/common/imx_uart_console.S		\
58				plat/imx/imx8m/imx8mp/imx8mp_bl2_el3_setup.c	\
59				plat/imx/imx8m/imx8mp/gpc.c			\
60				plat/imx/imx8m/imx_aipstz.c			\
61				plat/imx/imx8m/imx_rdc.c			\
62				plat/imx/imx8m/imx8m_caam.c			\
63				plat/common/plat_psci_common.c			\
64				lib/cpus/aarch64/cortex_a53.S			\
65				drivers/arm/tzc/tzc380.c			\
66				drivers/delay_timer/delay_timer.c		\
67				drivers/delay_timer/generic_delay_timer.c	\
68				${PLAT_GIC_SOURCES}				\
69				${PLAT_DRAM_SOURCES}				\
70				${XLAT_TABLES_LIB_SRCS}				\
71				drivers/mmc/mmc.c				\
72				drivers/io/io_block.c				\
73				drivers/io/io_fip.c				\
74				drivers/io/io_memmap.c				\
75				drivers/io/io_storage.c				\
76				drivers/imx/usdhc/imx_usdhc.c			\
77				plat/imx/imx8m/imx8mp/imx8mp_bl2_mem_params_desc.c	\
78				plat/imx/common/imx_io_storage.c		\
79				plat/imx/imx8m/imx8m_image_load.c		\
80				lib/optee/optee_utils.c
81endif
82
83# Add the build options to pack BLx images and kernel device tree
84# in the FIP if the platform requires.
85ifneq ($(BL2),)
86RESET_TO_BL31		:=	0
87$(eval $(call TOOL_ADD_PAYLOAD,${BUILD_PLAT}/tb_fw.crt,--tb-fw-cert))
88endif
89ifneq ($(BL32_EXTRA1),)
90$(eval $(call TOOL_ADD_IMG,BL32_EXTRA1,--tos-fw-extra1))
91endif
92ifneq ($(BL32_EXTRA2),)
93$(eval $(call TOOL_ADD_IMG,BL32_EXTRA2,--tos-fw-extra2))
94endif
95ifneq ($(HW_CONFIG),)
96$(eval $(call TOOL_ADD_IMG,HW_CONFIG,--hw-config))
97endif
98
99ifeq (${NEED_BL2},yes)
100$(eval $(call add_define,NEED_BL2))
101LOAD_IMAGE_V2		:=	1
102# Non-TF Boot ROM
103RESET_TO_BL2		:=	1
104endif
105
106ifneq (${TRUSTED_BOARD_BOOT},0)
107
108include drivers/auth/mbedtls/mbedtls_crypto.mk
109include drivers/auth/mbedtls/mbedtls_x509.mk
110
111AUTH_SOURCES	:=	drivers/auth/auth_mod.c			\
112			drivers/auth/crypto_mod.c		\
113			drivers/auth/img_parser_mod.c		\
114			drivers/auth/tbbr/tbbr_cot_common.c     \
115			drivers/auth/tbbr/tbbr_cot_bl2.c
116
117BL2_SOURCES		+=	${AUTH_SOURCES}					\
118				plat/common/tbbr/plat_tbbr.c			\
119				plat/imx/imx8m/imx8mp/imx8mp_trusted_boot.c	\
120				plat/imx/imx8m/imx8mp/imx8mp_rotpk.S
121
122ROT_KEY             = $(BUILD_PLAT)/rot_key.pem
123ROTPK_HASH          = $(BUILD_PLAT)/rotpk_sha256.bin
124
125$(eval $(call add_define_val,ROTPK_HASH,'"$(ROTPK_HASH)"'))
126$(eval $(call MAKE_LIB_DIRS))
127
128$(BUILD_PLAT)/bl2/imx8mp_rotpk.o: $(ROTPK_HASH)
129
130certificates: $(ROT_KEY)
131
132$(ROT_KEY): | $(BUILD_PLAT)
133	@echo "  OPENSSL $@"
134	@if [ ! -f $(ROT_KEY) ]; then \
135		${OPENSSL_BIN_PATH}/openssl genrsa 2048 > $@ 2>/dev/null; \
136	fi
137
138$(ROTPK_HASH): $(ROT_KEY)
139	@echo "  OPENSSL $@"
140	$(Q)${OPENSSL_BIN_PATH}/openssl rsa -in $< -pubout -outform DER 2>/dev/null |\
141	${OPENSSL_BIN_PATH}/openssl dgst -sha256 -binary > $@ 2>/dev/null
142endif
143
144ENABLE_PIE		:=	1
145USE_COHERENT_MEM	:=	1
146RESET_TO_BL31		:=	1
147A53_DISABLE_NON_TEMPORAL_HINT := 0
148
149ERRATA_A53_835769	:=	1
150ERRATA_A53_843419	:=	1
151ERRATA_A53_855873	:=	1
152
153ifneq (${PRELOADED_BL33_BASE},)
154$(eval $(call add_define_val,PLAT_NS_IMAGE_OFFSET,${PRELOADED_BL33_BASE}))
155endif
156
157BL32_BASE		?=	0x56000000
158$(eval $(call add_define,BL32_BASE))
159
160BL32_SIZE		?=	0x2000000
161$(eval $(call add_define,BL32_SIZE))
162
163IMX_BOOT_UART_BASE	?=	0x30890000
164ifeq (${IMX_BOOT_UART_BASE},auto)
165    override IMX_BOOT_UART_BASE	:=	0
166endif
167$(eval $(call add_define,IMX_BOOT_UART_BASE))
168
169EL3_EXCEPTION_HANDLING := $(SDEI_SUPPORT)
170ifeq (${SDEI_SUPPORT}, 1)
171BL31_SOURCES 		+= 	plat/imx/common/imx_ehf.c	\
172				plat/imx/common/imx_sdei.c
173endif
174
175ifeq (${SPD},trusty)
176	BL31_CFLAGS    +=      -DPLAT_XLAT_TABLES_DYNAMIC=1
177endif
178