1## SPDX-License-Identifier: GPL-2.0-only 2 3ifeq ($(CONFIG_HAVE_INTEL_FIRMWARE),y) 4 5# Run intermediate steps when producing coreboot.rom 6# that adds additional components to the final firmware 7# image outside of CBFS 8 9ifeq ($(CONFIG_HAVE_IFD_BIN),y) 10$(call add_intermediate, add_intel_firmware) 11else ifeq ($(CONFIG_INTEL_DESCRIPTOR_MODE_REQUIRED),y) 12show_notices:: warn_intel_firmware 13endif 14 15IFD_BIN_PATH := $(CONFIG_IFD_BIN_PATH) 16ifneq ($(call strip_quotes,$(CONFIG_IFD_CHIPSET)),) 17IFDTOOL_USE_CHIPSET := -p $(CONFIG_IFD_CHIPSET) 18endif 19 20ifeq ($(CONFIG_ME_REGION_ALLOW_CPU_READ_ACCESS),y) 21IFDTOOL_LOCK_ME_MODE := -lr 22else 23IFDTOOL_LOCK_ME_MODE := -l 24endif 25 26add_intel_firmware: $(call strip_quotes,$(CONFIG_IFD_BIN_PATH)) 27ifeq ($(CONFIG_HAVE_ME_BIN),y) 28 29OBJ_ME_BIN := $(obj)/me.bin 30 31ifneq ($(CONFIG_STITCH_ME_BIN),y) 32 33$(OBJ_ME_BIN): $(call strip_quotes,$(CONFIG_ME_BIN_PATH)) 34 cp $< $@ 35 36endif 37 38add_intel_firmware: $(OBJ_ME_BIN) 39 40endif 41ifeq ($(CONFIG_HAVE_GBE_BIN),y) 42add_intel_firmware: $(call strip_quotes,$(CONFIG_GBE_BIN_PATH)) 43endif 44ifeq ($(CONFIG_HAVE_EC_BIN),y) 45add_intel_firmware: $(call strip_quotes,$(CONFIG_EC_BIN_PATH)) 46endif 47add_intel_firmware: $(obj)/coreboot.pre $(IFDTOOL) 48 printf " DD Adding Intel Firmware Descriptor\n" 49 dd if=$(IFD_BIN_PATH) \ 50 of=$(obj)/coreboot.pre conv=notrunc >/dev/null 2>&1 51ifeq ($(CONFIG_VALIDATE_INTEL_DESCRIPTOR),y) 52 printf " IFDTOOL validate IFD against FMAP\n" 53 $(objutil)/ifdtool/ifdtool \ 54 $(IFDTOOL_USE_CHIPSET) \ 55 -t $(obj)/coreboot.pre 56endif 57ifeq ($(CONFIG_HAVE_ME_BIN),y) 58 printf " IFDTOOL me.bin -> coreboot.pre\n" 59 $(objutil)/ifdtool/ifdtool \ 60 $(IFDTOOL_USE_CHIPSET) \ 61 -i ME:$(OBJ_ME_BIN) \ 62 -O $(obj)/coreboot.pre \ 63 $(obj)/coreboot.pre 64endif 65ifeq ($(CONFIG_CHECK_ME),y) 66 util/me_cleaner/me_cleaner.py -c $(obj)/coreboot.pre > /dev/null 67endif 68ifeq ($(CONFIG_USE_ME_CLEANER),y) 69 printf " ME_CLEANER coreboot.pre\n" 70 util/me_cleaner/me_cleaner.py $(obj)/coreboot.pre \ 71 $(patsubst "%,%,$(patsubst %",%,$(CONFIG_ME_CLEANER_ARGS))) > \ 72 $(obj)/me_cleaner.log 73endif 74ifeq ($(CONFIG_HAVE_GBE_BIN),y) 75 printf " IFDTOOL gbe.bin -> coreboot.pre\n" 76 $(objutil)/ifdtool/ifdtool \ 77 $(IFDTOOL_USE_CHIPSET) \ 78 -i GbE:$(CONFIG_GBE_BIN_PATH) \ 79 -O $(obj)/coreboot.pre \ 80 $(obj)/coreboot.pre 81endif 82ifeq ($(CONFIG_HAVE_EC_BIN),y) 83 printf " IFDTOOL ec.bin -> coreboot.pre\n" 84 $(objutil)/ifdtool/ifdtool \ 85 $(IFDTOOL_USE_CHIPSET) \ 86 -i EC:$(CONFIG_EC_BIN_PATH) \ 87 -O $(obj)/coreboot.pre \ 88 $(obj)/coreboot.pre 89endif 90ifeq ($(CONFIG_HAVE_10GBE_0_BIN),y) 91 printf " IFDTOOL 10gbe0.bin -> coreboot.pre\n" 92 $(objutil)/ifdtool/ifdtool \ 93 $(IFDTOOL_USE_CHIPSET) \ 94 -i 10GbE_0:$(CONFIG_10GBE_0_BIN_PATH) \ 95 -O $(obj)/coreboot.pre \ 96 $(obj)/coreboot.pre 97endif 98ifeq ($(CONFIG_HAVE_10GBE_1_BIN),y) 99 printf " IFDTOOL 10gbe1.bin -> coreboot.pre\n" 100 $(objutil)/ifdtool/ifdtool \ 101 $(IFDTOOL_USE_CHIPSET) \ 102 -i 10GbE_1:$(CONFIG_10GBE_1_BIN_PATH) \ 103 -O $(obj)/coreboot.pre \ 104 $(obj)/coreboot.pre 105endif 106ifeq ($(CONFIG_LOCK_MANAGEMENT_ENGINE),y) 107 printf " IFDTOOL Locking Management Engine\n" 108 $(objutil)/ifdtool/ifdtool \ 109 $(IFDTOOL_USE_CHIPSET) $(IFDTOOL_LOCK_ME_MODE) \ 110 -O $(obj)/coreboot.pre \ 111 $(obj)/coreboot.pre 112endif 113ifeq ($(CONFIG_UNLOCK_FLASH_REGIONS),y) 114 printf " IFDTOOL Unlocking Management Engine\n" 115 $(objutil)/ifdtool/ifdtool \ 116 $(IFDTOOL_USE_CHIPSET) -u \ 117 -O $(obj)/coreboot.pre \ 118 $(obj)/coreboot.pre 119endif 120 121ifeq ($(CONFIG_EM100),y) 122 printf " IFDTOOL Setting EM100 mode\n" 123 $(objutil)/ifdtool/ifdtool \ 124 $(IFDTOOL_USE_CHIPSET) --em100 \ 125 -O $(obj)/coreboot.pre \ 126 $(obj)/coreboot.pre 127endif 128 129warn_intel_firmware: 130 printf "\n\t** WARNING **\n" 131 printf "coreboot has been built without an Intel Firmware Descriptor.\n" 132 printf "Never write a complete coreboot.rom without an IFD to your\n" 133 printf "board's flash chip! You can use flashrom's IFD or layout\n" 134 printf "parameters to flash only to the BIOS region.\n\n" 135 136PHONY+=warn_intel_firmware 137 138endif 139