1## SPDX-License-Identifier: GPL-2.0-only 2 3ifeq ($(CONFIG_SOUTHBRIDGE_INTEL_C216)$(CONFIG_SOUTHBRIDGE_INTEL_BD82X6X),y) 4 5bootblock-y += bootblock.c 6bootblock-y += early_pch.c 7 8ramstage-y += pch.c 9ramstage-y += azalia.c 10ramstage-y += common.c 11ramstage-y += fadt.c 12ramstage-y += lpc.c 13ramstage-y += pci.c 14ramstage-y += pcie.c 15ramstage-y += sata.c 16ramstage-y += usb_ehci.c 17ramstage-y += usb_xhci.c 18ramstage-y += me.c 19ramstage-y += me_8.x.c 20ramstage-y += me_common.c 21ramstage-y += smbus.c 22ramstage-y += ../common/pciehp.c 23 24ramstage-y += me_status.c 25 26ramstage-$(CONFIG_ELOG) += elog.c 27 28smm-y += common.c smihandler.c me_smm.c me_common.c 29 30romstage-y += common.c 31romstage-y += me_status.c 32romstage-y += early_rcba.c 33romstage-y += early_pch.c 34 35ifeq ($(CONFIG_USE_NATIVE_RAMINIT),y) 36romstage-y += early_thermal.c early_me.c early_usb.c 37else 38romstage-y += early_me_mrc.c early_usb_mrc.c 39endif 40 41CPPFLAGS_common += -I$(src)/southbridge/intel/bd82x6x/include 42 43endif 44