1## SPDX-License-Identifier: GPL-2.0-only 2ifeq ($(CONFIG_CPU_SAMSUNG_EXYNOS5420),y) 3 4bootblock-y += spi.c alternate_cbfs.c 5bootblock-y += bootblock.c 6bootblock-y += pinmux.c timer.c power.c 7# Clock is required for UART 8bootblock-y += clock_init.c 9bootblock-y += clock.c 10bootblock-y += uart.c 11bootblock-y += wakeup.c 12bootblock-y += gpio.c 13 14romstage-y += spi.c alternate_cbfs.c 15romstage-y += smp.c 16romstage-y += clock.c 17romstage-y += clock_init.c 18romstage-y += pinmux.c # required by s3c24x0_i2c and uart. 19romstage-y += dmc_common.c 20romstage-y += dmc_init_ddr3.c 21romstage-y += power.c 22romstage-y += timer.c 23romstage-y += uart.c 24romstage-y += wakeup.c 25romstage-y += gpio.c 26romstage-y += i2c.c 27#romstage-y += wdt.c 28romstage-y += cbmem.c 29romstage-y += trustzone.c 30 31ramstage-y += spi.c alternate_cbfs.c 32ramstage-y += clock.c 33ramstage-y += clock_init.c 34ramstage-y += pinmux.c 35ramstage-y += power.c 36ramstage-y += uart.c 37ramstage-y += cpu.c 38ramstage-y += tmu.c 39ramstage-y += timer.c 40ramstage-y += gpio.c 41ramstage-y += i2c.c 42ramstage-y += dp.c dp_lowlevel.c fimd.c 43ramstage-y += usb.c 44 45rmodules_$(ARCH-ROMSTAGE-y)-y += timer.c 46 47CPPFLAGS_common += -Isrc/soc/samsung/common/include/ 48CPPFLAGS_common += -Isrc/soc/samsung/exynos5420/include/ 49 50$(objcbfs)/bootblock.bin: $(objcbfs)/bootblock.raw.bin 51 @printf " BL1, CKSUM $(subst $(obj)/,,$(@))\n" 52 util/exynos/variable_cksum.py $< $<.cksum 53 cat 3rdparty/blobs/cpu/samsung/exynos5420/bl1.bin $<.cksum > $@ 54 55endif 56