1## SPDX-License-Identifier: GPL-2.0-only 2 3ifeq ($(CONFIG_SOC_INTEL_SAPPHIRERAPIDS_SP),y) 4 5subdirs-y += ../../../../cpu/intel/turbo 6subdirs-y += ../../../../cpu/x86/lapic 7subdirs-y += ../../../../cpu/x86/mtrr 8subdirs-y += ../../../../cpu/x86/tsc 9subdirs-y += ../../../../cpu/intel/microcode 10 11romstage-y += romstage.c soc_util.c 12romstage-$(CONFIG_DISPLAY_HOBS) += hob_display.c 13romstage-$(CONFIG_DISPLAY_UPD_DATA) += upd_display.c 14 15ramstage-y += chip.c cpu.c soc_util.c ramstage.c soc_acpi.c reset.c 16ramstage-y += crashlog.c ioat.c 17ramstage-y += ../chip_gen1.c 18ramstage-$(CONFIG_DISPLAY_HOBS) += hob_display.c 19ramstage-$(CONFIG_DISPLAY_UPD_DATA) += upd_display.c 20CPPFLAGS_common += -I$(src)/soc/intel/xeon_sp/spr/include -I$(src)/soc/intel/xeon_sp/spr 21 22cpu_microcode_bins += 3rdparty/intel-microcode/intel-ucode/06-8f-08 23cpu_microcode_bins += 3rdparty/intel-microcode/intel-ucode/06-cf-02 24 25endif ## CONFIG_SOC_INTEL_SAPPHIRERAPIDS_SP 26