1## SPDX-License-Identifier: GPL-2.0-only 2 3ifeq ($(CONFIG_SOC_INTEL_SKYLAKE_SP),y) 4 5subdirs-y += ../../../../cpu/intel/microcode 6subdirs-y += ../../../../cpu/intel/turbo 7 8postcar-y += soc_util.c 9 10romstage-y += soc_util.c 11romstage-y += romstage.c 12romstage-y += soc_util.c 13romstage-y += hob_display.c 14romstage-$(CONFIG_DISPLAY_UPD_DATA) += upd_display.c 15romstage-$(CONFIG_DISPLAY_HOBS) += hob_display.c 16 17ramstage-y += soc_acpi.c 18ramstage-y += chip.c 19ramstage-y += ../chip_gen1.c 20ramstage-y += soc_util.c 21ramstage-y += cpu.c 22ramstage-$(CONFIG_DISPLAY_UPD_DATA) += upd_display.c 23ramstage-$(CONFIG_DISPLAY_HOBS) += hob_display.c 24ramstage-y += hob_display.c 25 26CPPFLAGS_common += -I$(src)/soc/intel/xeon_sp/skx/include -I$(src)/soc/intel/xeon_sp/skx 27 28cpu_microcode_bins += 3rdparty/intel-microcode/intel-ucode/06-55-04 29 30endif ## CONFIG_SOC_INTEL_SKYLAKE_SP 31