1## SPDX-License-Identifier: GPL-2.0-only 2 3ifeq ($(CONFIG_SOC_INTEL_COOPERLAKE_SP),y) 4 5subdirs-y += ../../../../cpu/intel/turbo 6subdirs-y += ../../../../cpu/intel/microcode 7 8romstage-y += romstage.c soc_util.c 9romstage-$(CONFIG_DISPLAY_UPD_DATA) += upd_display.c 10romstage-$(CONFIG_DISPLAY_HOBS) += hob_display.c 11 12ramstage-y += chip.c cpu.c soc_util.c soc_acpi.c 13ramstage-y += ../chip_gen1.c 14ramstage-$(CONFIG_DISPLAY_HOBS) += hob_display.c 15ramstage-$(CONFIG_DISPLAY_UPD_DATA) += upd_display.c 16 17CPPFLAGS_common += -I$(src)/soc/intel/xeon_sp/cpx/include -I$(src)/soc/intel/xeon_sp/cpx 18CPPFLAGS_common += -I$(src)/vendorcode/intel/fsp/fsp2_0/cooperlake_sp 19 20cpu_microcode_bins += 3rdparty/intel-microcode/intel-ucode/06-55-0b 21 22endif ## CONFIG_SOC_INTEL_COOPERLAKE_SP 23