1## SPDX-License-Identifier: GPL-2.0-only 2 3ifeq ($(CONFIG_SOC_INTEL_DENVERTON_NS),y) 4 5subdirs-y += ../../../cpu/intel/microcode 6subdirs-y += ../../../cpu/intel/turbo 7 8bootblock-y += bootblock/bootblock.c 9bootblock-y += spi.c 10bootblock-y += tsc_freq.c 11bootblock-$(CONFIG_CONSOLE_SERIAL) += bootblock/uart.c 12bootblock-$(CONFIG_DRIVERS_UART_8250MEM) += uart_debug.c 13 14postcar-y += memmap.c 15postcar-y += spi.c 16postcar-y += tsc_freq.c 17postcar-$(CONFIG_DRIVERS_UART_8250MEM) += uart_debug.c 18 19romstage-y += memmap.c 20romstage-y += reset.c 21romstage-y += ../../../cpu/intel/car/romstage.c 22romstage-y += romstage.c 23romstage-y += tsc_freq.c 24romstage-y += gpio_dnv.c 25romstage-y += gpio.c 26romstage-y += soc_util.c 27romstage-y += spi.c 28romstage-y += fiamux.c 29romstage-$(CONFIG_DRIVERS_UART_8250MEM) += uart_debug.c 30romstage-$(CONFIG_DISPLAY_UPD_DATA) += upd_display.c 31romstage-$(CONFIG_DISPLAY_HOBS) += hob_display.c 32 33ramstage-y += memmap.c 34ramstage-y += systemagent.c 35ramstage-y += reset.c 36ramstage-y += chip.c 37ramstage-y += soc_util.c 38ramstage-y += uart.c 39ramstage-y += xhci.c 40ramstage-y += csme_ie_kt.c 41ramstage-y += lpc.c 42ramstage-y += pmc.c 43ramstage-y += npk.c 44ramstage-y += sata.c 45ramstage-y += cpu.c 46ramstage-y += tsc_freq.c 47ramstage-y += spi.c 48ramstage-y += fiamux.c 49ramstage-y += hob_mem.c 50ramstage-y += gpio.c 51ramstage-$(CONFIG_DRIVERS_UART_8250MEM) += uart_debug.c 52ramstage-$(CONFIG_HAVE_ACPI_TABLES) += acpi.c 53ramstage-$(CONFIG_HAVE_SMI_HANDLER) += smm.c 54ramstage-$(CONFIG_HAVE_SMI_HANDLER) += pmutil.c 55ramstage-$(CONFIG_DISPLAY_UPD_DATA) += upd_display.c 56ramstage-$(CONFIG_DISPLAY_HOBS) += hob_display.c 57 58smm-y += pmutil.c 59smm-y += soc_util.c 60smm-y += smihandler.c 61smm-y += tsc_freq.c 62smm-$(CONFIG_SPI_FLASH_SMM) += spi.c 63smm-$(CONFIG_DRIVERS_UART_8250MEM) += uart_debug.c 64 65verstage-y += memmap.c 66verstage-y += reset.c 67verstage-y += spi.c 68verstage-y += tsc_freq.c 69verstage-$(CONFIG_DRIVERS_UART_8250MEM) += uart_debug.c 70 71CPPFLAGS_common += -I$(src)/soc/intel/denverton_ns/include 72 73cpu_microcode_bins += 3rdparty/intel-microcode/intel-ucode/06-5f-01 74 75endif ## CONFIG_SOC_INTEL_DENVERTON_NS 76