xref: /aosp_15_r20/external/coreboot/src/soc/intel/common/block/cse/Makefile.mk (revision b9411a12aaaa7e1e6a6fb7c5e057f44ee179a49c) 
1## SPDX-License-Identifier: GPL-2.0-only
2romstage-$(CONFIG_SOC_INTEL_COMMON_BLOCK_CSE) += cse.c
3ramstage-$(CONFIG_SOC_INTEL_COMMON_BLOCK_CSE) += cse.c
4romstage-$(CONFIG_SOC_INTEL_CSE_LITE_SKU) += cse_lite.c
5ramstage-$(CONFIG_SOC_INTEL_CSE_LITE_SKU) += cse_lite.c
6ramstage-$(CONFIG_SOC_INTEL_CSE_LITE_SKU) += cse_lite_cmos.c
7romstage-$(CONFIG_SOC_INTEL_CSE_LITE_SKU) += cse_lite_cmos.c
8ramstage-$(CONFIG_SOC_INTEL_CSE_HAVE_SPEC_SUPPORT) += cse_spec.c
9ramstage-$(CONFIG_SOC_INTEL_COMMON_BLOCK_CSE) += disable_heci.c
10smm-$(CONFIG_SOC_INTEL_COMMON_BLOCK_CSE) += disable_heci.c
11ramstage-$(CONFIG_SOC_INTEL_CSE_SET_EOP) += cse_eop.c
12romstage-$(CONFIG_SOC_INTEL_CSE_PRE_CPU_RESET_TELEMETRY) += telemetry.c
13
14romstage-$(CONFIG_SOC_INTEL_CSE_LITE_SYNC_BY_PAYLOAD) += cse_sync_payload.c
15
16ifeq ($(CONFIG_STITCH_ME_BIN),y)
17
18CSE_BP1_BIN := $(objcse)/cse_bp1.bin
19CSE_BP2_BIN := $(objcse)/cse_bp2.bin
20CSE_LAYOUT_BIN := $(objcse)/cse_layout.bin
21CSE_RW_FILE := $(CSE_BP2_BIN)
22
23CSE_BPDT_VERSION := $(call strip_quotes,$(CONFIG_CSE_BPDT_VERSION))
24ifeq ($(CONFIG_CSE_BPDT_VERSION),)
25$(error "CONFIG_CSE_BPDT_VERSION is not set!")
26endif
27
28CSE_FPT_INPUT=$(call cse_input_path,$(CONFIG_CSE_FPT_FILE))
29CSE_DATA_INPUT=$(call cse_input_path,$(CONFIG_CSE_DATA_FILE))
30
31get_cse_region_offset=$(call int-subtract,$(call get_fmap_value,$(1)) $(CSE_LAYOUT_OFFSET))
32
33CSE_LAYOUT_OFFSET=$(call get_fmap_value,FMAP_SECTION_CSE_LAYOUT_START)
34CSE_BP1_OFFSET=$(call get_cse_region_offset,FMAP_SECTION_CSE_RO_START)
35CSE_BP1_SIZE=$(call get_fmap_value,FMAP_SECTION_CSE_RO_SIZE)
36CSE_BP2_OFFSET=$(call get_cse_region_offset,FMAP_SECTION_CSE_RW_START)
37CSE_BP2_SIZE=$(call get_fmap_value,FMAP_SECTION_CSE_RW_SIZE)
38CSE_DP_OFFSET=$(call get_cse_region_offset,FMAP_SECTION_CSE_DATA_START)
39CSE_DP_SIZE=$(call get_fmap_value,FMAP_SECTION_CSE_DATA_SIZE)
40
41.PHONY: cse_inputs
42cse_inputs: $(cse_input_files)
43
44$(cse_decomp_files): $(CSE_FPT_INPUT) $(CSE_FPT)
45	printf "    DUMP       $(@F)\n"
46	$(CSE_FPT) $< dump -o $(objcse) -n $(@F) > /dev/null
47
48define cse_add_ingredient
49	$(if $($(2)-file), \
50		printf "    CSEADD     $(2) ($($(2)-file)) -> $(1)\n";
51		$(CSE_SERGER) $@ add -n $(2) -f $($(2)-file) > /dev/null,
52		printf "    CSEADD     $(2) (dummy) -> $(1)\n";
53		$(CSE_SERGER) $@ add -n $(2) > /dev/null)
54endef
55
56$(objcse)/cse_%.bin: $(CSE_SERGER) cse_inputs $(cse_decomp_files)
57	printf "    CREATE     $(@F) (version $(CSE_BPDT_VERSION))\n"
58	$(CSE_SERGER) $@ create-bpdt -v $(CSE_BPDT_VERSION) > /dev/null
59	$(foreach ingredient,$(cse_$*_ingredients),\
60		$(call cse_add_ingredient,$(@F),$(ingredient));)
61
62$(OBJ_ME_BIN): $(CSE_BP1_BIN) $(CSE_BP2_BIN) $(CSE_DATA_INPUT) $(obj)/fmap_config.h
63	printf "    CREATE     $(@F)\n"
64	$(CSE_SERGER) $@ create-cse-region -v $(CSE_BPDT_VERSION) \
65		--bp1 $(CSE_BP1_OFFSET):$(CSE_BP1_SIZE) --bp1_file $(CSE_BP1_BIN) \
66		--bp2 $(CSE_BP2_OFFSET):$(CSE_BP2_SIZE) --bp2_file $(CSE_BP2_BIN) \
67		--dp $(CSE_DP_OFFSET):$(CSE_DP_SIZE) --dp_file $(CSE_DATA_INPUT) > /dev/null
68
69endif
70
71ifeq ($(CONFIG_SOC_INTEL_CSE_RW_UPDATE),y)
72
73ifneq ($(CONFIG_STITCH_ME_BIN),y)
74
75ifeq ($(CONFIG_SOC_INTEL_CSE_RW_FILE),"")
76$(error "CSE RW file path is missing and need to be set by mainboard config")
77endif
78CSE_RW_FILE := $(call strip_quotes,$(CONFIG_SOC_INTEL_CSE_RW_FILE))
79
80endif
81
82CSE_LITE_ME_RW = $(call strip_quotes,$(CONFIG_SOC_INTEL_CSE_RW_CBFS_NAME))
83
84regions-for-file-$(CSE_LITE_ME_RW) = FW_MAIN_A,FW_MAIN_B
85
86cbfs-files-y += $(CSE_LITE_ME_RW)
87$(CSE_LITE_ME_RW)-file := $(CSE_RW_FILE)
88$(CSE_LITE_ME_RW)-name := $(CSE_LITE_ME_RW)
89$(CSE_LITE_ME_RW)-type := raw
90ifeq ($(CONFIG_SOC_INTEL_CSE_LITE_COMPRESS_ME_RW),y)
91$(CSE_LITE_ME_RW)-compression := LZMA
92endif
93
94INPUT_FILE := $(call strip_quotes,$(CONFIG_SOC_INTEL_CSE_RW_FILE))
95TEMP_FILE := $(shell mktemp)
96OFFSETS := 16 18 20 22 # Offsets for CSE version components
97VERSIONS := CSE_VERSION_MAJOR CSE_VERSION_MINOR CSE_VERSION_HOTFIX CSE_VERSION_BUILD
98INDEXES := $(shell seq 1 $(words $(OFFSETS)))
99
100$(obj)/cse_rw.version:
101	$(foreach index,$(INDEXES), \
102		$(shell dd if=$(INPUT_FILE) of=$(TEMP_FILE) bs=1 skip=$(word $(index),$(OFFSETS)) count=2 status=none) \
103		$(eval $(word $(index),$(VERSIONS)) := $(shell printf "%d" 0x$(shell echo $(shell echo $(shell xxd -p $(TEMP_FILE)) | cut -c3-4)$(shell echo $(shell xxd -p $(TEMP_FILE)) | cut -c1-2))) ) \
104	)
105	rm -f $(TEMP_FILE)
106	$(eval CSE_RW_CBFS_VERSION := $(shell printf "%d.%d.%d.%d" $(CSE_VERSION_MAJOR)$(CSE_VERSION_MINOR)$(CSE_VERSION_HOTFIX)$(CSE_VERSION_BUILD)))
107	@echo '$(CSE_RW_CBFS_VERSION)' > $@
108
109CSE_RW_VERSION = $(call strip_quotes,$(CONFIG_SOC_INTEL_CSE_RW_VERSION_CBFS_NAME))
110regions-for-file-$(CSE_RW_VERSION) = FW_MAIN_A,FW_MAIN_B
111cbfs-files-y += $(CSE_RW_VERSION)
112$(CSE_RW_VERSION)-file := $(obj)/cse_rw.version
113$(CSE_RW_VERSION)-name := $(CSE_RW_VERSION)
114$(CSE_RW_VERSION)-type := raw
115
116endif
117
118ifeq ($(CONFIG_SOC_INTEL_CSE_SUB_PART_UPDATE),y)
119
120CSE_IOM_FILE = $(call strip_quotes,$(CONFIG_SOC_INTEL_CSE_IOM_CBFS_FILE))
121CSE_IOM = $(call strip_quotes,$(CONFIG_SOC_INTEL_CSE_IOM_CBFS_NAME))
122regions-for-file-$(CSE_IOM) = FW_MAIN_A,FW_MAIN_B,COREBOOT
123cbfs-files-y += $(CSE_IOM)
124$(CSE_IOM)-file := $(CSE_IOM_FILE)
125$(CSE_IOM)-name := $(CSE_IOM)
126$(CSE_IOM)-type := raw
127
128CSE_NPHY_FILE = $(call strip_quotes,$(CONFIG_SOC_INTEL_CSE_NPHY_CBFS_FILE))
129CSE_NPHY = $(call strip_quotes,$(CONFIG_SOC_INTEL_CSE_NPHY_CBFS_NAME))
130regions-for-file-$(CSE_NPHY) = FW_MAIN_A,FW_MAIN_B,COREBOOT
131cbfs-files-y += $(CSE_NPHY)
132$(CSE_NPHY)-file := $(CSE_NPHY_FILE)
133$(CSE_NPHY)-name := $(CSE_NPHY)
134$(CSE_NPHY)-type := raw
135endif
136