1## SPDX-License-Identifier: GPL-2.0-only 2bootblock-y += bootblock.c 3 4ramstage-y += adsp.c 5romstage-y += early_pch.c 6ramstage-$(CONFIG_ELOG) += elog.c 7ramstage-y += finalize.c 8ramstage-y += ../../../../southbridge/intel/lynxpoint/lp_gpio.c 9romstage-y += ../../../../southbridge/intel/lynxpoint/lp_gpio.c 10verstage-y += ../../../../southbridge/intel/lynxpoint/lp_gpio.c 11smm-y += ../../../../southbridge/intel/lynxpoint/lp_gpio.c 12ramstage-y += hda.c 13ramstage-y += ../../../../southbridge/intel/lynxpoint/hda_verb.c 14ramstage-y += ../../../../southbridge/intel/lynxpoint/iobp.c 15romstage-y += ../../../../southbridge/intel/lynxpoint/iobp.c 16ramstage-y += fadt.c 17ramstage-y += lpc.c 18ramstage-y += me.c 19ramstage-y += me_status.c 20romstage-y += me_status.c 21ramstage-y += pch.c 22romstage-y += pch.c 23ramstage-y += pcie.c 24ramstage-y += pmutil.c 25romstage-y += pmutil.c 26smm-y += pmutil.c 27verstage-y += pmutil.c 28romstage-y += power_state.c 29ramstage-y += ramstage.c 30ramstage-y += sata.c 31ramstage-y += serialio.c 32ramstage-y += ../../../../southbridge/intel/lynxpoint/smbus.c 33ramstage-y += smi.c 34smm-y += smihandler.c 35bootblock-y += usb_debug.c 36romstage-y += usb_debug.c 37ramstage-y += usb_debug.c 38ramstage-y += usb_ehci.c 39ramstage-y += usb_xhci.c 40smm-y += usb_xhci.c 41 42bootblock-$(CONFIG_SERIALIO_UART_CONSOLE) += ../../../../southbridge/intel/lynxpoint/iobp.c 43bootblock-$(CONFIG_SERIALIO_UART_CONSOLE) += ../../../../southbridge/intel/lynxpoint/uart_init.c 44all-$(CONFIG_SERIALIO_UART_CONSOLE) += ../../../../southbridge/intel/lynxpoint/uart.c 45smm-$(CONFIG_SERIALIO_UART_CONSOLE) += ../../../../southbridge/intel/lynxpoint/uart.c 46