xref: /aosp_15_r20/external/coreboot/src/soc/amd/stoneyridge/Makefile.mk (revision b9411a12aaaa7e1e6a6fb7c5e057f44ee179a49c)
1# SPDX-License-Identifier: BSD-3-Clause
2
3ifeq ($(CONFIG_SOC_AMD_STONEYRIDGE),y)
4
5subdirs-y += ../../../cpu/amd/mtrr/
6
7bootblock-y += aoac.c
8bootblock-y += BiosCallOuts.c
9bootblock-y += bootblock.c
10bootblock-y += early_fch.c
11bootblock-y += gpio.c
12bootblock-y += i2c.c
13bootblock-y += enable_usbdebug.c
14
15romstage-y += BiosCallOuts.c
16romstage-y += i2c.c
17romstage-y += romstage.c
18romstage-y += enable_usbdebug.c
19romstage-y += fch_agesa.c
20romstage-y += gpio.c
21romstage-y += smbus_spd.c
22romstage-y += memmap.c
23romstage-y += psp.c
24
25verstage-y += gpio.c
26verstage-y += i2c.c
27
28postcar-y += memmap.c
29postcar-$(CONFIG_TPM_MEASURED_BOOT) += i2c.c
30
31ramstage-y += aoac.c
32ramstage-y += BiosCallOuts.c
33ramstage-y += i2c.c
34ramstage-y += chip.c
35ramstage-y += cpu.c
36ramstage-y += mca.c
37ramstage-y += enable_usbdebug.c
38ramstage-$(CONFIG_HAVE_ACPI_TABLES) += acpi.c
39ramstage-y += fch.c
40ramstage-y += fch_agesa.c
41ramstage-y += gpio.c
42ramstage-y += graphics.c
43ramstage-y += northbridge.c
44ramstage-y += sata.c
45ramstage-y += memmap.c
46ramstage-y += usb.c
47ramstage-y += psp.c
48
49all-y += monotonic_timer.c
50all-y += pstate_util.c
51all-y += reset.c
52all-y += tsc_freq.c
53all-y += uart.c
54
55smm-y += pstate_util.c
56smm-y += monotonic_timer.c
57smm-y += smihandler.c
58smm-y += tsc_freq.c
59smm-$(CONFIG_DEBUG_SMI) += uart.c
60smm-y += gpio.c
61smm-y += psp.c
62
63CPPFLAGS_common += -I$(src)/soc/amd/stoneyridge/include
64CPPFLAGS_common += -I$(src)/soc/amd/stoneyridge/acpi
65
66# ROMSIG Normally At ROMBASE + 0x20000
67# +-----------+---------------+----------------+------------+
68# |0x55AA55AA |EC ROM Address |GEC ROM Address |USB3 ROM    |
69# +-----------+---------------+----------------+------------+
70# |PSPDIR ADDR|
71# +-----------+
72#
73# EC ROM should be 64K aligned.
74### 0
75
76FIRMWARE_LOCATION=$(shell grep -e FIRMWARE_LOCATION $(CONFIG_AMDFW_CONFIG_FILE) | awk '{print $$2}')
77
78ifneq ($(FIRMWARE_LOCATION),)
79
80ifeq ($(CONFIG_AMD_APU_STONEYRIDGE),y)
81FIRMWARE_TYPE=ST
82else
83ifeq ($(CONFIG_AMD_APU_MERLINFALCON),y)
84FIRMWARE_TYPE=CZ
85else
86ifeq ($(CONFIG_AMD_APU_PRAIRIEFALCON),y)
87FIRMWARE_TYPE=ST
88else
89$(error soc/amd/stoneyridge: Unusable FIRMWARE_TYPE)
90
91endif # CONFIG_AMD_APU_PRAIRIEFALCON
92endif # CONFIG_AMD_APU_MERLINFALCON
93endif # CONFIG_AMD_APU_STONEYRIDGE
94
95add_opt_prefix=$(if $(call strip_quotes, $(1)), $(2) $(call strip_quotes, $(1)), )
96
97OPT_STONEYRIDGE_XHCI_FWM_FILE=$(call add_opt_prefix, $(CONFIG_STONEYRIDGE_XHCI_FWM_FILE), --xhci)
98OPT_STONEYRIDGE_GEC_FWM_FILE=$(call add_opt_prefix, $(CONFIG_STONEYRIDGE_GEC_FWM_FILE), --gec)
99
100SMUFWM_FILE=$(top)/$(FIRMWARE_LOCATION)/$(shell awk '($$1=="PSP_SMUFW1_SUB0_FILE") {print $$2}' $(CONFIG_AMDFW_CONFIG_FILE))
101SMUFWM_FN_FILE=$(top)/$(FIRMWARE_LOCATION)/$(shell awk '($$1=="PSP_SMUFW1_SUB1_FILE") {print $$2}' $(CONFIG_AMDFW_CONFIG_FILE))
102
103SMUFIRMWARE2_FILE=$(top)/$(FIRMWARE_LOCATION)/$(shell awk '($$1=="PSP_SMUFW2_SUB0_FILE") {print $$2}' $(CONFIG_AMDFW_CONFIG_FILE))
104SMUFIRMWARE2_FN_FILE=$(top)/$(FIRMWARE_LOCATION)/$(shell awk '($$1=="PSP_SMUFW2_SUB1_FILE") {print $$2}' $(CONFIG_AMDFW_CONFIG_FILE))
105
106ifeq ("$(wildcard $(SMUFWM_FN_FILE))","")
107SMUFWM_FN_FILE=
108SMUFIRMWARE2_FN_FILE=
109endif
110
111ifeq ($(CONFIG_USE_PSPSECUREOS),y)
112PSP_USE_PSPSECUREOS="--use-pspsecureos"
113endif
114
115OPT_PSP_USE_PSPSECUREOS=$(call strip_quotes, $(PSP_USE_PSPSECUREOS))
116
117OPT_EFS_SPI_READ_MODE=$(call add_opt_prefix, $(CONFIG_EFS_SPI_READ_MODE), --spi-read-mode)
118OPT_EFS_SPI_SPEED=$(call add_opt_prefix, $(CONFIG_EFS_SPI_SPEED), --spi-speed)
119
120$(obj)/amdfw.rom:	$(call strip_quotes, $(CONFIG_STONEYRIDGE_XHCI_FWM_FILE)) \
121			$(call strip_quotes, $(CONFIG_STONEYRIDGE_GEC_FWM_FILE)) \
122			$(DEP_FILES) \
123			$(AMDFWTOOL)
124	rm -f $@
125	@printf "    AMDFWTOOL  $(subst $(obj)/,,$(@))\n"
126	$(AMDFWTOOL) \
127		$(OPT_STONEYRIDGE_XHCI_FWM_FILE) \
128		$(OPT_STONEYRIDGE_GEC_FWM_FILE) \
129		$(OPT_PSP_USE_PSPSECUREOS) \
130		$(OPT_EFS_SPI_READ_MODE) \
131		$(OPT_EFS_SPI_SPEED) \
132		$(OPT_DEBUG_AMDFWTOOL) \
133		--config $(CONFIG_AMDFW_CONFIG_FILE) \
134		--flashsize $(CONFIG_ROM_SIZE) \
135		--location $(CONFIG_AMD_FWM_POSITION) \
136		--output	$@
137
138ifeq ($(CONFIG_AMDFW_OUTSIDE_CBFS),y)
139
140$(call add_intermediate, add_amdfw, $(obj)/amdfw.rom)
141	printf "    DD         Adding AMD Firmware at ROM offset 0x%x\n" \
142		"$(CONFIG_AMD_FWM_POSITION)"
143	dd if=$(obj)/amdfw.rom \
144		of=$< conv=notrunc bs=1 \
145		seek=$(CONFIG_AMD_FWM_POSITION) >/dev/null 2>&1
146
147else # ifeq ($(CONFIG_AMDFW_OUTSIDE_CBFS),y)
148
149STONEYRIDGE_FWM_POSITION=$(call int-add, \
150	$(call int-subtract, 0xffffffff $(CONFIG_ROM_SIZE)) \
151	1 \
152	$(CONFIG_AMD_FWM_POSITION))
153cbfs-files-y += apu/amdfw
154apu/amdfw-file := $(obj)/amdfw.rom
155apu/amdfw-position := $(STONEYRIDGE_FWM_POSITION)
156apu/amdfw-type := raw
157
158endif # ifeq ($(CONFIG_AMDFW_OUTSIDE_CBFS),y)
159
160ifeq ($(CONFIG_SOC_AMD_PSP_SELECTABLE_SMU_FW),y)
161
162cbfs-files-y += smu_fw
163cbfs-files-y += smu_fw2
164smu_fw-type := raw
165smu_fw2-type := raw
166
167ifeq ($(CONFIG_SOC_AMD_SMU_FANLESS),y)
168smu_fw-file := $(SMUFWM_FN_FILE)
169smu_fw2-file := $(SMUFIRMWARE2_FN_FILE)
170else ifeq ($(CONFIG_SOC_AMD_SMU_FANNED),y)
171smu_fw-file := $(SMUFWM_FILE)
172smu_fw2-file := $(SMUFIRMWARE2_FILE)
173else
174$(error "Proper SMU Firmware not selected")
175endif
176
177endif # ifeq ($(CONFIG_SOC_AMD_PSP_SELECTABLE_SMU_FW),y)
178
179else # ifneq ($(FIRMWARE_LOCATION),)
180
181warn_no_amdfw:
182	printf "\n\t** WARNING **\n"
183	printf "coreboot has been built with no PSP firmware and "
184	printf "a non-booting image has been generated.\n\n"
185
186PHONY+=warn_no_amdfw
187
188show_notices:: warn_no_amdfw
189
190endif # ifneq ($(FIRMWARE_LOCATION),)
191
192endif # ($(CONFIG_SOC_AMD_STONEYRIDGE),y)
193