xref: /aosp_15_r20/external/coreboot/src/mainboard/google/zork/variants/baseboard/trembyle/Makefile.mk (revision b9411a12aaaa7e1e6a6fb7c5e057f44ee179a49c)
1# SPDX-License-Identifier: GPL-2.0-or-later
2
3all-y += gpio.c
4smm-y += gpio.c
5ramstage-y += fsps.c
6
7# APCB Board ID GPIO configuration.
8# These GPIOs determine which memory SPD will be used during boot.
9# APCB_BOARD_ID_GPIO[0-3] = GPIO_NUMBER GPIO_IO_MUX GPIO_BANK_CTL
10# GPIO_NUMBER: FCH GPIO number
11# GPIO_IO_MUX: Value write to IOMUX to configure this GPIO
12# GPIO_BANK_CTL: Value write to GPIOBankCtl[23:16] to configure this GPIO
13# APCB_POPULATE_2ND_CHANNEL: Populates 2nd memory channel in APCB when true.
14#	Trembyle based boards select 1 or 2 channels based on AGPIO84
15#	Dalboz based boards only support 1 channel
16APCB_BOARD_ID_GPIO0 = 121 1 0
17APCB_BOARD_ID_GPIO1 = 120 1 0
18APCB_BOARD_ID_GPIO2 = 131 3 0
19APCB_BOARD_ID_GPIO3 = 116 1 0
20APCB_POPULATE_2ND_CHANNEL = true
21