1 /* SPDX-License-Identifier: GPL-2.0-only */ 2 3 #include <amdblocks/data_fabric.h> 4 #include <device/device.h> 5 #include <types.h> 6 7 /* Read the registers and return normalized values */ data_fabric_get_mmio_base_size(unsigned int reg,resource_t * mmio_base,resource_t * mmio_limit)8void data_fabric_get_mmio_base_size(unsigned int reg, resource_t *mmio_base, 9 resource_t *mmio_limit) 10 { 11 const uint32_t base_reg = data_fabric_broadcast_read32(DF_MMIO_BASE(reg)); 12 const uint32_t limit_reg = data_fabric_broadcast_read32(DF_MMIO_LIMIT(reg)); 13 const union df_mmio_addr_ext ext_reg = { 14 .raw = data_fabric_broadcast_read32(DF_MMIO_ADDR_EXT(reg)) 15 }; 16 /* The raw register values in the base and limit registers are bits 47..16 of the 17 actual address. The MMIO address extension register contains the extended MMIO base 18 and limit bits starting with bit 48 of the actual address. */ 19 *mmio_base = (resource_t)ext_reg.base_ext << DF_MMIO_EXT_ADDR_SHIFT | 20 (resource_t)base_reg << DF_MMIO_SHIFT; 21 *mmio_limit = ((resource_t)ext_reg.limit_ext << DF_MMIO_EXT_ADDR_SHIFT | 22 (((resource_t)limit_reg + 1) << DF_MMIO_SHIFT)) - 1; 23 } 24