1 /*
2 * Copyright © 2024 Igalia S.L.
3 * SPDX-License-Identifier: MIT
4 */
5
6 #include "etna_hwdb.h"
7
8 #include "etna_core_info.h"
9 #include "hwdb.h"
10
11 /* clang-format off */
12 #define ETNA_FEATURE(member, feature) \
13 if (db->member) \
14 etna_core_enable_feature(info, ETNA_FEATURE_##feature)
15 /* clang-format on */
16
17 bool
etna_query_feature_db(struct etna_core_info * info)18 etna_query_feature_db(struct etna_core_info *info)
19 {
20 gcsFEATURE_DATABASE *db = gcQueryFeatureDB(info->model, info->revision, info->product_id,
21 info->eco_id, info->customer_id);
22
23 if (!db)
24 return false;
25
26 if (db->NNCoreCount)
27 info->type = ETNA_CORE_NPU;
28 else
29 info->type = ETNA_CORE_GPU;
30
31 /* Features: */
32 ETNA_FEATURE(REG_FastClear, FAST_CLEAR);
33 ETNA_FEATURE(REG_Pipe3D, PIPE_3D);
34 ETNA_FEATURE(REG_FE20BitIndex, 32_BIT_INDICES);
35 ETNA_FEATURE(REG_MSAA, MSAA);
36 ETNA_FEATURE(REG_DXTTextureCompression, DXT_TEXTURE_COMPRESSION);
37 ETNA_FEATURE(REG_ETC1TextureCompression, ETC1_TEXTURE_COMPRESSION);
38 ETNA_FEATURE(REG_NoEZ, NO_EARLY_Z);
39
40 ETNA_FEATURE(REG_MC20, MC20);
41 ETNA_FEATURE(REG_Render8K, RENDERTARGET_8K);
42 ETNA_FEATURE(REG_Texture8K, TEXTURE_8K);
43 ETNA_FEATURE(REG_ExtraShaderInstructions0, HAS_SIGN_FLOOR_CEIL);
44 ETNA_FEATURE(REG_ExtraShaderInstructions1, HAS_SQRT_TRIG);
45 ETNA_FEATURE(REG_TileStatus2Bits, 2BITPERTILE);
46 ETNA_FEATURE(REG_SuperTiled32x32, SUPER_TILED);
47
48 ETNA_FEATURE(REG_CorrectAutoDisable1, AUTO_DISABLE);
49 ETNA_FEATURE(REG_TextureHorizontalAlignmentSelect, TEXTURE_HALIGN);
50 ETNA_FEATURE(REG_MMU, MMU_VERSION);
51 ETNA_FEATURE(REG_HalfFloatPipe, HALF_FLOAT);
52 ETNA_FEATURE(REG_WideLine, WIDE_LINE);
53 ETNA_FEATURE(REG_Halti0, HALTI0);
54 ETNA_FEATURE(REG_NonPowerOfTwo, NON_POWER_OF_TWO);
55 ETNA_FEATURE(REG_LinearTextureSupport, LINEAR_TEXTURE_SUPPORT);
56
57 ETNA_FEATURE(REG_LinearPE, LINEAR_PE);
58 ETNA_FEATURE(REG_SuperTiledTexture, SUPERTILED_TEXTURE);
59 ETNA_FEATURE(REG_LogicOp, LOGIC_OP);
60 ETNA_FEATURE(REG_Halti1, HALTI1);
61 ETNA_FEATURE(REG_SeamlessCubeMap, SEAMLESS_CUBE_MAP);
62 ETNA_FEATURE(REG_LineLoop, LINE_LOOP);
63 ETNA_FEATURE(REG_TextureTileStatus, TEXTURE_TILED_READ);
64 ETNA_FEATURE(REG_BugFixes8, BUG_FIXES8);
65
66 ETNA_FEATURE(REG_BugFixes15, PE_DITHER_FIX);
67 ETNA_FEATURE(REG_InstructionCache, INSTRUCTION_CACHE);
68 ETNA_FEATURE(REG_ExtraShaderInstructions2, HAS_FAST_TRANSCENDENTALS);
69
70 ETNA_FEATURE(REG_SmallMSAA, SMALL_MSAA);
71 ETNA_FEATURE(REG_BugFixes18, BUG_FIXES18);
72 ETNA_FEATURE(REG_TXEnhancements4, TEXTURE_ASTC);
73 ETNA_FEATURE(REG_PEEnhancements3, SINGLE_BUFFER);
74 ETNA_FEATURE(REG_Halti2, HALTI2);
75
76 ETNA_FEATURE(REG_BltEngine, BLT_ENGINE);
77 ETNA_FEATURE(REG_Halti3, HALTI3);
78 ETNA_FEATURE(REG_Halti4, HALTI4);
79 ETNA_FEATURE(REG_Halti5, HALTI5);
80 ETNA_FEATURE(REG_RAWriteDepth, RA_WRITE_DEPTH);
81
82 ETNA_FEATURE(CACHE128B256BPERLINE, CACHE128B256BPERLINE);
83 ETNA_FEATURE(NEW_GPIPE, NEW_GPIPE);
84 ETNA_FEATURE(NO_ASTC, NO_ASTC);
85 ETNA_FEATURE(V4Compression, V4_COMPRESSION);
86
87 ETNA_FEATURE(RS_NEW_BASEADDR, RS_NEW_BASEADDR);
88 ETNA_FEATURE(PE_NO_ALPHA_TEST, PE_NO_ALPHA_TEST);
89
90 ETNA_FEATURE(SH_NO_ONECONST_LIMIT, SH_NO_ONECONST_LIMIT);
91 ETNA_FEATURE(COMPUTE_ONLY, COMPUTE_ONLY);
92
93 ETNA_FEATURE(DEC400, DEC400);
94
95 ETNA_FEATURE(VIP_V7, VIP_V7);
96 ETNA_FEATURE(NN_XYDP0, NN_XYDP0);
97
98 /* Limits: */
99 if (info->type == ETNA_CORE_GPU) {
100 info->gpu.max_instructions = db->InstructionCount;
101 info->gpu.vertex_output_buffer_size = db->VertexOutputBufferSize;
102 info->gpu.vertex_cache_size = db->VertexCacheSize;
103 info->gpu.shader_core_count = db->NumShaderCores;
104 info->gpu.stream_count = db->Streams;
105 info->gpu.max_registers = db->TempRegisters;
106 info->gpu.pixel_pipes = db->NumPixelPipes;
107 info->gpu.max_varyings = db->VaryingCount;
108 info->gpu.num_constants = db->NumberOfConstants;
109 } else {
110 info->npu.nn_core_count = db->NNCoreCount;
111 info->npu.nn_mad_per_core = db->NNMadPerCore;
112 info->npu.tp_core_count = db->TPEngine_CoreCount;
113 info->npu.on_chip_sram_size = db->VIP_SRAM_SIZE;
114 info->npu.axi_sram_size = db->AXI_SRAM_SIZE;
115 info->npu.nn_zrl_bits = db->NN_ZRL_BITS;
116 info->npu.nn_accum_buffer_depth = db->NNAccumBufferDepth;
117 info->npu.nn_input_buffer_depth = db->NNInputBufferDepth;
118 }
119
120 return true;
121 }
122