1 /* SPDX-License-Identifier: GPL-2.0-only */
2
3 #include <bootblock_common.h>
4 #include <stdint.h>
5 #include <southbridge/intel/bd82x6x/pch.h>
6
7 #include "superio.h"
8 #include "thermal.h"
9
10 static const u16 hwm_initvals[] = {
11 HWM_BANK(0),
12 HWM_INITVAL(0xae, 0x01), /* Enable PECI Agent0 */
13
14 HWM_BANK(7), /* PECI */
15 HWM_INITVAL(0x01, 0x95), /* Enable PECI */
16 HWM_INITVAL(0x03, 0x10), /* Enable Agent 0 */
17 /*
18 * PECI temperatures are negative, going up to 0.
19 * 0 represents the maximum allowable junction temperature, Tjmax.
20 * There is also Tcontrol, which is the temperature at which the
21 * system cooling should run at full speed.
22 * Since the NCT5577D fan control only supports positive values,
23 * Tbase0 is used as an offset.
24 */
25 HWM_INITVAL(0x09, CRITICAL_TEMPERATURE), /* Tbase0 */
26
27 HWM_BANK(2), /* CPUFAN control */
28 HWM_INITVAL(0x00, 0x0c), /* PECI Agent 0 as CPUFAN monitoring source */
29 HWM_INITVAL(0x01, 50), /* Target temperature */
30 HWM_INITVAL(0x02, 0x40), /* Enable Smart Fan IV mode */
31 HWM_INITVAL(0x03, 0x01), /* Step-up time */
32 HWM_INITVAL(0x04, 0x01), /* Step-down time */
33 HWM_INITVAL(0x05, 0x10), /* Stop PWM value */
34 HWM_INITVAL(0x06, 0x20), /* Start PWM value */
35 HWM_INITVAL(0x21, 45), /* Smart Fan IV Temp1 */
36 HWM_INITVAL(0x22, 46), /* Smart Fan IV Temp2 */
37 HWM_INITVAL(0x23, 47), /* Smart Fan IV Temp3 */
38 HWM_INITVAL(0x24, PASSIVE_TEMPERATURE), /* Smart Fan IV Temp4 */
39 HWM_INITVAL(0x27, 0x01), /* Smart Fan IV PWM1 */
40 HWM_INITVAL(0x28, 0x02), /* Smart Fan IV PWM2 */
41 HWM_INITVAL(0x29, 0x03), /* Smart Fan IV PWM3 */
42 HWM_INITVAL(0x2a, 0xff), /* Smart Fan IV PWM4 */
43 /* Smart Fan IV Critical temp */
44 HWM_INITVAL(0x35, CRITICAL_TEMPERATURE),
45 HWM_INITVAL(0x38, 3), /* Smart Fan IV Critical temp tolerance */
46 HWM_INITVAL(0x39, 0x81), /* Enable SYSTIN weight value */
47 HWM_INITVAL(0x3a, 1), /* SYSTIN temperature step */
48 HWM_INITVAL(0x3b, 2), /* SYSTIN step tolerance */
49 HWM_INITVAL(0x3c, 1), /* SYSTIN weight step */
50 HWM_INITVAL(0x3d, 40), /* SYSTIN temperature base */
51 HWM_INITVAL(0x3e, 0x00), /* SYSTIN fan duty base */
52
53 HWM_BANK(0),
54 };
55
hwm_init(void)56 static void hwm_init(void)
57 {
58 /* Set up fan control */
59 for (int i = 0; i < ARRAY_SIZE(hwm_initvals); i++)
60 HWM_WRITE_INITVAL(hwm_initvals[i]);
61 }
62
63 static const u16 superio_initvals[] = {
64 /* Global config registers */
65 SUPERIO_INITVAL(0x1a, 0x02),
66 SUPERIO_INITVAL(0x1b, 0x6a),
67 SUPERIO_INITVAL(0x27, 0x80),
68 #if CONFIG(DISABLE_UART_ON_TESTPADS)
69 SUPERIO_INITVAL(0x2a, 0x80),
70 #else
71 SUPERIO_INITVAL(0x2a, 0x00),
72 #endif
73 SUPERIO_INITVAL(0x2c, 0x00),
74
75 SUPERIO_BANK(2), /* UART A */
76 SUPERIO_INITVAL(0x30, 0x01),
77 SUPERIO_INITVAL(0x60, 0x03),
78 SUPERIO_INITVAL(0x61, 0xf8),
79 SUPERIO_INITVAL(0x70, 0x04),
80
81 SUPERIO_BANK(7), /* GPIO config */
82 SUPERIO_INITVAL(0x30, 0x01),
83 SUPERIO_INITVAL(0xe0, 0xcf),
84 SUPERIO_INITVAL(0xe1, 0x0f),
85 SUPERIO_INITVAL(0xe4, 0xed),
86 SUPERIO_INITVAL(0xe5, 0x4d),
87 SUPERIO_INITVAL(0xec, 0x30),
88 SUPERIO_INITVAL(0xee, 0xff),
89
90 SUPERIO_BANK(8),
91 SUPERIO_INITVAL(0x30, 0x0a),
92 SUPERIO_INITVAL(0x60, GPIO_PORT >> 8),
93 SUPERIO_INITVAL(0x61, GPIO_PORT & 0xff),
94
95 SUPERIO_BANK(9),
96 SUPERIO_INITVAL(0x30, 0x8c),
97 SUPERIO_INITVAL(0xe1, 0x90),
98
99 SUPERIO_BANK(0xa),
100 SUPERIO_INITVAL(0xe4, 0x20),
101 SUPERIO_INITVAL(0xe6, 0x4c),
102
103 SUPERIO_BANK(0xb), /* HWM & LED */
104 SUPERIO_INITVAL(0x30, 0x01),
105 SUPERIO_INITVAL(0x60, HWM_PORT >> 8),
106 SUPERIO_INITVAL(0x61, HWM_PORT & 0xff),
107 SUPERIO_INITVAL(0xf7, 0x67),
108 SUPERIO_INITVAL(0xf8, 0x60),
109
110 SUPERIO_BANK(0x16),
111 SUPERIO_INITVAL(0x30, 0x00),
112 };
113
superio_init(void)114 static void superio_init(void)
115 {
116 SUPERIO_UNLOCK;
117 for (int i = 0; i < ARRAY_SIZE(superio_initvals); i++)
118 SUPERIO_WRITE_INITVAL(superio_initvals[i]);
119 SUPERIO_LOCK;
120 }
121
bootblock_mainboard_early_init(void)122 void bootblock_mainboard_early_init(void)
123 {
124 superio_init();
125 hwm_init();
126 }
127