xref: /nrf52832-nimble/rt-thread/components/drivers/include/drivers/serial.h (revision 104654410c56c573564690304ae786df310c91fc)
1 /*
2  * Copyright (c) 2006-2018, RT-Thread Development Team
3  *
4  * SPDX-License-Identifier: Apache-2.0
5  *
6  * Change Logs:
7  * Date           Author       Notes
8  * 2012-05-15     lgnq         first version.
9  * 2012-05-28     bernard      change interfaces
10  * 2013-02-20     bernard      use RT_SERIAL_RB_BUFSZ to define
11  *                             the size of ring buffer.
12  */
13 
14 #ifndef __SERIAL_H__
15 #define __SERIAL_H__
16 
17 #include <rtthread.h>
18 
19 #define BAUD_RATE_2400                  2400
20 #define BAUD_RATE_4800                  4800
21 #define BAUD_RATE_9600                  9600
22 #define BAUD_RATE_19200                 19200
23 #define BAUD_RATE_38400                 38400
24 #define BAUD_RATE_57600                 57600
25 #define BAUD_RATE_115200                115200
26 #define BAUD_RATE_230400                230400
27 #define BAUD_RATE_460800                460800
28 #define BAUD_RATE_921600                921600
29 #define BAUD_RATE_2000000               2000000
30 #define BAUD_RATE_3000000               3000000
31 
32 #define DATA_BITS_5                     5
33 #define DATA_BITS_6                     6
34 #define DATA_BITS_7                     7
35 #define DATA_BITS_8                     8
36 #define DATA_BITS_9                     9
37 
38 #define STOP_BITS_1                     0
39 #define STOP_BITS_2                     1
40 #define STOP_BITS_3                     2
41 #define STOP_BITS_4                     3
42 
43 #ifdef _WIN32
44 #include <windows.h>
45 #else
46 #define PARITY_NONE                     0
47 #define PARITY_ODD                      1
48 #define PARITY_EVEN                     2
49 #endif
50 
51 #define BIT_ORDER_LSB                   0
52 #define BIT_ORDER_MSB                   1
53 
54 #define NRZ_NORMAL                      0       /* Non Return to Zero : normal mode */
55 #define NRZ_INVERTED                    1       /* Non Return to Zero : inverted mode */
56 
57 #ifndef RT_SERIAL_RB_BUFSZ
58 #define RT_SERIAL_RB_BUFSZ              64
59 #endif
60 
61 #define RT_SERIAL_EVENT_RX_IND          0x01    /* Rx indication */
62 #define RT_SERIAL_EVENT_TX_DONE         0x02    /* Tx complete   */
63 #define RT_SERIAL_EVENT_RX_DMADONE      0x03    /* Rx DMA transfer done */
64 #define RT_SERIAL_EVENT_TX_DMADONE      0x04    /* Tx DMA transfer done */
65 #define RT_SERIAL_EVENT_RX_TIMEOUT      0x05    /* Rx timeout    */
66 
67 #define RT_SERIAL_DMA_RX                0x01
68 #define RT_SERIAL_DMA_TX                0x02
69 
70 #define RT_SERIAL_RX_INT                0x01
71 #define RT_SERIAL_TX_INT                0x02
72 
73 #define RT_SERIAL_ERR_OVERRUN           0x01
74 #define RT_SERIAL_ERR_FRAMING           0x02
75 #define RT_SERIAL_ERR_PARITY            0x03
76 
77 #define RT_SERIAL_TX_DATAQUEUE_SIZE     2048
78 #define RT_SERIAL_TX_DATAQUEUE_LWM      30
79 
80 /* Default config for serial_configure structure */
81 #define RT_SERIAL_CONFIG_DEFAULT           \
82 {                                          \
83     BAUD_RATE_115200, /* 115200 bits/s */  \
84     DATA_BITS_8,      /* 8 databits */     \
85     STOP_BITS_1,      /* 1 stopbit */      \
86     PARITY_NONE,      /* No parity  */     \
87     BIT_ORDER_LSB,    /* LSB first sent */ \
88     NRZ_NORMAL,       /* Normal mode */    \
89     RT_SERIAL_RB_BUFSZ, /* Buffer size */  \
90     0                                      \
91 }
92 
93 struct serial_configure
94 {
95     rt_uint32_t baud_rate;
96 
97     rt_uint32_t data_bits               :4;
98     rt_uint32_t stop_bits               :2;
99     rt_uint32_t parity                  :2;
100     rt_uint32_t bit_order               :1;
101     rt_uint32_t invert                  :1;
102     rt_uint32_t bufsz                   :16;
103     rt_uint32_t reserved                :6;
104 };
105 
106 /*
107  * Serial FIFO mode
108  */
109 struct rt_serial_rx_fifo
110 {
111     /* software fifo */
112     rt_uint8_t *buffer;
113 
114     rt_uint16_t put_index, get_index;
115 
116     rt_bool_t is_full;
117 };
118 
119 struct rt_serial_tx_fifo
120 {
121     struct rt_completion completion;
122 };
123 
124 /*
125  * Serial DMA mode
126  */
127 struct rt_serial_rx_dma
128 {
129     rt_bool_t activated;
130 };
131 
132 struct rt_serial_tx_dma
133 {
134     rt_bool_t activated;
135     struct rt_data_queue data_queue;
136 };
137 
138 struct rt_serial_device
139 {
140     struct rt_device          parent;
141 
142     const struct rt_uart_ops *ops;
143     struct serial_configure   config;
144 
145     void *serial_rx;
146     void *serial_tx;
147 };
148 typedef struct rt_serial_device rt_serial_t;
149 
150 /**
151  * uart operators
152  */
153 struct rt_uart_ops
154 {
155     rt_err_t (*configure)(struct rt_serial_device *serial, struct serial_configure *cfg);
156     rt_err_t (*control)(struct rt_serial_device *serial, int cmd, void *arg);
157 
158     int (*putc)(struct rt_serial_device *serial, char c);
159     int (*getc)(struct rt_serial_device *serial);
160 
161     rt_size_t (*dma_transmit)(struct rt_serial_device *serial, rt_uint8_t *buf, rt_size_t size, int direction);
162 };
163 
164 void rt_hw_serial_isr(struct rt_serial_device *serial, int event);
165 
166 rt_err_t rt_hw_serial_register(struct rt_serial_device *serial,
167                                const char              *name,
168                                rt_uint32_t              flag,
169                                void                    *data);
170 
171 #endif
172