1 // SPDX-License-Identifier: GPL-2.0+
2 /*
3 * StarFive DWMAC platform driver
4 *
5 * Copyright (C) 2021 Emil Renner Berthing <[email protected]>
6 * Copyright (C) 2022 StarFive Technology Co., Ltd.
7 *
8 */
9
10 #include <linux/mod_devicetable.h>
11 #include <linux/platform_device.h>
12 #include <linux/property.h>
13 #include <linux/mfd/syscon.h>
14 #include <linux/regmap.h>
15
16 #include "stmmac_platform.h"
17
18 #define STARFIVE_DWMAC_PHY_INFT_RGMII 0x1
19 #define STARFIVE_DWMAC_PHY_INFT_RMII 0x4
20 #define STARFIVE_DWMAC_PHY_INFT_FIELD 0x7U
21
22 #define JH7100_SYSMAIN_REGISTER49_DLYCHAIN 0xc8
23
24 struct starfive_dwmac_data {
25 unsigned int gtxclk_dlychain;
26 };
27
28 struct starfive_dwmac {
29 struct device *dev;
30 struct clk *clk_tx;
31 const struct starfive_dwmac_data *data;
32 };
33
starfive_dwmac_fix_mac_speed(void * priv,unsigned int speed,unsigned int mode)34 static void starfive_dwmac_fix_mac_speed(void *priv, unsigned int speed, unsigned int mode)
35 {
36 struct starfive_dwmac *dwmac = priv;
37 long rate;
38 int err;
39
40 rate = rgmii_clock(speed);
41 if (rate < 0) {
42 dev_err(dwmac->dev, "invalid speed %u\n", speed);
43 return;
44 }
45
46 err = clk_set_rate(dwmac->clk_tx, rate);
47 if (err)
48 dev_err(dwmac->dev, "failed to set tx rate %lu\n", rate);
49 }
50
starfive_dwmac_set_mode(struct plat_stmmacenet_data * plat_dat)51 static int starfive_dwmac_set_mode(struct plat_stmmacenet_data *plat_dat)
52 {
53 struct starfive_dwmac *dwmac = plat_dat->bsp_priv;
54 struct regmap *regmap;
55 unsigned int args[2];
56 unsigned int mode;
57 int err;
58
59 switch (plat_dat->mac_interface) {
60 case PHY_INTERFACE_MODE_RMII:
61 mode = STARFIVE_DWMAC_PHY_INFT_RMII;
62 break;
63
64 case PHY_INTERFACE_MODE_RGMII:
65 case PHY_INTERFACE_MODE_RGMII_ID:
66 case PHY_INTERFACE_MODE_RGMII_RXID:
67 case PHY_INTERFACE_MODE_RGMII_TXID:
68 mode = STARFIVE_DWMAC_PHY_INFT_RGMII;
69 break;
70
71 default:
72 dev_err(dwmac->dev, "unsupported interface %d\n",
73 plat_dat->mac_interface);
74 return -EINVAL;
75 }
76
77 regmap = syscon_regmap_lookup_by_phandle_args(dwmac->dev->of_node,
78 "starfive,syscon",
79 2, args);
80 if (IS_ERR(regmap))
81 return dev_err_probe(dwmac->dev, PTR_ERR(regmap), "getting the regmap failed\n");
82
83 /* args[0]:offset args[1]: shift */
84 err = regmap_update_bits(regmap, args[0],
85 STARFIVE_DWMAC_PHY_INFT_FIELD << args[1],
86 mode << args[1]);
87 if (err)
88 return dev_err_probe(dwmac->dev, err, "error setting phy mode\n");
89
90 if (dwmac->data) {
91 err = regmap_write(regmap, JH7100_SYSMAIN_REGISTER49_DLYCHAIN,
92 dwmac->data->gtxclk_dlychain);
93 if (err)
94 return dev_err_probe(dwmac->dev, err,
95 "error selecting gtxclk delay chain\n");
96 }
97
98 return 0;
99 }
100
starfive_dwmac_probe(struct platform_device * pdev)101 static int starfive_dwmac_probe(struct platform_device *pdev)
102 {
103 struct plat_stmmacenet_data *plat_dat;
104 struct stmmac_resources stmmac_res;
105 struct starfive_dwmac *dwmac;
106 struct clk *clk_gtx;
107 int err;
108
109 err = stmmac_get_platform_resources(pdev, &stmmac_res);
110 if (err)
111 return dev_err_probe(&pdev->dev, err,
112 "failed to get resources\n");
113
114 plat_dat = devm_stmmac_probe_config_dt(pdev, stmmac_res.mac);
115 if (IS_ERR(plat_dat))
116 return dev_err_probe(&pdev->dev, PTR_ERR(plat_dat),
117 "dt configuration failed\n");
118
119 dwmac = devm_kzalloc(&pdev->dev, sizeof(*dwmac), GFP_KERNEL);
120 if (!dwmac)
121 return -ENOMEM;
122
123 dwmac->data = device_get_match_data(&pdev->dev);
124
125 dwmac->clk_tx = devm_clk_get_enabled(&pdev->dev, "tx");
126 if (IS_ERR(dwmac->clk_tx))
127 return dev_err_probe(&pdev->dev, PTR_ERR(dwmac->clk_tx),
128 "error getting tx clock\n");
129
130 clk_gtx = devm_clk_get_enabled(&pdev->dev, "gtx");
131 if (IS_ERR(clk_gtx))
132 return dev_err_probe(&pdev->dev, PTR_ERR(clk_gtx),
133 "error getting gtx clock\n");
134
135 /* Generally, the rgmii_tx clock is provided by the internal clock,
136 * which needs to match the corresponding clock frequency according
137 * to different speeds. If the rgmii_tx clock is provided by the
138 * external rgmii_rxin, there is no need to configure the clock
139 * internally, because rgmii_rxin will be adaptively adjusted.
140 */
141 if (!device_property_read_bool(&pdev->dev, "starfive,tx-use-rgmii-clk"))
142 plat_dat->fix_mac_speed = starfive_dwmac_fix_mac_speed;
143
144 dwmac->dev = &pdev->dev;
145 plat_dat->bsp_priv = dwmac;
146 plat_dat->dma_cfg->dche = true;
147
148 err = starfive_dwmac_set_mode(plat_dat);
149 if (err)
150 return err;
151
152 return stmmac_dvr_probe(&pdev->dev, plat_dat, &stmmac_res);
153 }
154
155 static const struct starfive_dwmac_data jh7100_data = {
156 .gtxclk_dlychain = 4,
157 };
158
159 static const struct of_device_id starfive_dwmac_match[] = {
160 { .compatible = "starfive,jh7100-dwmac", .data = &jh7100_data },
161 { .compatible = "starfive,jh7110-dwmac" },
162 { /* sentinel */ }
163 };
164 MODULE_DEVICE_TABLE(of, starfive_dwmac_match);
165
166 static struct platform_driver starfive_dwmac_driver = {
167 .probe = starfive_dwmac_probe,
168 .remove = stmmac_pltfr_remove,
169 .driver = {
170 .name = "starfive-dwmac",
171 .pm = &stmmac_pltfr_pm_ops,
172 .of_match_table = starfive_dwmac_match,
173 },
174 };
175 module_platform_driver(starfive_dwmac_driver);
176
177 MODULE_LICENSE("GPL");
178 MODULE_DESCRIPTION("StarFive DWMAC platform driver");
179 MODULE_AUTHOR("Emil Renner Berthing <[email protected]>");
180 MODULE_AUTHOR("Samin Guo <[email protected]>");
181