1@/****************************************************************************** 2@ * 3@ * Copyright (C) 2018 The Android Open Source Project 4@ * 5@ * Licensed under the Apache License, Version 2.0 (the "License"); 6@ * you may not use this file except in compliance with the License. 7@ * You may obtain a copy of the License at: 8@ * 9@ * http://www.apache.org/licenses/LICENSE-2.0 10@ * 11@ * Unless required by applicable law or agreed to in writing, software 12@ * distributed under the License is distributed on an "AS IS" BASIS, 13@ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 14@ * See the License for the specific language governing permissions and 15@ * limitations under the License. 16@ * 17@ ***************************************************************************** 18@ * Originally developed and contributed by Ittiam Systems Pvt. Ltd, Bangalore 19@*/ 20 21 22.text 23.p2align 2 24 .global ixheaacd_radix4bfly 25 .type ixheaacd_radix4bfly, %function 26 27ixheaacd_radix4bfly: 28 29 STMFD sp!, {r4-r12, r14} 30 31 SUB sp, sp, #16 32 33 MOV r6, #6 34 MUL r7, r6, r3 35 MOV r4, r3 36 STR r7, [sp] 37 38 39 40 MOV r3, r3, lsl #1 41 42 STR r2, [sp, #8] 43 STR r4, [sp, #12] 44 45 46 ADD r2, r1, r3, lsl #2 47 ADD r0, r0, #8 48 49 50RADIX4_OUTLOOP: 51RADIX4_INLOOP: 52 53 54 LDR r6, [r1] 55 LDR r7, [r2] 56 LDR r8, [r2, r3, lsl #2] 57 LDR r9, [r2, r3, lsl #3] 58 59 ADD r10, r6, r8 60 SUB r11, r6, r8 61 ADD r12, r7, r9 62 SUB r14, r7, r9 63 64 ADD r6, r10, r12 65 SUB r7, r10, r12 66 STR r6, [r1], #4 67 68 LDR r8, [r1] 69 LDR r6, [r2, #4]! 70 LDR r9, [r2, r3, lsl #2]! 71 LDR r10, [r2, r3, lsl #2]! 72 73 ADD r12, r8, r9 74 SUB r8, r8, r9 75 ADD r9, r6, r10 76 SUB r6, r6, r10 77 78 ADD r10, r12, r9 79 STR r10, [r1], #4 80 SUB r12, r12, r9 81 82 ADD r9, r11, r6 83 SUB r10, r11, r6 84 ADD r11, r8, r14 85 LDR r5, [r0], #-4 86 SUB r6, r8, r14 87 88 SMULWB r14, r10, r5 89 SMULWT r8, r11, r5 90 91 SUBS r4, r4, #1 92 SUB r8, r8, r14 93 MOV r8, r8, lsl #1 94 STR r8, [r2], #-4 95 96 SMULWT r14, r10, r5 97 SMLAWB r8, r11, r5, r14 98 LDR r11, [r0], #-4 99 MOV r8, r8, lsl #1 100 STR r8, [r2], -r3, lsl #2 101 102 SMULWT r10, r7, r11 103 SMLAWB r8, r12, r11, r10 104 105 LDR r14, [r0], #20 106 MOV r5, r8, lsl #1 107 108 SMULWB r10, r7, r11 109 SMULWT r8, r12, r11 110 111 STR r5, [r2], #4 112 SUB r7, r8, r10 113 MOV r7, r7, lsl #1 114 115 SMULWB r11, r9, r14 116 SMULWT r12, r6, r14 117 118 STR r7, [r2], -r3, lsl #2 119 SUB r12, r12, r11 120 MOV r12, r12, lsl #1 121 122 SMULWT r10, r9, r14 123 SMLAWB r7, r6, r14, r10 124 125 STR r12, [r2], #-4 126 MOV r7, r7, lsl #1 127 STR r7, [r2], #8 128 129 130 BNE RADIX4_INLOOP 131 132 LDR r8, [sp] 133 LDR r4, [sp, #12] 134 LDR r6, [sp, #8] 135 136 137 SUB r0, r0, r8, lsl #1 138 ADD r1, r1, r8, lsl #2 139 ADD r2, r2, r8, lsl #2 140 141 SUBS r6, r6, #1 142 STR r6, [sp, #8] 143 BNE RADIX4_OUTLOOP 144 145 146 147 ADD sp, sp, #16 148 LDMFD sp!, {r4-r12, r15} 149 150 151