1 /* 2 * Copyright (c) 2018-2021 Arm Limited. 3 * 4 * SPDX-License-Identifier: MIT 5 * 6 * Permission is hereby granted, free of charge, to any person obtaining a copy 7 * of this software and associated documentation files (the "Software"), to 8 * deal in the Software without restriction, including without limitation the 9 * rights to use, copy, modify, merge, publish, distribute, sublicense, and/or 10 * sell copies of the Software, and to permit persons to whom the Software is 11 * furnished to do so, subject to the following conditions: 12 * 13 * The above copyright notice and this permission notice shall be included in all 14 * copies or substantial portions of the Software. 15 * 16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE 19 * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, 21 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE 22 * SOFTWARE. 23 */ 24 #pragma once 25 26 #include <cstdint> 27 28 namespace arm_gemm 29 { 30 /* 31 * Parameter set for "convolution" type GEMM. 32 * 33 * For a "convolution" GEMM, the GEMM parameters (M, K) are specified as if 34 * an im2row had been performed on the input tensor to generate the operand 35 * matrix, but instead this structure describes the convolution parameters 36 * such that this can be done on the fly. 37 * 38 * The parameters describe the convolution details - the notional shape of 39 * the input and output tensors, whether padding is to be applied, the size 40 * of the kernel and a constant value to be used for padding (needed for 41 * quantized tensors). 42 * 43 * The second part describes the layout of the input tensor in memory, which 44 * is assumed to be in NHWC format. This consists of a base pointer and 45 * strides for columns, rows and batches. 'multis' are not supported for 46 * convolution type GEMMs. 47 */ 48 struct ConvolutionParameters 49 { 50 int64_t input_width; 51 int64_t input_height; 52 int64_t input_channels; 53 int64_t kernel_width; 54 int64_t kernel_height; 55 int64_t output_width; 56 int64_t output_height; 57 int64_t output_stride_w; 58 int64_t output_stride_h; 59 // output_channels not included as they do not affect the input. 60 int64_t padding_top; 61 int64_t padding_left; 62 float padding_value; 63 }; 64 65 } // namespace arm_gemm 66