1 /* 2 * Copyright (c) 2017, Intel Corporation 3 * 4 * Permission is hereby granted, free of charge, to any person obtaining a 5 * copy of this software and associated documentation files (the "Software"), 6 * to deal in the Software without restriction, including without limitation 7 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 8 * and/or sell copies of the Software, and to permit persons to whom the 9 * Software is furnished to do so, subject to the following conditions: 10 * 11 * The above copyright notice and this permission notice shall be included 12 * in all copies or substantial portions of the Software. 13 * 14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS 15 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 17 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR 18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, 19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 20 * OTHER DEALINGS IN THE SOFTWARE. 21 */ 22 //! 23 //! \file codechal_kernel_hme_g9.h 24 //! \brief Hme kernel implementation for Gen9 platform 25 //! 26 27 #ifndef __CODECHAL_KERNEL_HME_G9_H__ 28 #define __CODECHAL_KERNEL_HME_G9_H__ 29 #include "codechal_kernel_hme.h" 30 31 class CodechalKernelHmeG9 : public CodechalKernelHme 32 { 33 public: 34 enum KernelIndex 35 { 36 hmeP = 0, 37 hmeB = 1, 38 hmeVDEncStreamIn = 2 39 }; 40 41 enum BindingTableOffset 42 { 43 meOutputMvDataSurface = 0, 44 meInputMvDataSurface = 1, 45 meDistortionSurface = 2, 46 meBrcDistortion = 3, 47 meCurrForFwdRef = 5, 48 meFwdRefIdx0 = 6, 49 meFwdRefIdx1 = 8, 50 meFwdRefIdx2 = 10, 51 meFwdRefIdx3 = 12, 52 meFwdRefIdx4 = 14, 53 meFwdRefIdx5 = 16, 54 meFwdRefIdx6 = 18, 55 meFwdRefIdx7 = 20, 56 meCurrForBwdRef = 22, 57 meBwdRefIdx0 = 23, 58 meBwdRefIdx1 = 25, 59 meVdencStreamInOutputBuffer = 26, 60 meSurfaceNum = 27 61 }; 62 // clang-format off 63 class Curbe 64 { 65 public: Curbe()66 Curbe() 67 { 68 MOS_SecureMemcpy(&m_data, sizeof(m_data), &m_initCurbe, sizeof(m_initCurbe)); 69 } 70 struct CurbeData 71 { 72 // DW0 73 union 74 { 75 struct 76 { 77 uint32_t SkipModeEn : MOS_BITFIELD_BIT(0); 78 uint32_t AdaptiveEn : MOS_BITFIELD_BIT(1); 79 uint32_t BiMixDis : MOS_BITFIELD_BIT(2); 80 uint32_t reserved3 : MOS_BITFIELD_RANGE(3, 4); 81 uint32_t EarlyImeSuccessEn : MOS_BITFIELD_BIT(5); 82 uint32_t reserved6 : MOS_BITFIELD_BIT(6); 83 uint32_t T8x8FlagForInterEn : MOS_BITFIELD_BIT(7); 84 uint32_t reserved8 : MOS_BITFIELD_RANGE(8, 23); 85 uint32_t EarlyImeStop : MOS_BITFIELD_RANGE(24, 31); 86 }; 87 uint32_t Value; 88 } DW0; 89 90 // DW1 91 union 92 { 93 struct 94 { 95 uint32_t MaxNumMVs : MOS_BITFIELD_RANGE(0, 5); 96 uint32_t reserved6 : MOS_BITFIELD_RANGE(6, 15); 97 uint32_t BiWeight : MOS_BITFIELD_RANGE(16, 21); 98 uint32_t reserved22 : MOS_BITFIELD_RANGE(22, 27); 99 uint32_t UniMixDisable : MOS_BITFIELD_BIT(28); 100 uint32_t reserved29 : MOS_BITFIELD_RANGE(29, 31); 101 }; 102 uint32_t Value; 103 } DW1; 104 105 // DW2 106 union 107 { 108 struct 109 { 110 uint32_t MaxLenSP : MOS_BITFIELD_RANGE(0, 7); 111 uint32_t MaxNumSU : MOS_BITFIELD_RANGE(8, 15); 112 uint32_t reserved16 : MOS_BITFIELD_RANGE(16, 31); 113 }; 114 uint32_t Value; 115 } DW2; 116 117 // DW3 118 union 119 { 120 struct 121 { 122 uint32_t SrcSize : MOS_BITFIELD_RANGE(0, 1); 123 uint32_t reserved2 : MOS_BITFIELD_RANGE(2, 3); 124 uint32_t MbTypeRemap : MOS_BITFIELD_RANGE(4, 5); 125 uint32_t SrcAccess : MOS_BITFIELD_BIT(6); 126 uint32_t RefAccess : MOS_BITFIELD_BIT(7); 127 uint32_t SearchCtrl : MOS_BITFIELD_RANGE(8, 10); 128 uint32_t DualSearchPathOption : MOS_BITFIELD_BIT(11); 129 uint32_t SubPelMode : MOS_BITFIELD_RANGE(12, 13); 130 uint32_t SkipType : MOS_BITFIELD_BIT(14); 131 uint32_t DisableFieldCacheAlloc : MOS_BITFIELD_BIT(15); 132 uint32_t InterChromaMode : MOS_BITFIELD_BIT(16); 133 uint32_t FTEnable : MOS_BITFIELD_BIT(17); 134 uint32_t BMEDisableFBR : MOS_BITFIELD_BIT(18); 135 uint32_t BlockBasedSkipEnable : MOS_BITFIELD_BIT(19); 136 uint32_t InterSAD : MOS_BITFIELD_RANGE(20, 21); 137 uint32_t IntraSAD : MOS_BITFIELD_RANGE(22, 23); 138 uint32_t SubMbPartMask : MOS_BITFIELD_RANGE(24, 30); 139 uint32_t reserved31 : MOS_BITFIELD_BIT(31); 140 }; 141 uint32_t Value; 142 } DW3; 143 144 // DW4 145 union 146 { 147 struct 148 { 149 uint32_t reserved0 : MOS_BITFIELD_RANGE(0, 7); 150 uint32_t PictureHeightMinus1 : MOS_BITFIELD_RANGE(8, 15); 151 uint32_t PictureWidth : MOS_BITFIELD_RANGE(16, 23); 152 uint32_t reserved24 : MOS_BITFIELD_RANGE(24, 31); 153 }; 154 uint32_t Value; 155 } DW4; 156 157 // DW5 158 union 159 { 160 struct 161 { 162 uint32_t reserved0 : MOS_BITFIELD_RANGE(0, 7); 163 uint32_t QpPrimeY : MOS_BITFIELD_RANGE(8, 15); 164 uint32_t RefWidth : MOS_BITFIELD_RANGE(16, 23); 165 uint32_t RefHeight : MOS_BITFIELD_RANGE(24, 31); 166 }; 167 uint32_t Value; 168 } DW5; 169 170 // DW6 171 union 172 { 173 struct 174 { 175 uint32_t reserved0 : MOS_BITFIELD_RANGE(0, 2); 176 uint32_t WriteDistortions : MOS_BITFIELD_BIT(3); 177 uint32_t UseMvFromPrevStep : MOS_BITFIELD_BIT(4); 178 uint32_t reserved5 : MOS_BITFIELD_RANGE(5, 7); 179 uint32_t SuperCombineDist : MOS_BITFIELD_RANGE(8, 15); 180 uint32_t MaxVmvR : MOS_BITFIELD_RANGE(16, 31); 181 }; 182 uint32_t Value; 183 } DW6; 184 185 // DW7 186 union 187 { 188 struct 189 { 190 uint32_t reserved0 : MOS_BITFIELD_RANGE(0, 15); 191 uint32_t MVCostScaleFactor : MOS_BITFIELD_RANGE(16, 17); 192 uint32_t BilinearEnable : MOS_BITFIELD_BIT(18); 193 uint32_t SrcFieldPolarity : MOS_BITFIELD_BIT(19); 194 uint32_t WeightedSADHAAR : MOS_BITFIELD_BIT(20); 195 uint32_t AConlyHAAR : MOS_BITFIELD_BIT(21); 196 uint32_t RefIDCostMode : MOS_BITFIELD_BIT(22); 197 uint32_t reserved23 : MOS_BITFIELD_BIT(23); 198 uint32_t SkipCenterMask : MOS_BITFIELD_RANGE(24, 31); 199 }; 200 uint32_t Value; 201 } DW7; 202 203 // DW8 204 union 205 { 206 struct 207 { 208 uint32_t Mode0Cost : MOS_BITFIELD_RANGE(0, 7); 209 uint32_t Mode1Cost : MOS_BITFIELD_RANGE(8, 15); 210 uint32_t Mode2Cost : MOS_BITFIELD_RANGE(16, 23); 211 uint32_t Mode3Cost : MOS_BITFIELD_RANGE(24, 31); 212 }; 213 uint32_t Value; 214 } DW8; 215 216 // DW9 217 union 218 { 219 struct 220 { 221 uint32_t Mode4Cost : MOS_BITFIELD_RANGE(0, 7); 222 uint32_t Mode5Cost : MOS_BITFIELD_RANGE(8, 15); 223 uint32_t Mode6Cost : MOS_BITFIELD_RANGE(16, 23); 224 uint32_t Mode7Cost : MOS_BITFIELD_RANGE(24, 31); 225 }; 226 uint32_t Value; 227 } DW9; 228 229 // DW10 230 union 231 { 232 struct 233 { 234 uint32_t Mode8Cost : MOS_BITFIELD_RANGE(0, 7); 235 uint32_t Mode9Cost : MOS_BITFIELD_RANGE(8, 15); 236 uint32_t RefIDCost : MOS_BITFIELD_RANGE(16, 23); 237 uint32_t ChromaIntraModeCost : MOS_BITFIELD_RANGE(24, 31); 238 }; 239 uint32_t Value; 240 } DW10; 241 242 // DW11 243 union 244 { 245 struct 246 { 247 uint32_t MV0Cost : MOS_BITFIELD_RANGE(0, 7); 248 uint32_t MV1Cost : MOS_BITFIELD_RANGE(8, 15); 249 uint32_t MV2Cost : MOS_BITFIELD_RANGE(16, 23); 250 uint32_t MV3Cost : MOS_BITFIELD_RANGE(24, 31); 251 }; 252 uint32_t Value; 253 } DW11; 254 255 // DW12 256 union 257 { 258 struct 259 { 260 uint32_t MV4Cost : MOS_BITFIELD_RANGE(0, 7); 261 uint32_t MV5Cost : MOS_BITFIELD_RANGE(8, 15); 262 uint32_t MV6Cost : MOS_BITFIELD_RANGE(16, 23); 263 uint32_t MV7Cost : MOS_BITFIELD_RANGE(24, 31); 264 }; 265 uint32_t Value; 266 } DW12; 267 268 // DW13 269 union 270 { 271 struct 272 { 273 uint32_t NumRefIdxL0MinusOne : MOS_BITFIELD_RANGE(0, 7); 274 uint32_t NumRefIdxL1MinusOne : MOS_BITFIELD_RANGE(8, 15); 275 uint32_t RefStreaminCost : MOS_BITFIELD_RANGE(16, 23); 276 uint32_t ROIEnable : MOS_BITFIELD_RANGE(24, 26); 277 uint32_t reserved27 : MOS_BITFIELD_RANGE(27, 31); 278 }; 279 uint32_t Value; 280 } DW13; 281 282 // DW14 283 union 284 { 285 struct 286 { 287 uint32_t List0RefID0FieldParity : MOS_BITFIELD_BIT(0); 288 uint32_t List0RefID1FieldParity : MOS_BITFIELD_BIT(1); 289 uint32_t List0RefID2FieldParity : MOS_BITFIELD_BIT(2); 290 uint32_t List0RefID3FieldParity : MOS_BITFIELD_BIT(3); 291 uint32_t List0RefID4FieldParity : MOS_BITFIELD_BIT(4); 292 uint32_t List0RefID5FieldParity : MOS_BITFIELD_BIT(5); 293 uint32_t List0RefID6FieldParity : MOS_BITFIELD_BIT(6); 294 uint32_t List0RefID7FieldParity : MOS_BITFIELD_BIT(7); 295 uint32_t List1RefID0FieldParity : MOS_BITFIELD_BIT(8); 296 uint32_t List1RefID1FieldParity : MOS_BITFIELD_BIT(9); 297 uint32_t reserved10 : MOS_BITFIELD_RANGE(10, 31); 298 }; 299 uint32_t Value; 300 } DW14; 301 302 // DW15 303 union 304 { 305 struct 306 { 307 uint32_t PrevMvReadPosFactor : MOS_BITFIELD_RANGE(0, 7); 308 uint32_t MvShiftFactor : MOS_BITFIELD_RANGE(8, 15); 309 uint32_t Reserved : MOS_BITFIELD_RANGE(16, 31); 310 }; 311 uint32_t Value; 312 } DW15; 313 314 struct 315 { 316 // DW16 317 union 318 { 319 struct 320 { 321 SearchPathDelta SPDelta_0; 322 SearchPathDelta SPDelta_1; 323 SearchPathDelta SPDelta_2; 324 SearchPathDelta SPDelta_3; 325 }; 326 uint32_t Value; 327 } DW16; 328 329 // DW17 330 union 331 { 332 struct 333 { 334 SearchPathDelta SPDelta_4; 335 SearchPathDelta SPDelta_5; 336 SearchPathDelta SPDelta_6; 337 SearchPathDelta SPDelta_7; 338 }; 339 uint32_t Value; 340 } DW17; 341 342 // DW18 343 union 344 { 345 struct 346 { 347 SearchPathDelta SPDelta_8; 348 SearchPathDelta SPDelta_9; 349 SearchPathDelta SPDelta_10; 350 SearchPathDelta SPDelta_11; 351 }; 352 uint32_t Value; 353 } DW18; 354 355 // DW19 356 union 357 { 358 struct 359 { 360 SearchPathDelta SPDelta_12; 361 SearchPathDelta SPDelta_13; 362 SearchPathDelta SPDelta_14; 363 SearchPathDelta SPDelta_15; 364 }; 365 uint32_t Value; 366 } DW19; 367 368 // DW20 369 union 370 { 371 struct 372 { 373 SearchPathDelta SPDelta_16; 374 SearchPathDelta SPDelta_17; 375 SearchPathDelta SPDelta_18; 376 SearchPathDelta SPDelta_19; 377 }; 378 uint32_t Value; 379 } DW20; 380 381 // DW21 382 union 383 { 384 struct 385 { 386 SearchPathDelta SPDelta_20; 387 SearchPathDelta SPDelta_21; 388 SearchPathDelta SPDelta_22; 389 SearchPathDelta SPDelta_23; 390 }; 391 uint32_t Value; 392 } DW21; 393 394 // DW22 395 union 396 { 397 struct 398 { 399 SearchPathDelta SPDelta_24; 400 SearchPathDelta SPDelta_25; 401 SearchPathDelta SPDelta_26; 402 SearchPathDelta SPDelta_27; 403 }; 404 uint32_t Value; 405 } DW22; 406 407 // DW23 408 union 409 { 410 struct 411 { 412 SearchPathDelta SPDelta_28; 413 SearchPathDelta SPDelta_29; 414 SearchPathDelta SPDelta_30; 415 SearchPathDelta SPDelta_31; 416 }; 417 uint32_t Value; 418 } DW23; 419 420 // DW24 421 union 422 { 423 struct 424 { 425 SearchPathDelta SPDelta_32; 426 SearchPathDelta SPDelta_33; 427 SearchPathDelta SPDelta_34; 428 SearchPathDelta SPDelta_35; 429 }; 430 uint32_t Value; 431 } DW24; 432 433 // DW25 434 union 435 { 436 struct 437 { 438 SearchPathDelta SPDelta_36; 439 SearchPathDelta SPDelta_37; 440 SearchPathDelta SPDelta_38; 441 SearchPathDelta SPDelta_39; 442 }; 443 uint32_t Value; 444 } DW25; 445 446 // DW26 447 union 448 { 449 struct 450 { 451 SearchPathDelta SPDelta_40; 452 SearchPathDelta SPDelta_41; 453 SearchPathDelta SPDelta_42; 454 SearchPathDelta SPDelta_43; 455 }; 456 uint32_t Value; 457 } DW26; 458 459 // DW27 460 union 461 { 462 struct 463 { 464 SearchPathDelta SPDelta_44; 465 SearchPathDelta SPDelta_45; 466 SearchPathDelta SPDelta_46; 467 SearchPathDelta SPDelta_47; 468 }; 469 uint32_t Value; 470 } DW27; 471 472 // DW28 473 union 474 { 475 struct 476 { 477 SearchPathDelta SPDelta_48; 478 SearchPathDelta SPDelta_49; 479 SearchPathDelta SPDelta_50; 480 SearchPathDelta SPDelta_51; 481 }; 482 uint32_t Value; 483 } DW28; 484 485 // DW29 486 union 487 { 488 struct 489 { 490 SearchPathDelta SPDelta_52; 491 SearchPathDelta SPDelta_53; 492 SearchPathDelta SPDelta_54; 493 SearchPathDelta SPDelta_55; 494 }; 495 uint32_t Value; 496 } DW29; 497 } SpDelta; 498 499 // DW30 500 union 501 { 502 struct 503 { 504 uint32_t ActualMBWidth : MOS_BITFIELD_RANGE(0, 15); 505 uint32_t ActualMBHeight : MOS_BITFIELD_RANGE(16, 31); 506 }; 507 uint32_t Value; 508 } DW30; 509 510 // DW31 511 union 512 { 513 struct 514 { 515 uint32_t Reserved; 516 }; 517 uint32_t Value; 518 } DW31; 519 520 // DW32 521 union 522 { 523 struct 524 { 525 uint32_t _4xMeMvOutputDataSurfIndex; 526 }; 527 uint32_t Value; 528 } DW32; 529 530 // DW33 531 union 532 { 533 struct 534 { 535 uint32_t _16xOr32xMeMvInputDataSurfIndex; 536 }; 537 uint32_t Value; 538 } DW33; 539 540 // DW34 541 union 542 { 543 struct 544 { 545 uint32_t _4xMeOutputDistSurfIndex; 546 }; 547 uint32_t Value; 548 } DW34; 549 550 // DW35 551 union 552 { 553 struct 554 { 555 uint32_t _4xMeOutputBrcDistSurfIndex; 556 }; 557 uint32_t Value; 558 } DW35; 559 560 // DW36 561 union 562 { 563 struct 564 { 565 uint32_t VMEFwdInterPredictionSurfIndex; 566 }; 567 uint32_t Value; 568 } DW36; 569 570 // DW37 571 union 572 { 573 struct 574 { 575 uint32_t VMEBwdInterPredictionSurfIndex; 576 }; 577 uint32_t Value; 578 } DW37; 579 580 // DW38 581 union 582 { 583 struct 584 { 585 uint32_t VDEncStreamInSurfIndex; 586 }; 587 uint32_t Value; 588 } DW38; 589 } m_data; 590 591 static const uint32_t m_curbeSize = sizeof(CurbeData); 592 static const uint32_t m_initCurbe[39]; 593 }; 594 // clang-format on 595 596 public: 597 //! 598 //! \brief Constructor 599 //! 600 //! \param [in] me4xDistBufferSupported 601 //! flag to support 4x Distortion buffer 602 //! 603 CodechalKernelHmeG9( 604 CodechalEncoderState *encoder, 605 bool me4xDistBufferSupported = true); 606 GetBTCount()607 uint32_t GetBTCount() override { return BindingTableOffset::meSurfaceNum; } 608 609 protected: GetCurbeSize()610 uint32_t GetCurbeSize() override { return Curbe::m_curbeSize; } 611 MOS_STATUS SetCurbe(MHW_KERNEL_STATE *kernelState) override; 612 MOS_STATUS SendSurfaces(PMOS_COMMAND_BUFFER cmd, MHW_KERNEL_STATE *kernelState) override; 613 MHW_KERNEL_STATE * GetActiveKernelState() override; 614 CODECHAL_MEDIA_STATE_TYPE GetMediaStateType() override; 615 }; 616 617 #endif /* __CODECHAL_KERNEL_HME_G9_H__ */ 618