1 /* 2 * Copyright (c) 2017, Intel Corporation 3 * 4 * Permission is hereby granted, free of charge, to any person obtaining a 5 * copy of this software and associated documentation files (the "Software"), 6 * to deal in the Software without restriction, including without limitation 7 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 8 * and/or sell copies of the Software, and to permit persons to whom the 9 * Software is furnished to do so, subject to the following conditions: 10 * 11 * The above copyright notice and this permission notice shall be included 12 * in all copies or substantial portions of the Software. 13 * 14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS 15 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 17 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR 18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, 19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 20 * OTHER DEALINGS IN THE SOFTWARE. 21 */ 22 //! 23 //! \file codechal_fei_hevc_g9_skl.h 24 //! \brief HEVC FEI dual-pipe encoder for GEN9 SKL. 25 //! 26 27 #ifndef __CODECHAL_FEI_HEVC__G9_SKL_H__ 28 #define __CODECHAL_FEI_HEVC__G9_SKL_H__ 29 30 #include "codechal_encode_hevc_g9.h" 31 32 #ifdef HEVC_FEI_ENABLE_CMRT 33 #include <map> 34 #include <string> 35 #include "CMRTKernel_header_file.h" 36 #endif 37 38 //! HEVC encoder FEI intra 32x32 PU mode decision kernel curbe for GEN9 39 struct CODECHAL_FEI_HEVC_I_32x32_PU_MODE_DECISION_CURBE_G9 40 { 41 union { 42 struct { 43 uint32_t FrameWidth : MOS_BITFIELD_RANGE(0, 15); 44 uint32_t FrameHeight : MOS_BITFIELD_RANGE(16, 31); 45 }; 46 uint32_t Value; 47 } DW0; 48 49 union { 50 struct { 51 uint32_t SliceType : MOS_BITFIELD_RANGE(0, 1); 52 uint32_t PuType : MOS_BITFIELD_RANGE(2, 3); 53 uint32_t EnableStatsDataDump : MOS_BITFIELD_BIT(4); 54 uint32_t LCUType : MOS_BITFIELD_BIT(5); 55 uint32_t Res_6_15 : MOS_BITFIELD_RANGE(6, 15); 56 uint32_t SliceQp : MOS_BITFIELD_RANGE(16, 23); 57 uint32_t BRCEnable : MOS_BITFIELD_BIT(24); 58 uint32_t LCUBRCEnable : MOS_BITFIELD_BIT(25); 59 uint32_t ROIEnable : MOS_BITFIELD_BIT(26); 60 uint32_t FASTSurveillanceFlag : MOS_BITFIELD_BIT(27); 61 uint32_t Res_28 : MOS_BITFIELD_BIT(28); 62 uint32_t EnableFlexibleParam : MOS_BITFIELD_BIT(29); 63 uint32_t EnableQualityImprovement : MOS_BITFIELD_BIT(30); 64 uint32_t EnableDebugDump : MOS_BITFIELD_BIT(31); 65 }; 66 uint32_t Value; 67 } DW1; 68 69 union { 70 struct { 71 uint32_t Lambda; 72 }; 73 uint32_t Value; 74 } DW2; 75 76 union { 77 struct { 78 uint32_t ModeCost32x32; 79 }; 80 uint32_t Value; 81 } DW3; 82 83 union { 84 struct { 85 uint32_t EarlyExit; 86 }; 87 uint32_t Value; 88 } DW4; 89 90 union { 91 struct { 92 uint32_t NewLambdaForHaarTransform; 93 }; 94 uint32_t Value; 95 } DW5; 96 97 union { 98 struct { 99 uint32_t Reserved; 100 }; 101 uint32_t Value; 102 } DW6; 103 104 union { 105 struct { 106 uint32_t Reserved; 107 }; 108 uint32_t Value; 109 } DW7; 110 111 union { 112 struct { 113 uint32_t BTI_32x32PU_Output; 114 }; 115 uint32_t Value; 116 } DW8; 117 118 union { 119 struct { 120 uint32_t BTI_Src_Y; 121 }; 122 uint32_t Value; 123 } DW9; 124 125 union { 126 struct { 127 uint32_t BTI_Src_Y2x; 128 }; 129 uint32_t Value; 130 } DW10; 131 132 union { 133 struct { 134 uint32_t BTI_Slice_Map; 135 }; 136 uint32_t Value; 137 } DW11; 138 139 union { 140 struct { 141 uint32_t BTI_Src_Y2x_VME; 142 }; 143 uint32_t Value; 144 } DW12; 145 146 union { 147 struct { 148 uint32_t BTI_Brc_Input; 149 }; 150 uint32_t Value; 151 } DW13; 152 153 union { 154 struct { 155 uint32_t BTI_LCU_Qp_Surface; 156 }; 157 uint32_t Value; 158 } DW14; 159 160 union { 161 struct { 162 uint32_t BTI_Brc_Data; 163 }; 164 uint32_t Value; 165 } DW15; 166 167 union { 168 struct { 169 uint32_t BTI_Stats_Data; 170 }; 171 uint32_t Value; 172 } DW16; 173 174 union { 175 struct { 176 uint32_t BTI_Kernel_Debug; 177 }; 178 uint32_t Value; 179 } DW17; 180 }; 181 182 using PCODECHAL_FEI_HEVC_I_32x32_PU_MODE_DECISION_CURBE_G9 = struct CODECHAL_FEI_HEVC_I_32x32_PU_MODE_DECISION_CURBE_G9*; 183 C_ASSERT(MOS_BYTES_TO_DWORDS(sizeof(CODECHAL_FEI_HEVC_I_32x32_PU_MODE_DECISION_CURBE_G9)) == 18); 184 185 //! HEVC encoder FEI intra 16x16 PU mode decision kernel curbe for GEN9 186 struct CODECHAL_FEI_HEVC_I_16x16_PU_MODEDECISION_CURBE_G9 187 { 188 union { 189 struct { 190 uint32_t FrameWidth : MOS_BITFIELD_RANGE(0, 15); 191 uint32_t FrameHeight : MOS_BITFIELD_RANGE(16, 31); 192 }; 193 uint32_t Value; 194 } DW0; 195 196 union { 197 struct { 198 uint32_t Log2MaxCUSize : MOS_BITFIELD_RANGE(0, 7); 199 uint32_t Log2MinCUSize : MOS_BITFIELD_RANGE(8, 15); 200 uint32_t Log2MinTUSize : MOS_BITFIELD_RANGE(16, 23); 201 uint32_t SliceQp : MOS_BITFIELD_RANGE(24, 31); 202 }; 203 uint32_t Value; 204 } DW1; 205 206 union { 207 struct { 208 uint32_t FixedPoint_Lambda_PredMode; 209 }; 210 uint32_t Value; 211 } DW2; 212 213 union { 214 struct { 215 uint32_t LambdaScalingFactor : MOS_BITFIELD_RANGE(0, 7); 216 uint32_t SliceType : MOS_BITFIELD_RANGE(8, 9); 217 uint32_t Reserved_10_15 : MOS_BITFIELD_RANGE(10, 15); 218 uint32_t IntraRefreshEn : MOS_BITFIELD_RANGE(16, 17); 219 uint32_t EnableRollingIntra : MOS_BITFIELD_BIT(18); 220 uint32_t HalfUpdateMixedLCU : MOS_BITFIELD_BIT(19); 221 uint32_t Reserved_20_23 : MOS_BITFIELD_RANGE(20, 23); 222 uint32_t EnableIntraEarlyExit : MOS_BITFIELD_BIT(24); 223 uint32_t BRCEnable : MOS_BITFIELD_BIT(25); 224 uint32_t LCUBRCEnable : MOS_BITFIELD_BIT(26); 225 uint32_t ROIEnable : MOS_BITFIELD_BIT(27); 226 uint32_t FASTSurveillanceFlag : MOS_BITFIELD_BIT(28); 227 uint32_t EnableQualityImprovement : MOS_BITFIELD_BIT(29); 228 uint32_t EnableFlexibleParam : MOS_BITFIELD_BIT(30); 229 uint32_t Reserved_31 : MOS_BITFIELD_BIT(31); 230 }; 231 uint32_t Value; 232 } DW3; 233 234 union { 235 struct { 236 uint32_t PenaltyForIntra8x8NonDCPredMode : MOS_BITFIELD_RANGE(0, 7); 237 uint32_t IntraComputeType : MOS_BITFIELD_RANGE(8, 15); 238 uint32_t AVCIntra8x8Mask : MOS_BITFIELD_RANGE(16, 23); 239 uint32_t IntraSadAdjust : MOS_BITFIELD_RANGE(24, 31); 240 }; 241 uint32_t Value; 242 } DW4; 243 244 union { 245 struct { 246 uint32_t FixedPoint_Lambda_CU_Mode_for_Cost_Calculation; 247 }; 248 uint32_t Value; 249 } DW5; 250 251 union { 252 struct { 253 uint32_t ScreenContentFlag : MOS_BITFIELD_BIT(0); 254 uint32_t Reserved : MOS_BITFIELD_RANGE(1, 31); 255 }; 256 uint32_t Value; 257 } DW6; 258 259 union { 260 struct { 261 uint32_t ModeCostIntraNonPred : MOS_BITFIELD_RANGE(0, 7); 262 uint32_t ModeCostIntra16x16 : MOS_BITFIELD_RANGE(8, 15); 263 uint32_t ModeCostIntra8x8 : MOS_BITFIELD_RANGE(16, 23); 264 uint32_t ModeCostIntra4x4 : MOS_BITFIELD_RANGE(24, 31); 265 }; 266 uint32_t Value; 267 } DW7; 268 269 union { 270 struct { 271 uint32_t FixedPoint_Lambda_CU_Mode_for_Luma; 272 }; 273 uint32_t Value; 274 } DW8; 275 276 union { 277 struct { 278 uint32_t IntraRefreshMBNum : MOS_BITFIELD_RANGE(0, 15); 279 uint32_t IntraRefreshUnitInMB : MOS_BITFIELD_RANGE(16, 23); 280 uint32_t IntraRefreshQPDelta : MOS_BITFIELD_RANGE(24, 31); 281 }; 282 uint32_t Value; 283 } DW9; 284 285 union { 286 struct { 287 // 0: for intra, no Haar 288 // 1: for inter or enable statictics data dump, need Haar 289 uint32_t HaarTransformMode : MOS_BITFIELD_RANGE(0, 1); 290 uint32_t SimplifiedFlagForInter : MOS_BITFIELD_BIT(2); 291 uint32_t Reserved : MOS_BITFIELD_RANGE(3, 31); 292 }; 293 uint32_t Value; 294 } DW10; 295 296 union { 297 struct { 298 uint32_t Reserved; 299 }; 300 uint32_t Value; 301 } DW11; 302 303 union { 304 struct { 305 uint32_t Reserved; 306 }; 307 uint32_t Value; 308 } DW12; 309 310 union { 311 struct { 312 uint32_t Reserved; 313 }; 314 uint32_t Value; 315 } DW13; 316 317 union { 318 struct { 319 uint32_t Reserved; 320 }; 321 uint32_t Value; 322 } DW14; 323 324 union { 325 struct { 326 uint32_t Reserved; 327 }; 328 uint32_t Value; 329 } DW15; 330 331 union { 332 struct { 333 uint32_t BTI_Src_Y; 334 }; 335 uint32_t Value; 336 } DW16; 337 338 union { 339 struct { 340 uint32_t BTI_Sad_16x16_PU; 341 }; 342 uint32_t Value; 343 } DW17; 344 345 union { 346 struct { 347 uint32_t BTI_PAK_Object; 348 }; 349 uint32_t Value; 350 } DW18; 351 352 union { 353 struct { 354 uint32_t BTI_SAD_32x32_PU_mode; 355 }; 356 uint32_t Value; 357 } DW19; 358 359 union { 360 struct { 361 uint32_t BTI_VME_Mode_8x8; 362 }; 363 uint32_t Value; 364 } DW20; 365 366 union { 367 struct { 368 uint32_t BTI_Slice_Map; 369 }; 370 uint32_t Value; 371 } DW21; 372 373 union { 374 struct { 375 uint32_t BTI_VME_Src; 376 }; 377 uint32_t Value; 378 } DW22; 379 380 union { 381 struct { 382 uint32_t BTI_BRC_Input; 383 }; 384 uint32_t Value; 385 } DW23; 386 387 union { 388 struct { 389 uint32_t BTI_Simplest_Intra; 390 }; 391 uint32_t Value; 392 } DW24; 393 394 union { 395 struct { 396 uint32_t BTI_LCU_Qp_Surface; 397 }; 398 uint32_t Value; 399 } DW25; 400 401 union { 402 struct { 403 uint32_t BTI_BRC_Data; 404 }; 405 uint32_t Value; 406 } DW26; 407 408 union { 409 struct { 410 uint32_t BTI_Debug; 411 }; 412 uint32_t Value; 413 } DW27; 414 }; 415 416 using PCODECHAL_FEI_HEVC_I_16x16_PU_MODEDECISION_CURBE_G9 = struct CODECHAL_FEI_HEVC_I_16x16_PU_MODEDECISION_CURBE_G9*; 417 C_ASSERT(MOS_BYTES_TO_DWORDS(sizeof(CODECHAL_FEI_HEVC_I_16x16_PU_MODEDECISION_CURBE_G9)) == 28); 418 419 //! HEVC encoder FEI intra 8x8 PU kernel curbe for GEN9 420 struct CODECHAL_FEI_HEVC_I_8x8_PU_CURBE_G9 421 { 422 union { 423 struct { 424 uint32_t FrameWidth : MOS_BITFIELD_RANGE(0, 15); 425 uint32_t FrameHeight : MOS_BITFIELD_RANGE(16, 31); 426 }; 427 uint32_t Value; 428 } DW0; 429 430 union { 431 struct { 432 uint32_t SliceType : MOS_BITFIELD_RANGE(0, 1); 433 uint32_t PuType : MOS_BITFIELD_RANGE(2, 3); 434 uint32_t DcFilterFlag : MOS_BITFIELD_BIT(4); 435 uint32_t AngleRefineFlag : MOS_BITFIELD_BIT(5); 436 uint32_t LCUType : MOS_BITFIELD_BIT(6); 437 uint32_t ScreenContentFlag : MOS_BITFIELD_BIT(7); 438 uint32_t IntraRefreshEn : MOS_BITFIELD_RANGE(8, 9); 439 uint32_t EnableRollingIntra : MOS_BITFIELD_BIT(10); 440 uint32_t HalfUpdateMixedLCU : MOS_BITFIELD_BIT(11); 441 uint32_t Reserved_12_15 : MOS_BITFIELD_RANGE(12, 15); 442 uint32_t QPValue : MOS_BITFIELD_RANGE(16, 23); 443 uint32_t EnableIntraEarlyExit : MOS_BITFIELD_BIT(24); 444 uint32_t BRCEnable : MOS_BITFIELD_BIT(25); 445 uint32_t LCUBRCEnable : MOS_BITFIELD_BIT(26); 446 uint32_t ROIEnable : MOS_BITFIELD_BIT(27); 447 uint32_t FASTSurveillanceFlag : MOS_BITFIELD_BIT(28); 448 uint32_t EnableFlexibleParam : MOS_BITFIELD_BIT(29); 449 uint32_t EnableQualityImprovement : MOS_BITFIELD_BIT(30); 450 uint32_t EnableDebugDump : MOS_BITFIELD_BIT(31); 451 }; 452 uint32_t Value; 453 } DW1; 454 455 union { 456 struct { 457 uint32_t LumaLambda; 458 }; 459 uint32_t Value; 460 } DW2; 461 462 union { 463 struct { 464 uint32_t ChromaLambda; 465 }; 466 uint32_t Value; 467 } DW3; 468 469 union { 470 struct { 471 uint32_t HaarTransformFlag : MOS_BITFIELD_RANGE(0, 1); 472 uint32_t SimplifiedFlagForInter : MOS_BITFIELD_BIT(2); 473 uint32_t Reserved : MOS_BITFIELD_RANGE(3, 31); 474 }; 475 uint32_t Value; 476 } DW4; 477 478 union { 479 struct { 480 uint32_t IntraRefreshMBNum : MOS_BITFIELD_RANGE(0, 15); 481 uint32_t IntraRefreshUnitInMB : MOS_BITFIELD_RANGE(16, 23); 482 uint32_t IntraRefreshQPDelta : MOS_BITFIELD_RANGE(24, 31); 483 }; 484 uint32_t Value; 485 } DW5; 486 487 union { 488 struct { 489 uint32_t Reserved; 490 }; 491 uint32_t Value; 492 } DW6; 493 494 union { 495 struct { 496 uint32_t Reserved; 497 }; 498 uint32_t Value; 499 } DW7; 500 501 union { 502 struct { 503 uint32_t BTI_Src_Y; 504 }; 505 uint32_t Value; 506 } DW8; 507 508 union { 509 struct { 510 uint32_t BTI_Slice_Map; 511 }; 512 uint32_t Value; 513 } DW9; 514 515 union { 516 struct { 517 uint32_t BTI_VME_8x8_Mode; 518 }; 519 uint32_t Value; 520 } DW10; 521 522 union { 523 struct { 524 uint32_t BTI_Intra_Mode; 525 }; 526 uint32_t Value; 527 } DW11; 528 529 union { 530 struct { 531 uint32_t BTI_BRC_Input; 532 }; 533 uint32_t Value; 534 } DW12; 535 536 union { 537 struct { 538 uint32_t BTI_Simplest_Intra; 539 }; 540 uint32_t Value; 541 } DW13; 542 543 union { 544 struct { 545 uint32_t BTI_LCU_Qp_Surface; 546 }; 547 uint32_t Value; 548 } DW14; 549 550 union { 551 struct { 552 uint32_t BTI_BRC_Data; 553 }; 554 uint32_t Value; 555 } DW15; 556 557 union { 558 struct { 559 uint32_t BTI_Debug; 560 }; 561 uint32_t Value; 562 } DW16; 563 }; 564 565 using PCODECHAL_FEI_HEVC_I_8x8_PU_CURBE_G9 = struct CODECHAL_FEI_HEVC_I_8x8_PU_CURBE_G9*; 566 C_ASSERT(MOS_BYTES_TO_DWORDS(sizeof(CODECHAL_FEI_HEVC_I_8x8_PU_CURBE_G9)) == 17); 567 568 class CodechalFeiHevcStateG9Skl : public CodechalEncHevcStateG9 569 { 570 // static constexpr uint32_t NUM_CONCURRENT_THREAD = 2; //!< Number of concurrent threads 571 // static constexpr uint32_t MAX_NUM_KERNEL_SPLIT = 8; //!< Maximal kernel split number 572 573 static const uint32_t FEI_ENCB_B_CURBE_INIT[56]; //!< Initialization FEI ENC curbe for B frame 574 static const uint32_t FEI_ENCB_P_CURBE_INIT[56]; //!< Initialization FEI ENC curbe for P frame 575 static const uint32_t FEI_ENCB_I_CURBE_INIT[56]; //!< Initialization FEI ENC curbe for I frame 576 #ifdef HEVC_FEI_ENABLE_CMRT 577 typedef std::map<std::string, CMRTKernelBase *> CmKernelMapType; 578 CmKernelMapType m_cmKernelMap; 579 CmEvent *m_cmEvent; 580 #endif 581 public: 582 //! 583 //! \brief Constructor 584 //! 585 CodechalFeiHevcStateG9Skl(CodechalHwInterface* hwInterface, 586 CodechalDebugInterface* debugInterface, 587 PCODECHAL_STANDARD_INFO standardInfo); 588 589 //! 590 //! \brief Destructor 591 //! ~CodechalFeiHevcStateG9Skl()592 ~CodechalFeiHevcStateG9Skl() {}; 593 594 private: 595 // Resources for the render engine 596 MOS_SURFACE m_lcuQP = {}; //!< input LCU QP surface 597 598 CodecEncodeHevcFeiPicParams *m_feiPicParams = nullptr; 599 600 //! 601 //! \brief Get encoder kernel header and kernel size 602 //! 603 //! \param [in] binary 604 //! Pointer to kernel binary 605 //! \param [in] operation 606 //! Enc kernel operation 607 //! \param [in] krnStateIdx 608 //! Kernel state index 609 //! \param [out] krnHeader 610 //! Pointer to kernel header 611 //! \param [out] krnSize 612 //! Pointer to kernel size 613 //! 614 //! \return MOS_STATUS 615 //! MOS_STATUS_SUCCESS if success, else fail reason 616 //! 617 static MOS_STATUS GetKernelHeaderAndSize( 618 void *binary, 619 EncOperation operation, 620 uint32_t krnStateIdx, 621 void *krnHeader, 622 uint32_t *krnSize); 623 624 // inherited virtual functions 625 626 //! 627 //! \brief Set MbEnc kernel parameters 628 //! 629 //! \param [in] pKernelParams 630 //! Pointer to kernel parameters 631 //! \param [in] idx 632 //! MbEnc kernel index 633 //! 634 //! \return MOS_STATUS 635 //! MOS_STATUS_SUCCESS if success, else fail reason 636 //! 637 virtual MOS_STATUS SetMbEncKernelParams(MHW_KERNEL_PARAM* pKernelParams, uint32_t idx); 638 639 //! 640 //! \brief Set MbEnc kernel binding table 641 //! 642 //! \param [in] pBindingTable 643 //! Pointer to binding table 644 //! \param [in] idx 645 //! MbEnc kernel index 646 //! 647 //! \return MOS_STATUS 648 //! MOS_STATUS_SUCCESS if success, else fail reason 649 //! 650 virtual MOS_STATUS SetMbEncBindingTable(PCODECHAL_ENCODE_BINDING_TABLE_GENERIC pBindingTable, uint32_t idx); 651 652 //! 653 //! \brief End kernel function and submit command buffer 654 //! 655 //! \param [in] mediaStateType 656 //! Media state type 657 //! \param [in] kernelState 658 //! Pointer to kernel state 659 //! \param [in] cmdBuffer 660 //! Pointer to command buffer 661 //! 662 //! \return MOS_STATUS 663 //! MOS_STATUS_SUCCESS if success, else fail reason 664 //! 665 virtual MOS_STATUS EndKernelCall( 666 CODECHAL_MEDIA_STATE_TYPE mediaStateType, 667 PMHW_KERNEL_STATE kernelState, 668 PMOS_COMMAND_BUFFER cmdBuffer); 669 670 virtual MOS_STATUS InitKernelState(); 671 virtual MOS_STATUS Initialize(CodechalSetting * pSettings); 672 virtual uint32_t GetMaxBtCount(); 673 virtual MOS_STATUS AllocateEncResources(); 674 virtual MOS_STATUS FreeEncResources(); 675 virtual MOS_STATUS InitSurfaceInfoTable(); 676 virtual MOS_STATUS SetSequenceStructs(); 677 678 //! 679 //! \brief Invoke 2x down scaling kernel 680 //! 681 //! \return MOS_STATUS 682 //! MOS_STATUS_SUCCESS if success, else fail reason 683 //! 684 virtual MOS_STATUS Encode2xScalingKernel(); 685 686 //! 687 //! \brief Invoke 32x32 PU mode decision kernel 688 //! 689 //! \return MOS_STATUS 690 //! MOS_STATUS_SUCCESS if success, else fail reason 691 //! 692 virtual MOS_STATUS Encode32x32PuModeDecisionKernel(); 693 694 //! 695 //! \brief Invoke 16x16 PU SAD computation kernel 696 //! 697 //! \return MOS_STATUS 698 //! MOS_STATUS_SUCCESS if success, else fail reason 699 //! 700 virtual MOS_STATUS Encode16x16SadPuComputationKernel(); 701 702 //! 703 //! \brief Invoke 16x16 PU mode decision kernel 704 //! 705 //! \return MOS_STATUS 706 //! MOS_STATUS_SUCCESS if success, else fail reason 707 //! 708 virtual MOS_STATUS Encode16x16PuModeDecisionKernel(); 709 710 //! 711 //! \brief Invoke 8x8 PU kernel 712 //! 713 //! \return MOS_STATUS 714 //! MOS_STATUS_SUCCESS if success, else fail reason 715 //! 716 virtual MOS_STATUS Encode8x8PUKernel(); 717 718 //! 719 //! \brief Invoke 8x8 PU FMode kernel 720 //! 721 //! \return MOS_STATUS 722 //! MOS_STATUS_SUCCESS if success, else fail reason 723 //! 724 virtual MOS_STATUS Encode8x8PUFMODEKernel(); 725 726 //! 727 //! \brief Invoke 32x32 B intra check kernel 728 //! 729 //! \return MOS_STATUS 730 //! MOS_STATUS_SUCCESS if success, else fail reason 731 //! 732 virtual MOS_STATUS Encode32X32BIntraCheckKernel(); 733 734 //! 735 //! \brief Invoke 8x8 B Pak kernel 736 //! 737 //! \param [in] pCurbe 738 //! Pointer to B_MB_ENC curbe structure 739 //! 740 //! \return MOS_STATUS 741 //! MOS_STATUS_SUCCESS if success, else fail reason 742 //! 743 MOS_STATUS Encode8x8BPakKernel(struct CODECHAL_FEI_HEVC_B_MB_ENC_CURBE_G9* pCurbe); 744 745 //! 746 //! \brief Invoke 8x8 B MbEnc kernel 747 //! 748 //! \return MOS_STATUS 749 //! MOS_STATUS_SUCCESS if success, else fail reason 750 //! 751 virtual MOS_STATUS Encode8x8PBMbEncKernel(); 752 753 //! 754 //! \brief Encode kernel functions 755 //! 756 //! \return MOS_STATUS 757 //! MOS_STATUS_SUCCESS if success, else fail reason 758 //! 759 virtual MOS_STATUS EncodeKernelFunctions(); 760 761 //! 762 //! \brief Initialize surface info 763 //! 764 //! \return MOS_STATUS 765 //! MOS_STATUS_SUCCESS if success, else fail reason 766 //! 767 // virtual MOS_STATUS InitSurfaceInfoTable(); 768 769 // Inherited virtual function UsePlatformControlFlag()770 bool UsePlatformControlFlag() 771 { 772 return false; 773 } 774 }; 775 776 #endif // __CODECHAL_FEI_HEVC__G9_SKL_H__ 777 778