1 /* 2 * Copyright (c) 2017-2018, Intel Corporation 3 * 4 * Permission is hereby granted, free of charge, to any person obtaining a 5 * copy of this software and associated documentation files (the "Software"), 6 * to deal in the Software without restriction, including without limitation 7 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 8 * and/or sell copies of the Software, and to permit persons to whom the 9 * Software is furnished to do so, subject to the following conditions: 10 * 11 * The above copyright notice and this permission notice shall be included 12 * in all copies or substantial portions of the Software. 13 * 14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS 15 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 17 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR 18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, 19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 20 * OTHER DEALINGS IN THE SOFTWARE. 21 */ 22 //! 23 //! \file codechal_encode_avc_g9_kbl.h 24 //! \brief AVC dual-pipe encoder for GEN9 KBL & GML. 25 //! 26 27 #ifndef __CODECHAL_ENCODE_AVC_G9_KBL_H__ 28 #define __CODECHAL_ENCODE_AVC_G9_KBL_H__ 29 30 #include "codechal_encode_avc.h" 31 #include "codechal_encode_avc_g9.h" 32 33 typedef struct _CODECHAL_ENCODE_AVC_BRC_INIT_RESET_CURBE_G95 34 { 35 union 36 { 37 struct 38 { 39 uint32_t ProfileLevelMaxFrame : MOS_BITFIELD_RANGE(0, 31); 40 }; 41 struct 42 { 43 uint32_t Value; 44 }; 45 } DW0; 46 47 union 48 { 49 struct 50 { 51 uint32_t InitBufFullInBits : MOS_BITFIELD_RANGE(0, 31); 52 }; 53 struct 54 { 55 uint32_t Value; 56 }; 57 } DW1; 58 59 union 60 { 61 struct 62 { 63 uint32_t BufSizeInBits : MOS_BITFIELD_RANGE(0, 31); 64 }; 65 struct 66 { 67 uint32_t Value; 68 }; 69 } DW2; 70 71 union 72 { 73 struct 74 { 75 uint32_t AverageBitRate : MOS_BITFIELD_RANGE(0, 31); 76 }; 77 struct 78 { 79 uint32_t Value; 80 }; 81 } DW3; 82 83 union 84 { 85 struct 86 { 87 uint32_t MaxBitRate : MOS_BITFIELD_RANGE(0, 31); 88 }; 89 struct 90 { 91 uint32_t Value; 92 }; 93 } DW4; 94 95 union 96 { 97 struct 98 { 99 uint32_t MinBitRate : MOS_BITFIELD_RANGE(0, 31); 100 }; 101 struct 102 { 103 uint32_t Value; 104 }; 105 } DW5; 106 107 union 108 { 109 struct 110 { 111 uint32_t FrameRateM : MOS_BITFIELD_RANGE(0, 31); 112 }; 113 struct 114 { 115 uint32_t Value; 116 }; 117 } DW6; 118 119 union 120 { 121 struct 122 { 123 uint32_t FrameRateD : MOS_BITFIELD_RANGE(0, 31); 124 }; 125 struct 126 { 127 uint32_t Value; 128 }; 129 } DW7; 130 131 union 132 { 133 struct 134 { 135 uint32_t BRCFlag : MOS_BITFIELD_RANGE(0, 15); 136 uint32_t GopP : MOS_BITFIELD_RANGE(16, 31); 137 }; 138 struct 139 { 140 uint32_t Value; 141 }; 142 } DW8; 143 144 union 145 { 146 struct 147 { 148 uint32_t GopB : MOS_BITFIELD_RANGE(0, 15); 149 uint32_t FrameWidthInBytes : MOS_BITFIELD_RANGE(16, 31); 150 }; 151 struct 152 { 153 uint32_t Value; 154 }; 155 } DW9; 156 157 union 158 { 159 struct 160 { 161 uint32_t FrameHeightInBytes : MOS_BITFIELD_RANGE(0, 15); 162 uint32_t AVBRAccuracy : MOS_BITFIELD_RANGE(16, 31); 163 }; 164 struct 165 { 166 uint32_t Value; 167 }; 168 } DW10; 169 170 union 171 { 172 struct 173 { 174 uint32_t AVBRConvergence : MOS_BITFIELD_RANGE(0, 15); 175 uint32_t MinQP : MOS_BITFIELD_RANGE(16, 31); 176 }; 177 struct 178 { 179 uint32_t Value; 180 }; 181 } DW11; 182 183 union 184 { 185 struct 186 { 187 uint32_t MaxQP : MOS_BITFIELD_RANGE(0, 15); 188 uint32_t NoSlices : MOS_BITFIELD_RANGE(16, 31); 189 }; 190 struct 191 { 192 uint32_t Value; 193 }; 194 } DW12; 195 196 union 197 { 198 struct 199 { 200 uint32_t InstantRateThreshold0ForP : MOS_BITFIELD_RANGE(0, 7); 201 uint32_t InstantRateThreshold1ForP : MOS_BITFIELD_RANGE(8, 15); 202 uint32_t InstantRateThreshold2ForP : MOS_BITFIELD_RANGE(16, 23); 203 uint32_t InstantRateThreshold3ForP : MOS_BITFIELD_RANGE(24, 31); 204 }; 205 struct 206 { 207 uint32_t Value; 208 }; 209 } DW13; 210 211 union 212 { 213 struct 214 { 215 uint32_t InstantRateThreshold0ForB : MOS_BITFIELD_RANGE(0, 7); 216 uint32_t InstantRateThreshold1ForB : MOS_BITFIELD_RANGE(8, 15); 217 uint32_t InstantRateThreshold2ForB : MOS_BITFIELD_RANGE(16, 23); 218 uint32_t InstantRateThreshold3ForB : MOS_BITFIELD_RANGE(24, 31); 219 }; 220 struct 221 { 222 uint32_t Value; 223 }; 224 } DW14; 225 226 union 227 { 228 struct 229 { 230 uint32_t InstantRateThreshold0ForI : MOS_BITFIELD_RANGE(0, 7); 231 uint32_t InstantRateThreshold1ForI : MOS_BITFIELD_RANGE(8, 15); 232 uint32_t InstantRateThreshold2ForI : MOS_BITFIELD_RANGE(16, 23); 233 uint32_t InstantRateThreshold3ForI : MOS_BITFIELD_RANGE(24, 31); 234 }; 235 struct 236 { 237 uint32_t Value; 238 }; 239 } DW15; 240 241 union 242 { 243 struct 244 { 245 uint32_t DeviationThreshold0ForPandB : MOS_BITFIELD_RANGE(0, 7); // Signed byte 246 uint32_t DeviationThreshold1ForPandB : MOS_BITFIELD_RANGE(8, 15); // Signed byte 247 uint32_t DeviationThreshold2ForPandB : MOS_BITFIELD_RANGE(16, 23); // Signed byte 248 uint32_t DeviationThreshold3ForPandB : MOS_BITFIELD_RANGE(24, 31); // Signed byte 249 }; 250 struct 251 { 252 uint32_t Value; 253 }; 254 } DW16; 255 256 union 257 { 258 struct 259 { 260 uint32_t DeviationThreshold4ForPandB : MOS_BITFIELD_RANGE(0, 7); // Signed byte 261 uint32_t DeviationThreshold5ForPandB : MOS_BITFIELD_RANGE(8, 15); // Signed byte 262 uint32_t DeviationThreshold6ForPandB : MOS_BITFIELD_RANGE(16, 23); // Signed byte 263 uint32_t DeviationThreshold7ForPandB : MOS_BITFIELD_RANGE(24, 31); // Signed byte 264 }; 265 struct 266 { 267 uint32_t Value; 268 }; 269 } DW17; 270 271 union 272 { 273 struct 274 { 275 uint32_t DeviationThreshold0ForVBR : MOS_BITFIELD_RANGE(0, 7); // Signed byte 276 uint32_t DeviationThreshold1ForVBR : MOS_BITFIELD_RANGE(8, 15); // Signed byte 277 uint32_t DeviationThreshold2ForVBR : MOS_BITFIELD_RANGE(16, 23); // Signed byte 278 uint32_t DeviationThreshold3ForVBR : MOS_BITFIELD_RANGE(24, 31); // Signed byte 279 }; 280 struct 281 { 282 uint32_t Value; 283 }; 284 } DW18; 285 286 union 287 { 288 struct 289 { 290 uint32_t DeviationThreshold4ForVBR : MOS_BITFIELD_RANGE(0, 7); // Signed byte 291 uint32_t DeviationThreshold5ForVBR : MOS_BITFIELD_RANGE(8, 15); // Signed byte 292 uint32_t DeviationThreshold6ForVBR : MOS_BITFIELD_RANGE(16, 23); // Signed byte 293 uint32_t DeviationThreshold7ForVBR : MOS_BITFIELD_RANGE(24, 31); // Signed byte 294 }; 295 struct 296 { 297 uint32_t Value; 298 }; 299 } DW19; 300 301 union 302 { 303 struct 304 { 305 uint32_t DeviationThreshold0ForI : MOS_BITFIELD_RANGE(0, 7); // Signed byte 306 uint32_t DeviationThreshold1ForI : MOS_BITFIELD_RANGE(8, 15); // Signed byte 307 uint32_t DeviationThreshold2ForI : MOS_BITFIELD_RANGE(16, 23); // Signed byte 308 uint32_t DeviationThreshold3ForI : MOS_BITFIELD_RANGE(24, 31); // Signed byte 309 }; 310 struct 311 { 312 uint32_t Value; 313 }; 314 } DW20; 315 316 union 317 { 318 struct 319 { 320 uint32_t DeviationThreshold4ForI : MOS_BITFIELD_RANGE(0, 7); // Signed byte 321 uint32_t DeviationThreshold5ForI : MOS_BITFIELD_RANGE(8, 15); // Signed byte 322 uint32_t DeviationThreshold6ForI : MOS_BITFIELD_RANGE(16, 23); // Signed byte 323 uint32_t DeviationThreshold7ForI : MOS_BITFIELD_RANGE(24, 31); // Signed byte 324 }; 325 struct 326 { 327 uint32_t Value; 328 }; 329 } DW21; 330 331 union 332 { 333 struct 334 { 335 uint32_t InitialQPForI : MOS_BITFIELD_RANGE(0, 7); // Signed byte 336 uint32_t InitialQPForP : MOS_BITFIELD_RANGE(8, 15); // Signed byte 337 uint32_t InitialQPForB : MOS_BITFIELD_RANGE(16, 23); // Signed byte 338 uint32_t SlidingWindowSize : MOS_BITFIELD_RANGE(24, 31); // unsigned byte 339 }; 340 struct 341 { 342 uint32_t Value; 343 }; 344 } DW22; 345 346 union 347 { 348 struct 349 { 350 uint32_t ACQP : MOS_BITFIELD_RANGE(0, 31); 351 }; 352 struct 353 { 354 uint32_t Value; 355 }; 356 } DW23; 357 358 union 359 { 360 struct 361 { 362 uint32_t LongTermInterval : MOS_BITFIELD_RANGE(0, 15); 363 uint32_t Reserved : MOS_BITFIELD_RANGE(16, 31); 364 }; 365 struct 366 { 367 uint32_t Value; 368 }; 369 } DW24; 370 371 union 372 { 373 struct 374 { 375 uint32_t Reserved : MOS_BITFIELD_RANGE(0, 31); 376 }; 377 struct 378 { 379 uint32_t Value; 380 }; 381 } DW25; 382 383 union 384 { 385 struct 386 { 387 uint32_t Reserved : MOS_BITFIELD_RANGE(0, 31); 388 }; 389 struct 390 { 391 uint32_t Value; 392 }; 393 } DW26; 394 395 union 396 { 397 struct 398 { 399 uint32_t Reserved : MOS_BITFIELD_RANGE(0, 31); 400 }; 401 struct 402 { 403 uint32_t Value; 404 }; 405 } DW27; 406 407 union 408 { 409 struct 410 { 411 uint32_t Reserved : MOS_BITFIELD_RANGE(0, 31); 412 }; 413 struct 414 { 415 uint32_t Value; 416 }; 417 } DW28; 418 419 union 420 { 421 struct 422 { 423 uint32_t Reserved : MOS_BITFIELD_RANGE(0, 31); 424 }; 425 struct 426 { 427 uint32_t Value; 428 }; 429 } DW29; 430 431 union 432 { 433 struct 434 { 435 uint32_t Reserved : MOS_BITFIELD_RANGE(0, 31); 436 }; 437 struct 438 { 439 uint32_t Value; 440 }; 441 } DW30; 442 443 union 444 { 445 struct 446 { 447 uint32_t Reserved : MOS_BITFIELD_RANGE(0, 31); 448 }; 449 struct 450 { 451 uint32_t Value; 452 }; 453 } DW31; 454 455 union 456 { 457 struct 458 { 459 uint32_t SurfaceIndexhistorybuffer : MOS_BITFIELD_RANGE(0, 31); 460 }; 461 struct 462 { 463 uint32_t Value; 464 }; 465 466 } DW32; 467 468 union 469 { 470 struct 471 { 472 uint32_t SurfaceIndexdistortionbuffer : MOS_BITFIELD_RANGE(0, 31); 473 }; 474 struct 475 { 476 uint32_t Value; 477 }; 478 } DW33; 479 } CODECHAL_ENCODE_AVC_BRC_INIT_RESET_CURBE_G95, *PCODECHAL_ENCODE_AVC_BRC_INIT_RESET_CURBE_G95; 480 C_ASSERT(MOS_BYTES_TO_DWORDS(sizeof(CODECHAL_ENCODE_AVC_BRC_INIT_RESET_CURBE_G95)) == 34); 481 482 typedef struct _CODECHAL_ENCODE_AVC_FRAME_BRC_UPDATE_CURBE_G95 483 { 484 union 485 { 486 struct 487 { 488 uint32_t TargetSize : MOS_BITFIELD_RANGE(0, 31); 489 }; 490 struct 491 { 492 uint32_t Value; 493 }; 494 } DW0; 495 496 union 497 { 498 struct 499 { 500 uint32_t FrameNumber : MOS_BITFIELD_RANGE(0, 31); 501 }; 502 struct 503 { 504 uint32_t Value; 505 }; 506 } DW1; 507 508 union 509 { 510 struct 511 { 512 uint32_t SizeofPicHeaders : MOS_BITFIELD_RANGE(0, 31); 513 }; 514 struct 515 { 516 uint32_t Value; 517 }; 518 } DW2; 519 520 union 521 { 522 struct 523 { 524 uint32_t startGAdjFrame0 : MOS_BITFIELD_RANGE(0, 15); 525 uint32_t startGAdjFrame1 : MOS_BITFIELD_RANGE(16, 31); 526 }; 527 struct 528 { 529 uint32_t Value; 530 }; 531 } DW3; 532 533 union 534 { 535 struct 536 { 537 uint32_t startGAdjFrame2 : MOS_BITFIELD_RANGE(0, 15); 538 uint32_t startGAdjFrame3 : MOS_BITFIELD_RANGE(16, 31); 539 }; 540 struct 541 { 542 uint32_t Value; 543 }; 544 } DW4; 545 546 union 547 { 548 struct 549 { 550 uint32_t TargetSizeFlag : MOS_BITFIELD_RANGE(0, 7); 551 uint32_t BRCFlag : MOS_BITFIELD_RANGE(8, 15); 552 uint32_t MaxNumPAKs : MOS_BITFIELD_RANGE(16, 23); 553 uint32_t CurrFrameType : MOS_BITFIELD_RANGE(24, 31); 554 }; 555 struct 556 { 557 uint32_t Value; 558 }; 559 } DW5; 560 561 union 562 { 563 struct 564 { 565 uint32_t NumSkipFrames : MOS_BITFIELD_RANGE(0, 7); 566 uint32_t MinimumQP : MOS_BITFIELD_RANGE(8, 15); 567 uint32_t MaximumQP : MOS_BITFIELD_RANGE(16, 23); 568 uint32_t EnableForceToSkip : MOS_BITFIELD_BIT(24); 569 uint32_t EnableSlidingWindow : MOS_BITFIELD_BIT(25); 570 uint32_t EnableExtremLowDelay : MOS_BITFIELD_BIT(26); 571 uint32_t DisableVarCompute : MOS_BITFIELD_BIT(27); 572 uint32_t Reserved : MOS_BITFIELD_RANGE(28, 31); 573 }; 574 struct 575 { 576 uint32_t Value; 577 }; 578 } DW6; 579 580 union 581 { 582 struct 583 { 584 uint32_t SizeSkipFrames : MOS_BITFIELD_RANGE(0, 31); 585 }; 586 struct 587 { 588 uint32_t Value; 589 }; 590 } DW7; 591 592 union 593 { 594 struct 595 { 596 uint32_t StartGlobalAdjustMult0 : MOS_BITFIELD_RANGE(0, 7); 597 uint32_t StartGlobalAdjustMult1 : MOS_BITFIELD_RANGE(8, 15); 598 uint32_t StartGlobalAdjustMult2 : MOS_BITFIELD_RANGE(16, 23); 599 uint32_t StartGlobalAdjustMult3 : MOS_BITFIELD_RANGE(24, 31); 600 }; 601 struct 602 { 603 uint32_t Value; 604 }; 605 } DW8; 606 607 union 608 { 609 struct 610 { 611 uint32_t StartGlobalAdjustMult4 : MOS_BITFIELD_RANGE(0, 7); 612 uint32_t StartGlobalAdjustDiv0 : MOS_BITFIELD_RANGE(8, 15); 613 uint32_t StartGlobalAdjustDiv1 : MOS_BITFIELD_RANGE(16, 23); 614 uint32_t StartGlobalAdjustDiv2 : MOS_BITFIELD_RANGE(24, 31); 615 }; 616 struct 617 { 618 uint32_t Value; 619 }; 620 } DW9; 621 622 union 623 { 624 struct 625 { 626 uint32_t StartGlobalAdjustDiv3 : MOS_BITFIELD_RANGE(0, 7); 627 uint32_t StartGlobalAdjustDiv4 : MOS_BITFIELD_RANGE(8, 15); 628 uint32_t QPThreshold0 : MOS_BITFIELD_RANGE(16, 23); 629 uint32_t QPThreshold1 : MOS_BITFIELD_RANGE(24, 31); 630 }; 631 struct 632 { 633 uint32_t Value; 634 }; 635 } DW10; 636 637 union 638 { 639 struct 640 { 641 uint32_t QPThreshold2 : MOS_BITFIELD_RANGE(0, 7); 642 uint32_t QPThreshold3 : MOS_BITFIELD_RANGE(8, 15); 643 uint32_t gRateRatioThreshold0 : MOS_BITFIELD_RANGE(16, 23); 644 uint32_t gRateRatioThreshold1 : MOS_BITFIELD_RANGE(24, 31); 645 }; 646 struct 647 { 648 uint32_t Value; 649 }; 650 } DW11; 651 652 union 653 { 654 struct 655 { 656 uint32_t gRateRatioThreshold2 : MOS_BITFIELD_RANGE(0, 7); 657 uint32_t gRateRatioThreshold3 : MOS_BITFIELD_RANGE(8, 15); 658 uint32_t gRateRatioThreshold4 : MOS_BITFIELD_RANGE(16, 23); 659 uint32_t gRateRatioThreshold5 : MOS_BITFIELD_RANGE(24, 31); 660 }; 661 struct 662 { 663 uint32_t Value; 664 }; 665 } DW12; 666 667 union 668 { 669 struct 670 { 671 uint32_t gRateRatioThresholdQP0 : MOS_BITFIELD_RANGE(0, 7); 672 uint32_t gRateRatioThresholdQP1 : MOS_BITFIELD_RANGE(8, 15); 673 uint32_t gRateRatioThresholdQP2 : MOS_BITFIELD_RANGE(16, 23); 674 uint32_t gRateRatioThresholdQP3 : MOS_BITFIELD_RANGE(24, 31); 675 }; 676 struct 677 { 678 uint32_t Value; 679 }; 680 } DW13; 681 682 union 683 { 684 struct 685 { 686 uint32_t gRateRatioThresholdQP4 : MOS_BITFIELD_RANGE(0, 7); 687 uint32_t gRateRatioThresholdQP5 : MOS_BITFIELD_RANGE(8, 15); 688 uint32_t gRateRatioThresholdQP6 : MOS_BITFIELD_RANGE(16, 23); 689 uint32_t QPIndexOfCurPic : MOS_BITFIELD_RANGE(24, 31); 690 }; 691 struct 692 { 693 uint32_t Value; 694 }; 695 } DW14; 696 697 union 698 { 699 struct 700 { 701 uint32_t Reserved : MOS_BITFIELD_RANGE(0, 7); 702 uint32_t EnableROI : MOS_BITFIELD_RANGE(8, 15); 703 uint32_t RoundingIntra : MOS_BITFIELD_RANGE(16, 23); 704 uint32_t RoundingInter : MOS_BITFIELD_RANGE(24, 31); 705 }; 706 struct 707 { 708 uint32_t Value; 709 }; 710 } DW15; 711 712 union 713 { 714 struct 715 { 716 uint32_t Reserved : MOS_BITFIELD_RANGE(0, 31); 717 }; 718 struct 719 { 720 uint32_t Value; 721 }; 722 } DW16; 723 724 union 725 { 726 struct 727 { 728 uint32_t Reserved : MOS_BITFIELD_RANGE(0, 31); 729 }; 730 struct 731 { 732 uint32_t Value; 733 }; 734 } DW17; 735 736 union 737 { 738 struct 739 { 740 uint32_t Reserved : MOS_BITFIELD_RANGE(0, 31); 741 }; 742 struct 743 { 744 uint32_t Value; 745 }; 746 } DW18; 747 748 union 749 { 750 struct 751 { 752 uint32_t UserMaxFrame : MOS_BITFIELD_RANGE(0, 31); 753 }; 754 struct 755 { 756 uint32_t Value; 757 }; 758 } DW19; 759 760 union 761 { 762 struct 763 { 764 uint32_t Reserved : MOS_BITFIELD_RANGE(0, 31); 765 }; 766 struct 767 { 768 uint32_t Value; 769 }; 770 } DW20; 771 772 union 773 { 774 struct 775 { 776 uint32_t Reserved : MOS_BITFIELD_RANGE(0, 31); 777 }; 778 struct 779 { 780 uint32_t Value; 781 }; 782 } DW21; 783 784 union 785 { 786 struct 787 { 788 uint32_t Reserved : MOS_BITFIELD_RANGE(0, 31); 789 }; 790 struct 791 { 792 uint32_t Value; 793 }; 794 } DW22; 795 796 union 797 { 798 struct 799 { 800 uint32_t Reserved : MOS_BITFIELD_RANGE(0, 31); 801 }; 802 struct 803 { 804 uint32_t Value; 805 }; 806 } DW23; 807 808 union 809 { 810 struct 811 { 812 uint32_t SurfaceIndexBRChistorybuffer : MOS_BITFIELD_RANGE(0, 31); 813 }; 814 struct 815 { 816 uint32_t Value; 817 }; 818 } DW24; 819 820 union 821 { 822 struct 823 { 824 uint32_t SurfaceIndexPreciousPAKstatisticsoutputbuffer : MOS_BITFIELD_RANGE(0, 31); 825 }; 826 struct 827 { 828 uint32_t Value; 829 }; 830 } DW25; 831 832 union 833 { 834 struct 835 { 836 uint32_t SurfaceIndexAVCIMGstateinputbuffer : MOS_BITFIELD_RANGE(0, 31); 837 }; 838 struct 839 { 840 uint32_t Value; 841 }; 842 } DW26; 843 844 union 845 { 846 struct 847 { 848 uint32_t SurfaceIndexAVCIMGstateoutputbuffer : MOS_BITFIELD_RANGE(0, 31); 849 }; 850 struct 851 { 852 uint32_t Value; 853 }; 854 } DW27; 855 856 union 857 { 858 struct 859 { 860 uint32_t SurfaceIndexAVC_Encbuffer : MOS_BITFIELD_RANGE(0, 31); 861 }; 862 struct 863 { 864 uint32_t Value; 865 }; 866 } DW28; 867 868 union 869 { 870 struct 871 { 872 uint32_t SurfaceIndexAVCDISTORTIONbuffer : MOS_BITFIELD_RANGE(0, 31); 873 }; 874 struct 875 { 876 uint32_t Value; 877 }; 878 } DW29; 879 880 union 881 { 882 struct 883 { 884 uint32_t SurfaceIndexBRCconstdatabuffer : MOS_BITFIELD_RANGE(0, 31); 885 }; 886 struct 887 { 888 uint32_t Value; 889 }; 890 } DW30; 891 892 union 893 { 894 struct 895 { 896 uint32_t SurfaceIndexMBStatsBuffer : MOS_BITFIELD_RANGE(0, 31); 897 }; 898 struct 899 { 900 uint32_t Value; 901 }; 902 } DW31; 903 904 union 905 { 906 struct 907 { 908 uint32_t SurfaceIndexMotionvectorbuffer : MOS_BITFIELD_RANGE(0, 31); 909 }; 910 struct 911 { 912 uint32_t Value; 913 }; 914 } DW32; 915 } CODECHAL_ENCODE_AVC_BRC_UPDATE_CURBE_G95, *PCODECHAL_ENCODE_AVC_BRC_UPDATE_CURBE_G95; 916 C_ASSERT(MOS_BYTES_TO_DWORDS(sizeof(CODECHAL_ENCODE_AVC_BRC_UPDATE_CURBE_G95)) == 33); 917 918 typedef struct _CODECHAL_ENCODE_AVC_MB_BRC_UPDATE_CURBE_G95 919 { 920 union 921 { 922 struct 923 { 924 uint32_t CurrFrameType : MOS_BITFIELD_RANGE(0, 7); 925 uint32_t EnableROI : MOS_BITFIELD_RANGE(8, 15); 926 uint32_t ROIRatio : MOS_BITFIELD_RANGE(16, 23); 927 uint32_t Reserved : MOS_BITFIELD_RANGE(24, 31); 928 }; 929 struct 930 { 931 uint32_t Value; 932 }; 933 } DW0; 934 935 union 936 { 937 struct 938 { 939 uint32_t Reserved : MOS_BITFIELD_RANGE(0, 31); 940 }; 941 struct 942 { 943 uint32_t Value; 944 }; 945 } DW1; 946 947 union 948 { 949 struct 950 { 951 uint32_t Reserved : MOS_BITFIELD_RANGE(0, 31); 952 }; 953 struct 954 { 955 uint32_t Value; 956 }; 957 } DW2; 958 959 union 960 { 961 struct 962 { 963 uint32_t Reserved : MOS_BITFIELD_RANGE(0, 31); 964 }; 965 struct 966 { 967 uint32_t Value; 968 }; 969 } DW3; 970 971 union 972 { 973 struct 974 { 975 uint32_t Reserved : MOS_BITFIELD_RANGE(0, 31); 976 }; 977 struct 978 { 979 uint32_t Value; 980 }; 981 } DW4; 982 983 union 984 { 985 struct 986 { 987 uint32_t Reserved : MOS_BITFIELD_RANGE(0, 31); 988 }; 989 struct 990 { 991 uint32_t Value; 992 }; 993 } DW5; 994 995 union 996 { 997 struct 998 { 999 uint32_t Reserved : MOS_BITFIELD_RANGE(0, 31); 1000 }; 1001 struct 1002 { 1003 uint32_t Value; 1004 }; 1005 } DW6; 1006 1007 union 1008 { 1009 struct 1010 { 1011 uint32_t Reserved : MOS_BITFIELD_RANGE(0, 31); 1012 }; 1013 struct 1014 { 1015 uint32_t Value; 1016 }; 1017 } DW7; 1018 1019 union 1020 { 1021 struct 1022 { 1023 uint32_t HistorybufferIndex : MOS_BITFIELD_RANGE(0, 31); 1024 }; 1025 struct 1026 { 1027 uint32_t Value; 1028 }; 1029 } DW8; 1030 1031 union 1032 { 1033 struct 1034 { 1035 uint32_t MBQPbufferIndex : MOS_BITFIELD_RANGE(0, 31); 1036 }; 1037 struct 1038 { 1039 uint32_t Value; 1040 }; 1041 } DW9; 1042 1043 union 1044 { 1045 struct 1046 { 1047 uint32_t ROIbufferIndex : MOS_BITFIELD_RANGE(0, 31); 1048 }; 1049 struct 1050 { 1051 uint32_t Value; 1052 }; 1053 } DW10; 1054 1055 union 1056 { 1057 struct 1058 { 1059 uint32_t MBstatisticalbufferIndex : MOS_BITFIELD_RANGE(0, 31); 1060 }; 1061 struct 1062 { 1063 uint32_t Value; 1064 }; 1065 }DW11; 1066 1067 } CODECHAL_ENCODE_AVC_MB_BRC_UPDATE_CURBE_G95, *PCODECHAL_ENCODE_AVC_MB_BRC_UPDATE_CURBE_G95; 1068 C_ASSERT(MOS_BYTES_TO_DWORDS(sizeof(CODECHAL_ENCODE_AVC_MB_BRC_UPDATE_CURBE_G95)) == 12); 1069 1070 // AVC Gen 9 WP kernel CURBE 1071 typedef struct _CODECHAL_ENCODE_AVC_WP_CURBE_G9_KBL 1072 { 1073 // DW0 1074 union 1075 { 1076 struct 1077 { 1078 uint32_t DefaultWeight : MOS_BITFIELD_RANGE( 0,15 ); 1079 uint32_t DefaultOffset : MOS_BITFIELD_RANGE( 16,31 ); 1080 }; 1081 struct 1082 { 1083 uint32_t Value; 1084 }; 1085 } DW0; 1086 1087 // DW1 1088 union 1089 { 1090 struct 1091 { 1092 uint32_t ROI0_X_left : MOS_BITFIELD_RANGE( 0,15 ); 1093 uint32_t ROI0_Y_top : MOS_BITFIELD_RANGE( 16,31 ); 1094 }; 1095 struct 1096 { 1097 uint32_t Value; 1098 }; 1099 } DW1; 1100 1101 // DW2 1102 union 1103 { 1104 struct 1105 { 1106 uint32_t ROI0_X_right : MOS_BITFIELD_RANGE( 0,15 ); 1107 uint32_t ROI0_Y_bottom : MOS_BITFIELD_RANGE( 16,31 ); 1108 }; 1109 struct 1110 { 1111 uint32_t Value; 1112 }; 1113 } DW2; 1114 1115 // DW3 1116 union 1117 { 1118 struct 1119 { 1120 uint32_t ROI0Weight : MOS_BITFIELD_RANGE( 0,15 ); 1121 uint32_t ROI0Offset : MOS_BITFIELD_RANGE( 16,31 ); 1122 }; 1123 struct 1124 { 1125 uint32_t Value; 1126 }; 1127 } DW3; 1128 1129 // DW4 1130 union 1131 { 1132 struct 1133 { 1134 uint32_t ROI1_X_left : MOS_BITFIELD_RANGE( 0,15 ); 1135 uint32_t ROI1_Y_top : MOS_BITFIELD_RANGE( 16,31 ); 1136 }; 1137 struct 1138 { 1139 uint32_t Value; 1140 }; 1141 } DW4; 1142 1143 // DW5 1144 union 1145 { 1146 struct 1147 { 1148 uint32_t ROI1_X_right : MOS_BITFIELD_RANGE( 0,15 ); 1149 uint32_t ROI1_Y_bottom : MOS_BITFIELD_RANGE( 16,31 ); 1150 }; 1151 struct 1152 { 1153 uint32_t Value; 1154 }; 1155 } DW5; 1156 1157 // DW6 1158 union 1159 { 1160 struct 1161 { 1162 uint32_t ROI1Weight : MOS_BITFIELD_RANGE( 0,15 ); 1163 uint32_t ROI1Offset : MOS_BITFIELD_RANGE( 16,31 ); 1164 }; 1165 struct 1166 { 1167 uint32_t Value; 1168 }; 1169 } DW6; 1170 1171 // DW7 1172 union 1173 { 1174 struct 1175 { 1176 uint32_t ROI2_X_left : MOS_BITFIELD_RANGE( 0,15 ); 1177 uint32_t ROI2_Y_top : MOS_BITFIELD_RANGE( 16,31 ); 1178 }; 1179 struct 1180 { 1181 uint32_t Value; 1182 }; 1183 } DW7; 1184 1185 // DW8 1186 union 1187 { 1188 struct 1189 { 1190 uint32_t ROI2_X_right : MOS_BITFIELD_RANGE( 0,15 ); 1191 uint32_t ROI2_Y_bottom : MOS_BITFIELD_RANGE( 16,31 ); 1192 }; 1193 struct 1194 { 1195 uint32_t Value; 1196 }; 1197 } DW8; 1198 1199 // DW9 1200 union 1201 { 1202 struct 1203 { 1204 uint32_t ROI2Weight : MOS_BITFIELD_RANGE( 0,15 ); 1205 uint32_t ROI2Offset : MOS_BITFIELD_RANGE( 16,31 ); 1206 }; 1207 struct 1208 { 1209 uint32_t Value; 1210 }; 1211 } DW9; 1212 1213 // DW10 1214 union 1215 { 1216 struct 1217 { 1218 uint32_t ROI3_X_left : MOS_BITFIELD_RANGE( 0,15 ); 1219 uint32_t ROI3_Y_top : MOS_BITFIELD_RANGE( 16,31 ); 1220 }; 1221 struct 1222 { 1223 uint32_t Value; 1224 }; 1225 } DW10; 1226 1227 // DW11 1228 union 1229 { 1230 struct 1231 { 1232 uint32_t ROI3_X_right : MOS_BITFIELD_RANGE( 0,15 ); 1233 uint32_t ROI3_Y_bottom : MOS_BITFIELD_RANGE( 16,31 ); 1234 }; 1235 struct 1236 { 1237 uint32_t Value; 1238 }; 1239 } DW11; 1240 1241 // DW12 1242 union 1243 { 1244 struct 1245 { 1246 uint32_t ROI3Weight : MOS_BITFIELD_RANGE( 0,15 ); 1247 uint32_t ROI3Offset : MOS_BITFIELD_RANGE( 16,31 ); 1248 }; 1249 struct 1250 { 1251 uint32_t Value; 1252 }; 1253 } DW12; 1254 1255 // DW13 1256 union 1257 { 1258 struct 1259 { 1260 uint32_t ROI4_X_left : MOS_BITFIELD_RANGE( 0,15 ); 1261 uint32_t ROI4_Y_top : MOS_BITFIELD_RANGE( 16,31 ); 1262 }; 1263 struct 1264 { 1265 uint32_t Value; 1266 }; 1267 } DW13; 1268 1269 // DW14 1270 union 1271 { 1272 struct 1273 { 1274 uint32_t ROI4_X_right : MOS_BITFIELD_RANGE( 0,15 ); 1275 uint32_t ROI4_Y_bottom : MOS_BITFIELD_RANGE( 16,31 ); 1276 }; 1277 struct 1278 { 1279 uint32_t Value; 1280 }; 1281 } DW14; 1282 1283 // DW15 1284 union 1285 { 1286 struct 1287 { 1288 uint32_t ROI4Weight : MOS_BITFIELD_RANGE( 0,15 ); 1289 uint32_t ROI4Offset : MOS_BITFIELD_RANGE( 16,31 ); 1290 }; 1291 struct 1292 { 1293 uint32_t Value; 1294 }; 1295 } DW15; 1296 1297 // DW16 1298 union 1299 { 1300 struct 1301 { 1302 uint32_t ROI5_X_left : MOS_BITFIELD_RANGE( 0,15 ); 1303 uint32_t ROI5_Y_top : MOS_BITFIELD_RANGE( 16,31 ); 1304 }; 1305 struct 1306 { 1307 uint32_t Value; 1308 }; 1309 } DW16; 1310 1311 // DW17 1312 union 1313 { 1314 struct 1315 { 1316 uint32_t ROI5_X_right : MOS_BITFIELD_RANGE( 0,15 ); 1317 uint32_t ROI5_Y_bottom : MOS_BITFIELD_RANGE( 16,31 ); 1318 }; 1319 struct 1320 { 1321 uint32_t Value; 1322 }; 1323 } DW17; 1324 1325 // DW18 1326 union 1327 { 1328 struct 1329 { 1330 uint32_t ROI5Weight : MOS_BITFIELD_RANGE( 0,15 ); 1331 uint32_t ROI5Offset : MOS_BITFIELD_RANGE( 16,31 ); 1332 }; 1333 struct 1334 { 1335 uint32_t Value; 1336 }; 1337 } DW18; 1338 1339 // DW19 1340 union 1341 { 1342 struct 1343 { 1344 uint32_t ROI6_X_left : MOS_BITFIELD_RANGE( 0,15 ); 1345 uint32_t ROI6_Y_top : MOS_BITFIELD_RANGE( 16,31 ); 1346 }; 1347 struct 1348 { 1349 uint32_t Value; 1350 }; 1351 } DW19; 1352 1353 // DW20 1354 union 1355 { 1356 struct 1357 { 1358 uint32_t ROI6_X_right : MOS_BITFIELD_RANGE( 0,15 ); 1359 uint32_t ROI6_Y_bottom : MOS_BITFIELD_RANGE( 16,31 ); 1360 }; 1361 struct 1362 { 1363 uint32_t Value; 1364 }; 1365 } DW20; 1366 1367 // DW21 1368 union 1369 { 1370 struct 1371 { 1372 uint32_t ROI6Weight : MOS_BITFIELD_RANGE( 0,15 ); 1373 uint32_t ROI6Offset : MOS_BITFIELD_RANGE( 16,31 ); 1374 }; 1375 struct 1376 { 1377 uint32_t Value; 1378 }; 1379 } DW21; 1380 1381 // DW22 1382 union 1383 { 1384 struct 1385 { 1386 uint32_t ROI7_X_left : MOS_BITFIELD_RANGE( 0,15 ); 1387 uint32_t ROI7_Y_top : MOS_BITFIELD_RANGE( 16,31 ); 1388 }; 1389 struct 1390 { 1391 uint32_t Value; 1392 }; 1393 } DW22; 1394 1395 // DW23 1396 union 1397 { 1398 struct 1399 { 1400 uint32_t ROI7_X_right : MOS_BITFIELD_RANGE( 0,15 ); 1401 uint32_t ROI7_Y_bottom : MOS_BITFIELD_RANGE( 16,31 ); 1402 }; 1403 struct 1404 { 1405 uint32_t Value; 1406 }; 1407 } DW23; 1408 1409 // DW24 1410 union 1411 { 1412 struct 1413 { 1414 uint32_t ROI7Weight : MOS_BITFIELD_RANGE( 0,15 ); 1415 uint32_t ROI7Offset : MOS_BITFIELD_RANGE( 16,31 ); 1416 }; 1417 struct 1418 { 1419 uint32_t Value; 1420 }; 1421 } DW24; 1422 1423 // DW25 1424 union 1425 { 1426 struct 1427 { 1428 uint32_t ROI8_X_left : MOS_BITFIELD_RANGE( 0,15 ); 1429 uint32_t ROI8_Y_top : MOS_BITFIELD_RANGE( 16,31 ); 1430 }; 1431 struct 1432 { 1433 uint32_t Value; 1434 }; 1435 } DW25; 1436 1437 // DW26 1438 union 1439 { 1440 struct 1441 { 1442 uint32_t ROI8_X_right : MOS_BITFIELD_RANGE( 0,15 ); 1443 uint32_t ROI8_Y_bottom : MOS_BITFIELD_RANGE( 16,31 ); 1444 }; 1445 struct 1446 { 1447 uint32_t Value; 1448 }; 1449 } DW26; 1450 1451 // DW27 1452 union 1453 { 1454 struct 1455 { 1456 uint32_t ROI8Weight : MOS_BITFIELD_RANGE( 0,15 ); 1457 uint32_t ROI8Offset : MOS_BITFIELD_RANGE( 16,31 ); 1458 }; 1459 struct 1460 { 1461 uint32_t Value; 1462 }; 1463 } DW27; 1464 1465 // DW28 1466 union 1467 { 1468 struct 1469 { 1470 uint32_t ROI9_X_left : MOS_BITFIELD_RANGE( 0,15 ); 1471 uint32_t ROI9_Y_top : MOS_BITFIELD_RANGE( 16,31 ); 1472 }; 1473 struct 1474 { 1475 uint32_t Value; 1476 }; 1477 } DW28; 1478 1479 // DW29 1480 union 1481 { 1482 struct 1483 { 1484 uint32_t ROI9_X_right : MOS_BITFIELD_RANGE( 0,15 ); 1485 uint32_t ROI9_Y_bottom : MOS_BITFIELD_RANGE( 16,31 ); 1486 }; 1487 struct 1488 { 1489 uint32_t Value; 1490 }; 1491 } DW29; 1492 1493 // DW30 1494 union 1495 { 1496 struct 1497 { 1498 uint32_t ROI9Weight : MOS_BITFIELD_RANGE( 0,15 ); 1499 uint32_t ROI9Offset : MOS_BITFIELD_RANGE( 16,31 ); 1500 }; 1501 struct 1502 { 1503 uint32_t Value; 1504 }; 1505 } DW30; 1506 1507 // DW31 1508 union 1509 { 1510 struct 1511 { 1512 uint32_t ROI10_X_left : MOS_BITFIELD_RANGE( 0,15 ); 1513 uint32_t ROI10_Y_top : MOS_BITFIELD_RANGE( 16,31 ); 1514 }; 1515 struct 1516 { 1517 uint32_t Value; 1518 }; 1519 } DW31; 1520 1521 // DW32 1522 union 1523 { 1524 struct 1525 { 1526 uint32_t ROI10_X_right : MOS_BITFIELD_RANGE( 0,15 ); 1527 uint32_t ROI10_Y_bottom : MOS_BITFIELD_RANGE( 16,31 ); 1528 }; 1529 struct 1530 { 1531 uint32_t Value; 1532 }; 1533 } DW32; 1534 1535 // DW33 1536 union 1537 { 1538 struct 1539 { 1540 uint32_t ROI10Weight : MOS_BITFIELD_RANGE( 0,15 ); 1541 uint32_t ROI10Offset : MOS_BITFIELD_RANGE( 16,31 ); 1542 }; 1543 struct 1544 { 1545 uint32_t Value; 1546 }; 1547 } DW33; 1548 1549 // DW34 1550 union 1551 { 1552 struct 1553 { 1554 uint32_t ROI11_X_left : MOS_BITFIELD_RANGE( 0,15 ); 1555 uint32_t ROI11_Y_top : MOS_BITFIELD_RANGE( 16,31 ); 1556 }; 1557 struct 1558 { 1559 uint32_t Value; 1560 }; 1561 } DW34; 1562 1563 // DW35 1564 union 1565 { 1566 struct 1567 { 1568 uint32_t ROI11_X_right : MOS_BITFIELD_RANGE( 0,15 ); 1569 uint32_t ROI11_Y_bottom : MOS_BITFIELD_RANGE( 16,31 ); 1570 }; 1571 struct 1572 { 1573 uint32_t Value; 1574 }; 1575 } DW35; 1576 1577 // DW36 1578 union 1579 { 1580 struct 1581 { 1582 uint32_t ROI11Weight : MOS_BITFIELD_RANGE( 0,15 ); 1583 uint32_t ROI11Offset : MOS_BITFIELD_RANGE( 16,31 ); 1584 }; 1585 struct 1586 { 1587 uint32_t Value; 1588 }; 1589 } DW36; 1590 1591 // DW37 1592 union 1593 { 1594 struct 1595 { 1596 uint32_t ROI12_X_left : MOS_BITFIELD_RANGE( 0,15 ); 1597 uint32_t ROI12_Y_top : MOS_BITFIELD_RANGE( 16,31 ); 1598 }; 1599 struct 1600 { 1601 uint32_t Value; 1602 }; 1603 } DW37; 1604 1605 // DW38 1606 union 1607 { 1608 struct 1609 { 1610 uint32_t ROI12_X_right : MOS_BITFIELD_RANGE( 0,15 ); 1611 uint32_t ROI12_Y_bottom : MOS_BITFIELD_RANGE( 16,31 ); 1612 }; 1613 struct 1614 { 1615 uint32_t Value; 1616 }; 1617 } DW38; 1618 1619 // DW39 1620 union 1621 { 1622 struct 1623 { 1624 uint32_t ROI12Weight : MOS_BITFIELD_RANGE( 0,15 ); 1625 uint32_t ROI12Offset : MOS_BITFIELD_RANGE( 16,31 ); 1626 }; 1627 struct 1628 { 1629 uint32_t Value; 1630 }; 1631 } DW39; 1632 1633 // DW40 1634 union 1635 { 1636 struct 1637 { 1638 uint32_t ROI13_X_left : MOS_BITFIELD_RANGE( 0,15 ); 1639 uint32_t ROI13_Y_top : MOS_BITFIELD_RANGE( 16,31 ); 1640 }; 1641 struct 1642 { 1643 uint32_t Value; 1644 }; 1645 } DW40; 1646 1647 // DW41 1648 union 1649 { 1650 struct 1651 { 1652 uint32_t ROI13_X_right : MOS_BITFIELD_RANGE( 0,15 ); 1653 uint32_t ROI13_Y_bottom : MOS_BITFIELD_RANGE( 16,31 ); 1654 }; 1655 struct 1656 { 1657 uint32_t Value; 1658 }; 1659 } DW41; 1660 1661 // DW42 1662 union 1663 { 1664 struct 1665 { 1666 uint32_t ROI13Weight : MOS_BITFIELD_RANGE( 0,15 ); 1667 uint32_t ROI13Offset : MOS_BITFIELD_RANGE( 16,31 ); 1668 }; 1669 struct 1670 { 1671 uint32_t Value; 1672 }; 1673 } DW42; 1674 1675 // DW43 1676 union 1677 { 1678 struct 1679 { 1680 uint32_t ROI14_X_left : MOS_BITFIELD_RANGE( 0,15 ); 1681 uint32_t ROI14_Y_top : MOS_BITFIELD_RANGE( 16,31 ); 1682 }; 1683 struct 1684 { 1685 uint32_t Value; 1686 }; 1687 } DW43; 1688 1689 // DW44 1690 union 1691 { 1692 struct 1693 { 1694 uint32_t ROI14_X_right : MOS_BITFIELD_RANGE( 0,15 ); 1695 uint32_t ROI14_Y_bottom : MOS_BITFIELD_RANGE( 16,31 ); 1696 }; 1697 struct 1698 { 1699 uint32_t Value; 1700 }; 1701 } DW44; 1702 1703 // DW45 1704 union 1705 { 1706 struct 1707 { 1708 uint32_t ROI14Weight : MOS_BITFIELD_RANGE( 0,15 ); 1709 uint32_t ROI14Offset : MOS_BITFIELD_RANGE( 16,31 ); 1710 }; 1711 struct 1712 { 1713 uint32_t Value; 1714 }; 1715 } DW45; 1716 1717 // DW46 1718 union 1719 { 1720 struct 1721 { 1722 uint32_t ROI15_X_left : MOS_BITFIELD_RANGE( 0,15 ); 1723 uint32_t ROI15_Y_top : MOS_BITFIELD_RANGE( 16,31 ); 1724 }; 1725 struct 1726 { 1727 uint32_t Value; 1728 }; 1729 } DW46; 1730 1731 // DW47 1732 union 1733 { 1734 struct 1735 { 1736 uint32_t ROI15_X_right : MOS_BITFIELD_RANGE( 0,15 ); 1737 uint32_t ROI15_Y_bottom : MOS_BITFIELD_RANGE( 16,31 ); 1738 }; 1739 struct 1740 { 1741 uint32_t Value; 1742 }; 1743 } DW47; 1744 1745 // DW48 1746 union 1747 { 1748 struct 1749 { 1750 uint32_t ROI15Weight : MOS_BITFIELD_RANGE( 0,15 ); 1751 uint32_t ROI15Offset : MOS_BITFIELD_RANGE( 16,31 ); 1752 }; 1753 struct 1754 { 1755 uint32_t Value; 1756 }; 1757 } DW48; 1758 1759 // DW49 1760 union 1761 { 1762 struct 1763 { 1764 uint32_t InputSurface : MOS_BITFIELD_RANGE( 0,31 ); 1765 }; 1766 struct 1767 { 1768 uint32_t Value; 1769 }; 1770 } DW49; 1771 1772 // DW50 1773 union 1774 { 1775 struct 1776 { 1777 uint32_t OutputSurface : MOS_BITFIELD_RANGE( 0,31 ); 1778 }; 1779 struct 1780 { 1781 uint32_t Value; 1782 }; 1783 } DW50; 1784 1785 } CODECHAL_ENCODE_AVC_WP_CURBE_G9_KBL, *PCODECHAL_ENCODE_AVC_WP_CURBE_G9_KBL; 1786 1787 C_ASSERT(MOS_BYTES_TO_DWORDS(sizeof(CODECHAL_ENCODE_AVC_WP_CURBE_G9_KBL)) == 51); 1788 1789 class CodechalEncodeAvcEncG9Kbl : public CodechalEncodeAvcEncG9 1790 { 1791 public: 1792 1793 //! 1794 //! \brief Get encoder kernel header and kernel size 1795 //! 1796 //! \param [in] binary 1797 //! Pointer to kernel binary 1798 //! \param [in] operation 1799 //! Enc kernel operation 1800 //! \param [in] krnStateIdx 1801 //! Kernel state index 1802 //! \param [out] krnHeader 1803 //! Pointer to kernel header 1804 //! \param [out] krnSize 1805 //! Pointer to kernel size 1806 //! 1807 //! \return MOS_STATUS 1808 //! MOS_STATUS_SUCCESS if success, else fail reason 1809 //! 1810 static MOS_STATUS GetKernelHeaderAndSize( 1811 void *binary, 1812 EncOperation operation, 1813 uint32_t krnStateIdx, 1814 void *krnHeader, 1815 uint32_t *krnSize); 1816 1817 //! 1818 //! \brief Constructor 1819 //! 1820 CodechalEncodeAvcEncG9Kbl( 1821 CodechalHwInterface * hwInterface, 1822 CodechalDebugInterface *debugInterface, 1823 PCODECHAL_STANDARD_INFO standardInfo); 1824 1825 //! 1826 //! \brief Destructor 1827 //! ~CodechalEncodeAvcEncG9Kbl()1828 ~CodechalEncodeAvcEncG9Kbl() {}; 1829 1830 //! 1831 //! \brief Set MbEnc kernel curbe data 1832 //! 1833 //! \param [in] params 1834 //! Pointer to CODECHAL_ENCODE_AVC_MBENC_CURBE_PARAMS 1835 //! 1836 //! \return MOS_STATUS 1837 //! MOS_STATUS_SUCCESS if success, else fail reason 1838 //! 1839 virtual MOS_STATUS SetCurbeAvcMbEnc( 1840 PCODECHAL_ENCODE_AVC_MBENC_CURBE_PARAMS params); 1841 1842 //! 1843 //! \brief Get Trellis Quantization mode/value enable or not. 1844 //! 1845 //! \param [in] params 1846 //! Pointer to CODECHAL_ENCODE_AVC_TQ_INPUT_PARAMS. 1847 //! \param [out] trellisQuantParams 1848 //! Pointer to CODECHAL_ENCODE_AVC_TQ_PARAMS, mode & value setup. 1849 //! 1850 //! \return MOS_STATUS 1851 //! MOS_STATUS_SUCCESS if success, else fail reason 1852 //! 1853 virtual MOS_STATUS GetTrellisQuantization( 1854 PCODECHAL_ENCODE_AVC_TQ_INPUT_PARAMS params, 1855 PCODECHAL_ENCODE_AVC_TQ_PARAMS trellisQuantParams); 1856 1857 //! 1858 //! \brief Initialize brc constant buffer 1859 //! 1860 //! \param [in] params 1861 //! Pointer to CODECHAL_ENCODE_AVC_INIT_BRC_CONSTANT_BUFFER_PARAMS 1862 //! 1863 //! \return MOS_STATUS 1864 //! MOS_STATUS_SUCCESS if success, else fail reason 1865 //! 1866 virtual MOS_STATUS InitBrcConstantBuffer( 1867 PCODECHAL_ENCODE_AVC_INIT_BRC_CONSTANT_BUFFER_PARAMS params); 1868 1869 // state related funcs 1870 //! 1871 //! \brief Initialize encode state 1872 //! 1873 //! \return MOS_STATUS 1874 //! MOS_STATUS_SUCCESS if success, else fail reason 1875 //! 1876 virtual MOS_STATUS InitializeState(); 1877 1878 //! 1879 //! \brief Init MbEnc kernel state 1880 //! 1881 //! \return MOS_STATUS 1882 //! MOS_STATUS_SUCCESS if success, else fail reason 1883 //! 1884 virtual MOS_STATUS InitKernelStateMbEnc(); 1885 1886 //! 1887 //! \brief Init BRC kernel state 1888 //! 1889 //! \return MOS_STATUS 1890 //! MOS_STATUS_SUCCESS if success, else fail reason 1891 //! 1892 virtual MOS_STATUS InitKernelStateBrc(); 1893 1894 //! 1895 //! \brief Init WeightPrediction kernel state 1896 //! 1897 //! \return MOS_STATUS 1898 //! MOS_STATUS_SUCCESS if success, else fail reason 1899 //! 1900 virtual MOS_STATUS SetCurbeAvcWP( 1901 PCODECHAL_ENCODE_AVC_WP_CURBE_PARAMS params); 1902 1903 //! 1904 //! \brief Realize the scene change report 1905 //! \param [in] cmdBuffer 1906 //! Command buffer 1907 //! [in] params 1908 //! Pointer to the CODECHAL_ENCODE_AVC_GENERIC_PICTURE_LEVEL_PARAMS 1909 //! \return MOS_STATUS 1910 //! MOS_STATUS_SUCCESS if success 1911 //! 1912 virtual MOS_STATUS SceneChangeReport( 1913 PMOS_COMMAND_BUFFER cmdBuffer, 1914 PCODECHAL_ENCODE_AVC_GENERIC_PICTURE_LEVEL_PARAMS params); 1915 1916 //! 1917 //! \brief Set Brc InitReset Curbe 1918 //! 1919 //! \param [in] params 1920 //! Pointer to PCODECHAL_ENCODE_AVC_BRC_INIT_RESET_CURBE_PARAMS 1921 //! 1922 //! \return MOS_STATUS 1923 //! MOS_STATUS_SUCCESS if success, else fail reason 1924 //! 1925 virtual MOS_STATUS SetCurbeAvcBrcInitReset( 1926 PCODECHAL_ENCODE_AVC_BRC_INIT_RESET_CURBE_PARAMS params); 1927 1928 //! 1929 //! \brief Set Brc update Curbe 1930 //! 1931 //! \param [in] params 1932 //! Pointer to PCODECHAL_ENCODE_AVC_BRC_UPDATE_CURBE_PARAMS 1933 //! 1934 //! \return MOS_STATUS 1935 //! MOS_STATUS_SUCCESS if success, else fail reason 1936 //! 1937 virtual MOS_STATUS SetCurbeAvcFrameBrcUpdate( 1938 PCODECHAL_ENCODE_AVC_BRC_UPDATE_CURBE_PARAMS params); 1939 1940 //! 1941 //! \brief Set MBBrc update Curbe 1942 //! 1943 //! \param [in] params 1944 //! Pointer to PCODECHAL_ENCODE_AVC_BRC_UPDATE_CURBE_PARAMS 1945 //! 1946 //! \return MOS_STATUS 1947 //! MOS_STATUS_SUCCESS if success, else fail reason 1948 //! 1949 virtual MOS_STATUS SetCurbeAvcMbBrcUpdate( 1950 PCODECHAL_ENCODE_AVC_BRC_UPDATE_CURBE_PARAMS params); 1951 1952 #if USE_CODECHAL_DEBUG_TOOL 1953 protected: 1954 virtual MOS_STATUS PopulateBrcInitParam( 1955 void *cmd); 1956 1957 virtual MOS_STATUS PopulateBrcUpdateParam( 1958 void *cmd); 1959 1960 virtual MOS_STATUS PopulateEncParam( 1961 uint8_t meMethod, 1962 void *cmd); 1963 1964 virtual MOS_STATUS PopulatePakParam( 1965 PMOS_COMMAND_BUFFER cmdBuffer, 1966 PMHW_BATCH_BUFFER secondLevelBatchBuffer); 1967 #endif 1968 1969 private: 1970 static const uint16_t Lambda_data[256]; 1971 static const uint8_t FTQ25[64]; 1972 1973 static const uint32_t MBEnc_CURBE_normal_I_frame[88]; 1974 static const uint32_t MBEnc_CURBE_normal_I_field[88]; 1975 static const uint32_t MBEnc_CURBE_normal_P_frame[88]; 1976 static const uint32_t MBEnc_CURBE_normal_P_field[88]; 1977 static const uint32_t MBEnc_CURBE_normal_B_frame[88]; 1978 static const uint32_t MBEnc_CURBE_normal_B_field[88]; 1979 static const uint32_t MBEnc_CURBE_I_frame_DIST[88]; 1980 static const int32_t BRC_BTCOUNTS[CODECHAL_ENCODE_BRC_IDX_NUM]; 1981 static const int32_t BRC_CURBE_SIZE[CODECHAL_ENCODE_BRC_IDX_NUM]; 1982 }; 1983 1984 #endif // __CODECHAL_ENCODE_AVC_G9_KBL_H__ 1985