1 /* 2 * Copyright (c) 2017-2018, Intel Corporation 3 * 4 * Permission is hereby granted, free of charge, to any person obtaining a 5 * copy of this software and associated documentation files (the "Software"), 6 * to deal in the Software without restriction, including without limitation 7 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 8 * and/or sell copies of the Software, and to permit persons to whom the 9 * Software is furnished to do so, subject to the following conditions: 10 * 11 * The above copyright notice and this permission notice shall be included 12 * in all copies or substantial portions of the Software. 13 * 14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS 15 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 17 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR 18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, 19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 20 * OTHER DEALINGS IN THE SOFTWARE. 21 */ 22 //! 23 //! \file cm_hal_g11.h 24 //! \brief Common HAL CM Gen11 functions 25 //! 26 27 #ifndef _CM_HAL_G11_H_ 28 #define _CM_HAL_G11_H_ 29 30 #include "cm_hal.h" 31 //#include "mhw_render_hwcmd_g8_X.h" 32 33 #define CM_NUM_HW_POLYPHASE_TABLES_G11 17 34 #define CM_NUM_HW_POLYPHASE_EXTRA_TABLES_G11 15 35 36 #define ICL_L3_CONFIG_NUM 9 37 #define CM_THREADSPACE_MAX_COLOR_COUNT_GEN11 256 38 39 #define CM_NS_PER_TICK_RENDER_G11_DEFAULT (83.333) 40 41 // L3 Allocation Control Register 42 static const L3ConfigRegisterValues ICL_L3_PLANE[ ICL_L3_CONFIG_NUM ] = { 43 // URB Rest DC RO Z Color UTC CB Sum (in KB) 44 {0x80000080, 0x0000000D, 0, 0}, // 128 128 0 0 0 0 0 0 256 45 {0x70000080, 0x40804D, 0, 0}, // 128 112 0 0 64 64 0 16 384 46 {0x41C060, 0x40804D, 0, 0}, // 96 0 32 112 64 64 0 16 384 47 {0x2C040, 0x20C04D, 0, 0}, // 64 0 0 176 32 96 0 16 384 48 {0x30000040, 0x81004D, 0, 0}, // 64 48 0 0 128 128 0 16 384 49 {0xC040, 0x8000004D, 0, 0}, // 64 0 0 48 0 0 256 16 384 50 {0xA0000420, 0x0000000D, 0, 0}, // 64 320 0 0 0 0 0 0 384 51 {0xC0000040, 0x4000000D, 0, 0}, // 64 192 0 0 0 0 128 0 384 52 {0xB0000040, 0x4000004D, 0, 0}, // 64 176 0 0 0 0 128 16 384 53 }; 54 55 struct CM_HAL_G11_X:public CM_HAL_GENERIC 56 { 57 58 public: CM_HAL_G11_XCM_HAL_G11_X59 CM_HAL_G11_X(PCM_HAL_STATE cmState): 60 CM_HAL_GENERIC(cmState) {} 61 ~CM_HAL_G11_XCM_HAL_G11_X62 ~CM_HAL_G11_X() {} 63 64 MOS_STATUS GetCopyKernelIsa(void *&isa, uint32_t &isaSize); 65 66 MOS_STATUS GetInitKernelIsa(void *&isa, uint32_t &isaSize); 67 68 MOS_STATUS SetMediaWalkerParams( 69 CM_WALKING_PARAMETERS engineeringParams, 70 PCM_HAL_WALKER_PARAMS walkerParams); 71 72 MOS_STATUS HwSetSurfaceMemoryObjectControl( 73 uint16_t memObjCtl, 74 PRENDERHAL_SURFACE_STATE_PARAMS surfStateParams); 75 76 MOS_STATUS RegisterSampler8x8AVSTable( 77 PCM_HAL_SAMPLER_8X8_TABLE sampler8x8AvsTable, 78 PCM_AVS_TABLE_STATE_PARAMS avsTable); 79 80 MOS_STATUS RegisterSampler8x8( 81 PCM_HAL_SAMPLER_8X8_PARAM param); 82 83 MOS_STATUS SubmitCommands( 84 PMHW_BATCH_BUFFER batchBuffer, 85 int32_t taskId, 86 PCM_HAL_KERNEL_PARAM *kernelParam, 87 void **cmdBuffer); 88 #if (_RELEASE_INTERNAL || _DEBUG) 89 #if defined(CM_DIRECT_GUC_SUPPORT) 90 MOS_STATUS SubmitDummyCommands( 91 PMHW_BATCH_BUFFER batchBuffer, 92 int32_t taskId, 93 PCM_HAL_KERNEL_PARAM *kernelParam, 94 void **cmdBuffer); 95 #endif 96 #endif 97 uint32_t GetMediaWalkerMaxThreadWidth(); 98 uint32_t GetMediaWalkerMaxThreadHeight(); 99 100 MOS_STATUS GetHwSurfaceBTIInfo( 101 PCM_SURFACE_BTI_INFO btiInfo); 102 103 MOS_STATUS SetSuggestedL3Conf( 104 L3_SUGGEST_CONFIG l3Config); 105 106 MOS_STATUS AllocateSIPCSRResource(); 107 108 MOS_STATUS GetGenStepInfo(char*& stepInfoStr); 109 IsScoreboardParamNeededCM_HAL_G11_X110 bool IsScoreboardParamNeeded() { return false; }; 111 IsSupportedVMESurfaceFormatCM_HAL_G11_X112 bool IsSupportedVMESurfaceFormat(MOS_FORMAT format) { 113 bool isColorFormatSupported = false; 114 switch (format) 115 { 116 case Format_NV12: 117 case Format_YUY2: 118 case Format_YUYV: 119 case Format_A8R8G8B8: 120 case Format_P010: 121 case Format_AYUV: 122 case Format_Y210: 123 case Format_Y410: 124 case Format_P208: 125 isColorFormatSupported = true; 126 break; 127 default: 128 CM_ASSERTMESSAGE("Error: color format = %d not supported by VME on Gen11!", format); 129 break; 130 } 131 return isColorFormatSupported; 132 } 133 134 int32_t ColorCountSanityCheck(uint32_t colorCount); 135 136 bool MemoryObjectCtrlPolicyCheck(uint32_t memCtrl); 137 138 int32_t GetConvSamplerIndex( 139 PMHW_SAMPLER_STATE_PARAM samplerParam, 140 char *samplerIndexTable, 141 int32_t nSamp8X8Num, 142 int32_t nSampConvNum); 143 144 MOS_STATUS SetL3CacheConfig( 145 const L3ConfigRegisterValues *values, 146 PCmHalL3Settings cmHalL3Setting); 147 148 MOS_STATUS GetSamplerParamInfoForSamplerType( 149 PMHW_SAMPLER_STATE_PARAM mhwSamplerParam, 150 SamplerParam &samplerParam); 151 152 MOS_STATUS GetExpectedGtSystemConfig( 153 PCM_EXPECTED_GT_SYSTEM_INFO expectedConfig); 154 155 uint64_t ConverTicksToNanoSecondsDefault(uint64_t ticks); 156 157 private: 158 MOS_STATUS UpdatePlatformInfoFromPower( 159 PCM_PLATFORM_INFO platformInfo, 160 bool euSaturated); 161 162 MOS_STATUS SetupHwDebugControl( 163 PRENDERHAL_INTERFACE renderHal, 164 PMOS_COMMAND_BUFFER cmdBuffer); 165 }; 166 167 #endif // _CM_HAL_G11_H_ 168