1 /******************************************************************************* 2 Copyright (c) 2020, NVIDIA CORPORATION. All rights reserved. 3 4 Permission is hereby granted, free of charge, to any person obtaining a 5 copy of this software and associated documentation files (the "Software"), 6 to deal in the Software without restriction, including without limitation 7 the rights to use, copy, modify, merge, publish, distribute, sublicense, 8 and/or sell copies of the Software, and to permit persons to whom the 9 Software is furnished to do so, subject to the following conditions: 10 11 The above copyright notice and this permission notice shall be included in 12 all copies or substantial portions of the Software. 13 14 THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 15 IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 16 FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 17 THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 18 LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING 19 FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER 20 DEALINGS IN THE SOFTWARE. 21 22 *******************************************************************************/ 23 24 #ifndef _cl_ampere_compute_b_h_ 25 #define _cl_ampere_compute_b_h_ 26 27 /* AUTO GENERATED FILE -- DO NOT EDIT */ 28 /* Command: ../../../../class/bin/sw_header.pl ampere_compute_b */ 29 30 #include "nvtypes.h" 31 32 #define AMPERE_COMPUTE_B 0xC7C0 33 34 #define NVC7C0_SET_OBJECT 0x0000 35 #define NVC7C0_SET_OBJECT_CLASS_ID 15:0 36 #define NVC7C0_SET_OBJECT_ENGINE_ID 20:16 37 38 #define NVC7C0_NO_OPERATION 0x0100 39 #define NVC7C0_NO_OPERATION_V 31:0 40 41 #define NVC7C0_SET_NOTIFY_A 0x0104 42 #define NVC7C0_SET_NOTIFY_A_ADDRESS_UPPER 7:0 43 44 #define NVC7C0_SET_NOTIFY_B 0x0108 45 #define NVC7C0_SET_NOTIFY_B_ADDRESS_LOWER 31:0 46 47 #define NVC7C0_NOTIFY 0x010c 48 #define NVC7C0_NOTIFY_TYPE 31:0 49 #define NVC7C0_NOTIFY_TYPE_WRITE_ONLY 0x00000000 50 #define NVC7C0_NOTIFY_TYPE_WRITE_THEN_AWAKEN 0x00000001 51 52 #define NVC7C0_WAIT_FOR_IDLE 0x0110 53 #define NVC7C0_WAIT_FOR_IDLE_V 31:0 54 55 #define NVC7C0_LOAD_MME_INSTRUCTION_RAM_POINTER 0x0114 56 #define NVC7C0_LOAD_MME_INSTRUCTION_RAM_POINTER_V 31:0 57 58 #define NVC7C0_LOAD_MME_INSTRUCTION_RAM 0x0118 59 #define NVC7C0_LOAD_MME_INSTRUCTION_RAM_V 31:0 60 61 #define NVC7C0_LOAD_MME_START_ADDRESS_RAM_POINTER 0x011c 62 #define NVC7C0_LOAD_MME_START_ADDRESS_RAM_POINTER_V 31:0 63 64 #define NVC7C0_LOAD_MME_START_ADDRESS_RAM 0x0120 65 #define NVC7C0_LOAD_MME_START_ADDRESS_RAM_V 31:0 66 67 #define NVC7C0_SET_MME_SHADOW_RAM_CONTROL 0x0124 68 #define NVC7C0_SET_MME_SHADOW_RAM_CONTROL_MODE 1:0 69 #define NVC7C0_SET_MME_SHADOW_RAM_CONTROL_MODE_METHOD_TRACK 0x00000000 70 #define NVC7C0_SET_MME_SHADOW_RAM_CONTROL_MODE_METHOD_TRACK_WITH_FILTER 0x00000001 71 #define NVC7C0_SET_MME_SHADOW_RAM_CONTROL_MODE_METHOD_PASSTHROUGH 0x00000002 72 #define NVC7C0_SET_MME_SHADOW_RAM_CONTROL_MODE_METHOD_REPLAY 0x00000003 73 74 #define NVC7C0_SET_GLOBAL_RENDER_ENABLE_A 0x0130 75 #define NVC7C0_SET_GLOBAL_RENDER_ENABLE_A_OFFSET_UPPER 7:0 76 77 #define NVC7C0_SET_GLOBAL_RENDER_ENABLE_B 0x0134 78 #define NVC7C0_SET_GLOBAL_RENDER_ENABLE_B_OFFSET_LOWER 31:0 79 80 #define NVC7C0_SET_GLOBAL_RENDER_ENABLE_C 0x0138 81 #define NVC7C0_SET_GLOBAL_RENDER_ENABLE_C_MODE 2:0 82 #define NVC7C0_SET_GLOBAL_RENDER_ENABLE_C_MODE_FALSE 0x00000000 83 #define NVC7C0_SET_GLOBAL_RENDER_ENABLE_C_MODE_TRUE 0x00000001 84 #define NVC7C0_SET_GLOBAL_RENDER_ENABLE_C_MODE_CONDITIONAL 0x00000002 85 #define NVC7C0_SET_GLOBAL_RENDER_ENABLE_C_MODE_RENDER_IF_EQUAL 0x00000003 86 #define NVC7C0_SET_GLOBAL_RENDER_ENABLE_C_MODE_RENDER_IF_NOT_EQUAL 0x00000004 87 88 #define NVC7C0_SEND_GO_IDLE 0x013c 89 #define NVC7C0_SEND_GO_IDLE_V 31:0 90 91 #define NVC7C0_PM_TRIGGER 0x0140 92 #define NVC7C0_PM_TRIGGER_V 31:0 93 94 #define NVC7C0_PM_TRIGGER_WFI 0x0144 95 #define NVC7C0_PM_TRIGGER_WFI_V 31:0 96 97 #define NVC7C0_FE_ATOMIC_SEQUENCE_BEGIN 0x0148 98 #define NVC7C0_FE_ATOMIC_SEQUENCE_BEGIN_V 31:0 99 100 #define NVC7C0_FE_ATOMIC_SEQUENCE_END 0x014c 101 #define NVC7C0_FE_ATOMIC_SEQUENCE_END_V 31:0 102 103 #define NVC7C0_SET_INSTRUMENTATION_METHOD_HEADER 0x0150 104 #define NVC7C0_SET_INSTRUMENTATION_METHOD_HEADER_V 31:0 105 106 #define NVC7C0_SET_INSTRUMENTATION_METHOD_DATA 0x0154 107 #define NVC7C0_SET_INSTRUMENTATION_METHOD_DATA_V 31:0 108 109 #define NVC7C0_SET_REPORT_SEMAPHORE_PAYLOAD_LOWER 0x0158 110 #define NVC7C0_SET_REPORT_SEMAPHORE_PAYLOAD_LOWER_PAYLOAD_LOWER 31:0 111 112 #define NVC7C0_SET_REPORT_SEMAPHORE_PAYLOAD_UPPER 0x015c 113 #define NVC7C0_SET_REPORT_SEMAPHORE_PAYLOAD_UPPER_PAYLOAD_UPPER 31:0 114 115 #define NVC7C0_SET_REPORT_SEMAPHORE_ADDRESS_LOWER 0x0160 116 #define NVC7C0_SET_REPORT_SEMAPHORE_ADDRESS_LOWER_LOWER 31:0 117 118 #define NVC7C0_SET_REPORT_SEMAPHORE_ADDRESS_UPPER 0x0164 119 #define NVC7C0_SET_REPORT_SEMAPHORE_ADDRESS_UPPER_UPPER 7:0 120 121 #define NVC7C0_REPORT_SEMAPHORE_EXECUTE 0x0168 122 #define NVC7C0_REPORT_SEMAPHORE_EXECUTE_OPERATION 1:0 123 #define NVC7C0_REPORT_SEMAPHORE_EXECUTE_OPERATION_RELEASE 0x00000000 124 #define NVC7C0_REPORT_SEMAPHORE_EXECUTE_OPERATION_ACQUIRE 0x00000001 125 #define NVC7C0_REPORT_SEMAPHORE_EXECUTE_OPERATION_REPORT_ONLY 0x00000002 126 #define NVC7C0_REPORT_SEMAPHORE_EXECUTE_OPERATION_TRAP 0x00000003 127 #define NVC7C0_REPORT_SEMAPHORE_EXECUTE_AWAKEN_ENABLE 2:2 128 #define NVC7C0_REPORT_SEMAPHORE_EXECUTE_AWAKEN_ENABLE_FALSE 0x00000000 129 #define NVC7C0_REPORT_SEMAPHORE_EXECUTE_AWAKEN_ENABLE_TRUE 0x00000001 130 #define NVC7C0_REPORT_SEMAPHORE_EXECUTE_STRUCTURE_SIZE 4:3 131 #define NVC7C0_REPORT_SEMAPHORE_EXECUTE_STRUCTURE_SIZE_SEMAPHORE_FOUR_WORDS 0x00000000 132 #define NVC7C0_REPORT_SEMAPHORE_EXECUTE_STRUCTURE_SIZE_SEMAPHORE_ONE_WORD 0x00000001 133 #define NVC7C0_REPORT_SEMAPHORE_EXECUTE_STRUCTURE_SIZE_SEMAPHORE_TWO_WORDS 0x00000002 134 #define NVC7C0_REPORT_SEMAPHORE_EXECUTE_FLUSH_DISABLE 5:5 135 #define NVC7C0_REPORT_SEMAPHORE_EXECUTE_FLUSH_DISABLE_FALSE 0x00000000 136 #define NVC7C0_REPORT_SEMAPHORE_EXECUTE_FLUSH_DISABLE_TRUE 0x00000001 137 #define NVC7C0_REPORT_SEMAPHORE_EXECUTE_REDUCTION_ENABLE 6:6 138 #define NVC7C0_REPORT_SEMAPHORE_EXECUTE_REDUCTION_ENABLE_FALSE 0x00000000 139 #define NVC7C0_REPORT_SEMAPHORE_EXECUTE_REDUCTION_ENABLE_TRUE 0x00000001 140 #define NVC7C0_REPORT_SEMAPHORE_EXECUTE_REDUCTION_OP 9:7 141 #define NVC7C0_REPORT_SEMAPHORE_EXECUTE_REDUCTION_OP_RED_ADD 0x00000000 142 #define NVC7C0_REPORT_SEMAPHORE_EXECUTE_REDUCTION_OP_RED_MIN 0x00000001 143 #define NVC7C0_REPORT_SEMAPHORE_EXECUTE_REDUCTION_OP_RED_MAX 0x00000002 144 #define NVC7C0_REPORT_SEMAPHORE_EXECUTE_REDUCTION_OP_RED_INC 0x00000003 145 #define NVC7C0_REPORT_SEMAPHORE_EXECUTE_REDUCTION_OP_RED_DEC 0x00000004 146 #define NVC7C0_REPORT_SEMAPHORE_EXECUTE_REDUCTION_OP_RED_AND 0x00000005 147 #define NVC7C0_REPORT_SEMAPHORE_EXECUTE_REDUCTION_OP_RED_OR 0x00000006 148 #define NVC7C0_REPORT_SEMAPHORE_EXECUTE_REDUCTION_OP_RED_XOR 0x00000007 149 #define NVC7C0_REPORT_SEMAPHORE_EXECUTE_REDUCTION_FORMAT 11:10 150 #define NVC7C0_REPORT_SEMAPHORE_EXECUTE_REDUCTION_FORMAT_UNSIGNED 0x00000000 151 #define NVC7C0_REPORT_SEMAPHORE_EXECUTE_REDUCTION_FORMAT_SIGNED 0x00000001 152 #define NVC7C0_REPORT_SEMAPHORE_EXECUTE_PAYLOAD_SIZE64 12:12 153 #define NVC7C0_REPORT_SEMAPHORE_EXECUTE_PAYLOAD_SIZE64_FALSE 0x00000000 154 #define NVC7C0_REPORT_SEMAPHORE_EXECUTE_PAYLOAD_SIZE64_TRUE 0x00000001 155 #define NVC7C0_REPORT_SEMAPHORE_EXECUTE_TRAP_TYPE 14:13 156 #define NVC7C0_REPORT_SEMAPHORE_EXECUTE_TRAP_TYPE_TRAP_NONE 0x00000000 157 #define NVC7C0_REPORT_SEMAPHORE_EXECUTE_TRAP_TYPE_TRAP_UNCONDITIONAL 0x00000001 158 #define NVC7C0_REPORT_SEMAPHORE_EXECUTE_TRAP_TYPE_TRAP_CONDITIONAL 0x00000002 159 #define NVC7C0_REPORT_SEMAPHORE_EXECUTE_TRAP_TYPE_TRAP_CONDITIONAL_EXT 0x00000003 160 161 #define NVC7C0_LINE_LENGTH_IN 0x0180 162 #define NVC7C0_LINE_LENGTH_IN_VALUE 31:0 163 164 #define NVC7C0_LINE_COUNT 0x0184 165 #define NVC7C0_LINE_COUNT_VALUE 31:0 166 167 #define NVC7C0_OFFSET_OUT_UPPER 0x0188 168 #define NVC7C0_OFFSET_OUT_UPPER_VALUE 16:0 169 170 #define NVC7C0_OFFSET_OUT 0x018c 171 #define NVC7C0_OFFSET_OUT_VALUE 31:0 172 173 #define NVC7C0_PITCH_OUT 0x0190 174 #define NVC7C0_PITCH_OUT_VALUE 31:0 175 176 #define NVC7C0_SET_DST_BLOCK_SIZE 0x0194 177 #define NVC7C0_SET_DST_BLOCK_SIZE_WIDTH 3:0 178 #define NVC7C0_SET_DST_BLOCK_SIZE_WIDTH_ONE_GOB 0x00000000 179 #define NVC7C0_SET_DST_BLOCK_SIZE_HEIGHT 7:4 180 #define NVC7C0_SET_DST_BLOCK_SIZE_HEIGHT_ONE_GOB 0x00000000 181 #define NVC7C0_SET_DST_BLOCK_SIZE_HEIGHT_TWO_GOBS 0x00000001 182 #define NVC7C0_SET_DST_BLOCK_SIZE_HEIGHT_FOUR_GOBS 0x00000002 183 #define NVC7C0_SET_DST_BLOCK_SIZE_HEIGHT_EIGHT_GOBS 0x00000003 184 #define NVC7C0_SET_DST_BLOCK_SIZE_HEIGHT_SIXTEEN_GOBS 0x00000004 185 #define NVC7C0_SET_DST_BLOCK_SIZE_HEIGHT_THIRTYTWO_GOBS 0x00000005 186 #define NVC7C0_SET_DST_BLOCK_SIZE_DEPTH 11:8 187 #define NVC7C0_SET_DST_BLOCK_SIZE_DEPTH_ONE_GOB 0x00000000 188 #define NVC7C0_SET_DST_BLOCK_SIZE_DEPTH_TWO_GOBS 0x00000001 189 #define NVC7C0_SET_DST_BLOCK_SIZE_DEPTH_FOUR_GOBS 0x00000002 190 #define NVC7C0_SET_DST_BLOCK_SIZE_DEPTH_EIGHT_GOBS 0x00000003 191 #define NVC7C0_SET_DST_BLOCK_SIZE_DEPTH_SIXTEEN_GOBS 0x00000004 192 #define NVC7C0_SET_DST_BLOCK_SIZE_DEPTH_THIRTYTWO_GOBS 0x00000005 193 194 #define NVC7C0_SET_DST_WIDTH 0x0198 195 #define NVC7C0_SET_DST_WIDTH_V 31:0 196 197 #define NVC7C0_SET_DST_HEIGHT 0x019c 198 #define NVC7C0_SET_DST_HEIGHT_V 31:0 199 200 #define NVC7C0_SET_DST_DEPTH 0x01a0 201 #define NVC7C0_SET_DST_DEPTH_V 31:0 202 203 #define NVC7C0_SET_DST_LAYER 0x01a4 204 #define NVC7C0_SET_DST_LAYER_V 31:0 205 206 #define NVC7C0_SET_DST_ORIGIN_BYTES_X 0x01a8 207 #define NVC7C0_SET_DST_ORIGIN_BYTES_X_V 20:0 208 209 #define NVC7C0_SET_DST_ORIGIN_SAMPLES_Y 0x01ac 210 #define NVC7C0_SET_DST_ORIGIN_SAMPLES_Y_V 16:0 211 212 #define NVC7C0_LAUNCH_DMA 0x01b0 213 #define NVC7C0_LAUNCH_DMA_DST_MEMORY_LAYOUT 0:0 214 #define NVC7C0_LAUNCH_DMA_DST_MEMORY_LAYOUT_BLOCKLINEAR 0x00000000 215 #define NVC7C0_LAUNCH_DMA_DST_MEMORY_LAYOUT_PITCH 0x00000001 216 #define NVC7C0_LAUNCH_DMA_COMPLETION_TYPE 5:4 217 #define NVC7C0_LAUNCH_DMA_COMPLETION_TYPE_FLUSH_DISABLE 0x00000000 218 #define NVC7C0_LAUNCH_DMA_COMPLETION_TYPE_FLUSH_ONLY 0x00000001 219 #define NVC7C0_LAUNCH_DMA_COMPLETION_TYPE_RELEASE_SEMAPHORE 0x00000002 220 #define NVC7C0_LAUNCH_DMA_INTERRUPT_TYPE 9:8 221 #define NVC7C0_LAUNCH_DMA_INTERRUPT_TYPE_NONE 0x00000000 222 #define NVC7C0_LAUNCH_DMA_INTERRUPT_TYPE_INTERRUPT 0x00000001 223 #define NVC7C0_LAUNCH_DMA_SEMAPHORE_STRUCT_SIZE 12:12 224 #define NVC7C0_LAUNCH_DMA_SEMAPHORE_STRUCT_SIZE_FOUR_WORDS 0x00000000 225 #define NVC7C0_LAUNCH_DMA_SEMAPHORE_STRUCT_SIZE_ONE_WORD 0x00000001 226 #define NVC7C0_LAUNCH_DMA_REDUCTION_ENABLE 1:1 227 #define NVC7C0_LAUNCH_DMA_REDUCTION_ENABLE_FALSE 0x00000000 228 #define NVC7C0_LAUNCH_DMA_REDUCTION_ENABLE_TRUE 0x00000001 229 #define NVC7C0_LAUNCH_DMA_REDUCTION_OP 15:13 230 #define NVC7C0_LAUNCH_DMA_REDUCTION_OP_RED_ADD 0x00000000 231 #define NVC7C0_LAUNCH_DMA_REDUCTION_OP_RED_MIN 0x00000001 232 #define NVC7C0_LAUNCH_DMA_REDUCTION_OP_RED_MAX 0x00000002 233 #define NVC7C0_LAUNCH_DMA_REDUCTION_OP_RED_INC 0x00000003 234 #define NVC7C0_LAUNCH_DMA_REDUCTION_OP_RED_DEC 0x00000004 235 #define NVC7C0_LAUNCH_DMA_REDUCTION_OP_RED_AND 0x00000005 236 #define NVC7C0_LAUNCH_DMA_REDUCTION_OP_RED_OR 0x00000006 237 #define NVC7C0_LAUNCH_DMA_REDUCTION_OP_RED_XOR 0x00000007 238 #define NVC7C0_LAUNCH_DMA_REDUCTION_FORMAT 3:2 239 #define NVC7C0_LAUNCH_DMA_REDUCTION_FORMAT_UNSIGNED_32 0x00000000 240 #define NVC7C0_LAUNCH_DMA_REDUCTION_FORMAT_SIGNED_32 0x00000001 241 #define NVC7C0_LAUNCH_DMA_SYSMEMBAR_DISABLE 6:6 242 #define NVC7C0_LAUNCH_DMA_SYSMEMBAR_DISABLE_FALSE 0x00000000 243 #define NVC7C0_LAUNCH_DMA_SYSMEMBAR_DISABLE_TRUE 0x00000001 244 245 #define NVC7C0_LOAD_INLINE_DATA 0x01b4 246 #define NVC7C0_LOAD_INLINE_DATA_V 31:0 247 248 #define NVC7C0_SET_I2M_SEMAPHORE_A 0x01dc 249 #define NVC7C0_SET_I2M_SEMAPHORE_A_OFFSET_UPPER 7:0 250 251 #define NVC7C0_SET_I2M_SEMAPHORE_B 0x01e0 252 #define NVC7C0_SET_I2M_SEMAPHORE_B_OFFSET_LOWER 31:0 253 254 #define NVC7C0_SET_I2M_SEMAPHORE_C 0x01e4 255 #define NVC7C0_SET_I2M_SEMAPHORE_C_PAYLOAD 31:0 256 257 #define NVC7C0_SET_SM_SCG_CONTROL 0x01e8 258 #define NVC7C0_SET_SM_SCG_CONTROL_COMPUTE_IN_GRAPHICS 0:0 259 #define NVC7C0_SET_SM_SCG_CONTROL_COMPUTE_IN_GRAPHICS_FALSE 0x00000000 260 #define NVC7C0_SET_SM_SCG_CONTROL_COMPUTE_IN_GRAPHICS_TRUE 0x00000001 261 262 #define NVC7C0_SET_MME_SWITCH_STATE 0x01ec 263 #define NVC7C0_SET_MME_SWITCH_STATE_VALID 0:0 264 #define NVC7C0_SET_MME_SWITCH_STATE_VALID_FALSE 0x00000000 265 #define NVC7C0_SET_MME_SWITCH_STATE_VALID_TRUE 0x00000001 266 #define NVC7C0_SET_MME_SWITCH_STATE_SAVE_MACRO 11:4 267 #define NVC7C0_SET_MME_SWITCH_STATE_RESTORE_MACRO 19:12 268 269 #define NVC7C0_SET_I2M_SPARE_NOOP00 0x01f0 270 #define NVC7C0_SET_I2M_SPARE_NOOP00_V 31:0 271 272 #define NVC7C0_SET_I2M_SPARE_NOOP01 0x01f4 273 #define NVC7C0_SET_I2M_SPARE_NOOP01_V 31:0 274 275 #define NVC7C0_SET_I2M_SPARE_NOOP02 0x01f8 276 #define NVC7C0_SET_I2M_SPARE_NOOP02_V 31:0 277 278 #define NVC7C0_SET_I2M_SPARE_NOOP03 0x01fc 279 #define NVC7C0_SET_I2M_SPARE_NOOP03_V 31:0 280 281 #define NVC7C0_SET_VALID_SPAN_OVERFLOW_AREA_A 0x0200 282 #define NVC7C0_SET_VALID_SPAN_OVERFLOW_AREA_A_ADDRESS_UPPER 7:0 283 284 #define NVC7C0_SET_VALID_SPAN_OVERFLOW_AREA_B 0x0204 285 #define NVC7C0_SET_VALID_SPAN_OVERFLOW_AREA_B_ADDRESS_LOWER 31:0 286 287 #define NVC7C0_SET_VALID_SPAN_OVERFLOW_AREA_C 0x0208 288 #define NVC7C0_SET_VALID_SPAN_OVERFLOW_AREA_C_SIZE 31:0 289 290 #define NVC7C0_PERFMON_TRANSFER 0x0210 291 #define NVC7C0_PERFMON_TRANSFER_V 31:0 292 293 #define NVC7C0_SET_QMD_VIRTUALIZATION_BASE_A 0x0214 294 #define NVC7C0_SET_QMD_VIRTUALIZATION_BASE_A_ADDRESS_UPPER 7:0 295 296 #define NVC7C0_SET_QMD_VIRTUALIZATION_BASE_B 0x0218 297 #define NVC7C0_SET_QMD_VIRTUALIZATION_BASE_B_ADDRESS_LOWER 31:0 298 299 #define NVC7C0_INVALIDATE_SHADER_CACHES 0x021c 300 #define NVC7C0_INVALIDATE_SHADER_CACHES_INSTRUCTION 0:0 301 #define NVC7C0_INVALIDATE_SHADER_CACHES_INSTRUCTION_FALSE 0x00000000 302 #define NVC7C0_INVALIDATE_SHADER_CACHES_INSTRUCTION_TRUE 0x00000001 303 #define NVC7C0_INVALIDATE_SHADER_CACHES_DATA 4:4 304 #define NVC7C0_INVALIDATE_SHADER_CACHES_DATA_FALSE 0x00000000 305 #define NVC7C0_INVALIDATE_SHADER_CACHES_DATA_TRUE 0x00000001 306 #define NVC7C0_INVALIDATE_SHADER_CACHES_CONSTANT 12:12 307 #define NVC7C0_INVALIDATE_SHADER_CACHES_CONSTANT_FALSE 0x00000000 308 #define NVC7C0_INVALIDATE_SHADER_CACHES_CONSTANT_TRUE 0x00000001 309 #define NVC7C0_INVALIDATE_SHADER_CACHES_LOCKS 1:1 310 #define NVC7C0_INVALIDATE_SHADER_CACHES_LOCKS_FALSE 0x00000000 311 #define NVC7C0_INVALIDATE_SHADER_CACHES_LOCKS_TRUE 0x00000001 312 #define NVC7C0_INVALIDATE_SHADER_CACHES_FLUSH_DATA 2:2 313 #define NVC7C0_INVALIDATE_SHADER_CACHES_FLUSH_DATA_FALSE 0x00000000 314 #define NVC7C0_INVALIDATE_SHADER_CACHES_FLUSH_DATA_TRUE 0x00000001 315 316 #define NVC7C0_SET_RESERVED_SW_METHOD00 0x0220 317 #define NVC7C0_SET_RESERVED_SW_METHOD00_V 31:0 318 319 #define NVC7C0_SET_RESERVED_SW_METHOD01 0x0224 320 #define NVC7C0_SET_RESERVED_SW_METHOD01_V 31:0 321 322 #define NVC7C0_SET_RESERVED_SW_METHOD02 0x0228 323 #define NVC7C0_SET_RESERVED_SW_METHOD02_V 31:0 324 325 #define NVC7C0_SET_RESERVED_SW_METHOD03 0x022c 326 #define NVC7C0_SET_RESERVED_SW_METHOD03_V 31:0 327 328 #define NVC7C0_SET_RESERVED_SW_METHOD04 0x0230 329 #define NVC7C0_SET_RESERVED_SW_METHOD04_V 31:0 330 331 #define NVC7C0_SET_RESERVED_SW_METHOD05 0x0234 332 #define NVC7C0_SET_RESERVED_SW_METHOD05_V 31:0 333 334 #define NVC7C0_SET_RESERVED_SW_METHOD06 0x0238 335 #define NVC7C0_SET_RESERVED_SW_METHOD06_V 31:0 336 337 #define NVC7C0_SET_RESERVED_SW_METHOD07 0x023c 338 #define NVC7C0_SET_RESERVED_SW_METHOD07_V 31:0 339 340 #define NVC7C0_INVALIDATE_TEXTURE_HEADER_CACHE_NO_WFI 0x0244 341 #define NVC7C0_INVALIDATE_TEXTURE_HEADER_CACHE_NO_WFI_LINES 0:0 342 #define NVC7C0_INVALIDATE_TEXTURE_HEADER_CACHE_NO_WFI_LINES_ALL 0x00000000 343 #define NVC7C0_INVALIDATE_TEXTURE_HEADER_CACHE_NO_WFI_LINES_ONE 0x00000001 344 #define NVC7C0_INVALIDATE_TEXTURE_HEADER_CACHE_NO_WFI_TAG 25:4 345 346 #define NVC7C0_SET_CWD_REF_COUNTER 0x0248 347 #define NVC7C0_SET_CWD_REF_COUNTER_SELECT 5:0 348 #define NVC7C0_SET_CWD_REF_COUNTER_VALUE 23:8 349 350 #define NVC7C0_SET_RESERVED_SW_METHOD08 0x024c 351 #define NVC7C0_SET_RESERVED_SW_METHOD08_V 31:0 352 353 #define NVC7C0_SET_RESERVED_SW_METHOD09 0x0250 354 #define NVC7C0_SET_RESERVED_SW_METHOD09_V 31:0 355 356 #define NVC7C0_SET_RESERVED_SW_METHOD10 0x0254 357 #define NVC7C0_SET_RESERVED_SW_METHOD10_V 31:0 358 359 #define NVC7C0_SET_RESERVED_SW_METHOD11 0x0258 360 #define NVC7C0_SET_RESERVED_SW_METHOD11_V 31:0 361 362 #define NVC7C0_SET_RESERVED_SW_METHOD12 0x025c 363 #define NVC7C0_SET_RESERVED_SW_METHOD12_V 31:0 364 365 #define NVC7C0_SET_RESERVED_SW_METHOD13 0x0260 366 #define NVC7C0_SET_RESERVED_SW_METHOD13_V 31:0 367 368 #define NVC7C0_SET_RESERVED_SW_METHOD14 0x0264 369 #define NVC7C0_SET_RESERVED_SW_METHOD14_V 31:0 370 371 #define NVC7C0_SET_RESERVED_SW_METHOD15 0x0268 372 #define NVC7C0_SET_RESERVED_SW_METHOD15_V 31:0 373 374 #define NVC7C0_SET_SCG_CONTROL 0x0270 375 #define NVC7C0_SET_SCG_CONTROL_COMPUTE1_MAX_SM_COUNT 8:0 376 #define NVC7C0_SET_SCG_CONTROL_COMPUTE1_MIN_SM_COUNT 20:12 377 #define NVC7C0_SET_SCG_CONTROL_DISABLE_COMPUTE1_LIMIT_IN_ALL_COMPUTE 24:24 378 #define NVC7C0_SET_SCG_CONTROL_DISABLE_COMPUTE1_LIMIT_IN_ALL_COMPUTE_FALSE 0x00000000 379 #define NVC7C0_SET_SCG_CONTROL_DISABLE_COMPUTE1_LIMIT_IN_ALL_COMPUTE_TRUE 0x00000001 380 381 #define NVC7C0_SET_COMPUTE_CLASS_VERSION 0x0280 382 #define NVC7C0_SET_COMPUTE_CLASS_VERSION_CURRENT 15:0 383 #define NVC7C0_SET_COMPUTE_CLASS_VERSION_OLDEST_SUPPORTED 31:16 384 385 #define NVC7C0_CHECK_COMPUTE_CLASS_VERSION 0x0284 386 #define NVC7C0_CHECK_COMPUTE_CLASS_VERSION_CURRENT 15:0 387 #define NVC7C0_CHECK_COMPUTE_CLASS_VERSION_OLDEST_SUPPORTED 31:16 388 389 #define NVC7C0_SET_QMD_VERSION 0x0288 390 #define NVC7C0_SET_QMD_VERSION_CURRENT 15:0 391 #define NVC7C0_SET_QMD_VERSION_OLDEST_SUPPORTED 31:16 392 393 #define NVC7C0_CHECK_QMD_VERSION 0x0290 394 #define NVC7C0_CHECK_QMD_VERSION_CURRENT 15:0 395 #define NVC7C0_CHECK_QMD_VERSION_OLDEST_SUPPORTED 31:16 396 397 #define NVC7C0_INVALIDATE_SKED_CACHES 0x0298 398 #define NVC7C0_INVALIDATE_SKED_CACHES_V 0:0 399 400 #define NVC7C0_SET_QMD_VIRTUALIZATION_CONTROL 0x029c 401 #define NVC7C0_SET_QMD_VIRTUALIZATION_CONTROL_CONSTANT_BUFFER_MASK 7:0 402 #define NVC7C0_SET_QMD_VIRTUALIZATION_CONTROL_I2M_ADDR_ENABLE 8:8 403 #define NVC7C0_SET_QMD_VIRTUALIZATION_CONTROL_I2M_ADDR_ENABLE_FALSE 0x00000000 404 #define NVC7C0_SET_QMD_VIRTUALIZATION_CONTROL_I2M_ADDR_ENABLE_TRUE 0x00000001 405 #define NVC7C0_SET_QMD_VIRTUALIZATION_CONTROL_I2M_CONSTANT_BUFFER_ENABLE 12:12 406 #define NVC7C0_SET_QMD_VIRTUALIZATION_CONTROL_I2M_CONSTANT_BUFFER_ENABLE_FALSE 0x00000000 407 #define NVC7C0_SET_QMD_VIRTUALIZATION_CONTROL_I2M_CONSTANT_BUFFER_ENABLE_TRUE 0x00000001 408 #define NVC7C0_SET_QMD_VIRTUALIZATION_CONTROL_I2M_DEPENDENT_ENABLE 9:9 409 #define NVC7C0_SET_QMD_VIRTUALIZATION_CONTROL_I2M_DEPENDENT_ENABLE_FALSE 0x00000000 410 #define NVC7C0_SET_QMD_VIRTUALIZATION_CONTROL_I2M_DEPENDENT_ENABLE_TRUE 0x00000001 411 #define NVC7C0_SET_QMD_VIRTUALIZATION_CONTROL_IQ2M_ADDR_ENABLE 16:16 412 #define NVC7C0_SET_QMD_VIRTUALIZATION_CONTROL_IQ2M_ADDR_ENABLE_FALSE 0x00000000 413 #define NVC7C0_SET_QMD_VIRTUALIZATION_CONTROL_IQ2M_ADDR_ENABLE_TRUE 0x00000001 414 #define NVC7C0_SET_QMD_VIRTUALIZATION_CONTROL_IQ2M_CONSTANT_BUFFER_ENABLE 20:20 415 #define NVC7C0_SET_QMD_VIRTUALIZATION_CONTROL_IQ2M_CONSTANT_BUFFER_ENABLE_FALSE 0x00000000 416 #define NVC7C0_SET_QMD_VIRTUALIZATION_CONTROL_IQ2M_CONSTANT_BUFFER_ENABLE_TRUE 0x00000001 417 #define NVC7C0_SET_QMD_VIRTUALIZATION_CONTROL_IQ2M_DEPENDENT_ENABLE 10:10 418 #define NVC7C0_SET_QMD_VIRTUALIZATION_CONTROL_IQ2M_DEPENDENT_ENABLE_FALSE 0x00000000 419 #define NVC7C0_SET_QMD_VIRTUALIZATION_CONTROL_IQ2M_DEPENDENT_ENABLE_TRUE 0x00000001 420 #define NVC7C0_SET_QMD_VIRTUALIZATION_CONTROL_SEND_PCAS_ENABLE 24:24 421 #define NVC7C0_SET_QMD_VIRTUALIZATION_CONTROL_SEND_PCAS_ENABLE_FALSE 0x00000000 422 #define NVC7C0_SET_QMD_VIRTUALIZATION_CONTROL_SEND_PCAS_ENABLE_TRUE 0x00000001 423 424 #define NVC7C0_SET_SHADER_SHARED_MEMORY_WINDOW_A 0x02a0 425 #define NVC7C0_SET_SHADER_SHARED_MEMORY_WINDOW_A_BASE_ADDRESS_UPPER 16:0 426 427 #define NVC7C0_SET_SHADER_SHARED_MEMORY_WINDOW_B 0x02a4 428 #define NVC7C0_SET_SHADER_SHARED_MEMORY_WINDOW_B_BASE_ADDRESS 31:0 429 430 #define NVC7C0_SCG_HYSTERESIS_CONTROL 0x02a8 431 #define NVC7C0_SCG_HYSTERESIS_CONTROL_USE_TIMEOUT_ONCE 0:0 432 #define NVC7C0_SCG_HYSTERESIS_CONTROL_USE_TIMEOUT_ONCE_FALSE 0x00000000 433 #define NVC7C0_SCG_HYSTERESIS_CONTROL_USE_TIMEOUT_ONCE_TRUE 0x00000001 434 #define NVC7C0_SCG_HYSTERESIS_CONTROL_USE_NULL_TIMEOUT_ONCE 1:1 435 #define NVC7C0_SCG_HYSTERESIS_CONTROL_USE_NULL_TIMEOUT_ONCE_FALSE 0x00000000 436 #define NVC7C0_SCG_HYSTERESIS_CONTROL_USE_NULL_TIMEOUT_ONCE_TRUE 0x00000001 437 438 #define NVC7C0_SET_CWD_SLOT_COUNT 0x02b0 439 #define NVC7C0_SET_CWD_SLOT_COUNT_V 7:0 440 441 #define NVC7C0_SEND_PCAS_A 0x02b4 442 #define NVC7C0_SEND_PCAS_A_QMD_ADDRESS_SHIFTED8 31:0 443 444 #define NVC7C0_SEND_PCAS_B 0x02b8 445 #define NVC7C0_SEND_PCAS_B_FROM 23:0 446 #define NVC7C0_SEND_PCAS_B_DELTA 31:24 447 448 #define NVC7C0_SEND_SIGNALING_PCAS_B 0x02bc 449 #define NVC7C0_SEND_SIGNALING_PCAS_B_INVALIDATE 0:0 450 #define NVC7C0_SEND_SIGNALING_PCAS_B_INVALIDATE_FALSE 0x00000000 451 #define NVC7C0_SEND_SIGNALING_PCAS_B_INVALIDATE_TRUE 0x00000001 452 #define NVC7C0_SEND_SIGNALING_PCAS_B_SCHEDULE 1:1 453 #define NVC7C0_SEND_SIGNALING_PCAS_B_SCHEDULE_FALSE 0x00000000 454 #define NVC7C0_SEND_SIGNALING_PCAS_B_SCHEDULE_TRUE 0x00000001 455 456 #define NVC7C0_SEND_SIGNALING_PCAS2_B 0x02c0 457 #define NVC7C0_SEND_SIGNALING_PCAS2_B_PCAS_ACTION 3:0 458 #define NVC7C0_SEND_SIGNALING_PCAS2_B_PCAS_ACTION_NOP 0x00000000 459 #define NVC7C0_SEND_SIGNALING_PCAS2_B_PCAS_ACTION_INVALIDATE 0x00000001 460 #define NVC7C0_SEND_SIGNALING_PCAS2_B_PCAS_ACTION_SCHEDULE 0x00000002 461 #define NVC7C0_SEND_SIGNALING_PCAS2_B_PCAS_ACTION_INVALIDATE_COPY_SCHEDULE 0x00000003 462 #define NVC7C0_SEND_SIGNALING_PCAS2_B_PCAS_ACTION_INCREMENT_PUT 0x00000006 463 #define NVC7C0_SEND_SIGNALING_PCAS2_B_PCAS_ACTION_DECREMENT_DEPENDENCE 0x00000007 464 #define NVC7C0_SEND_SIGNALING_PCAS2_B_PCAS_ACTION_PREFETCH 0x00000008 465 #define NVC7C0_SEND_SIGNALING_PCAS2_B_PCAS_ACTION_PREFETCH_SCHEDULE 0x00000009 466 #define NVC7C0_SEND_SIGNALING_PCAS2_B_PCAS_ACTION_INVALIDATE_PREFETCH_COPY_SCHEDULE 0x0000000A 467 #define NVC7C0_SEND_SIGNALING_PCAS2_B_PCAS_ACTION_INVALIDATE_PREFETCH_COPY_FORCE_REQUIRE_SCHEDULING 0x0000000B 468 #define NVC7C0_SEND_SIGNALING_PCAS2_B_PCAS_ACTION_INCREMENT_DEPENDENCE 0x0000000C 469 #define NVC7C0_SEND_SIGNALING_PCAS2_B_PCAS_ACTION_INCREMENT_CWD_REF_COUNTER 0x0000000D 470 #define NVC7C0_SEND_SIGNALING_PCAS2_B_SELECT 13:8 471 #define NVC7C0_SEND_SIGNALING_PCAS2_B_OFFSET_MINUS_ONE 23:14 472 473 #define NVC7C0_SET_SKED_CACHE_CONTROL 0x02cc 474 #define NVC7C0_SET_SKED_CACHE_CONTROL_IGNORE_VEID 0:0 475 #define NVC7C0_SET_SKED_CACHE_CONTROL_IGNORE_VEID_FALSE 0x00000000 476 #define NVC7C0_SET_SKED_CACHE_CONTROL_IGNORE_VEID_TRUE 0x00000001 477 478 #define NVC7C0_SET_SHADER_LOCAL_MEMORY_NON_THROTTLED_A 0x02e4 479 #define NVC7C0_SET_SHADER_LOCAL_MEMORY_NON_THROTTLED_A_SIZE_UPPER 7:0 480 481 #define NVC7C0_SET_SHADER_LOCAL_MEMORY_NON_THROTTLED_B 0x02e8 482 #define NVC7C0_SET_SHADER_LOCAL_MEMORY_NON_THROTTLED_B_SIZE_LOWER 31:0 483 484 #define NVC7C0_SET_SHADER_LOCAL_MEMORY_NON_THROTTLED_C 0x02ec 485 #define NVC7C0_SET_SHADER_LOCAL_MEMORY_NON_THROTTLED_C_MAX_SM_COUNT 8:0 486 487 #define NVC7C0_SET_SPA_VERSION 0x0310 488 #define NVC7C0_SET_SPA_VERSION_MINOR 7:0 489 #define NVC7C0_SET_SPA_VERSION_MAJOR 15:8 490 491 #define NVC7C0_SET_INLINE_QMD_ADDRESS_A 0x0318 492 #define NVC7C0_SET_INLINE_QMD_ADDRESS_A_QMD_ADDRESS_SHIFTED8_UPPER 31:0 493 494 #define NVC7C0_SET_INLINE_QMD_ADDRESS_B 0x031c 495 #define NVC7C0_SET_INLINE_QMD_ADDRESS_B_QMD_ADDRESS_SHIFTED8_LOWER 31:0 496 497 #define NVC7C0_LOAD_INLINE_QMD_DATA(i) (0x0320+(i)*4) 498 #define NVC7C0_LOAD_INLINE_QMD_DATA_V 31:0 499 500 #define NVC7C0_SET_FALCON00 0x0500 501 #define NVC7C0_SET_FALCON00_V 31:0 502 503 #define NVC7C0_SET_FALCON01 0x0504 504 #define NVC7C0_SET_FALCON01_V 31:0 505 506 #define NVC7C0_SET_FALCON02 0x0508 507 #define NVC7C0_SET_FALCON02_V 31:0 508 509 #define NVC7C0_SET_FALCON03 0x050c 510 #define NVC7C0_SET_FALCON03_V 31:0 511 512 #define NVC7C0_SET_FALCON04 0x0510 513 #define NVC7C0_SET_FALCON04_V 31:0 514 515 #define NVC7C0_SET_FALCON05 0x0514 516 #define NVC7C0_SET_FALCON05_V 31:0 517 518 #define NVC7C0_SET_FALCON06 0x0518 519 #define NVC7C0_SET_FALCON06_V 31:0 520 521 #define NVC7C0_SET_FALCON07 0x051c 522 #define NVC7C0_SET_FALCON07_V 31:0 523 524 #define NVC7C0_SET_FALCON08 0x0520 525 #define NVC7C0_SET_FALCON08_V 31:0 526 527 #define NVC7C0_SET_FALCON09 0x0524 528 #define NVC7C0_SET_FALCON09_V 31:0 529 530 #define NVC7C0_SET_FALCON10 0x0528 531 #define NVC7C0_SET_FALCON10_V 31:0 532 533 #define NVC7C0_SET_FALCON11 0x052c 534 #define NVC7C0_SET_FALCON11_V 31:0 535 536 #define NVC7C0_SET_FALCON12 0x0530 537 #define NVC7C0_SET_FALCON12_V 31:0 538 539 #define NVC7C0_SET_FALCON13 0x0534 540 #define NVC7C0_SET_FALCON13_V 31:0 541 542 #define NVC7C0_SET_FALCON14 0x0538 543 #define NVC7C0_SET_FALCON14_V 31:0 544 545 #define NVC7C0_SET_FALCON15 0x053c 546 #define NVC7C0_SET_FALCON15_V 31:0 547 548 #define NVC7C0_SET_MME_MEM_ADDRESS_A 0x0550 549 #define NVC7C0_SET_MME_MEM_ADDRESS_A_UPPER 16:0 550 551 #define NVC7C0_SET_MME_MEM_ADDRESS_B 0x0554 552 #define NVC7C0_SET_MME_MEM_ADDRESS_B_LOWER 31:0 553 554 #define NVC7C0_SET_MME_DATA_RAM_ADDRESS 0x0558 555 #define NVC7C0_SET_MME_DATA_RAM_ADDRESS_WORD 31:0 556 557 #define NVC7C0_MME_DMA_READ 0x055c 558 #define NVC7C0_MME_DMA_READ_LENGTH 31:0 559 560 #define NVC7C0_MME_DMA_READ_FIFOED 0x0560 561 #define NVC7C0_MME_DMA_READ_FIFOED_LENGTH 31:0 562 563 #define NVC7C0_MME_DMA_WRITE 0x0564 564 #define NVC7C0_MME_DMA_WRITE_LENGTH 31:0 565 566 #define NVC7C0_MME_DMA_REDUCTION 0x0568 567 #define NVC7C0_MME_DMA_REDUCTION_REDUCTION_OP 2:0 568 #define NVC7C0_MME_DMA_REDUCTION_REDUCTION_OP_RED_ADD 0x00000000 569 #define NVC7C0_MME_DMA_REDUCTION_REDUCTION_OP_RED_MIN 0x00000001 570 #define NVC7C0_MME_DMA_REDUCTION_REDUCTION_OP_RED_MAX 0x00000002 571 #define NVC7C0_MME_DMA_REDUCTION_REDUCTION_OP_RED_INC 0x00000003 572 #define NVC7C0_MME_DMA_REDUCTION_REDUCTION_OP_RED_DEC 0x00000004 573 #define NVC7C0_MME_DMA_REDUCTION_REDUCTION_OP_RED_AND 0x00000005 574 #define NVC7C0_MME_DMA_REDUCTION_REDUCTION_OP_RED_OR 0x00000006 575 #define NVC7C0_MME_DMA_REDUCTION_REDUCTION_OP_RED_XOR 0x00000007 576 #define NVC7C0_MME_DMA_REDUCTION_REDUCTION_FORMAT 5:4 577 #define NVC7C0_MME_DMA_REDUCTION_REDUCTION_FORMAT_UNSIGNED 0x00000000 578 #define NVC7C0_MME_DMA_REDUCTION_REDUCTION_FORMAT_SIGNED 0x00000001 579 #define NVC7C0_MME_DMA_REDUCTION_REDUCTION_SIZE 8:8 580 #define NVC7C0_MME_DMA_REDUCTION_REDUCTION_SIZE_FOUR_BYTES 0x00000000 581 #define NVC7C0_MME_DMA_REDUCTION_REDUCTION_SIZE_EIGHT_BYTES 0x00000001 582 583 #define NVC7C0_MME_DMA_SYSMEMBAR 0x056c 584 #define NVC7C0_MME_DMA_SYSMEMBAR_V 0:0 585 586 #define NVC7C0_MME_DMA_SYNC 0x0570 587 #define NVC7C0_MME_DMA_SYNC_VALUE 31:0 588 589 #define NVC7C0_SET_MME_DATA_FIFO_CONFIG 0x0574 590 #define NVC7C0_SET_MME_DATA_FIFO_CONFIG_FIFO_SIZE 2:0 591 #define NVC7C0_SET_MME_DATA_FIFO_CONFIG_FIFO_SIZE_SIZE_0KB 0x00000000 592 #define NVC7C0_SET_MME_DATA_FIFO_CONFIG_FIFO_SIZE_SIZE_4KB 0x00000001 593 #define NVC7C0_SET_MME_DATA_FIFO_CONFIG_FIFO_SIZE_SIZE_8KB 0x00000002 594 #define NVC7C0_SET_MME_DATA_FIFO_CONFIG_FIFO_SIZE_SIZE_12KB 0x00000003 595 #define NVC7C0_SET_MME_DATA_FIFO_CONFIG_FIFO_SIZE_SIZE_16KB 0x00000004 596 597 #define NVC7C0_SET_SHADER_LOCAL_MEMORY_A 0x0790 598 #define NVC7C0_SET_SHADER_LOCAL_MEMORY_A_ADDRESS_UPPER 16:0 599 600 #define NVC7C0_SET_SHADER_LOCAL_MEMORY_B 0x0794 601 #define NVC7C0_SET_SHADER_LOCAL_MEMORY_B_ADDRESS_LOWER 31:0 602 603 #define NVC7C0_SET_SHADER_LOCAL_MEMORY_WINDOW_A 0x07b0 604 #define NVC7C0_SET_SHADER_LOCAL_MEMORY_WINDOW_A_BASE_ADDRESS_UPPER 16:0 605 606 #define NVC7C0_SET_SHADER_LOCAL_MEMORY_WINDOW_B 0x07b4 607 #define NVC7C0_SET_SHADER_LOCAL_MEMORY_WINDOW_B_BASE_ADDRESS 31:0 608 609 #define NVC7C0_THROTTLE_SM 0x07fc 610 #define NVC7C0_THROTTLE_SM_MULTIPLY_ADD 0:0 611 #define NVC7C0_THROTTLE_SM_MULTIPLY_ADD_FALSE 0x00000000 612 #define NVC7C0_THROTTLE_SM_MULTIPLY_ADD_TRUE 0x00000001 613 614 #define NVC7C0_SET_SHADER_CACHE_CONTROL 0x0d94 615 #define NVC7C0_SET_SHADER_CACHE_CONTROL_ICACHE_PREFETCH_ENABLE 0:0 616 #define NVC7C0_SET_SHADER_CACHE_CONTROL_ICACHE_PREFETCH_ENABLE_FALSE 0x00000000 617 #define NVC7C0_SET_SHADER_CACHE_CONTROL_ICACHE_PREFETCH_ENABLE_TRUE 0x00000001 618 619 #define NVC7C0_SET_SCG_COMPUTE_SCHEDULING_PARAMETERS(i) (0x0da0+(i)*4) 620 #define NVC7C0_SET_SCG_COMPUTE_SCHEDULING_PARAMETERS_V 31:0 621 622 #define NVC7C0_SET_SM_TIMEOUT_INTERVAL 0x0de4 623 #define NVC7C0_SET_SM_TIMEOUT_INTERVAL_COUNTER_BIT 5:0 624 625 #define NVC7C0_MME_DMA_WRITE_METHOD_BARRIER 0x0dec 626 #define NVC7C0_MME_DMA_WRITE_METHOD_BARRIER_V 0:0 627 628 #define NVC7C0_INVALIDATE_TEXTURE_DATA_CACHE_NO_WFI 0x1288 629 #define NVC7C0_INVALIDATE_TEXTURE_DATA_CACHE_NO_WFI_LINES 0:0 630 #define NVC7C0_INVALIDATE_TEXTURE_DATA_CACHE_NO_WFI_LINES_ALL 0x00000000 631 #define NVC7C0_INVALIDATE_TEXTURE_DATA_CACHE_NO_WFI_LINES_ONE 0x00000001 632 #define NVC7C0_INVALIDATE_TEXTURE_DATA_CACHE_NO_WFI_TAG 25:4 633 634 #define NVC7C0_ACTIVATE_PERF_SETTINGS_FOR_COMPUTE_CONTEXT 0x12a8 635 #define NVC7C0_ACTIVATE_PERF_SETTINGS_FOR_COMPUTE_CONTEXT_ALL 0:0 636 #define NVC7C0_ACTIVATE_PERF_SETTINGS_FOR_COMPUTE_CONTEXT_ALL_FALSE 0x00000000 637 #define NVC7C0_ACTIVATE_PERF_SETTINGS_FOR_COMPUTE_CONTEXT_ALL_TRUE 0x00000001 638 639 #define NVC7C0_INVALIDATE_SAMPLER_CACHE 0x1330 640 #define NVC7C0_INVALIDATE_SAMPLER_CACHE_LINES 0:0 641 #define NVC7C0_INVALIDATE_SAMPLER_CACHE_LINES_ALL 0x00000000 642 #define NVC7C0_INVALIDATE_SAMPLER_CACHE_LINES_ONE 0x00000001 643 #define NVC7C0_INVALIDATE_SAMPLER_CACHE_TAG 25:4 644 645 #define NVC7C0_INVALIDATE_TEXTURE_HEADER_CACHE 0x1334 646 #define NVC7C0_INVALIDATE_TEXTURE_HEADER_CACHE_LINES 0:0 647 #define NVC7C0_INVALIDATE_TEXTURE_HEADER_CACHE_LINES_ALL 0x00000000 648 #define NVC7C0_INVALIDATE_TEXTURE_HEADER_CACHE_LINES_ONE 0x00000001 649 #define NVC7C0_INVALIDATE_TEXTURE_HEADER_CACHE_TAG 25:4 650 651 #define NVC7C0_INVALIDATE_TEXTURE_DATA_CACHE 0x1338 652 #define NVC7C0_INVALIDATE_TEXTURE_DATA_CACHE_LINES 0:0 653 #define NVC7C0_INVALIDATE_TEXTURE_DATA_CACHE_LINES_ALL 0x00000000 654 #define NVC7C0_INVALIDATE_TEXTURE_DATA_CACHE_LINES_ONE 0x00000001 655 #define NVC7C0_INVALIDATE_TEXTURE_DATA_CACHE_TAG 25:4 656 657 #define NVC7C0_INVALIDATE_SAMPLER_CACHE_NO_WFI 0x1424 658 #define NVC7C0_INVALIDATE_SAMPLER_CACHE_NO_WFI_LINES 0:0 659 #define NVC7C0_INVALIDATE_SAMPLER_CACHE_NO_WFI_LINES_ALL 0x00000000 660 #define NVC7C0_INVALIDATE_SAMPLER_CACHE_NO_WFI_LINES_ONE 0x00000001 661 #define NVC7C0_INVALIDATE_SAMPLER_CACHE_NO_WFI_TAG 25:4 662 663 #define NVC7C0_SET_SHADER_EXCEPTIONS 0x1528 664 #define NVC7C0_SET_SHADER_EXCEPTIONS_ENABLE 0:0 665 #define NVC7C0_SET_SHADER_EXCEPTIONS_ENABLE_FALSE 0x00000000 666 #define NVC7C0_SET_SHADER_EXCEPTIONS_ENABLE_TRUE 0x00000001 667 668 #define NVC7C0_SET_RENDER_ENABLE_A 0x1550 669 #define NVC7C0_SET_RENDER_ENABLE_A_OFFSET_UPPER 7:0 670 671 #define NVC7C0_SET_RENDER_ENABLE_B 0x1554 672 #define NVC7C0_SET_RENDER_ENABLE_B_OFFSET_LOWER 31:0 673 674 #define NVC7C0_SET_RENDER_ENABLE_C 0x1558 675 #define NVC7C0_SET_RENDER_ENABLE_C_MODE 2:0 676 #define NVC7C0_SET_RENDER_ENABLE_C_MODE_FALSE 0x00000000 677 #define NVC7C0_SET_RENDER_ENABLE_C_MODE_TRUE 0x00000001 678 #define NVC7C0_SET_RENDER_ENABLE_C_MODE_CONDITIONAL 0x00000002 679 #define NVC7C0_SET_RENDER_ENABLE_C_MODE_RENDER_IF_EQUAL 0x00000003 680 #define NVC7C0_SET_RENDER_ENABLE_C_MODE_RENDER_IF_NOT_EQUAL 0x00000004 681 682 #define NVC7C0_SET_TEX_SAMPLER_POOL_A 0x155c 683 #define NVC7C0_SET_TEX_SAMPLER_POOL_A_OFFSET_UPPER 16:0 684 685 #define NVC7C0_SET_TEX_SAMPLER_POOL_B 0x1560 686 #define NVC7C0_SET_TEX_SAMPLER_POOL_B_OFFSET_LOWER 31:0 687 688 #define NVC7C0_SET_TEX_SAMPLER_POOL_C 0x1564 689 #define NVC7C0_SET_TEX_SAMPLER_POOL_C_MAXIMUM_INDEX 19:0 690 691 #define NVC7C0_SET_TEX_HEADER_POOL_A 0x1574 692 #define NVC7C0_SET_TEX_HEADER_POOL_A_OFFSET_UPPER 16:0 693 694 #define NVC7C0_SET_TEX_HEADER_POOL_B 0x1578 695 #define NVC7C0_SET_TEX_HEADER_POOL_B_OFFSET_LOWER 31:0 696 697 #define NVC7C0_SET_TEX_HEADER_POOL_C 0x157c 698 #define NVC7C0_SET_TEX_HEADER_POOL_C_MAXIMUM_INDEX 21:0 699 700 #define NVC7C0_INVALIDATE_SHADER_CACHES_NO_WFI 0x1698 701 #define NVC7C0_INVALIDATE_SHADER_CACHES_NO_WFI_INSTRUCTION 0:0 702 #define NVC7C0_INVALIDATE_SHADER_CACHES_NO_WFI_INSTRUCTION_FALSE 0x00000000 703 #define NVC7C0_INVALIDATE_SHADER_CACHES_NO_WFI_INSTRUCTION_TRUE 0x00000001 704 #define NVC7C0_INVALIDATE_SHADER_CACHES_NO_WFI_GLOBAL_DATA 4:4 705 #define NVC7C0_INVALIDATE_SHADER_CACHES_NO_WFI_GLOBAL_DATA_FALSE 0x00000000 706 #define NVC7C0_INVALIDATE_SHADER_CACHES_NO_WFI_GLOBAL_DATA_TRUE 0x00000001 707 #define NVC7C0_INVALIDATE_SHADER_CACHES_NO_WFI_CONSTANT 12:12 708 #define NVC7C0_INVALIDATE_SHADER_CACHES_NO_WFI_CONSTANT_FALSE 0x00000000 709 #define NVC7C0_INVALIDATE_SHADER_CACHES_NO_WFI_CONSTANT_TRUE 0x00000001 710 711 #define NVC7C0_SET_RENDER_ENABLE_OVERRIDE 0x1944 712 #define NVC7C0_SET_RENDER_ENABLE_OVERRIDE_MODE 1:0 713 #define NVC7C0_SET_RENDER_ENABLE_OVERRIDE_MODE_USE_RENDER_ENABLE 0x00000000 714 #define NVC7C0_SET_RENDER_ENABLE_OVERRIDE_MODE_ALWAYS_RENDER 0x00000001 715 #define NVC7C0_SET_RENDER_ENABLE_OVERRIDE_MODE_NEVER_RENDER 0x00000002 716 717 #define NVC7C0_PIPE_NOP 0x1a2c 718 #define NVC7C0_PIPE_NOP_V 31:0 719 720 #define NVC7C0_SET_SPARE00 0x1a30 721 #define NVC7C0_SET_SPARE00_V 31:0 722 723 #define NVC7C0_SET_SPARE01 0x1a34 724 #define NVC7C0_SET_SPARE01_V 31:0 725 726 #define NVC7C0_SET_SPARE02 0x1a38 727 #define NVC7C0_SET_SPARE02_V 31:0 728 729 #define NVC7C0_SET_SPARE03 0x1a3c 730 #define NVC7C0_SET_SPARE03_V 31:0 731 732 #define NVC7C0_SET_REPORT_SEMAPHORE_A 0x1b00 733 #define NVC7C0_SET_REPORT_SEMAPHORE_A_OFFSET_UPPER 7:0 734 735 #define NVC7C0_SET_REPORT_SEMAPHORE_B 0x1b04 736 #define NVC7C0_SET_REPORT_SEMAPHORE_B_OFFSET_LOWER 31:0 737 738 #define NVC7C0_SET_REPORT_SEMAPHORE_C 0x1b08 739 #define NVC7C0_SET_REPORT_SEMAPHORE_C_PAYLOAD 31:0 740 741 #define NVC7C0_SET_REPORT_SEMAPHORE_D 0x1b0c 742 #define NVC7C0_SET_REPORT_SEMAPHORE_D_OPERATION 1:0 743 #define NVC7C0_SET_REPORT_SEMAPHORE_D_OPERATION_RELEASE 0x00000000 744 #define NVC7C0_SET_REPORT_SEMAPHORE_D_OPERATION_TRAP 0x00000003 745 #define NVC7C0_SET_REPORT_SEMAPHORE_D_AWAKEN_ENABLE 20:20 746 #define NVC7C0_SET_REPORT_SEMAPHORE_D_AWAKEN_ENABLE_FALSE 0x00000000 747 #define NVC7C0_SET_REPORT_SEMAPHORE_D_AWAKEN_ENABLE_TRUE 0x00000001 748 #define NVC7C0_SET_REPORT_SEMAPHORE_D_STRUCTURE_SIZE 28:28 749 #define NVC7C0_SET_REPORT_SEMAPHORE_D_STRUCTURE_SIZE_FOUR_WORDS 0x00000000 750 #define NVC7C0_SET_REPORT_SEMAPHORE_D_STRUCTURE_SIZE_ONE_WORD 0x00000001 751 #define NVC7C0_SET_REPORT_SEMAPHORE_D_FLUSH_DISABLE 2:2 752 #define NVC7C0_SET_REPORT_SEMAPHORE_D_FLUSH_DISABLE_FALSE 0x00000000 753 #define NVC7C0_SET_REPORT_SEMAPHORE_D_FLUSH_DISABLE_TRUE 0x00000001 754 #define NVC7C0_SET_REPORT_SEMAPHORE_D_REDUCTION_ENABLE 3:3 755 #define NVC7C0_SET_REPORT_SEMAPHORE_D_REDUCTION_ENABLE_FALSE 0x00000000 756 #define NVC7C0_SET_REPORT_SEMAPHORE_D_REDUCTION_ENABLE_TRUE 0x00000001 757 #define NVC7C0_SET_REPORT_SEMAPHORE_D_REDUCTION_OP 11:9 758 #define NVC7C0_SET_REPORT_SEMAPHORE_D_REDUCTION_OP_RED_ADD 0x00000000 759 #define NVC7C0_SET_REPORT_SEMAPHORE_D_REDUCTION_OP_RED_MIN 0x00000001 760 #define NVC7C0_SET_REPORT_SEMAPHORE_D_REDUCTION_OP_RED_MAX 0x00000002 761 #define NVC7C0_SET_REPORT_SEMAPHORE_D_REDUCTION_OP_RED_INC 0x00000003 762 #define NVC7C0_SET_REPORT_SEMAPHORE_D_REDUCTION_OP_RED_DEC 0x00000004 763 #define NVC7C0_SET_REPORT_SEMAPHORE_D_REDUCTION_OP_RED_AND 0x00000005 764 #define NVC7C0_SET_REPORT_SEMAPHORE_D_REDUCTION_OP_RED_OR 0x00000006 765 #define NVC7C0_SET_REPORT_SEMAPHORE_D_REDUCTION_OP_RED_XOR 0x00000007 766 #define NVC7C0_SET_REPORT_SEMAPHORE_D_REDUCTION_FORMAT 18:17 767 #define NVC7C0_SET_REPORT_SEMAPHORE_D_REDUCTION_FORMAT_UNSIGNED_32 0x00000000 768 #define NVC7C0_SET_REPORT_SEMAPHORE_D_REDUCTION_FORMAT_SIGNED_32 0x00000001 769 #define NVC7C0_SET_REPORT_SEMAPHORE_D_CONDITIONAL_TRAP 19:19 770 #define NVC7C0_SET_REPORT_SEMAPHORE_D_CONDITIONAL_TRAP_FALSE 0x00000000 771 #define NVC7C0_SET_REPORT_SEMAPHORE_D_CONDITIONAL_TRAP_TRUE 0x00000001 772 773 #define NVC7C0_SET_TRAP_HANDLER_A 0x25f8 774 #define NVC7C0_SET_TRAP_HANDLER_A_ADDRESS_UPPER 16:0 775 776 #define NVC7C0_SET_TRAP_HANDLER_B 0x25fc 777 #define NVC7C0_SET_TRAP_HANDLER_B_ADDRESS_LOWER 31:0 778 779 #define NVC7C0_SET_BINDLESS_TEXTURE 0x2608 780 #define NVC7C0_SET_BINDLESS_TEXTURE_CONSTANT_BUFFER_SLOT_SELECT 2:0 781 782 #define NVC7C0_SET_SHADER_PERFORMANCE_SNAPSHOT_COUNTER_VALUE(i) (0x32f4+(i)*4) 783 #define NVC7C0_SET_SHADER_PERFORMANCE_SNAPSHOT_COUNTER_VALUE_V 31:0 784 785 #define NVC7C0_SET_SHADER_PERFORMANCE_SNAPSHOT_COUNTER_VALUE_UPPER(i) (0x3314+(i)*4) 786 #define NVC7C0_SET_SHADER_PERFORMANCE_SNAPSHOT_COUNTER_VALUE_UPPER_V 31:0 787 788 #define NVC7C0_ENABLE_SHADER_PERFORMANCE_SNAPSHOT_COUNTER 0x3334 789 #define NVC7C0_ENABLE_SHADER_PERFORMANCE_SNAPSHOT_COUNTER_V 0:0 790 791 #define NVC7C0_DISABLE_SHADER_PERFORMANCE_SNAPSHOT_COUNTER 0x3338 792 #define NVC7C0_DISABLE_SHADER_PERFORMANCE_SNAPSHOT_COUNTER_V 0:0 793 794 #define NVC7C0_SET_SHADER_PERFORMANCE_COUNTER_VALUE_UPPER(i) (0x333c+(i)*4) 795 #define NVC7C0_SET_SHADER_PERFORMANCE_COUNTER_VALUE_UPPER_V 31:0 796 797 #define NVC7C0_SET_SHADER_PERFORMANCE_COUNTER_VALUE(i) (0x335c+(i)*4) 798 #define NVC7C0_SET_SHADER_PERFORMANCE_COUNTER_VALUE_V 31:0 799 800 #define NVC7C0_SET_SHADER_PERFORMANCE_COUNTER_EVENT(i) (0x337c+(i)*4) 801 #define NVC7C0_SET_SHADER_PERFORMANCE_COUNTER_EVENT_EVENT 7:0 802 803 #define NVC7C0_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_A(i) (0x339c+(i)*4) 804 #define NVC7C0_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_A_EVENT0 1:0 805 #define NVC7C0_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_A_BIT_SELECT0 4:2 806 #define NVC7C0_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_A_EVENT1 6:5 807 #define NVC7C0_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_A_BIT_SELECT1 9:7 808 #define NVC7C0_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_A_EVENT2 11:10 809 #define NVC7C0_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_A_BIT_SELECT2 14:12 810 #define NVC7C0_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_A_EVENT3 16:15 811 #define NVC7C0_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_A_BIT_SELECT3 19:17 812 #define NVC7C0_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_A_EVENT4 21:20 813 #define NVC7C0_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_A_BIT_SELECT4 24:22 814 #define NVC7C0_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_A_EVENT5 26:25 815 #define NVC7C0_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_A_BIT_SELECT5 29:27 816 #define NVC7C0_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_A_SPARE 31:30 817 818 #define NVC7C0_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_B(i) (0x33bc+(i)*4) 819 #define NVC7C0_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_B_EDGE 0:0 820 #define NVC7C0_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_B_MODE 2:1 821 #define NVC7C0_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_B_WINDOWED 3:3 822 #define NVC7C0_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_B_FUNC 19:4 823 824 #define NVC7C0_SET_SHADER_PERFORMANCE_COUNTER_TRAP_CONTROL 0x33dc 825 #define NVC7C0_SET_SHADER_PERFORMANCE_COUNTER_TRAP_CONTROL_MASK 7:0 826 827 #define NVC7C0_START_SHADER_PERFORMANCE_COUNTER 0x33e0 828 #define NVC7C0_START_SHADER_PERFORMANCE_COUNTER_COUNTER_MASK 7:0 829 830 #define NVC7C0_STOP_SHADER_PERFORMANCE_COUNTER 0x33e4 831 #define NVC7C0_STOP_SHADER_PERFORMANCE_COUNTER_COUNTER_MASK 7:0 832 833 #define NVC7C0_SET_SHADER_PERFORMANCE_COUNTER_SCTL_FILTER 0x33e8 834 #define NVC7C0_SET_SHADER_PERFORMANCE_COUNTER_SCTL_FILTER_V 31:0 835 836 #define NVC7C0_SET_SHADER_PERFORMANCE_COUNTER_CORE_MIO_FILTER 0x33ec 837 #define NVC7C0_SET_SHADER_PERFORMANCE_COUNTER_CORE_MIO_FILTER_V 31:0 838 839 #define NVC7C0_SET_MME_SHADOW_SCRATCH(i) (0x3400+(i)*4) 840 #define NVC7C0_SET_MME_SHADOW_SCRATCH_V 31:0 841 842 #define NVC7C0_CALL_MME_MACRO(j) (0x3800+(j)*8) 843 #define NVC7C0_CALL_MME_MACRO_V 31:0 844 845 #define NVC7C0_CALL_MME_DATA(j) (0x3804+(j)*8) 846 #define NVC7C0_CALL_MME_DATA_V 31:0 847 848 #endif /* _cl_ampere_compute_b_h_ */ 849